1 /*
2  * Copyright (c) 2009-2010 Chelsio, Inc. All rights reserved.
3  *
4  * This software is available to you under a choice of one of two
5  * licenses.  You may choose to be licensed under the terms of the GNU
6  * General Public License (GPL) Version 2, available from the file
7  * COPYING in the main directory of this source tree, or the
8  * OpenIB.org BSD license below:
9  *
10  *     Redistribution and use in source and binary forms, with or
11  *     without modification, are permitted provided that the following
12  *     conditions are met:
13  *
14  *      - Redistributions of source code must retain the above
15  *	  copyright notice, this list of conditions and the following
16  *	  disclaimer.
17  *
18  *      - Redistributions in binary form must reproduce the above
19  *	  copyright notice, this list of conditions and the following
20  *	  disclaimer in the documentation and/or other materials
21  *	  provided with the distribution.
22  *
23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30  * SOFTWARE.
31  */
32 #include <linux/module.h>
33 #include <linux/moduleparam.h>
34 #include <linux/debugfs.h>
35 #include <linux/vmalloc.h>
36 #include <linux/math64.h>
37 
38 #include <rdma/ib_verbs.h>
39 
40 #include "iw_cxgb4.h"
41 
42 #define DRV_VERSION "0.1"
43 
44 MODULE_AUTHOR("Steve Wise");
45 MODULE_DESCRIPTION("Chelsio T4/T5 RDMA Driver");
46 MODULE_LICENSE("Dual BSD/GPL");
47 MODULE_VERSION(DRV_VERSION);
48 
49 static int allow_db_fc_on_t5;
50 module_param(allow_db_fc_on_t5, int, 0644);
51 MODULE_PARM_DESC(allow_db_fc_on_t5,
52 		 "Allow DB Flow Control on T5 (default = 0)");
53 
54 static int allow_db_coalescing_on_t5;
55 module_param(allow_db_coalescing_on_t5, int, 0644);
56 MODULE_PARM_DESC(allow_db_coalescing_on_t5,
57 		 "Allow DB Coalescing on T5 (default = 0)");
58 
59 int c4iw_wr_log = 0;
60 module_param(c4iw_wr_log, int, 0444);
61 MODULE_PARM_DESC(c4iw_wr_log, "Enables logging of work request timing data.");
62 
63 static int c4iw_wr_log_size_order = 12;
64 module_param(c4iw_wr_log_size_order, int, 0444);
65 MODULE_PARM_DESC(c4iw_wr_log_size_order,
66 		 "Number of entries (log2) in the work request timing log.");
67 
68 struct uld_ctx {
69 	struct list_head entry;
70 	struct cxgb4_lld_info lldi;
71 	struct c4iw_dev *dev;
72 };
73 
74 static LIST_HEAD(uld_ctx_list);
75 static DEFINE_MUTEX(dev_mutex);
76 
77 #define DB_FC_RESUME_SIZE 64
78 #define DB_FC_RESUME_DELAY 1
79 #define DB_FC_DRAIN_THRESH 0
80 
81 static struct dentry *c4iw_debugfs_root;
82 
83 struct c4iw_debugfs_data {
84 	struct c4iw_dev *devp;
85 	char *buf;
86 	int bufsize;
87 	int pos;
88 };
89 
90 static int count_idrs(int id, void *p, void *data)
91 {
92 	int *countp = data;
93 
94 	*countp = *countp + 1;
95 	return 0;
96 }
97 
98 static ssize_t debugfs_read(struct file *file, char __user *buf, size_t count,
99 			    loff_t *ppos)
100 {
101 	struct c4iw_debugfs_data *d = file->private_data;
102 
103 	return simple_read_from_buffer(buf, count, ppos, d->buf, d->pos);
104 }
105 
106 void c4iw_log_wr_stats(struct t4_wq *wq, struct t4_cqe *cqe)
107 {
108 	struct wr_log_entry le;
109 	int idx;
110 
111 	if (!wq->rdev->wr_log)
112 		return;
113 
114 	idx = (atomic_inc_return(&wq->rdev->wr_log_idx) - 1) &
115 		(wq->rdev->wr_log_size - 1);
116 	le.poll_sge_ts = cxgb4_read_sge_timestamp(wq->rdev->lldi.ports[0]);
117 	getnstimeofday(&le.poll_host_ts);
118 	le.valid = 1;
119 	le.cqe_sge_ts = CQE_TS(cqe);
120 	if (SQ_TYPE(cqe)) {
121 		le.qid = wq->sq.qid;
122 		le.opcode = CQE_OPCODE(cqe);
123 		le.post_host_ts = wq->sq.sw_sq[wq->sq.cidx].host_ts;
124 		le.post_sge_ts = wq->sq.sw_sq[wq->sq.cidx].sge_ts;
125 		le.wr_id = CQE_WRID_SQ_IDX(cqe);
126 	} else {
127 		le.qid = wq->rq.qid;
128 		le.opcode = FW_RI_RECEIVE;
129 		le.post_host_ts = wq->rq.sw_rq[wq->rq.cidx].host_ts;
130 		le.post_sge_ts = wq->rq.sw_rq[wq->rq.cidx].sge_ts;
131 		le.wr_id = CQE_WRID_MSN(cqe);
132 	}
133 	wq->rdev->wr_log[idx] = le;
134 }
135 
136 static int wr_log_show(struct seq_file *seq, void *v)
137 {
138 	struct c4iw_dev *dev = seq->private;
139 	struct timespec prev_ts = {0, 0};
140 	struct wr_log_entry *lep;
141 	int prev_ts_set = 0;
142 	int idx, end;
143 
144 #define ts2ns(ts) div64_u64((ts) * dev->rdev.lldi.cclk_ps, 1000)
145 
146 	idx = atomic_read(&dev->rdev.wr_log_idx) &
147 		(dev->rdev.wr_log_size - 1);
148 	end = idx - 1;
149 	if (end < 0)
150 		end = dev->rdev.wr_log_size - 1;
151 	lep = &dev->rdev.wr_log[idx];
152 	while (idx != end) {
153 		if (lep->valid) {
154 			if (!prev_ts_set) {
155 				prev_ts_set = 1;
156 				prev_ts = lep->poll_host_ts;
157 			}
158 			seq_printf(seq, "%04u: sec %lu nsec %lu qid %u opcode "
159 				   "%u %s 0x%x host_wr_delta sec %lu nsec %lu "
160 				   "post_sge_ts 0x%llx cqe_sge_ts 0x%llx "
161 				   "poll_sge_ts 0x%llx post_poll_delta_ns %llu "
162 				   "cqe_poll_delta_ns %llu\n",
163 				   idx,
164 				   timespec_sub(lep->poll_host_ts,
165 						prev_ts).tv_sec,
166 				   timespec_sub(lep->poll_host_ts,
167 						prev_ts).tv_nsec,
168 				   lep->qid, lep->opcode,
169 				   lep->opcode == FW_RI_RECEIVE ?
170 							"msn" : "wrid",
171 				   lep->wr_id,
172 				   timespec_sub(lep->poll_host_ts,
173 						lep->post_host_ts).tv_sec,
174 				   timespec_sub(lep->poll_host_ts,
175 						lep->post_host_ts).tv_nsec,
176 				   lep->post_sge_ts, lep->cqe_sge_ts,
177 				   lep->poll_sge_ts,
178 				   ts2ns(lep->poll_sge_ts - lep->post_sge_ts),
179 				   ts2ns(lep->poll_sge_ts - lep->cqe_sge_ts));
180 			prev_ts = lep->poll_host_ts;
181 		}
182 		idx++;
183 		if (idx > (dev->rdev.wr_log_size - 1))
184 			idx = 0;
185 		lep = &dev->rdev.wr_log[idx];
186 	}
187 #undef ts2ns
188 	return 0;
189 }
190 
191 static int wr_log_open(struct inode *inode, struct file *file)
192 {
193 	return single_open(file, wr_log_show, inode->i_private);
194 }
195 
196 static ssize_t wr_log_clear(struct file *file, const char __user *buf,
197 			    size_t count, loff_t *pos)
198 {
199 	struct c4iw_dev *dev = ((struct seq_file *)file->private_data)->private;
200 	int i;
201 
202 	if (dev->rdev.wr_log)
203 		for (i = 0; i < dev->rdev.wr_log_size; i++)
204 			dev->rdev.wr_log[i].valid = 0;
205 	return count;
206 }
207 
208 static const struct file_operations wr_log_debugfs_fops = {
209 	.owner   = THIS_MODULE,
210 	.open    = wr_log_open,
211 	.release = single_release,
212 	.read    = seq_read,
213 	.llseek  = seq_lseek,
214 	.write   = wr_log_clear,
215 };
216 
217 static struct sockaddr_in zero_sin = {
218 	.sin_family = AF_INET,
219 };
220 
221 static struct sockaddr_in6 zero_sin6 = {
222 	.sin6_family = AF_INET6,
223 };
224 
225 static void set_ep_sin_addrs(struct c4iw_ep *ep,
226 			     struct sockaddr_in **lsin,
227 			     struct sockaddr_in **rsin,
228 			     struct sockaddr_in **m_lsin,
229 			     struct sockaddr_in **m_rsin)
230 {
231 	struct iw_cm_id *id = ep->com.cm_id;
232 
233 	*lsin = (struct sockaddr_in *)&ep->com.local_addr;
234 	*rsin = (struct sockaddr_in *)&ep->com.remote_addr;
235 	if (id) {
236 		*m_lsin = (struct sockaddr_in *)&id->m_local_addr;
237 		*m_rsin = (struct sockaddr_in *)&id->m_remote_addr;
238 	} else {
239 		*m_lsin = &zero_sin;
240 		*m_rsin = &zero_sin;
241 	}
242 }
243 
244 static void set_ep_sin6_addrs(struct c4iw_ep *ep,
245 			      struct sockaddr_in6 **lsin6,
246 			      struct sockaddr_in6 **rsin6,
247 			      struct sockaddr_in6 **m_lsin6,
248 			      struct sockaddr_in6 **m_rsin6)
249 {
250 	struct iw_cm_id *id = ep->com.cm_id;
251 
252 	*lsin6 = (struct sockaddr_in6 *)&ep->com.local_addr;
253 	*rsin6 = (struct sockaddr_in6 *)&ep->com.remote_addr;
254 	if (id) {
255 		*m_lsin6 = (struct sockaddr_in6 *)&id->m_local_addr;
256 		*m_rsin6 = (struct sockaddr_in6 *)&id->m_remote_addr;
257 	} else {
258 		*m_lsin6 = &zero_sin6;
259 		*m_rsin6 = &zero_sin6;
260 	}
261 }
262 
263 static int dump_qp(int id, void *p, void *data)
264 {
265 	struct c4iw_qp *qp = p;
266 	struct c4iw_debugfs_data *qpd = data;
267 	int space;
268 	int cc;
269 
270 	if (id != qp->wq.sq.qid)
271 		return 0;
272 
273 	space = qpd->bufsize - qpd->pos - 1;
274 	if (space == 0)
275 		return 1;
276 
277 	if (qp->ep) {
278 		struct c4iw_ep *ep = qp->ep;
279 
280 		if (ep->com.local_addr.ss_family == AF_INET) {
281 			struct sockaddr_in *lsin;
282 			struct sockaddr_in *rsin;
283 			struct sockaddr_in *m_lsin;
284 			struct sockaddr_in *m_rsin;
285 
286 			set_ep_sin_addrs(ep, &lsin, &rsin, &m_lsin, &m_rsin);
287 			cc = snprintf(qpd->buf + qpd->pos, space,
288 				      "rc qp sq id %u rq id %u state %u "
289 				      "onchip %u ep tid %u state %u "
290 				      "%pI4:%u/%u->%pI4:%u/%u\n",
291 				      qp->wq.sq.qid, qp->wq.rq.qid,
292 				      (int)qp->attr.state,
293 				      qp->wq.sq.flags & T4_SQ_ONCHIP,
294 				      ep->hwtid, (int)ep->com.state,
295 				      &lsin->sin_addr, ntohs(lsin->sin_port),
296 				      ntohs(m_lsin->sin_port),
297 				      &rsin->sin_addr, ntohs(rsin->sin_port),
298 				      ntohs(m_rsin->sin_port));
299 		} else {
300 			struct sockaddr_in6 *lsin6;
301 			struct sockaddr_in6 *rsin6;
302 			struct sockaddr_in6 *m_lsin6;
303 			struct sockaddr_in6 *m_rsin6;
304 
305 			set_ep_sin6_addrs(ep, &lsin6, &rsin6, &m_lsin6,
306 					  &m_rsin6);
307 			cc = snprintf(qpd->buf + qpd->pos, space,
308 				      "rc qp sq id %u rq id %u state %u "
309 				      "onchip %u ep tid %u state %u "
310 				      "%pI6:%u/%u->%pI6:%u/%u\n",
311 				      qp->wq.sq.qid, qp->wq.rq.qid,
312 				      (int)qp->attr.state,
313 				      qp->wq.sq.flags & T4_SQ_ONCHIP,
314 				      ep->hwtid, (int)ep->com.state,
315 				      &lsin6->sin6_addr,
316 				      ntohs(lsin6->sin6_port),
317 				      ntohs(m_lsin6->sin6_port),
318 				      &rsin6->sin6_addr,
319 				      ntohs(rsin6->sin6_port),
320 				      ntohs(m_rsin6->sin6_port));
321 		}
322 	} else
323 		cc = snprintf(qpd->buf + qpd->pos, space,
324 			     "qp sq id %u rq id %u state %u onchip %u\n",
325 			      qp->wq.sq.qid, qp->wq.rq.qid,
326 			      (int)qp->attr.state,
327 			      qp->wq.sq.flags & T4_SQ_ONCHIP);
328 	if (cc < space)
329 		qpd->pos += cc;
330 	return 0;
331 }
332 
333 static int qp_release(struct inode *inode, struct file *file)
334 {
335 	struct c4iw_debugfs_data *qpd = file->private_data;
336 	if (!qpd) {
337 		pr_info("%s null qpd?\n", __func__);
338 		return 0;
339 	}
340 	vfree(qpd->buf);
341 	kfree(qpd);
342 	return 0;
343 }
344 
345 static int qp_open(struct inode *inode, struct file *file)
346 {
347 	struct c4iw_debugfs_data *qpd;
348 	int count = 1;
349 
350 	qpd = kmalloc(sizeof *qpd, GFP_KERNEL);
351 	if (!qpd)
352 		return -ENOMEM;
353 
354 	qpd->devp = inode->i_private;
355 	qpd->pos = 0;
356 
357 	spin_lock_irq(&qpd->devp->lock);
358 	idr_for_each(&qpd->devp->qpidr, count_idrs, &count);
359 	spin_unlock_irq(&qpd->devp->lock);
360 
361 	qpd->bufsize = count * 180;
362 	qpd->buf = vmalloc(qpd->bufsize);
363 	if (!qpd->buf) {
364 		kfree(qpd);
365 		return -ENOMEM;
366 	}
367 
368 	spin_lock_irq(&qpd->devp->lock);
369 	idr_for_each(&qpd->devp->qpidr, dump_qp, qpd);
370 	spin_unlock_irq(&qpd->devp->lock);
371 
372 	qpd->buf[qpd->pos++] = 0;
373 	file->private_data = qpd;
374 	return 0;
375 }
376 
377 static const struct file_operations qp_debugfs_fops = {
378 	.owner   = THIS_MODULE,
379 	.open    = qp_open,
380 	.release = qp_release,
381 	.read    = debugfs_read,
382 	.llseek  = default_llseek,
383 };
384 
385 static int dump_stag(int id, void *p, void *data)
386 {
387 	struct c4iw_debugfs_data *stagd = data;
388 	int space;
389 	int cc;
390 	struct fw_ri_tpte tpte;
391 	int ret;
392 
393 	space = stagd->bufsize - stagd->pos - 1;
394 	if (space == 0)
395 		return 1;
396 
397 	ret = cxgb4_read_tpte(stagd->devp->rdev.lldi.ports[0], (u32)id<<8,
398 			      (__be32 *)&tpte);
399 	if (ret) {
400 		dev_err(&stagd->devp->rdev.lldi.pdev->dev,
401 			"%s cxgb4_read_tpte err %d\n", __func__, ret);
402 		return ret;
403 	}
404 	cc = snprintf(stagd->buf + stagd->pos, space,
405 		      "stag: idx 0x%x valid %d key 0x%x state %d pdid %d "
406 		      "perm 0x%x ps %d len 0x%llx va 0x%llx\n",
407 		      (u32)id<<8,
408 		      FW_RI_TPTE_VALID_G(ntohl(tpte.valid_to_pdid)),
409 		      FW_RI_TPTE_STAGKEY_G(ntohl(tpte.valid_to_pdid)),
410 		      FW_RI_TPTE_STAGSTATE_G(ntohl(tpte.valid_to_pdid)),
411 		      FW_RI_TPTE_PDID_G(ntohl(tpte.valid_to_pdid)),
412 		      FW_RI_TPTE_PERM_G(ntohl(tpte.locread_to_qpid)),
413 		      FW_RI_TPTE_PS_G(ntohl(tpte.locread_to_qpid)),
414 		      ((u64)ntohl(tpte.len_hi) << 32) | ntohl(tpte.len_lo),
415 		      ((u64)ntohl(tpte.va_hi) << 32) | ntohl(tpte.va_lo_fbo));
416 	if (cc < space)
417 		stagd->pos += cc;
418 	return 0;
419 }
420 
421 static int stag_release(struct inode *inode, struct file *file)
422 {
423 	struct c4iw_debugfs_data *stagd = file->private_data;
424 	if (!stagd) {
425 		pr_info("%s null stagd?\n", __func__);
426 		return 0;
427 	}
428 	vfree(stagd->buf);
429 	kfree(stagd);
430 	return 0;
431 }
432 
433 static int stag_open(struct inode *inode, struct file *file)
434 {
435 	struct c4iw_debugfs_data *stagd;
436 	int ret = 0;
437 	int count = 1;
438 
439 	stagd = kmalloc(sizeof *stagd, GFP_KERNEL);
440 	if (!stagd) {
441 		ret = -ENOMEM;
442 		goto out;
443 	}
444 	stagd->devp = inode->i_private;
445 	stagd->pos = 0;
446 
447 	spin_lock_irq(&stagd->devp->lock);
448 	idr_for_each(&stagd->devp->mmidr, count_idrs, &count);
449 	spin_unlock_irq(&stagd->devp->lock);
450 
451 	stagd->bufsize = count * 256;
452 	stagd->buf = vmalloc(stagd->bufsize);
453 	if (!stagd->buf) {
454 		ret = -ENOMEM;
455 		goto err1;
456 	}
457 
458 	spin_lock_irq(&stagd->devp->lock);
459 	idr_for_each(&stagd->devp->mmidr, dump_stag, stagd);
460 	spin_unlock_irq(&stagd->devp->lock);
461 
462 	stagd->buf[stagd->pos++] = 0;
463 	file->private_data = stagd;
464 	goto out;
465 err1:
466 	kfree(stagd);
467 out:
468 	return ret;
469 }
470 
471 static const struct file_operations stag_debugfs_fops = {
472 	.owner   = THIS_MODULE,
473 	.open    = stag_open,
474 	.release = stag_release,
475 	.read    = debugfs_read,
476 	.llseek  = default_llseek,
477 };
478 
479 static char *db_state_str[] = {"NORMAL", "FLOW_CONTROL", "RECOVERY", "STOPPED"};
480 
481 static int stats_show(struct seq_file *seq, void *v)
482 {
483 	struct c4iw_dev *dev = seq->private;
484 
485 	seq_printf(seq, "   Object: %10s %10s %10s %10s\n", "Total", "Current",
486 		   "Max", "Fail");
487 	seq_printf(seq, "     PDID: %10llu %10llu %10llu %10llu\n",
488 			dev->rdev.stats.pd.total, dev->rdev.stats.pd.cur,
489 			dev->rdev.stats.pd.max, dev->rdev.stats.pd.fail);
490 	seq_printf(seq, "      QID: %10llu %10llu %10llu %10llu\n",
491 			dev->rdev.stats.qid.total, dev->rdev.stats.qid.cur,
492 			dev->rdev.stats.qid.max, dev->rdev.stats.qid.fail);
493 	seq_printf(seq, "   TPTMEM: %10llu %10llu %10llu %10llu\n",
494 			dev->rdev.stats.stag.total, dev->rdev.stats.stag.cur,
495 			dev->rdev.stats.stag.max, dev->rdev.stats.stag.fail);
496 	seq_printf(seq, "   PBLMEM: %10llu %10llu %10llu %10llu\n",
497 			dev->rdev.stats.pbl.total, dev->rdev.stats.pbl.cur,
498 			dev->rdev.stats.pbl.max, dev->rdev.stats.pbl.fail);
499 	seq_printf(seq, "   RQTMEM: %10llu %10llu %10llu %10llu\n",
500 			dev->rdev.stats.rqt.total, dev->rdev.stats.rqt.cur,
501 			dev->rdev.stats.rqt.max, dev->rdev.stats.rqt.fail);
502 	seq_printf(seq, "  OCQPMEM: %10llu %10llu %10llu %10llu\n",
503 			dev->rdev.stats.ocqp.total, dev->rdev.stats.ocqp.cur,
504 			dev->rdev.stats.ocqp.max, dev->rdev.stats.ocqp.fail);
505 	seq_printf(seq, "  DB FULL: %10llu\n", dev->rdev.stats.db_full);
506 	seq_printf(seq, " DB EMPTY: %10llu\n", dev->rdev.stats.db_empty);
507 	seq_printf(seq, "  DB DROP: %10llu\n", dev->rdev.stats.db_drop);
508 	seq_printf(seq, " DB State: %s Transitions %llu FC Interruptions %llu\n",
509 		   db_state_str[dev->db_state],
510 		   dev->rdev.stats.db_state_transitions,
511 		   dev->rdev.stats.db_fc_interruptions);
512 	seq_printf(seq, "TCAM_FULL: %10llu\n", dev->rdev.stats.tcam_full);
513 	seq_printf(seq, "ACT_OFLD_CONN_FAILS: %10llu\n",
514 		   dev->rdev.stats.act_ofld_conn_fails);
515 	seq_printf(seq, "PAS_OFLD_CONN_FAILS: %10llu\n",
516 		   dev->rdev.stats.pas_ofld_conn_fails);
517 	seq_printf(seq, "NEG_ADV_RCVD: %10llu\n", dev->rdev.stats.neg_adv);
518 	seq_printf(seq, "AVAILABLE IRD: %10u\n", dev->avail_ird);
519 	return 0;
520 }
521 
522 static int stats_open(struct inode *inode, struct file *file)
523 {
524 	return single_open(file, stats_show, inode->i_private);
525 }
526 
527 static ssize_t stats_clear(struct file *file, const char __user *buf,
528 		size_t count, loff_t *pos)
529 {
530 	struct c4iw_dev *dev = ((struct seq_file *)file->private_data)->private;
531 
532 	mutex_lock(&dev->rdev.stats.lock);
533 	dev->rdev.stats.pd.max = 0;
534 	dev->rdev.stats.pd.fail = 0;
535 	dev->rdev.stats.qid.max = 0;
536 	dev->rdev.stats.qid.fail = 0;
537 	dev->rdev.stats.stag.max = 0;
538 	dev->rdev.stats.stag.fail = 0;
539 	dev->rdev.stats.pbl.max = 0;
540 	dev->rdev.stats.pbl.fail = 0;
541 	dev->rdev.stats.rqt.max = 0;
542 	dev->rdev.stats.rqt.fail = 0;
543 	dev->rdev.stats.ocqp.max = 0;
544 	dev->rdev.stats.ocqp.fail = 0;
545 	dev->rdev.stats.db_full = 0;
546 	dev->rdev.stats.db_empty = 0;
547 	dev->rdev.stats.db_drop = 0;
548 	dev->rdev.stats.db_state_transitions = 0;
549 	dev->rdev.stats.tcam_full = 0;
550 	dev->rdev.stats.act_ofld_conn_fails = 0;
551 	dev->rdev.stats.pas_ofld_conn_fails = 0;
552 	mutex_unlock(&dev->rdev.stats.lock);
553 	return count;
554 }
555 
556 static const struct file_operations stats_debugfs_fops = {
557 	.owner   = THIS_MODULE,
558 	.open    = stats_open,
559 	.release = single_release,
560 	.read    = seq_read,
561 	.llseek  = seq_lseek,
562 	.write   = stats_clear,
563 };
564 
565 static int dump_ep(int id, void *p, void *data)
566 {
567 	struct c4iw_ep *ep = p;
568 	struct c4iw_debugfs_data *epd = data;
569 	int space;
570 	int cc;
571 
572 	space = epd->bufsize - epd->pos - 1;
573 	if (space == 0)
574 		return 1;
575 
576 	if (ep->com.local_addr.ss_family == AF_INET) {
577 		struct sockaddr_in *lsin;
578 		struct sockaddr_in *rsin;
579 		struct sockaddr_in *m_lsin;
580 		struct sockaddr_in *m_rsin;
581 
582 		set_ep_sin_addrs(ep, &lsin, &rsin, &m_lsin, &m_rsin);
583 		cc = snprintf(epd->buf + epd->pos, space,
584 			      "ep %p cm_id %p qp %p state %d flags 0x%lx "
585 			      "history 0x%lx hwtid %d atid %d "
586 			      "conn_na %u abort_na %u "
587 			      "%pI4:%d/%d <-> %pI4:%d/%d\n",
588 			      ep, ep->com.cm_id, ep->com.qp,
589 			      (int)ep->com.state, ep->com.flags,
590 			      ep->com.history, ep->hwtid, ep->atid,
591 			      ep->stats.connect_neg_adv,
592 			      ep->stats.abort_neg_adv,
593 			      &lsin->sin_addr, ntohs(lsin->sin_port),
594 			      ntohs(m_lsin->sin_port),
595 			      &rsin->sin_addr, ntohs(rsin->sin_port),
596 			      ntohs(m_rsin->sin_port));
597 	} else {
598 		struct sockaddr_in6 *lsin6;
599 		struct sockaddr_in6 *rsin6;
600 		struct sockaddr_in6 *m_lsin6;
601 		struct sockaddr_in6 *m_rsin6;
602 
603 		set_ep_sin6_addrs(ep, &lsin6, &rsin6, &m_lsin6, &m_rsin6);
604 		cc = snprintf(epd->buf + epd->pos, space,
605 			      "ep %p cm_id %p qp %p state %d flags 0x%lx "
606 			      "history 0x%lx hwtid %d atid %d "
607 			      "conn_na %u abort_na %u "
608 			      "%pI6:%d/%d <-> %pI6:%d/%d\n",
609 			      ep, ep->com.cm_id, ep->com.qp,
610 			      (int)ep->com.state, ep->com.flags,
611 			      ep->com.history, ep->hwtid, ep->atid,
612 			      ep->stats.connect_neg_adv,
613 			      ep->stats.abort_neg_adv,
614 			      &lsin6->sin6_addr, ntohs(lsin6->sin6_port),
615 			      ntohs(m_lsin6->sin6_port),
616 			      &rsin6->sin6_addr, ntohs(rsin6->sin6_port),
617 			      ntohs(m_rsin6->sin6_port));
618 	}
619 	if (cc < space)
620 		epd->pos += cc;
621 	return 0;
622 }
623 
624 static int dump_listen_ep(int id, void *p, void *data)
625 {
626 	struct c4iw_listen_ep *ep = p;
627 	struct c4iw_debugfs_data *epd = data;
628 	int space;
629 	int cc;
630 
631 	space = epd->bufsize - epd->pos - 1;
632 	if (space == 0)
633 		return 1;
634 
635 	if (ep->com.local_addr.ss_family == AF_INET) {
636 		struct sockaddr_in *lsin = (struct sockaddr_in *)
637 			&ep->com.cm_id->local_addr;
638 		struct sockaddr_in *m_lsin = (struct sockaddr_in *)
639 			&ep->com.cm_id->m_local_addr;
640 
641 		cc = snprintf(epd->buf + epd->pos, space,
642 			      "ep %p cm_id %p state %d flags 0x%lx stid %d "
643 			      "backlog %d %pI4:%d/%d\n",
644 			      ep, ep->com.cm_id, (int)ep->com.state,
645 			      ep->com.flags, ep->stid, ep->backlog,
646 			      &lsin->sin_addr, ntohs(lsin->sin_port),
647 			      ntohs(m_lsin->sin_port));
648 	} else {
649 		struct sockaddr_in6 *lsin6 = (struct sockaddr_in6 *)
650 			&ep->com.cm_id->local_addr;
651 		struct sockaddr_in6 *m_lsin6 = (struct sockaddr_in6 *)
652 			&ep->com.cm_id->m_local_addr;
653 
654 		cc = snprintf(epd->buf + epd->pos, space,
655 			      "ep %p cm_id %p state %d flags 0x%lx stid %d "
656 			      "backlog %d %pI6:%d/%d\n",
657 			      ep, ep->com.cm_id, (int)ep->com.state,
658 			      ep->com.flags, ep->stid, ep->backlog,
659 			      &lsin6->sin6_addr, ntohs(lsin6->sin6_port),
660 			      ntohs(m_lsin6->sin6_port));
661 	}
662 	if (cc < space)
663 		epd->pos += cc;
664 	return 0;
665 }
666 
667 static int ep_release(struct inode *inode, struct file *file)
668 {
669 	struct c4iw_debugfs_data *epd = file->private_data;
670 	if (!epd) {
671 		pr_info("%s null qpd?\n", __func__);
672 		return 0;
673 	}
674 	vfree(epd->buf);
675 	kfree(epd);
676 	return 0;
677 }
678 
679 static int ep_open(struct inode *inode, struct file *file)
680 {
681 	struct c4iw_debugfs_data *epd;
682 	int ret = 0;
683 	int count = 1;
684 
685 	epd = kmalloc(sizeof(*epd), GFP_KERNEL);
686 	if (!epd) {
687 		ret = -ENOMEM;
688 		goto out;
689 	}
690 	epd->devp = inode->i_private;
691 	epd->pos = 0;
692 
693 	spin_lock_irq(&epd->devp->lock);
694 	idr_for_each(&epd->devp->hwtid_idr, count_idrs, &count);
695 	idr_for_each(&epd->devp->atid_idr, count_idrs, &count);
696 	idr_for_each(&epd->devp->stid_idr, count_idrs, &count);
697 	spin_unlock_irq(&epd->devp->lock);
698 
699 	epd->bufsize = count * 240;
700 	epd->buf = vmalloc(epd->bufsize);
701 	if (!epd->buf) {
702 		ret = -ENOMEM;
703 		goto err1;
704 	}
705 
706 	spin_lock_irq(&epd->devp->lock);
707 	idr_for_each(&epd->devp->hwtid_idr, dump_ep, epd);
708 	idr_for_each(&epd->devp->atid_idr, dump_ep, epd);
709 	idr_for_each(&epd->devp->stid_idr, dump_listen_ep, epd);
710 	spin_unlock_irq(&epd->devp->lock);
711 
712 	file->private_data = epd;
713 	goto out;
714 err1:
715 	kfree(epd);
716 out:
717 	return ret;
718 }
719 
720 static const struct file_operations ep_debugfs_fops = {
721 	.owner   = THIS_MODULE,
722 	.open    = ep_open,
723 	.release = ep_release,
724 	.read    = debugfs_read,
725 };
726 
727 static int setup_debugfs(struct c4iw_dev *devp)
728 {
729 	if (!devp->debugfs_root)
730 		return -1;
731 
732 	debugfs_create_file_size("qps", S_IWUSR, devp->debugfs_root,
733 				 (void *)devp, &qp_debugfs_fops, 4096);
734 
735 	debugfs_create_file_size("stags", S_IWUSR, devp->debugfs_root,
736 				 (void *)devp, &stag_debugfs_fops, 4096);
737 
738 	debugfs_create_file_size("stats", S_IWUSR, devp->debugfs_root,
739 				 (void *)devp, &stats_debugfs_fops, 4096);
740 
741 	debugfs_create_file_size("eps", S_IWUSR, devp->debugfs_root,
742 				 (void *)devp, &ep_debugfs_fops, 4096);
743 
744 	if (c4iw_wr_log)
745 		debugfs_create_file_size("wr_log", S_IWUSR, devp->debugfs_root,
746 					 (void *)devp, &wr_log_debugfs_fops, 4096);
747 	return 0;
748 }
749 
750 void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
751 			       struct c4iw_dev_ucontext *uctx)
752 {
753 	struct list_head *pos, *nxt;
754 	struct c4iw_qid_list *entry;
755 
756 	mutex_lock(&uctx->lock);
757 	list_for_each_safe(pos, nxt, &uctx->qpids) {
758 		entry = list_entry(pos, struct c4iw_qid_list, entry);
759 		list_del_init(&entry->entry);
760 		if (!(entry->qid & rdev->qpmask)) {
761 			c4iw_put_resource(&rdev->resource.qid_table,
762 					  entry->qid);
763 			mutex_lock(&rdev->stats.lock);
764 			rdev->stats.qid.cur -= rdev->qpmask + 1;
765 			mutex_unlock(&rdev->stats.lock);
766 		}
767 		kfree(entry);
768 	}
769 
770 	list_for_each_safe(pos, nxt, &uctx->cqids) {
771 		entry = list_entry(pos, struct c4iw_qid_list, entry);
772 		list_del_init(&entry->entry);
773 		kfree(entry);
774 	}
775 	mutex_unlock(&uctx->lock);
776 }
777 
778 void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
779 			    struct c4iw_dev_ucontext *uctx)
780 {
781 	INIT_LIST_HEAD(&uctx->qpids);
782 	INIT_LIST_HEAD(&uctx->cqids);
783 	mutex_init(&uctx->lock);
784 }
785 
786 /* Caller takes care of locking if needed */
787 static int c4iw_rdev_open(struct c4iw_rdev *rdev)
788 {
789 	int err;
790 
791 	c4iw_init_dev_ucontext(rdev, &rdev->uctx);
792 
793 	/*
794 	 * This implementation assumes udb_density == ucq_density!  Eventually
795 	 * we might need to support this but for now fail the open. Also the
796 	 * cqid and qpid range must match for now.
797 	 */
798 	if (rdev->lldi.udb_density != rdev->lldi.ucq_density) {
799 		pr_err("%s: unsupported udb/ucq densities %u/%u\n",
800 		       pci_name(rdev->lldi.pdev), rdev->lldi.udb_density,
801 		       rdev->lldi.ucq_density);
802 		return -EINVAL;
803 	}
804 	if (rdev->lldi.vr->qp.start != rdev->lldi.vr->cq.start ||
805 	    rdev->lldi.vr->qp.size != rdev->lldi.vr->cq.size) {
806 		pr_err("%s: unsupported qp and cq id ranges qp start %u size %u cq start %u size %u\n",
807 		       pci_name(rdev->lldi.pdev), rdev->lldi.vr->qp.start,
808 		       rdev->lldi.vr->qp.size, rdev->lldi.vr->cq.size,
809 		       rdev->lldi.vr->cq.size);
810 		return -EINVAL;
811 	}
812 
813 	rdev->qpmask = rdev->lldi.udb_density - 1;
814 	rdev->cqmask = rdev->lldi.ucq_density - 1;
815 	pr_debug("%s dev %s stag start 0x%0x size 0x%0x num stags %d pbl start 0x%0x size 0x%0x rq start 0x%0x size 0x%0x qp qid start %u size %u cq qid start %u size %u\n",
816 		 __func__, pci_name(rdev->lldi.pdev), rdev->lldi.vr->stag.start,
817 		 rdev->lldi.vr->stag.size, c4iw_num_stags(rdev),
818 		 rdev->lldi.vr->pbl.start,
819 		 rdev->lldi.vr->pbl.size, rdev->lldi.vr->rq.start,
820 		 rdev->lldi.vr->rq.size,
821 		 rdev->lldi.vr->qp.start,
822 		 rdev->lldi.vr->qp.size,
823 		 rdev->lldi.vr->cq.start,
824 		 rdev->lldi.vr->cq.size);
825 	pr_debug("udb %pR db_reg %p gts_reg %p qpmask 0x%x cqmask 0x%x\n",
826 		 &rdev->lldi.pdev->resource[2],
827 		 rdev->lldi.db_reg, rdev->lldi.gts_reg,
828 		 rdev->qpmask, rdev->cqmask);
829 
830 	if (c4iw_num_stags(rdev) == 0)
831 		return -EINVAL;
832 
833 	rdev->stats.pd.total = T4_MAX_NUM_PD;
834 	rdev->stats.stag.total = rdev->lldi.vr->stag.size;
835 	rdev->stats.pbl.total = rdev->lldi.vr->pbl.size;
836 	rdev->stats.rqt.total = rdev->lldi.vr->rq.size;
837 	rdev->stats.ocqp.total = rdev->lldi.vr->ocq.size;
838 	rdev->stats.qid.total = rdev->lldi.vr->qp.size;
839 
840 	err = c4iw_init_resource(rdev, c4iw_num_stags(rdev), T4_MAX_NUM_PD);
841 	if (err) {
842 		pr_err("error %d initializing resources\n", err);
843 		return err;
844 	}
845 	err = c4iw_pblpool_create(rdev);
846 	if (err) {
847 		pr_err("error %d initializing pbl pool\n", err);
848 		goto destroy_resource;
849 	}
850 	err = c4iw_rqtpool_create(rdev);
851 	if (err) {
852 		pr_err("error %d initializing rqt pool\n", err);
853 		goto destroy_pblpool;
854 	}
855 	err = c4iw_ocqp_pool_create(rdev);
856 	if (err) {
857 		pr_err("error %d initializing ocqp pool\n", err);
858 		goto destroy_rqtpool;
859 	}
860 	rdev->status_page = (struct t4_dev_status_page *)
861 			    __get_free_page(GFP_KERNEL);
862 	if (!rdev->status_page) {
863 		err = -ENOMEM;
864 		goto destroy_ocqp_pool;
865 	}
866 	rdev->status_page->qp_start = rdev->lldi.vr->qp.start;
867 	rdev->status_page->qp_size = rdev->lldi.vr->qp.size;
868 	rdev->status_page->cq_start = rdev->lldi.vr->cq.start;
869 	rdev->status_page->cq_size = rdev->lldi.vr->cq.size;
870 
871 	if (c4iw_wr_log) {
872 		rdev->wr_log = kzalloc((1 << c4iw_wr_log_size_order) *
873 				       sizeof(*rdev->wr_log), GFP_KERNEL);
874 		if (rdev->wr_log) {
875 			rdev->wr_log_size = 1 << c4iw_wr_log_size_order;
876 			atomic_set(&rdev->wr_log_idx, 0);
877 		}
878 	}
879 
880 	rdev->free_workq = create_singlethread_workqueue("iw_cxgb4_free");
881 	if (!rdev->free_workq) {
882 		err = -ENOMEM;
883 		goto err_free_status_page_and_wr_log;
884 	}
885 
886 	rdev->status_page->db_off = 0;
887 
888 	return 0;
889 err_free_status_page_and_wr_log:
890 	if (c4iw_wr_log && rdev->wr_log)
891 		kfree(rdev->wr_log);
892 	free_page((unsigned long)rdev->status_page);
893 destroy_ocqp_pool:
894 	c4iw_ocqp_pool_destroy(rdev);
895 destroy_rqtpool:
896 	c4iw_rqtpool_destroy(rdev);
897 destroy_pblpool:
898 	c4iw_pblpool_destroy(rdev);
899 destroy_resource:
900 	c4iw_destroy_resource(&rdev->resource);
901 	return err;
902 }
903 
904 static void c4iw_rdev_close(struct c4iw_rdev *rdev)
905 {
906 	destroy_workqueue(rdev->free_workq);
907 	kfree(rdev->wr_log);
908 	c4iw_release_dev_ucontext(rdev, &rdev->uctx);
909 	free_page((unsigned long)rdev->status_page);
910 	c4iw_pblpool_destroy(rdev);
911 	c4iw_rqtpool_destroy(rdev);
912 	c4iw_ocqp_pool_destroy(rdev);
913 	c4iw_destroy_resource(&rdev->resource);
914 }
915 
916 static void c4iw_dealloc(struct uld_ctx *ctx)
917 {
918 	c4iw_rdev_close(&ctx->dev->rdev);
919 	WARN_ON_ONCE(!idr_is_empty(&ctx->dev->cqidr));
920 	idr_destroy(&ctx->dev->cqidr);
921 	WARN_ON_ONCE(!idr_is_empty(&ctx->dev->qpidr));
922 	idr_destroy(&ctx->dev->qpidr);
923 	WARN_ON_ONCE(!idr_is_empty(&ctx->dev->mmidr));
924 	idr_destroy(&ctx->dev->mmidr);
925 	wait_event(ctx->dev->wait, idr_is_empty(&ctx->dev->hwtid_idr));
926 	idr_destroy(&ctx->dev->hwtid_idr);
927 	idr_destroy(&ctx->dev->stid_idr);
928 	idr_destroy(&ctx->dev->atid_idr);
929 	if (ctx->dev->rdev.bar2_kva)
930 		iounmap(ctx->dev->rdev.bar2_kva);
931 	if (ctx->dev->rdev.oc_mw_kva)
932 		iounmap(ctx->dev->rdev.oc_mw_kva);
933 	ib_dealloc_device(&ctx->dev->ibdev);
934 	ctx->dev = NULL;
935 }
936 
937 static void c4iw_remove(struct uld_ctx *ctx)
938 {
939 	pr_debug("%s c4iw_dev %p\n", __func__,  ctx->dev);
940 	c4iw_unregister_device(ctx->dev);
941 	c4iw_dealloc(ctx);
942 }
943 
944 static int rdma_supported(const struct cxgb4_lld_info *infop)
945 {
946 	return infop->vr->stag.size > 0 && infop->vr->pbl.size > 0 &&
947 	       infop->vr->rq.size > 0 && infop->vr->qp.size > 0 &&
948 	       infop->vr->cq.size > 0;
949 }
950 
951 static struct c4iw_dev *c4iw_alloc(const struct cxgb4_lld_info *infop)
952 {
953 	struct c4iw_dev *devp;
954 	int ret;
955 
956 	if (!rdma_supported(infop)) {
957 		pr_info("%s: RDMA not supported on this device\n",
958 			pci_name(infop->pdev));
959 		return ERR_PTR(-ENOSYS);
960 	}
961 	if (!ocqp_supported(infop))
962 		pr_info("%s: On-Chip Queues not supported on this device\n",
963 			pci_name(infop->pdev));
964 
965 	devp = (struct c4iw_dev *)ib_alloc_device(sizeof(*devp));
966 	if (!devp) {
967 		pr_err("Cannot allocate ib device\n");
968 		return ERR_PTR(-ENOMEM);
969 	}
970 	devp->rdev.lldi = *infop;
971 
972 	/* init various hw-queue params based on lld info */
973 	pr_debug("%s: Ing. padding boundary is %d, egrsstatuspagesize = %d\n",
974 		 __func__, devp->rdev.lldi.sge_ingpadboundary,
975 		 devp->rdev.lldi.sge_egrstatuspagesize);
976 
977 	devp->rdev.hw_queue.t4_eq_status_entries =
978 		devp->rdev.lldi.sge_egrstatuspagesize / 64;
979 	devp->rdev.hw_queue.t4_max_eq_size = 65520;
980 	devp->rdev.hw_queue.t4_max_iq_size = 65520;
981 	devp->rdev.hw_queue.t4_max_rq_size = 8192 -
982 		devp->rdev.hw_queue.t4_eq_status_entries - 1;
983 	devp->rdev.hw_queue.t4_max_sq_size =
984 		devp->rdev.hw_queue.t4_max_eq_size -
985 		devp->rdev.hw_queue.t4_eq_status_entries - 1;
986 	devp->rdev.hw_queue.t4_max_qp_depth =
987 		devp->rdev.hw_queue.t4_max_rq_size;
988 	devp->rdev.hw_queue.t4_max_cq_depth =
989 		devp->rdev.hw_queue.t4_max_iq_size - 2;
990 	devp->rdev.hw_queue.t4_stat_len =
991 		devp->rdev.lldi.sge_egrstatuspagesize;
992 
993 	/*
994 	 * For T5/T6 devices, we map all of BAR2 with WC.
995 	 * For T4 devices with onchip qp mem, we map only that part
996 	 * of BAR2 with WC.
997 	 */
998 	devp->rdev.bar2_pa = pci_resource_start(devp->rdev.lldi.pdev, 2);
999 	if (!is_t4(devp->rdev.lldi.adapter_type)) {
1000 		devp->rdev.bar2_kva = ioremap_wc(devp->rdev.bar2_pa,
1001 			pci_resource_len(devp->rdev.lldi.pdev, 2));
1002 		if (!devp->rdev.bar2_kva) {
1003 			pr_err("Unable to ioremap BAR2\n");
1004 			ib_dealloc_device(&devp->ibdev);
1005 			return ERR_PTR(-EINVAL);
1006 		}
1007 	} else if (ocqp_supported(infop)) {
1008 		devp->rdev.oc_mw_pa =
1009 			pci_resource_start(devp->rdev.lldi.pdev, 2) +
1010 			pci_resource_len(devp->rdev.lldi.pdev, 2) -
1011 			roundup_pow_of_two(devp->rdev.lldi.vr->ocq.size);
1012 		devp->rdev.oc_mw_kva = ioremap_wc(devp->rdev.oc_mw_pa,
1013 			devp->rdev.lldi.vr->ocq.size);
1014 		if (!devp->rdev.oc_mw_kva) {
1015 			pr_err("Unable to ioremap onchip mem\n");
1016 			ib_dealloc_device(&devp->ibdev);
1017 			return ERR_PTR(-EINVAL);
1018 		}
1019 	}
1020 
1021 	pr_debug("ocq memory: hw_start 0x%x size %u mw_pa 0x%lx mw_kva %p\n",
1022 		 devp->rdev.lldi.vr->ocq.start, devp->rdev.lldi.vr->ocq.size,
1023 		 devp->rdev.oc_mw_pa, devp->rdev.oc_mw_kva);
1024 
1025 	ret = c4iw_rdev_open(&devp->rdev);
1026 	if (ret) {
1027 		pr_err("Unable to open CXIO rdev err %d\n", ret);
1028 		ib_dealloc_device(&devp->ibdev);
1029 		return ERR_PTR(ret);
1030 	}
1031 
1032 	idr_init(&devp->cqidr);
1033 	idr_init(&devp->qpidr);
1034 	idr_init(&devp->mmidr);
1035 	idr_init(&devp->hwtid_idr);
1036 	idr_init(&devp->stid_idr);
1037 	idr_init(&devp->atid_idr);
1038 	spin_lock_init(&devp->lock);
1039 	mutex_init(&devp->rdev.stats.lock);
1040 	mutex_init(&devp->db_mutex);
1041 	INIT_LIST_HEAD(&devp->db_fc_list);
1042 	init_waitqueue_head(&devp->wait);
1043 	devp->avail_ird = devp->rdev.lldi.max_ird_adapter;
1044 
1045 	if (c4iw_debugfs_root) {
1046 		devp->debugfs_root = debugfs_create_dir(
1047 					pci_name(devp->rdev.lldi.pdev),
1048 					c4iw_debugfs_root);
1049 		setup_debugfs(devp);
1050 	}
1051 
1052 
1053 	return devp;
1054 }
1055 
1056 static void *c4iw_uld_add(const struct cxgb4_lld_info *infop)
1057 {
1058 	struct uld_ctx *ctx;
1059 	static int vers_printed;
1060 	int i;
1061 
1062 	if (!vers_printed++)
1063 		pr_info("Chelsio T4/T5 RDMA Driver - version %s\n",
1064 			DRV_VERSION);
1065 
1066 	ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1067 	if (!ctx) {
1068 		ctx = ERR_PTR(-ENOMEM);
1069 		goto out;
1070 	}
1071 	ctx->lldi = *infop;
1072 
1073 	pr_debug("%s found device %s nchan %u nrxq %u ntxq %u nports %u\n",
1074 		 __func__, pci_name(ctx->lldi.pdev),
1075 		 ctx->lldi.nchan, ctx->lldi.nrxq,
1076 		 ctx->lldi.ntxq, ctx->lldi.nports);
1077 
1078 	mutex_lock(&dev_mutex);
1079 	list_add_tail(&ctx->entry, &uld_ctx_list);
1080 	mutex_unlock(&dev_mutex);
1081 
1082 	for (i = 0; i < ctx->lldi.nrxq; i++)
1083 		pr_debug("rxqid[%u] %u\n", i, ctx->lldi.rxq_ids[i]);
1084 out:
1085 	return ctx;
1086 }
1087 
1088 static inline struct sk_buff *copy_gl_to_skb_pkt(const struct pkt_gl *gl,
1089 						 const __be64 *rsp,
1090 						 u32 pktshift)
1091 {
1092 	struct sk_buff *skb;
1093 
1094 	/*
1095 	 * Allocate space for cpl_pass_accept_req which will be synthesized by
1096 	 * driver. Once the driver synthesizes the request the skb will go
1097 	 * through the regular cpl_pass_accept_req processing.
1098 	 * The math here assumes sizeof cpl_pass_accept_req >= sizeof
1099 	 * cpl_rx_pkt.
1100 	 */
1101 	skb = alloc_skb(gl->tot_len + sizeof(struct cpl_pass_accept_req) +
1102 			sizeof(struct rss_header) - pktshift, GFP_ATOMIC);
1103 	if (unlikely(!skb))
1104 		return NULL;
1105 
1106 	 __skb_put(skb, gl->tot_len + sizeof(struct cpl_pass_accept_req) +
1107 		   sizeof(struct rss_header) - pktshift);
1108 
1109 	/*
1110 	 * This skb will contain:
1111 	 *   rss_header from the rspq descriptor (1 flit)
1112 	 *   cpl_rx_pkt struct from the rspq descriptor (2 flits)
1113 	 *   space for the difference between the size of an
1114 	 *      rx_pkt and pass_accept_req cpl (1 flit)
1115 	 *   the packet data from the gl
1116 	 */
1117 	skb_copy_to_linear_data(skb, rsp, sizeof(struct cpl_pass_accept_req) +
1118 				sizeof(struct rss_header));
1119 	skb_copy_to_linear_data_offset(skb, sizeof(struct rss_header) +
1120 				       sizeof(struct cpl_pass_accept_req),
1121 				       gl->va + pktshift,
1122 				       gl->tot_len - pktshift);
1123 	return skb;
1124 }
1125 
1126 static inline int recv_rx_pkt(struct c4iw_dev *dev, const struct pkt_gl *gl,
1127 			   const __be64 *rsp)
1128 {
1129 	unsigned int opcode = *(u8 *)rsp;
1130 	struct sk_buff *skb;
1131 
1132 	if (opcode != CPL_RX_PKT)
1133 		goto out;
1134 
1135 	skb = copy_gl_to_skb_pkt(gl , rsp, dev->rdev.lldi.sge_pktshift);
1136 	if (skb == NULL)
1137 		goto out;
1138 
1139 	if (c4iw_handlers[opcode] == NULL) {
1140 		pr_info("%s no handler opcode 0x%x...\n", __func__, opcode);
1141 		kfree_skb(skb);
1142 		goto out;
1143 	}
1144 	c4iw_handlers[opcode](dev, skb);
1145 	return 1;
1146 out:
1147 	return 0;
1148 }
1149 
1150 static int c4iw_uld_rx_handler(void *handle, const __be64 *rsp,
1151 			const struct pkt_gl *gl)
1152 {
1153 	struct uld_ctx *ctx = handle;
1154 	struct c4iw_dev *dev = ctx->dev;
1155 	struct sk_buff *skb;
1156 	u8 opcode;
1157 
1158 	if (gl == NULL) {
1159 		/* omit RSS and rsp_ctrl at end of descriptor */
1160 		unsigned int len = 64 - sizeof(struct rsp_ctrl) - 8;
1161 
1162 		skb = alloc_skb(256, GFP_ATOMIC);
1163 		if (!skb)
1164 			goto nomem;
1165 		__skb_put(skb, len);
1166 		skb_copy_to_linear_data(skb, &rsp[1], len);
1167 	} else if (gl == CXGB4_MSG_AN) {
1168 		const struct rsp_ctrl *rc = (void *)rsp;
1169 
1170 		u32 qid = be32_to_cpu(rc->pldbuflen_qid);
1171 		c4iw_ev_handler(dev, qid);
1172 		return 0;
1173 	} else if (unlikely(*(u8 *)rsp != *(u8 *)gl->va)) {
1174 		if (recv_rx_pkt(dev, gl, rsp))
1175 			return 0;
1176 
1177 		pr_info("%s: unexpected FL contents at %p, RSS %#llx, FL %#llx, len %u\n",
1178 			pci_name(ctx->lldi.pdev), gl->va,
1179 			be64_to_cpu(*rsp),
1180 			be64_to_cpu(*(__force __be64 *)gl->va),
1181 			gl->tot_len);
1182 
1183 		return 0;
1184 	} else {
1185 		skb = cxgb4_pktgl_to_skb(gl, 128, 128);
1186 		if (unlikely(!skb))
1187 			goto nomem;
1188 	}
1189 
1190 	opcode = *(u8 *)rsp;
1191 	if (c4iw_handlers[opcode]) {
1192 		c4iw_handlers[opcode](dev, skb);
1193 	} else {
1194 		pr_info("%s no handler opcode 0x%x...\n", __func__, opcode);
1195 		kfree_skb(skb);
1196 	}
1197 
1198 	return 0;
1199 nomem:
1200 	return -1;
1201 }
1202 
1203 static int c4iw_uld_state_change(void *handle, enum cxgb4_state new_state)
1204 {
1205 	struct uld_ctx *ctx = handle;
1206 
1207 	pr_debug("%s new_state %u\n", __func__, new_state);
1208 	switch (new_state) {
1209 	case CXGB4_STATE_UP:
1210 		pr_info("%s: Up\n", pci_name(ctx->lldi.pdev));
1211 		if (!ctx->dev) {
1212 			int ret;
1213 
1214 			ctx->dev = c4iw_alloc(&ctx->lldi);
1215 			if (IS_ERR(ctx->dev)) {
1216 				pr_err("%s: initialization failed: %ld\n",
1217 				       pci_name(ctx->lldi.pdev),
1218 				       PTR_ERR(ctx->dev));
1219 				ctx->dev = NULL;
1220 				break;
1221 			}
1222 			ret = c4iw_register_device(ctx->dev);
1223 			if (ret) {
1224 				pr_err("%s: RDMA registration failed: %d\n",
1225 				       pci_name(ctx->lldi.pdev), ret);
1226 				c4iw_dealloc(ctx);
1227 			}
1228 		}
1229 		break;
1230 	case CXGB4_STATE_DOWN:
1231 		pr_info("%s: Down\n", pci_name(ctx->lldi.pdev));
1232 		if (ctx->dev)
1233 			c4iw_remove(ctx);
1234 		break;
1235 	case CXGB4_STATE_START_RECOVERY:
1236 		pr_info("%s: Fatal Error\n", pci_name(ctx->lldi.pdev));
1237 		if (ctx->dev) {
1238 			struct ib_event event;
1239 
1240 			ctx->dev->rdev.flags |= T4_FATAL_ERROR;
1241 			memset(&event, 0, sizeof event);
1242 			event.event  = IB_EVENT_DEVICE_FATAL;
1243 			event.device = &ctx->dev->ibdev;
1244 			ib_dispatch_event(&event);
1245 			c4iw_remove(ctx);
1246 		}
1247 		break;
1248 	case CXGB4_STATE_DETACH:
1249 		pr_info("%s: Detach\n", pci_name(ctx->lldi.pdev));
1250 		if (ctx->dev)
1251 			c4iw_remove(ctx);
1252 		break;
1253 	}
1254 	return 0;
1255 }
1256 
1257 static int disable_qp_db(int id, void *p, void *data)
1258 {
1259 	struct c4iw_qp *qp = p;
1260 
1261 	t4_disable_wq_db(&qp->wq);
1262 	return 0;
1263 }
1264 
1265 static void stop_queues(struct uld_ctx *ctx)
1266 {
1267 	unsigned long flags;
1268 
1269 	spin_lock_irqsave(&ctx->dev->lock, flags);
1270 	ctx->dev->rdev.stats.db_state_transitions++;
1271 	ctx->dev->db_state = STOPPED;
1272 	if (ctx->dev->rdev.flags & T4_STATUS_PAGE_DISABLED)
1273 		idr_for_each(&ctx->dev->qpidr, disable_qp_db, NULL);
1274 	else
1275 		ctx->dev->rdev.status_page->db_off = 1;
1276 	spin_unlock_irqrestore(&ctx->dev->lock, flags);
1277 }
1278 
1279 static int enable_qp_db(int id, void *p, void *data)
1280 {
1281 	struct c4iw_qp *qp = p;
1282 
1283 	t4_enable_wq_db(&qp->wq);
1284 	return 0;
1285 }
1286 
1287 static void resume_rc_qp(struct c4iw_qp *qp)
1288 {
1289 	spin_lock(&qp->lock);
1290 	t4_ring_sq_db(&qp->wq, qp->wq.sq.wq_pidx_inc, NULL);
1291 	qp->wq.sq.wq_pidx_inc = 0;
1292 	t4_ring_rq_db(&qp->wq, qp->wq.rq.wq_pidx_inc, NULL);
1293 	qp->wq.rq.wq_pidx_inc = 0;
1294 	spin_unlock(&qp->lock);
1295 }
1296 
1297 static void resume_a_chunk(struct uld_ctx *ctx)
1298 {
1299 	int i;
1300 	struct c4iw_qp *qp;
1301 
1302 	for (i = 0; i < DB_FC_RESUME_SIZE; i++) {
1303 		qp = list_first_entry(&ctx->dev->db_fc_list, struct c4iw_qp,
1304 				      db_fc_entry);
1305 		list_del_init(&qp->db_fc_entry);
1306 		resume_rc_qp(qp);
1307 		if (list_empty(&ctx->dev->db_fc_list))
1308 			break;
1309 	}
1310 }
1311 
1312 static void resume_queues(struct uld_ctx *ctx)
1313 {
1314 	spin_lock_irq(&ctx->dev->lock);
1315 	if (ctx->dev->db_state != STOPPED)
1316 		goto out;
1317 	ctx->dev->db_state = FLOW_CONTROL;
1318 	while (1) {
1319 		if (list_empty(&ctx->dev->db_fc_list)) {
1320 			WARN_ON(ctx->dev->db_state != FLOW_CONTROL);
1321 			ctx->dev->db_state = NORMAL;
1322 			ctx->dev->rdev.stats.db_state_transitions++;
1323 			if (ctx->dev->rdev.flags & T4_STATUS_PAGE_DISABLED) {
1324 				idr_for_each(&ctx->dev->qpidr, enable_qp_db,
1325 					     NULL);
1326 			} else {
1327 				ctx->dev->rdev.status_page->db_off = 0;
1328 			}
1329 			break;
1330 		} else {
1331 			if (cxgb4_dbfifo_count(ctx->dev->rdev.lldi.ports[0], 1)
1332 			    < (ctx->dev->rdev.lldi.dbfifo_int_thresh <<
1333 			       DB_FC_DRAIN_THRESH)) {
1334 				resume_a_chunk(ctx);
1335 			}
1336 			if (!list_empty(&ctx->dev->db_fc_list)) {
1337 				spin_unlock_irq(&ctx->dev->lock);
1338 				if (DB_FC_RESUME_DELAY) {
1339 					set_current_state(TASK_UNINTERRUPTIBLE);
1340 					schedule_timeout(DB_FC_RESUME_DELAY);
1341 				}
1342 				spin_lock_irq(&ctx->dev->lock);
1343 				if (ctx->dev->db_state != FLOW_CONTROL)
1344 					break;
1345 			}
1346 		}
1347 	}
1348 out:
1349 	if (ctx->dev->db_state != NORMAL)
1350 		ctx->dev->rdev.stats.db_fc_interruptions++;
1351 	spin_unlock_irq(&ctx->dev->lock);
1352 }
1353 
1354 struct qp_list {
1355 	unsigned idx;
1356 	struct c4iw_qp **qps;
1357 };
1358 
1359 static int add_and_ref_qp(int id, void *p, void *data)
1360 {
1361 	struct qp_list *qp_listp = data;
1362 	struct c4iw_qp *qp = p;
1363 
1364 	c4iw_qp_add_ref(&qp->ibqp);
1365 	qp_listp->qps[qp_listp->idx++] = qp;
1366 	return 0;
1367 }
1368 
1369 static int count_qps(int id, void *p, void *data)
1370 {
1371 	unsigned *countp = data;
1372 	(*countp)++;
1373 	return 0;
1374 }
1375 
1376 static void deref_qps(struct qp_list *qp_list)
1377 {
1378 	int idx;
1379 
1380 	for (idx = 0; idx < qp_list->idx; idx++)
1381 		c4iw_qp_rem_ref(&qp_list->qps[idx]->ibqp);
1382 }
1383 
1384 static void recover_lost_dbs(struct uld_ctx *ctx, struct qp_list *qp_list)
1385 {
1386 	int idx;
1387 	int ret;
1388 
1389 	for (idx = 0; idx < qp_list->idx; idx++) {
1390 		struct c4iw_qp *qp = qp_list->qps[idx];
1391 
1392 		spin_lock_irq(&qp->rhp->lock);
1393 		spin_lock(&qp->lock);
1394 		ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
1395 					  qp->wq.sq.qid,
1396 					  t4_sq_host_wq_pidx(&qp->wq),
1397 					  t4_sq_wq_size(&qp->wq));
1398 		if (ret) {
1399 			pr_err("%s: Fatal error - DB overflow recovery failed - error syncing SQ qid %u\n",
1400 			       pci_name(ctx->lldi.pdev), qp->wq.sq.qid);
1401 			spin_unlock(&qp->lock);
1402 			spin_unlock_irq(&qp->rhp->lock);
1403 			return;
1404 		}
1405 		qp->wq.sq.wq_pidx_inc = 0;
1406 
1407 		ret = cxgb4_sync_txq_pidx(qp->rhp->rdev.lldi.ports[0],
1408 					  qp->wq.rq.qid,
1409 					  t4_rq_host_wq_pidx(&qp->wq),
1410 					  t4_rq_wq_size(&qp->wq));
1411 
1412 		if (ret) {
1413 			pr_err("%s: Fatal error - DB overflow recovery failed - error syncing RQ qid %u\n",
1414 			       pci_name(ctx->lldi.pdev), qp->wq.rq.qid);
1415 			spin_unlock(&qp->lock);
1416 			spin_unlock_irq(&qp->rhp->lock);
1417 			return;
1418 		}
1419 		qp->wq.rq.wq_pidx_inc = 0;
1420 		spin_unlock(&qp->lock);
1421 		spin_unlock_irq(&qp->rhp->lock);
1422 
1423 		/* Wait for the dbfifo to drain */
1424 		while (cxgb4_dbfifo_count(qp->rhp->rdev.lldi.ports[0], 1) > 0) {
1425 			set_current_state(TASK_UNINTERRUPTIBLE);
1426 			schedule_timeout(usecs_to_jiffies(10));
1427 		}
1428 	}
1429 }
1430 
1431 static void recover_queues(struct uld_ctx *ctx)
1432 {
1433 	int count = 0;
1434 	struct qp_list qp_list;
1435 	int ret;
1436 
1437 	/* slow everybody down */
1438 	set_current_state(TASK_UNINTERRUPTIBLE);
1439 	schedule_timeout(usecs_to_jiffies(1000));
1440 
1441 	/* flush the SGE contexts */
1442 	ret = cxgb4_flush_eq_cache(ctx->dev->rdev.lldi.ports[0]);
1443 	if (ret) {
1444 		pr_err("%s: Fatal error - DB overflow recovery failed\n",
1445 		       pci_name(ctx->lldi.pdev));
1446 		return;
1447 	}
1448 
1449 	/* Count active queues so we can build a list of queues to recover */
1450 	spin_lock_irq(&ctx->dev->lock);
1451 	WARN_ON(ctx->dev->db_state != STOPPED);
1452 	ctx->dev->db_state = RECOVERY;
1453 	idr_for_each(&ctx->dev->qpidr, count_qps, &count);
1454 
1455 	qp_list.qps = kzalloc(count * sizeof *qp_list.qps, GFP_ATOMIC);
1456 	if (!qp_list.qps) {
1457 		spin_unlock_irq(&ctx->dev->lock);
1458 		return;
1459 	}
1460 	qp_list.idx = 0;
1461 
1462 	/* add and ref each qp so it doesn't get freed */
1463 	idr_for_each(&ctx->dev->qpidr, add_and_ref_qp, &qp_list);
1464 
1465 	spin_unlock_irq(&ctx->dev->lock);
1466 
1467 	/* now traverse the list in a safe context to recover the db state*/
1468 	recover_lost_dbs(ctx, &qp_list);
1469 
1470 	/* we're almost done!  deref the qps and clean up */
1471 	deref_qps(&qp_list);
1472 	kfree(qp_list.qps);
1473 
1474 	spin_lock_irq(&ctx->dev->lock);
1475 	WARN_ON(ctx->dev->db_state != RECOVERY);
1476 	ctx->dev->db_state = STOPPED;
1477 	spin_unlock_irq(&ctx->dev->lock);
1478 }
1479 
1480 static int c4iw_uld_control(void *handle, enum cxgb4_control control, ...)
1481 {
1482 	struct uld_ctx *ctx = handle;
1483 
1484 	switch (control) {
1485 	case CXGB4_CONTROL_DB_FULL:
1486 		stop_queues(ctx);
1487 		ctx->dev->rdev.stats.db_full++;
1488 		break;
1489 	case CXGB4_CONTROL_DB_EMPTY:
1490 		resume_queues(ctx);
1491 		mutex_lock(&ctx->dev->rdev.stats.lock);
1492 		ctx->dev->rdev.stats.db_empty++;
1493 		mutex_unlock(&ctx->dev->rdev.stats.lock);
1494 		break;
1495 	case CXGB4_CONTROL_DB_DROP:
1496 		recover_queues(ctx);
1497 		mutex_lock(&ctx->dev->rdev.stats.lock);
1498 		ctx->dev->rdev.stats.db_drop++;
1499 		mutex_unlock(&ctx->dev->rdev.stats.lock);
1500 		break;
1501 	default:
1502 		pr_warn("%s: unknown control cmd %u\n",
1503 			pci_name(ctx->lldi.pdev), control);
1504 		break;
1505 	}
1506 	return 0;
1507 }
1508 
1509 static struct cxgb4_uld_info c4iw_uld_info = {
1510 	.name = DRV_NAME,
1511 	.nrxq = MAX_ULD_QSETS,
1512 	.ntxq = MAX_ULD_QSETS,
1513 	.rxq_size = 511,
1514 	.ciq = true,
1515 	.lro = false,
1516 	.add = c4iw_uld_add,
1517 	.rx_handler = c4iw_uld_rx_handler,
1518 	.state_change = c4iw_uld_state_change,
1519 	.control = c4iw_uld_control,
1520 };
1521 
1522 static int __init c4iw_init_module(void)
1523 {
1524 	int err;
1525 
1526 	err = c4iw_cm_init();
1527 	if (err)
1528 		return err;
1529 
1530 	c4iw_debugfs_root = debugfs_create_dir(DRV_NAME, NULL);
1531 	if (!c4iw_debugfs_root)
1532 		pr_warn("could not create debugfs entry, continuing\n");
1533 
1534 	cxgb4_register_uld(CXGB4_ULD_RDMA, &c4iw_uld_info);
1535 
1536 	return 0;
1537 }
1538 
1539 static void __exit c4iw_exit_module(void)
1540 {
1541 	struct uld_ctx *ctx, *tmp;
1542 
1543 	mutex_lock(&dev_mutex);
1544 	list_for_each_entry_safe(ctx, tmp, &uld_ctx_list, entry) {
1545 		if (ctx->dev)
1546 			c4iw_remove(ctx);
1547 		kfree(ctx);
1548 	}
1549 	mutex_unlock(&dev_mutex);
1550 	cxgb4_unregister_uld(CXGB4_ULD_RDMA);
1551 	c4iw_cm_term();
1552 	debugfs_remove_recursive(c4iw_debugfs_root);
1553 }
1554 
1555 module_init(c4iw_init_module);
1556 module_exit(c4iw_exit_module);
1557