1 /* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Slow Path Operators 37 */ 38 39 #define dev_fmt(fmt) "QPLIB: " fmt 40 41 #include <linux/interrupt.h> 42 #include <linux/spinlock.h> 43 #include <linux/sched.h> 44 #include <linux/pci.h> 45 46 #include "roce_hsi.h" 47 48 #include "qplib_res.h" 49 #include "qplib_rcfw.h" 50 #include "qplib_sp.h" 51 52 const struct bnxt_qplib_gid bnxt_qplib_gid_zero = {{ 0, 0, 0, 0, 0, 0, 0, 0, 53 0, 0, 0, 0, 0, 0, 0, 0 } }; 54 55 /* Device */ 56 57 static bool bnxt_qplib_is_atomic_cap(struct bnxt_qplib_rcfw *rcfw) 58 { 59 u16 pcie_ctl2 = 0; 60 61 if (!bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx)) 62 return false; 63 64 pcie_capability_read_word(rcfw->pdev, PCI_EXP_DEVCTL2, &pcie_ctl2); 65 return (pcie_ctl2 & PCI_EXP_DEVCTL2_ATOMIC_REQ); 66 } 67 68 static void bnxt_qplib_query_version(struct bnxt_qplib_rcfw *rcfw, 69 char *fw_ver) 70 { 71 struct creq_query_version_resp resp = {}; 72 struct bnxt_qplib_cmdqmsg msg = {}; 73 struct cmdq_query_version req = {}; 74 int rc = 0; 75 76 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 77 CMDQ_BASE_OPCODE_QUERY_VERSION, 78 sizeof(req)); 79 80 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), sizeof(resp), 0); 81 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 82 if (rc) 83 return; 84 fw_ver[0] = resp.fw_maj; 85 fw_ver[1] = resp.fw_minor; 86 fw_ver[2] = resp.fw_bld; 87 fw_ver[3] = resp.fw_rsvd; 88 } 89 90 int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw, 91 struct bnxt_qplib_dev_attr *attr, bool vf) 92 { 93 struct creq_query_func_resp resp = {}; 94 struct bnxt_qplib_cmdqmsg msg = {}; 95 struct creq_query_func_resp_sb *sb; 96 struct bnxt_qplib_rcfw_sbuf *sbuf; 97 struct cmdq_query_func req = {}; 98 u8 *tqm_alloc; 99 int i, rc = 0; 100 u32 temp; 101 102 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 103 CMDQ_BASE_OPCODE_QUERY_FUNC, 104 sizeof(req)); 105 106 sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb)); 107 if (!sbuf) { 108 dev_err(&rcfw->pdev->dev, 109 "SP: QUERY_FUNC alloc side buffer failed\n"); 110 return -ENOMEM; 111 } 112 113 sb = sbuf->sb; 114 req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS; 115 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, sbuf, sizeof(req), 116 sizeof(resp), 0); 117 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 118 if (rc) 119 goto bail; 120 121 /* Extract the context from the side buffer */ 122 attr->max_qp = le32_to_cpu(sb->max_qp); 123 /* max_qp value reported by FW for PF doesn't include the QP1 for PF */ 124 if (!vf) 125 attr->max_qp += 1; 126 attr->max_qp_rd_atom = 127 sb->max_qp_rd_atom > BNXT_QPLIB_MAX_OUT_RD_ATOM ? 128 BNXT_QPLIB_MAX_OUT_RD_ATOM : sb->max_qp_rd_atom; 129 attr->max_qp_init_rd_atom = 130 sb->max_qp_init_rd_atom > BNXT_QPLIB_MAX_OUT_RD_ATOM ? 131 BNXT_QPLIB_MAX_OUT_RD_ATOM : sb->max_qp_init_rd_atom; 132 attr->max_qp_wqes = le16_to_cpu(sb->max_qp_wr); 133 /* 134 * 128 WQEs needs to be reserved for the HW (8916). Prevent 135 * reporting the max number 136 */ 137 attr->max_qp_wqes -= BNXT_QPLIB_RESERVED_QP_WRS + 1; 138 attr->max_qp_sges = bnxt_qplib_is_chip_gen_p5(rcfw->res->cctx) ? 139 6 : sb->max_sge; 140 attr->max_cq = le32_to_cpu(sb->max_cq); 141 attr->max_cq_wqes = le32_to_cpu(sb->max_cqe); 142 attr->max_cq_sges = attr->max_qp_sges; 143 attr->max_mr = le32_to_cpu(sb->max_mr); 144 attr->max_mw = le32_to_cpu(sb->max_mw); 145 146 attr->max_mr_size = le64_to_cpu(sb->max_mr_size); 147 attr->max_pd = 64 * 1024; 148 attr->max_raw_ethy_qp = le32_to_cpu(sb->max_raw_eth_qp); 149 attr->max_ah = le32_to_cpu(sb->max_ah); 150 151 attr->max_srq = le16_to_cpu(sb->max_srq); 152 attr->max_srq_wqes = le32_to_cpu(sb->max_srq_wr) - 1; 153 attr->max_srq_sges = sb->max_srq_sge; 154 attr->max_pkey = 1; 155 attr->max_inline_data = le32_to_cpu(sb->max_inline_data); 156 attr->l2_db_size = (sb->l2_db_space_size + 1) * 157 (0x01 << RCFW_DBR_BASE_PAGE_SHIFT); 158 attr->max_sgid = BNXT_QPLIB_NUM_GIDS_SUPPORTED; 159 attr->dev_cap_flags = le16_to_cpu(sb->dev_cap_flags); 160 161 bnxt_qplib_query_version(rcfw, attr->fw_ver); 162 163 for (i = 0; i < MAX_TQM_ALLOC_REQ / 4; i++) { 164 temp = le32_to_cpu(sb->tqm_alloc_reqs[i]); 165 tqm_alloc = (u8 *)&temp; 166 attr->tqm_alloc_reqs[i * 4] = *tqm_alloc; 167 attr->tqm_alloc_reqs[i * 4 + 1] = *(++tqm_alloc); 168 attr->tqm_alloc_reqs[i * 4 + 2] = *(++tqm_alloc); 169 attr->tqm_alloc_reqs[i * 4 + 3] = *(++tqm_alloc); 170 } 171 172 attr->is_atomic = bnxt_qplib_is_atomic_cap(rcfw); 173 bail: 174 bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf); 175 return rc; 176 } 177 178 int bnxt_qplib_set_func_resources(struct bnxt_qplib_res *res, 179 struct bnxt_qplib_rcfw *rcfw, 180 struct bnxt_qplib_ctx *ctx) 181 { 182 struct creq_set_func_resources_resp resp = {}; 183 struct cmdq_set_func_resources req = {}; 184 struct bnxt_qplib_cmdqmsg msg = {}; 185 int rc = 0; 186 187 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 188 CMDQ_BASE_OPCODE_SET_FUNC_RESOURCES, 189 sizeof(req)); 190 191 req.number_of_qp = cpu_to_le32(ctx->qpc_count); 192 req.number_of_mrw = cpu_to_le32(ctx->mrw_count); 193 req.number_of_srq = cpu_to_le32(ctx->srqc_count); 194 req.number_of_cq = cpu_to_le32(ctx->cq_count); 195 196 req.max_qp_per_vf = cpu_to_le32(ctx->vf_res.max_qp_per_vf); 197 req.max_mrw_per_vf = cpu_to_le32(ctx->vf_res.max_mrw_per_vf); 198 req.max_srq_per_vf = cpu_to_le32(ctx->vf_res.max_srq_per_vf); 199 req.max_cq_per_vf = cpu_to_le32(ctx->vf_res.max_cq_per_vf); 200 req.max_gid_per_vf = cpu_to_le32(ctx->vf_res.max_gid_per_vf); 201 202 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 203 sizeof(resp), 0); 204 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 205 if (rc) { 206 dev_err(&res->pdev->dev, "Failed to set function resources\n"); 207 } 208 return rc; 209 } 210 211 /* SGID */ 212 int bnxt_qplib_get_sgid(struct bnxt_qplib_res *res, 213 struct bnxt_qplib_sgid_tbl *sgid_tbl, int index, 214 struct bnxt_qplib_gid *gid) 215 { 216 if (index >= sgid_tbl->max) { 217 dev_err(&res->pdev->dev, 218 "Index %d exceeded SGID table max (%d)\n", 219 index, sgid_tbl->max); 220 return -EINVAL; 221 } 222 memcpy(gid, &sgid_tbl->tbl[index].gid, sizeof(*gid)); 223 return 0; 224 } 225 226 int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, 227 struct bnxt_qplib_gid *gid, u16 vlan_id, bool update) 228 { 229 struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl, 230 struct bnxt_qplib_res, 231 sgid_tbl); 232 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 233 int index; 234 235 if (!sgid_tbl) { 236 dev_err(&res->pdev->dev, "SGID table not allocated\n"); 237 return -EINVAL; 238 } 239 /* Do we need a sgid_lock here? */ 240 if (!sgid_tbl->active) { 241 dev_err(&res->pdev->dev, "SGID table has no active entries\n"); 242 return -ENOMEM; 243 } 244 for (index = 0; index < sgid_tbl->max; index++) { 245 if (!memcmp(&sgid_tbl->tbl[index].gid, gid, sizeof(*gid)) && 246 vlan_id == sgid_tbl->tbl[index].vlan_id) 247 break; 248 } 249 if (index == sgid_tbl->max) { 250 dev_warn(&res->pdev->dev, "GID not found in the SGID table\n"); 251 return 0; 252 } 253 /* Remove GID from the SGID table */ 254 if (update) { 255 struct creq_delete_gid_resp resp = {}; 256 struct bnxt_qplib_cmdqmsg msg = {}; 257 struct cmdq_delete_gid req = {}; 258 int rc; 259 260 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 261 CMDQ_BASE_OPCODE_DELETE_GID, 262 sizeof(req)); 263 if (sgid_tbl->hw_id[index] == 0xFFFF) { 264 dev_err(&res->pdev->dev, 265 "GID entry contains an invalid HW id\n"); 266 return -EINVAL; 267 } 268 req.gid_index = cpu_to_le16(sgid_tbl->hw_id[index]); 269 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 270 sizeof(resp), 0); 271 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 272 if (rc) 273 return rc; 274 } 275 memcpy(&sgid_tbl->tbl[index].gid, &bnxt_qplib_gid_zero, 276 sizeof(bnxt_qplib_gid_zero)); 277 sgid_tbl->tbl[index].vlan_id = 0xFFFF; 278 sgid_tbl->vlan[index] = 0; 279 sgid_tbl->active--; 280 dev_dbg(&res->pdev->dev, 281 "SGID deleted hw_id[0x%x] = 0x%x active = 0x%x\n", 282 index, sgid_tbl->hw_id[index], sgid_tbl->active); 283 sgid_tbl->hw_id[index] = (u16)-1; 284 285 /* unlock */ 286 return 0; 287 } 288 289 int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, 290 struct bnxt_qplib_gid *gid, const u8 *smac, 291 u16 vlan_id, bool update, u32 *index) 292 { 293 struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl, 294 struct bnxt_qplib_res, 295 sgid_tbl); 296 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 297 int i, free_idx; 298 299 if (!sgid_tbl) { 300 dev_err(&res->pdev->dev, "SGID table not allocated\n"); 301 return -EINVAL; 302 } 303 /* Do we need a sgid_lock here? */ 304 if (sgid_tbl->active == sgid_tbl->max) { 305 dev_err(&res->pdev->dev, "SGID table is full\n"); 306 return -ENOMEM; 307 } 308 free_idx = sgid_tbl->max; 309 for (i = 0; i < sgid_tbl->max; i++) { 310 if (!memcmp(&sgid_tbl->tbl[i], gid, sizeof(*gid)) && 311 sgid_tbl->tbl[i].vlan_id == vlan_id) { 312 dev_dbg(&res->pdev->dev, 313 "SGID entry already exist in entry %d!\n", i); 314 *index = i; 315 return -EALREADY; 316 } else if (!memcmp(&sgid_tbl->tbl[i], &bnxt_qplib_gid_zero, 317 sizeof(bnxt_qplib_gid_zero)) && 318 free_idx == sgid_tbl->max) { 319 free_idx = i; 320 } 321 } 322 if (free_idx == sgid_tbl->max) { 323 dev_err(&res->pdev->dev, 324 "SGID table is FULL but count is not MAX??\n"); 325 return -ENOMEM; 326 } 327 if (update) { 328 struct creq_add_gid_resp resp = {}; 329 struct bnxt_qplib_cmdqmsg msg = {}; 330 struct cmdq_add_gid req = {}; 331 int rc; 332 333 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 334 CMDQ_BASE_OPCODE_ADD_GID, 335 sizeof(req)); 336 337 req.gid[0] = cpu_to_be32(((u32 *)gid->data)[3]); 338 req.gid[1] = cpu_to_be32(((u32 *)gid->data)[2]); 339 req.gid[2] = cpu_to_be32(((u32 *)gid->data)[1]); 340 req.gid[3] = cpu_to_be32(((u32 *)gid->data)[0]); 341 /* 342 * driver should ensure that all RoCE traffic is always VLAN 343 * tagged if RoCE traffic is running on non-zero VLAN ID or 344 * RoCE traffic is running on non-zero Priority. 345 */ 346 if ((vlan_id != 0xFFFF) || res->prio) { 347 if (vlan_id != 0xFFFF) 348 req.vlan = cpu_to_le16 349 (vlan_id & CMDQ_ADD_GID_VLAN_VLAN_ID_MASK); 350 req.vlan |= cpu_to_le16 351 (CMDQ_ADD_GID_VLAN_TPID_TPID_8100 | 352 CMDQ_ADD_GID_VLAN_VLAN_EN); 353 } 354 355 /* MAC in network format */ 356 req.src_mac[0] = cpu_to_be16(((u16 *)smac)[0]); 357 req.src_mac[1] = cpu_to_be16(((u16 *)smac)[1]); 358 req.src_mac[2] = cpu_to_be16(((u16 *)smac)[2]); 359 360 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 361 sizeof(resp), 0); 362 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 363 if (rc) 364 return rc; 365 sgid_tbl->hw_id[free_idx] = le32_to_cpu(resp.xid); 366 } 367 /* Add GID to the sgid_tbl */ 368 memcpy(&sgid_tbl->tbl[free_idx], gid, sizeof(*gid)); 369 sgid_tbl->tbl[free_idx].vlan_id = vlan_id; 370 sgid_tbl->active++; 371 if (vlan_id != 0xFFFF) 372 sgid_tbl->vlan[free_idx] = 1; 373 374 dev_dbg(&res->pdev->dev, 375 "SGID added hw_id[0x%x] = 0x%x active = 0x%x\n", 376 free_idx, sgid_tbl->hw_id[free_idx], sgid_tbl->active); 377 378 *index = free_idx; 379 /* unlock */ 380 return 0; 381 } 382 383 int bnxt_qplib_update_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, 384 struct bnxt_qplib_gid *gid, u16 gid_idx, 385 const u8 *smac) 386 { 387 struct bnxt_qplib_res *res = to_bnxt_qplib(sgid_tbl, 388 struct bnxt_qplib_res, 389 sgid_tbl); 390 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 391 struct creq_modify_gid_resp resp = {}; 392 struct bnxt_qplib_cmdqmsg msg = {}; 393 struct cmdq_modify_gid req = {}; 394 int rc; 395 396 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 397 CMDQ_BASE_OPCODE_MODIFY_GID, 398 sizeof(req)); 399 400 req.gid[0] = cpu_to_be32(((u32 *)gid->data)[3]); 401 req.gid[1] = cpu_to_be32(((u32 *)gid->data)[2]); 402 req.gid[2] = cpu_to_be32(((u32 *)gid->data)[1]); 403 req.gid[3] = cpu_to_be32(((u32 *)gid->data)[0]); 404 if (res->prio) { 405 req.vlan |= cpu_to_le16 406 (CMDQ_ADD_GID_VLAN_TPID_TPID_8100 | 407 CMDQ_ADD_GID_VLAN_VLAN_EN); 408 } 409 410 /* MAC in network format */ 411 req.src_mac[0] = cpu_to_be16(((u16 *)smac)[0]); 412 req.src_mac[1] = cpu_to_be16(((u16 *)smac)[1]); 413 req.src_mac[2] = cpu_to_be16(((u16 *)smac)[2]); 414 415 req.gid_index = cpu_to_le16(gid_idx); 416 417 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 418 sizeof(resp), 0); 419 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 420 return rc; 421 } 422 423 /* AH */ 424 int bnxt_qplib_create_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah, 425 bool block) 426 { 427 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 428 struct creq_create_ah_resp resp = {}; 429 struct bnxt_qplib_cmdqmsg msg = {}; 430 struct cmdq_create_ah req = {}; 431 u32 temp32[4]; 432 u16 temp16[3]; 433 int rc; 434 435 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 436 CMDQ_BASE_OPCODE_CREATE_AH, 437 sizeof(req)); 438 439 memcpy(temp32, ah->dgid.data, sizeof(struct bnxt_qplib_gid)); 440 req.dgid[0] = cpu_to_le32(temp32[0]); 441 req.dgid[1] = cpu_to_le32(temp32[1]); 442 req.dgid[2] = cpu_to_le32(temp32[2]); 443 req.dgid[3] = cpu_to_le32(temp32[3]); 444 445 req.type = ah->nw_type; 446 req.hop_limit = ah->hop_limit; 447 req.sgid_index = cpu_to_le16(res->sgid_tbl.hw_id[ah->sgid_index]); 448 req.dest_vlan_id_flow_label = cpu_to_le32((ah->flow_label & 449 CMDQ_CREATE_AH_FLOW_LABEL_MASK) | 450 CMDQ_CREATE_AH_DEST_VLAN_ID_MASK); 451 req.pd_id = cpu_to_le32(ah->pd->id); 452 req.traffic_class = ah->traffic_class; 453 454 /* MAC in network format */ 455 memcpy(temp16, ah->dmac, 6); 456 req.dest_mac[0] = cpu_to_le16(temp16[0]); 457 req.dest_mac[1] = cpu_to_le16(temp16[1]); 458 req.dest_mac[2] = cpu_to_le16(temp16[2]); 459 460 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 461 sizeof(resp), block); 462 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 463 if (rc) 464 return rc; 465 466 ah->id = le32_to_cpu(resp.xid); 467 return 0; 468 } 469 470 void bnxt_qplib_destroy_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah, 471 bool block) 472 { 473 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 474 struct creq_destroy_ah_resp resp = {}; 475 struct bnxt_qplib_cmdqmsg msg = {}; 476 struct cmdq_destroy_ah req = {}; 477 478 /* Clean up the AH table in the device */ 479 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 480 CMDQ_BASE_OPCODE_DESTROY_AH, 481 sizeof(req)); 482 483 req.ah_cid = cpu_to_le32(ah->id); 484 485 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 486 sizeof(resp), block); 487 bnxt_qplib_rcfw_send_message(rcfw, &msg); 488 } 489 490 /* MRW */ 491 int bnxt_qplib_free_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw) 492 { 493 struct creq_deallocate_key_resp resp = {}; 494 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 495 struct cmdq_deallocate_key req = {}; 496 struct bnxt_qplib_cmdqmsg msg = {}; 497 int rc; 498 499 if (mrw->lkey == 0xFFFFFFFF) { 500 dev_info(&res->pdev->dev, "SP: Free a reserved lkey MRW\n"); 501 return 0; 502 } 503 504 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 505 CMDQ_BASE_OPCODE_DEALLOCATE_KEY, 506 sizeof(req)); 507 508 req.mrw_flags = mrw->type; 509 510 if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1) || 511 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A) || 512 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B)) 513 req.key = cpu_to_le32(mrw->rkey); 514 else 515 req.key = cpu_to_le32(mrw->lkey); 516 517 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 518 sizeof(resp), 0); 519 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 520 if (rc) 521 return rc; 522 523 /* Free the qplib's MRW memory */ 524 if (mrw->hwq.max_elements) 525 bnxt_qplib_free_hwq(res, &mrw->hwq); 526 527 return 0; 528 } 529 530 int bnxt_qplib_alloc_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw) 531 { 532 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 533 struct creq_allocate_mrw_resp resp = {}; 534 struct bnxt_qplib_cmdqmsg msg = {}; 535 struct cmdq_allocate_mrw req = {}; 536 unsigned long tmp; 537 int rc; 538 539 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 540 CMDQ_BASE_OPCODE_ALLOCATE_MRW, 541 sizeof(req)); 542 543 req.pd_id = cpu_to_le32(mrw->pd->id); 544 req.mrw_flags = mrw->type; 545 if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_PMR && 546 mrw->flags & BNXT_QPLIB_FR_PMR) || 547 mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A || 548 mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B) 549 req.access = CMDQ_ALLOCATE_MRW_ACCESS_CONSUMER_OWNED_KEY; 550 tmp = (unsigned long)mrw; 551 req.mrw_handle = cpu_to_le64(tmp); 552 553 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 554 sizeof(resp), 0); 555 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 556 if (rc) 557 return rc; 558 559 if ((mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE1) || 560 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2A) || 561 (mrw->type == CMDQ_ALLOCATE_MRW_MRW_FLAGS_MW_TYPE2B)) 562 mrw->rkey = le32_to_cpu(resp.xid); 563 else 564 mrw->lkey = le32_to_cpu(resp.xid); 565 return 0; 566 } 567 568 int bnxt_qplib_dereg_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw, 569 bool block) 570 { 571 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 572 struct creq_deregister_mr_resp resp = {}; 573 struct bnxt_qplib_cmdqmsg msg = {}; 574 struct cmdq_deregister_mr req = {}; 575 int rc; 576 577 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 578 CMDQ_BASE_OPCODE_DEREGISTER_MR, 579 sizeof(req)); 580 581 req.lkey = cpu_to_le32(mrw->lkey); 582 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 583 sizeof(resp), block); 584 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 585 if (rc) 586 return rc; 587 588 /* Free the qplib's MR memory */ 589 if (mrw->hwq.max_elements) { 590 mrw->va = 0; 591 mrw->total_size = 0; 592 bnxt_qplib_free_hwq(res, &mrw->hwq); 593 } 594 595 return 0; 596 } 597 598 int bnxt_qplib_reg_mr(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr, 599 struct ib_umem *umem, int num_pbls, u32 buf_pg_size) 600 { 601 struct bnxt_qplib_rcfw *rcfw = res->rcfw; 602 struct bnxt_qplib_hwq_attr hwq_attr = {}; 603 struct bnxt_qplib_sg_info sginfo = {}; 604 struct creq_register_mr_resp resp = {}; 605 struct bnxt_qplib_cmdqmsg msg = {}; 606 struct cmdq_register_mr req = {}; 607 int pages, rc; 608 u32 pg_size; 609 u16 level; 610 611 if (num_pbls) { 612 pages = roundup_pow_of_two(num_pbls); 613 /* Allocate memory for the non-leaf pages to store buf ptrs. 614 * Non-leaf pages always uses system PAGE_SIZE 615 */ 616 /* Free the hwq if it already exist, must be a rereg */ 617 if (mr->hwq.max_elements) 618 bnxt_qplib_free_hwq(res, &mr->hwq); 619 /* Use system PAGE_SIZE */ 620 hwq_attr.res = res; 621 hwq_attr.depth = pages; 622 hwq_attr.stride = buf_pg_size; 623 hwq_attr.type = HWQ_TYPE_MR; 624 hwq_attr.sginfo = &sginfo; 625 hwq_attr.sginfo->umem = umem; 626 hwq_attr.sginfo->npages = pages; 627 hwq_attr.sginfo->pgsize = PAGE_SIZE; 628 hwq_attr.sginfo->pgshft = PAGE_SHIFT; 629 rc = bnxt_qplib_alloc_init_hwq(&mr->hwq, &hwq_attr); 630 if (rc) { 631 dev_err(&res->pdev->dev, 632 "SP: Reg MR memory allocation failed\n"); 633 return -ENOMEM; 634 } 635 } 636 637 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 638 CMDQ_BASE_OPCODE_REGISTER_MR, 639 sizeof(req)); 640 641 /* Configure the request */ 642 if (mr->hwq.level == PBL_LVL_MAX) { 643 /* No PBL provided, just use system PAGE_SIZE */ 644 level = 0; 645 req.pbl = 0; 646 pg_size = PAGE_SIZE; 647 } else { 648 level = mr->hwq.level; 649 req.pbl = cpu_to_le64(mr->hwq.pbl[PBL_LVL_0].pg_map_arr[0]); 650 } 651 pg_size = buf_pg_size ? buf_pg_size : PAGE_SIZE; 652 req.log2_pg_size_lvl = (level << CMDQ_REGISTER_MR_LVL_SFT) | 653 ((ilog2(pg_size) << 654 CMDQ_REGISTER_MR_LOG2_PG_SIZE_SFT) & 655 CMDQ_REGISTER_MR_LOG2_PG_SIZE_MASK); 656 req.log2_pbl_pg_size = cpu_to_le16(((ilog2(PAGE_SIZE) << 657 CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_SFT) & 658 CMDQ_REGISTER_MR_LOG2_PBL_PG_SIZE_MASK)); 659 req.access = (mr->flags & 0xFFFF); 660 req.va = cpu_to_le64(mr->va); 661 req.key = cpu_to_le32(mr->lkey); 662 req.mr_size = cpu_to_le64(mr->total_size); 663 664 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, NULL, sizeof(req), 665 sizeof(resp), 0); 666 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 667 if (rc) 668 goto fail; 669 670 return 0; 671 672 fail: 673 if (mr->hwq.max_elements) 674 bnxt_qplib_free_hwq(res, &mr->hwq); 675 return rc; 676 } 677 678 int bnxt_qplib_alloc_fast_reg_page_list(struct bnxt_qplib_res *res, 679 struct bnxt_qplib_frpl *frpl, 680 int max_pg_ptrs) 681 { 682 struct bnxt_qplib_hwq_attr hwq_attr = {}; 683 struct bnxt_qplib_sg_info sginfo = {}; 684 int pg_ptrs, pages, rc; 685 686 /* Re-calculate the max to fit the HWQ allocation model */ 687 pg_ptrs = roundup_pow_of_two(max_pg_ptrs); 688 pages = pg_ptrs >> MAX_PBL_LVL_1_PGS_SHIFT; 689 if (!pages) 690 pages++; 691 692 if (pages > MAX_PBL_LVL_1_PGS) 693 return -ENOMEM; 694 695 sginfo.pgsize = PAGE_SIZE; 696 sginfo.nopte = true; 697 698 hwq_attr.res = res; 699 hwq_attr.depth = pg_ptrs; 700 hwq_attr.stride = PAGE_SIZE; 701 hwq_attr.sginfo = &sginfo; 702 hwq_attr.type = HWQ_TYPE_CTX; 703 rc = bnxt_qplib_alloc_init_hwq(&frpl->hwq, &hwq_attr); 704 if (!rc) 705 frpl->max_pg_ptrs = pg_ptrs; 706 707 return rc; 708 } 709 710 int bnxt_qplib_free_fast_reg_page_list(struct bnxt_qplib_res *res, 711 struct bnxt_qplib_frpl *frpl) 712 { 713 bnxt_qplib_free_hwq(res, &frpl->hwq); 714 return 0; 715 } 716 717 int bnxt_qplib_get_roce_stats(struct bnxt_qplib_rcfw *rcfw, 718 struct bnxt_qplib_roce_stats *stats) 719 { 720 struct creq_query_roce_stats_resp resp = {}; 721 struct creq_query_roce_stats_resp_sb *sb; 722 struct cmdq_query_roce_stats req = {}; 723 struct bnxt_qplib_cmdqmsg msg = {}; 724 struct bnxt_qplib_rcfw_sbuf *sbuf; 725 int rc = 0; 726 727 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 728 CMDQ_BASE_OPCODE_QUERY_ROCE_STATS, 729 sizeof(req)); 730 731 sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb)); 732 if (!sbuf) { 733 dev_err(&rcfw->pdev->dev, 734 "SP: QUERY_ROCE_STATS alloc side buffer failed\n"); 735 return -ENOMEM; 736 } 737 738 sb = sbuf->sb; 739 req.resp_size = sizeof(*sb) / BNXT_QPLIB_CMDQE_UNITS; 740 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, sbuf, sizeof(req), 741 sizeof(resp), 0); 742 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 743 if (rc) 744 goto bail; 745 /* Extract the context from the side buffer */ 746 stats->to_retransmits = le64_to_cpu(sb->to_retransmits); 747 stats->seq_err_naks_rcvd = le64_to_cpu(sb->seq_err_naks_rcvd); 748 stats->max_retry_exceeded = le64_to_cpu(sb->max_retry_exceeded); 749 stats->rnr_naks_rcvd = le64_to_cpu(sb->rnr_naks_rcvd); 750 stats->missing_resp = le64_to_cpu(sb->missing_resp); 751 stats->unrecoverable_err = le64_to_cpu(sb->unrecoverable_err); 752 stats->bad_resp_err = le64_to_cpu(sb->bad_resp_err); 753 stats->local_qp_op_err = le64_to_cpu(sb->local_qp_op_err); 754 stats->local_protection_err = le64_to_cpu(sb->local_protection_err); 755 stats->mem_mgmt_op_err = le64_to_cpu(sb->mem_mgmt_op_err); 756 stats->remote_invalid_req_err = le64_to_cpu(sb->remote_invalid_req_err); 757 stats->remote_access_err = le64_to_cpu(sb->remote_access_err); 758 stats->remote_op_err = le64_to_cpu(sb->remote_op_err); 759 stats->dup_req = le64_to_cpu(sb->dup_req); 760 stats->res_exceed_max = le64_to_cpu(sb->res_exceed_max); 761 stats->res_length_mismatch = le64_to_cpu(sb->res_length_mismatch); 762 stats->res_exceeds_wqe = le64_to_cpu(sb->res_exceeds_wqe); 763 stats->res_opcode_err = le64_to_cpu(sb->res_opcode_err); 764 stats->res_rx_invalid_rkey = le64_to_cpu(sb->res_rx_invalid_rkey); 765 stats->res_rx_domain_err = le64_to_cpu(sb->res_rx_domain_err); 766 stats->res_rx_no_perm = le64_to_cpu(sb->res_rx_no_perm); 767 stats->res_rx_range_err = le64_to_cpu(sb->res_rx_range_err); 768 stats->res_tx_invalid_rkey = le64_to_cpu(sb->res_tx_invalid_rkey); 769 stats->res_tx_domain_err = le64_to_cpu(sb->res_tx_domain_err); 770 stats->res_tx_no_perm = le64_to_cpu(sb->res_tx_no_perm); 771 stats->res_tx_range_err = le64_to_cpu(sb->res_tx_range_err); 772 stats->res_irrq_oflow = le64_to_cpu(sb->res_irrq_oflow); 773 stats->res_unsup_opcode = le64_to_cpu(sb->res_unsup_opcode); 774 stats->res_unaligned_atomic = le64_to_cpu(sb->res_unaligned_atomic); 775 stats->res_rem_inv_err = le64_to_cpu(sb->res_rem_inv_err); 776 stats->res_mem_error = le64_to_cpu(sb->res_mem_error); 777 stats->res_srq_err = le64_to_cpu(sb->res_srq_err); 778 stats->res_cmp_err = le64_to_cpu(sb->res_cmp_err); 779 stats->res_invalid_dup_rkey = le64_to_cpu(sb->res_invalid_dup_rkey); 780 stats->res_wqe_format_err = le64_to_cpu(sb->res_wqe_format_err); 781 stats->res_cq_load_err = le64_to_cpu(sb->res_cq_load_err); 782 stats->res_srq_load_err = le64_to_cpu(sb->res_srq_load_err); 783 stats->res_tx_pci_err = le64_to_cpu(sb->res_tx_pci_err); 784 stats->res_rx_pci_err = le64_to_cpu(sb->res_rx_pci_err); 785 if (!rcfw->init_oos_stats) { 786 rcfw->oos_prev = le64_to_cpu(sb->res_oos_drop_count); 787 rcfw->init_oos_stats = 1; 788 } else { 789 stats->res_oos_drop_count += 790 (le64_to_cpu(sb->res_oos_drop_count) - 791 rcfw->oos_prev) & BNXT_QPLIB_OOS_COUNT_MASK; 792 rcfw->oos_prev = le64_to_cpu(sb->res_oos_drop_count); 793 } 794 795 bail: 796 bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf); 797 return rc; 798 } 799 800 int bnxt_qplib_qext_stat(struct bnxt_qplib_rcfw *rcfw, u32 fid, 801 struct bnxt_qplib_ext_stat *estat) 802 { 803 struct creq_query_roce_stats_ext_resp resp = {}; 804 struct creq_query_roce_stats_ext_resp_sb *sb; 805 struct cmdq_query_roce_stats_ext req = {}; 806 struct bnxt_qplib_cmdqmsg msg = {}; 807 struct bnxt_qplib_rcfw_sbuf *sbuf; 808 int rc; 809 810 sbuf = bnxt_qplib_rcfw_alloc_sbuf(rcfw, sizeof(*sb)); 811 if (!sbuf) { 812 dev_err(&rcfw->pdev->dev, 813 "SP: QUERY_ROCE_STATS_EXT alloc sb failed"); 814 return -ENOMEM; 815 } 816 817 bnxt_qplib_rcfw_cmd_prep((struct cmdq_base *)&req, 818 CMDQ_QUERY_ROCE_STATS_EXT_OPCODE_QUERY_ROCE_STATS, 819 sizeof(req)); 820 821 req.resp_size = ALIGN(sizeof(*sb), BNXT_QPLIB_CMDQE_UNITS); 822 req.resp_addr = cpu_to_le64(sbuf->dma_addr); 823 req.function_id = cpu_to_le32(fid); 824 req.flags = cpu_to_le16(CMDQ_QUERY_ROCE_STATS_EXT_FLAGS_FUNCTION_ID); 825 826 bnxt_qplib_fill_cmdqmsg(&msg, &req, &resp, sbuf, sizeof(req), 827 sizeof(resp), 0); 828 rc = bnxt_qplib_rcfw_send_message(rcfw, &msg); 829 if (rc) 830 goto bail; 831 832 sb = sbuf->sb; 833 estat->tx_atomic_req = le64_to_cpu(sb->tx_atomic_req_pkts); 834 estat->tx_read_req = le64_to_cpu(sb->tx_read_req_pkts); 835 estat->tx_read_res = le64_to_cpu(sb->tx_read_res_pkts); 836 estat->tx_write_req = le64_to_cpu(sb->tx_write_req_pkts); 837 estat->tx_send_req = le64_to_cpu(sb->tx_send_req_pkts); 838 estat->rx_atomic_req = le64_to_cpu(sb->rx_atomic_req_pkts); 839 estat->rx_read_req = le64_to_cpu(sb->rx_read_req_pkts); 840 estat->rx_read_res = le64_to_cpu(sb->rx_read_res_pkts); 841 estat->rx_write_req = le64_to_cpu(sb->rx_write_req_pkts); 842 estat->rx_send_req = le64_to_cpu(sb->rx_send_req_pkts); 843 estat->rx_roce_good_pkts = le64_to_cpu(sb->rx_roce_good_pkts); 844 estat->rx_roce_good_bytes = le64_to_cpu(sb->rx_roce_good_bytes); 845 estat->rx_out_of_buffer = le64_to_cpu(sb->rx_out_of_buffer_pkts); 846 estat->rx_out_of_sequence = le64_to_cpu(sb->rx_out_of_sequence_pkts); 847 848 bail: 849 bnxt_qplib_rcfw_free_sbuf(rcfw, sbuf); 850 return rc; 851 } 852