1 /* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Main component of the bnxt_re driver 37 */ 38 39 #include <linux/module.h> 40 #include <linux/netdevice.h> 41 #include <linux/ethtool.h> 42 #include <linux/mutex.h> 43 #include <linux/list.h> 44 #include <linux/rculist.h> 45 #include <linux/spinlock.h> 46 #include <linux/pci.h> 47 #include <net/dcbnl.h> 48 #include <net/ipv6.h> 49 #include <net/addrconf.h> 50 #include <linux/if_ether.h> 51 52 #include <rdma/ib_verbs.h> 53 #include <rdma/ib_user_verbs.h> 54 #include <rdma/ib_umem.h> 55 #include <rdma/ib_addr.h> 56 57 #include "bnxt_ulp.h" 58 #include "roce_hsi.h" 59 #include "qplib_res.h" 60 #include "qplib_sp.h" 61 #include "qplib_fp.h" 62 #include "qplib_rcfw.h" 63 #include "bnxt_re.h" 64 #include "ib_verbs.h" 65 #include <rdma/bnxt_re-abi.h> 66 #include "bnxt.h" 67 #include "hw_counters.h" 68 69 static char version[] = 70 BNXT_RE_DESC " v" ROCE_DRV_MODULE_VERSION "\n"; 71 72 MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>"); 73 MODULE_DESCRIPTION(BNXT_RE_DESC " Driver"); 74 MODULE_LICENSE("Dual BSD/GPL"); 75 76 /* globals */ 77 static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list); 78 /* Mutex to protect the list of bnxt_re devices added */ 79 static DEFINE_MUTEX(bnxt_re_dev_lock); 80 static struct workqueue_struct *bnxt_re_wq; 81 static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev, bool lock_wait); 82 83 /* SR-IOV helper functions */ 84 85 static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev) 86 { 87 struct bnxt *bp; 88 89 bp = netdev_priv(rdev->en_dev->net); 90 if (BNXT_VF(bp)) 91 rdev->is_virtfn = 1; 92 } 93 94 /* Set the maximum number of each resource that the driver actually wants 95 * to allocate. This may be up to the maximum number the firmware has 96 * reserved for the function. The driver may choose to allocate fewer 97 * resources than the firmware maximum. 98 */ 99 static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev) 100 { 101 u32 vf_qps = 0, vf_srqs = 0, vf_cqs = 0, vf_mrws = 0, vf_gids = 0; 102 u32 i; 103 u32 vf_pct; 104 u32 num_vfs; 105 struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr; 106 107 rdev->qplib_ctx.qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT, 108 dev_attr->max_qp); 109 110 rdev->qplib_ctx.mrw_count = BNXT_RE_MAX_MRW_COUNT_256K; 111 /* Use max_mr from fw since max_mrw does not get set */ 112 rdev->qplib_ctx.mrw_count = min_t(u32, rdev->qplib_ctx.mrw_count, 113 dev_attr->max_mr); 114 rdev->qplib_ctx.srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT, 115 dev_attr->max_srq); 116 rdev->qplib_ctx.cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, 117 dev_attr->max_cq); 118 119 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++) 120 rdev->qplib_ctx.tqm_count[i] = 121 rdev->dev_attr.tqm_alloc_reqs[i]; 122 123 if (rdev->num_vfs) { 124 /* 125 * Reserve a set of resources for the PF. Divide the remaining 126 * resources among the VFs 127 */ 128 vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF; 129 num_vfs = 100 * rdev->num_vfs; 130 vf_qps = (rdev->qplib_ctx.qpc_count * vf_pct) / num_vfs; 131 vf_srqs = (rdev->qplib_ctx.srqc_count * vf_pct) / num_vfs; 132 vf_cqs = (rdev->qplib_ctx.cq_count * vf_pct) / num_vfs; 133 /* 134 * The driver allows many more MRs than other resources. If the 135 * firmware does also, then reserve a fixed amount for the PF 136 * and divide the rest among VFs. VFs may use many MRs for NFS 137 * mounts, ISER, NVME applications, etc. If the firmware 138 * severely restricts the number of MRs, then let PF have 139 * half and divide the rest among VFs, as for the other 140 * resource types. 141 */ 142 if (rdev->qplib_ctx.mrw_count < BNXT_RE_MAX_MRW_COUNT_64K) 143 vf_mrws = rdev->qplib_ctx.mrw_count * vf_pct / num_vfs; 144 else 145 vf_mrws = (rdev->qplib_ctx.mrw_count - 146 BNXT_RE_RESVD_MR_FOR_PF) / rdev->num_vfs; 147 vf_gids = BNXT_RE_MAX_GID_PER_VF; 148 } 149 rdev->qplib_ctx.vf_res.max_mrw_per_vf = vf_mrws; 150 rdev->qplib_ctx.vf_res.max_gid_per_vf = vf_gids; 151 rdev->qplib_ctx.vf_res.max_qp_per_vf = vf_qps; 152 rdev->qplib_ctx.vf_res.max_srq_per_vf = vf_srqs; 153 rdev->qplib_ctx.vf_res.max_cq_per_vf = vf_cqs; 154 } 155 156 /* for handling bnxt_en callbacks later */ 157 static void bnxt_re_stop(void *p) 158 { 159 } 160 161 static void bnxt_re_start(void *p) 162 { 163 } 164 165 static void bnxt_re_sriov_config(void *p, int num_vfs) 166 { 167 struct bnxt_re_dev *rdev = p; 168 169 if (!rdev) 170 return; 171 172 rdev->num_vfs = num_vfs; 173 bnxt_re_set_resource_limits(rdev); 174 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw, 175 &rdev->qplib_ctx); 176 } 177 178 static void bnxt_re_shutdown(void *p) 179 { 180 struct bnxt_re_dev *rdev = p; 181 182 if (!rdev) 183 return; 184 185 bnxt_re_ib_unreg(rdev, false); 186 } 187 188 static void bnxt_re_stop_irq(void *handle) 189 { 190 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; 191 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; 192 struct bnxt_qplib_nq *nq; 193 int indx; 194 195 for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) { 196 nq = &rdev->nq[indx - 1]; 197 bnxt_qplib_nq_stop_irq(nq, false); 198 } 199 200 bnxt_qplib_rcfw_stop_irq(rcfw, false); 201 } 202 203 static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent) 204 { 205 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; 206 struct bnxt_msix_entry *msix_ent = rdev->msix_entries; 207 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; 208 struct bnxt_qplib_nq *nq; 209 int indx, rc; 210 211 if (!ent) { 212 /* Not setting the f/w timeout bit in rcfw. 213 * During the driver unload the first command 214 * to f/w will timeout and that will set the 215 * timeout bit. 216 */ 217 dev_err(rdev_to_dev(rdev), "Failed to re-start IRQs\n"); 218 return; 219 } 220 221 /* Vectors may change after restart, so update with new vectors 222 * in device sctructure. 223 */ 224 for (indx = 0; indx < rdev->num_msix; indx++) 225 rdev->msix_entries[indx].vector = ent[indx].vector; 226 227 bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector, 228 false); 229 for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) { 230 nq = &rdev->nq[indx - 1]; 231 rc = bnxt_qplib_nq_start_irq(nq, indx - 1, 232 msix_ent[indx].vector, false); 233 if (rc) 234 dev_warn(rdev_to_dev(rdev), 235 "Failed to reinit NQ index %d\n", indx - 1); 236 } 237 } 238 239 static struct bnxt_ulp_ops bnxt_re_ulp_ops = { 240 .ulp_async_notifier = NULL, 241 .ulp_stop = bnxt_re_stop, 242 .ulp_start = bnxt_re_start, 243 .ulp_sriov_config = bnxt_re_sriov_config, 244 .ulp_shutdown = bnxt_re_shutdown, 245 .ulp_irq_stop = bnxt_re_stop_irq, 246 .ulp_irq_restart = bnxt_re_start_irq 247 }; 248 249 /* RoCE -> Net driver */ 250 251 /* Driver registration routines used to let the networking driver (bnxt_en) 252 * to know that the RoCE driver is now installed 253 */ 254 static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev, bool lock_wait) 255 { 256 struct bnxt_en_dev *en_dev; 257 int rc; 258 259 if (!rdev) 260 return -EINVAL; 261 262 en_dev = rdev->en_dev; 263 /* Acquire rtnl lock if it is not invokded from netdev event */ 264 if (lock_wait) 265 rtnl_lock(); 266 267 rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev, 268 BNXT_ROCE_ULP); 269 if (lock_wait) 270 rtnl_unlock(); 271 return rc; 272 } 273 274 static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev) 275 { 276 struct bnxt_en_dev *en_dev; 277 int rc = 0; 278 279 if (!rdev) 280 return -EINVAL; 281 282 en_dev = rdev->en_dev; 283 284 rtnl_lock(); 285 rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP, 286 &bnxt_re_ulp_ops, rdev); 287 rtnl_unlock(); 288 return rc; 289 } 290 291 static int bnxt_re_free_msix(struct bnxt_re_dev *rdev, bool lock_wait) 292 { 293 struct bnxt_en_dev *en_dev; 294 int rc; 295 296 if (!rdev) 297 return -EINVAL; 298 299 en_dev = rdev->en_dev; 300 301 if (lock_wait) 302 rtnl_lock(); 303 304 rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP); 305 306 if (lock_wait) 307 rtnl_unlock(); 308 return rc; 309 } 310 311 static int bnxt_re_request_msix(struct bnxt_re_dev *rdev) 312 { 313 int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got; 314 struct bnxt_en_dev *en_dev; 315 316 if (!rdev) 317 return -EINVAL; 318 319 en_dev = rdev->en_dev; 320 321 num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus()); 322 323 rtnl_lock(); 324 num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP, 325 rdev->msix_entries, 326 num_msix_want); 327 if (num_msix_got < BNXT_RE_MIN_MSIX) { 328 rc = -EINVAL; 329 goto done; 330 } 331 if (num_msix_got != num_msix_want) { 332 dev_warn(rdev_to_dev(rdev), 333 "Requested %d MSI-X vectors, got %d\n", 334 num_msix_want, num_msix_got); 335 } 336 rdev->num_msix = num_msix_got; 337 done: 338 rtnl_unlock(); 339 return rc; 340 } 341 342 static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr, 343 u16 opcd, u16 crid, u16 trid) 344 { 345 hdr->req_type = cpu_to_le16(opcd); 346 hdr->cmpl_ring = cpu_to_le16(crid); 347 hdr->target_id = cpu_to_le16(trid); 348 } 349 350 static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg, 351 int msg_len, void *resp, int resp_max_len, 352 int timeout) 353 { 354 fw_msg->msg = msg; 355 fw_msg->msg_len = msg_len; 356 fw_msg->resp = resp; 357 fw_msg->resp_max_len = resp_max_len; 358 fw_msg->timeout = timeout; 359 } 360 361 static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, u16 fw_ring_id, 362 bool lock_wait) 363 { 364 struct bnxt_en_dev *en_dev = rdev->en_dev; 365 struct hwrm_ring_free_input req = {0}; 366 struct hwrm_ring_free_output resp; 367 struct bnxt_fw_msg fw_msg; 368 bool do_unlock = false; 369 int rc = -EINVAL; 370 371 if (!en_dev) 372 return rc; 373 374 memset(&fw_msg, 0, sizeof(fw_msg)); 375 if (lock_wait) { 376 rtnl_lock(); 377 do_unlock = true; 378 } 379 380 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1); 381 req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL; 382 req.ring_id = cpu_to_le16(fw_ring_id); 383 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 384 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 385 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 386 if (rc) 387 dev_err(rdev_to_dev(rdev), 388 "Failed to free HW ring:%d :%#x", req.ring_id, rc); 389 if (do_unlock) 390 rtnl_unlock(); 391 return rc; 392 } 393 394 static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, dma_addr_t *dma_arr, 395 int pages, int type, u32 ring_mask, 396 u32 map_index, u16 *fw_ring_id) 397 { 398 struct bnxt_en_dev *en_dev = rdev->en_dev; 399 struct hwrm_ring_alloc_input req = {0}; 400 struct hwrm_ring_alloc_output resp; 401 struct bnxt_fw_msg fw_msg; 402 int rc = -EINVAL; 403 404 if (!en_dev) 405 return rc; 406 407 memset(&fw_msg, 0, sizeof(fw_msg)); 408 rtnl_lock(); 409 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1); 410 req.enables = 0; 411 req.page_tbl_addr = cpu_to_le64(dma_arr[0]); 412 if (pages > 1) { 413 /* Page size is in log2 units */ 414 req.page_size = BNXT_PAGE_SHIFT; 415 req.page_tbl_depth = 1; 416 } 417 req.fbo = 0; 418 /* Association of ring index with doorbell index and MSIX number */ 419 req.logical_id = cpu_to_le16(map_index); 420 req.length = cpu_to_le32(ring_mask + 1); 421 req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL; 422 req.int_mode = RING_ALLOC_REQ_INT_MODE_MSIX; 423 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 424 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 425 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 426 if (!rc) 427 *fw_ring_id = le16_to_cpu(resp.ring_id); 428 429 rtnl_unlock(); 430 return rc; 431 } 432 433 static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev, 434 u32 fw_stats_ctx_id, bool lock_wait) 435 { 436 struct bnxt_en_dev *en_dev = rdev->en_dev; 437 struct hwrm_stat_ctx_free_input req = {0}; 438 struct bnxt_fw_msg fw_msg; 439 bool do_unlock = false; 440 int rc = -EINVAL; 441 442 if (!en_dev) 443 return rc; 444 445 memset(&fw_msg, 0, sizeof(fw_msg)); 446 if (lock_wait) { 447 rtnl_lock(); 448 do_unlock = true; 449 } 450 451 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1); 452 req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id); 453 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req, 454 sizeof(req), DFLT_HWRM_CMD_TIMEOUT); 455 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 456 if (rc) 457 dev_err(rdev_to_dev(rdev), 458 "Failed to free HW stats context %#x", rc); 459 460 if (do_unlock) 461 rtnl_unlock(); 462 return rc; 463 } 464 465 static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev, 466 dma_addr_t dma_map, 467 u32 *fw_stats_ctx_id) 468 { 469 struct hwrm_stat_ctx_alloc_output resp = {0}; 470 struct hwrm_stat_ctx_alloc_input req = {0}; 471 struct bnxt_en_dev *en_dev = rdev->en_dev; 472 struct bnxt_fw_msg fw_msg; 473 int rc = -EINVAL; 474 475 *fw_stats_ctx_id = INVALID_STATS_CTX_ID; 476 477 if (!en_dev) 478 return rc; 479 480 memset(&fw_msg, 0, sizeof(fw_msg)); 481 rtnl_lock(); 482 483 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1); 484 req.update_period_ms = cpu_to_le32(1000); 485 req.stats_dma_addr = cpu_to_le64(dma_map); 486 req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE; 487 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 488 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 489 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 490 if (!rc) 491 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id); 492 493 rtnl_unlock(); 494 return rc; 495 } 496 497 /* Device */ 498 499 static bool is_bnxt_re_dev(struct net_device *netdev) 500 { 501 struct ethtool_drvinfo drvinfo; 502 503 if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) { 504 memset(&drvinfo, 0, sizeof(drvinfo)); 505 netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo); 506 507 if (strcmp(drvinfo.driver, "bnxt_en")) 508 return false; 509 return true; 510 } 511 return false; 512 } 513 514 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev) 515 { 516 struct bnxt_re_dev *rdev; 517 518 rcu_read_lock(); 519 list_for_each_entry_rcu(rdev, &bnxt_re_dev_list, list) { 520 if (rdev->netdev == netdev) { 521 rcu_read_unlock(); 522 return rdev; 523 } 524 } 525 rcu_read_unlock(); 526 return NULL; 527 } 528 529 static void bnxt_re_dev_unprobe(struct net_device *netdev, 530 struct bnxt_en_dev *en_dev) 531 { 532 dev_put(netdev); 533 module_put(en_dev->pdev->driver->driver.owner); 534 } 535 536 static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev) 537 { 538 struct bnxt *bp = netdev_priv(netdev); 539 struct bnxt_en_dev *en_dev; 540 struct pci_dev *pdev; 541 542 /* Call bnxt_en's RoCE probe via indirect API */ 543 if (!bp->ulp_probe) 544 return ERR_PTR(-EINVAL); 545 546 en_dev = bp->ulp_probe(netdev); 547 if (IS_ERR(en_dev)) 548 return en_dev; 549 550 pdev = en_dev->pdev; 551 if (!pdev) 552 return ERR_PTR(-EINVAL); 553 554 if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) { 555 dev_info(&pdev->dev, 556 "%s: probe error: RoCE is not supported on this device", 557 ROCE_DRV_MODULE_NAME); 558 return ERR_PTR(-ENODEV); 559 } 560 561 /* Bump net device reference count */ 562 if (!try_module_get(pdev->driver->driver.owner)) 563 return ERR_PTR(-ENODEV); 564 565 dev_hold(netdev); 566 567 return en_dev; 568 } 569 570 static void bnxt_re_unregister_ib(struct bnxt_re_dev *rdev) 571 { 572 ib_unregister_device(&rdev->ibdev); 573 } 574 575 static int bnxt_re_register_ib(struct bnxt_re_dev *rdev) 576 { 577 struct ib_device *ibdev = &rdev->ibdev; 578 579 /* ib device init */ 580 ibdev->owner = THIS_MODULE; 581 ibdev->node_type = RDMA_NODE_IB_CA; 582 strlcpy(ibdev->name, "bnxt_re%d", IB_DEVICE_NAME_MAX); 583 strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA", 584 strlen(BNXT_RE_DESC) + 5); 585 ibdev->phys_port_cnt = 1; 586 587 bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid); 588 589 ibdev->num_comp_vectors = 1; 590 ibdev->dev.parent = &rdev->en_dev->pdev->dev; 591 ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY; 592 593 /* User space */ 594 ibdev->uverbs_abi_ver = BNXT_RE_ABI_VERSION; 595 ibdev->uverbs_cmd_mask = 596 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 597 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 598 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 599 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 600 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 601 (1ull << IB_USER_VERBS_CMD_REG_MR) | 602 (1ull << IB_USER_VERBS_CMD_REREG_MR) | 603 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 604 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 605 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 606 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 607 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 608 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 609 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 610 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 611 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 612 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 613 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 614 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 615 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 616 (1ull << IB_USER_VERBS_CMD_CREATE_AH) | 617 (1ull << IB_USER_VERBS_CMD_MODIFY_AH) | 618 (1ull << IB_USER_VERBS_CMD_QUERY_AH) | 619 (1ull << IB_USER_VERBS_CMD_DESTROY_AH); 620 /* POLL_CQ and REQ_NOTIFY_CQ is directly handled in libbnxt_re */ 621 622 /* Kernel verbs */ 623 ibdev->query_device = bnxt_re_query_device; 624 ibdev->modify_device = bnxt_re_modify_device; 625 626 ibdev->query_port = bnxt_re_query_port; 627 ibdev->get_port_immutable = bnxt_re_get_port_immutable; 628 ibdev->get_dev_fw_str = bnxt_re_query_fw_str; 629 ibdev->query_pkey = bnxt_re_query_pkey; 630 ibdev->get_netdev = bnxt_re_get_netdev; 631 ibdev->add_gid = bnxt_re_add_gid; 632 ibdev->del_gid = bnxt_re_del_gid; 633 ibdev->get_link_layer = bnxt_re_get_link_layer; 634 635 ibdev->alloc_pd = bnxt_re_alloc_pd; 636 ibdev->dealloc_pd = bnxt_re_dealloc_pd; 637 638 ibdev->create_ah = bnxt_re_create_ah; 639 ibdev->modify_ah = bnxt_re_modify_ah; 640 ibdev->query_ah = bnxt_re_query_ah; 641 ibdev->destroy_ah = bnxt_re_destroy_ah; 642 643 ibdev->create_srq = bnxt_re_create_srq; 644 ibdev->modify_srq = bnxt_re_modify_srq; 645 ibdev->query_srq = bnxt_re_query_srq; 646 ibdev->destroy_srq = bnxt_re_destroy_srq; 647 ibdev->post_srq_recv = bnxt_re_post_srq_recv; 648 649 ibdev->create_qp = bnxt_re_create_qp; 650 ibdev->modify_qp = bnxt_re_modify_qp; 651 ibdev->query_qp = bnxt_re_query_qp; 652 ibdev->destroy_qp = bnxt_re_destroy_qp; 653 654 ibdev->post_send = bnxt_re_post_send; 655 ibdev->post_recv = bnxt_re_post_recv; 656 657 ibdev->create_cq = bnxt_re_create_cq; 658 ibdev->destroy_cq = bnxt_re_destroy_cq; 659 ibdev->poll_cq = bnxt_re_poll_cq; 660 ibdev->req_notify_cq = bnxt_re_req_notify_cq; 661 662 ibdev->get_dma_mr = bnxt_re_get_dma_mr; 663 ibdev->dereg_mr = bnxt_re_dereg_mr; 664 ibdev->alloc_mr = bnxt_re_alloc_mr; 665 ibdev->map_mr_sg = bnxt_re_map_mr_sg; 666 667 ibdev->reg_user_mr = bnxt_re_reg_user_mr; 668 ibdev->alloc_ucontext = bnxt_re_alloc_ucontext; 669 ibdev->dealloc_ucontext = bnxt_re_dealloc_ucontext; 670 ibdev->mmap = bnxt_re_mmap; 671 ibdev->get_hw_stats = bnxt_re_ib_get_hw_stats; 672 ibdev->alloc_hw_stats = bnxt_re_ib_alloc_hw_stats; 673 674 ibdev->driver_id = RDMA_DRIVER_BNXT_RE; 675 return ib_register_device(ibdev, NULL); 676 } 677 678 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 679 char *buf) 680 { 681 struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev); 682 683 return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor); 684 } 685 686 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 687 char *buf) 688 { 689 struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev); 690 691 return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc); 692 } 693 694 static DEVICE_ATTR(hw_rev, 0444, show_rev, NULL); 695 static DEVICE_ATTR(hca_type, 0444, show_hca, NULL); 696 697 static struct device_attribute *bnxt_re_attributes[] = { 698 &dev_attr_hw_rev, 699 &dev_attr_hca_type 700 }; 701 702 static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev) 703 { 704 dev_put(rdev->netdev); 705 rdev->netdev = NULL; 706 707 mutex_lock(&bnxt_re_dev_lock); 708 list_del_rcu(&rdev->list); 709 mutex_unlock(&bnxt_re_dev_lock); 710 711 synchronize_rcu(); 712 713 ib_dealloc_device(&rdev->ibdev); 714 /* rdev is gone */ 715 } 716 717 static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev, 718 struct bnxt_en_dev *en_dev) 719 { 720 struct bnxt_re_dev *rdev; 721 722 /* Allocate bnxt_re_dev instance here */ 723 rdev = (struct bnxt_re_dev *)ib_alloc_device(sizeof(*rdev)); 724 if (!rdev) { 725 dev_err(NULL, "%s: bnxt_re_dev allocation failure!", 726 ROCE_DRV_MODULE_NAME); 727 return NULL; 728 } 729 /* Default values */ 730 rdev->netdev = netdev; 731 dev_hold(rdev->netdev); 732 rdev->en_dev = en_dev; 733 rdev->id = rdev->en_dev->pdev->devfn; 734 INIT_LIST_HEAD(&rdev->qp_list); 735 mutex_init(&rdev->qp_lock); 736 atomic_set(&rdev->qp_count, 0); 737 atomic_set(&rdev->cq_count, 0); 738 atomic_set(&rdev->srq_count, 0); 739 atomic_set(&rdev->mr_count, 0); 740 atomic_set(&rdev->mw_count, 0); 741 rdev->cosq[0] = 0xFFFF; 742 rdev->cosq[1] = 0xFFFF; 743 744 mutex_lock(&bnxt_re_dev_lock); 745 list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list); 746 mutex_unlock(&bnxt_re_dev_lock); 747 return rdev; 748 } 749 750 static int bnxt_re_handle_unaffi_async_event(struct creq_func_event 751 *unaffi_async) 752 { 753 switch (unaffi_async->event) { 754 case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR: 755 break; 756 case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR: 757 break; 758 case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR: 759 break; 760 case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR: 761 break; 762 case CREQ_FUNC_EVENT_EVENT_CQ_ERROR: 763 break; 764 case CREQ_FUNC_EVENT_EVENT_TQM_ERROR: 765 break; 766 case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR: 767 break; 768 case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR: 769 break; 770 case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR: 771 break; 772 case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR: 773 break; 774 case CREQ_FUNC_EVENT_EVENT_TIM_ERROR: 775 break; 776 default: 777 return -EINVAL; 778 } 779 return 0; 780 } 781 782 static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event, 783 struct bnxt_re_qp *qp) 784 { 785 struct ib_event event; 786 unsigned int flags; 787 788 if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR) { 789 flags = bnxt_re_lock_cqs(qp); 790 bnxt_qplib_add_flush_qp(&qp->qplib_qp); 791 bnxt_re_unlock_cqs(qp, flags); 792 } 793 794 memset(&event, 0, sizeof(event)); 795 if (qp->qplib_qp.srq) { 796 event.device = &qp->rdev->ibdev; 797 event.element.qp = &qp->ib_qp; 798 event.event = IB_EVENT_QP_LAST_WQE_REACHED; 799 } 800 801 if (event.device && qp->ib_qp.event_handler) 802 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context); 803 804 return 0; 805 } 806 807 static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async, 808 void *obj) 809 { 810 int rc = 0; 811 u8 event; 812 813 if (!obj) 814 return rc; /* QP was already dead, still return success */ 815 816 event = affi_async->event; 817 if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) { 818 struct bnxt_qplib_qp *lib_qp = obj; 819 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp, 820 qplib_qp); 821 rc = bnxt_re_handle_qp_async_event(affi_async, qp); 822 } 823 return rc; 824 } 825 826 static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw, 827 void *aeqe, void *obj) 828 { 829 struct creq_qp_event *affi_async; 830 struct creq_func_event *unaffi_async; 831 u8 type; 832 int rc; 833 834 type = ((struct creq_base *)aeqe)->type; 835 if (type == CREQ_BASE_TYPE_FUNC_EVENT) { 836 unaffi_async = aeqe; 837 rc = bnxt_re_handle_unaffi_async_event(unaffi_async); 838 } else { 839 affi_async = aeqe; 840 rc = bnxt_re_handle_affi_async_event(affi_async, obj); 841 } 842 843 return rc; 844 } 845 846 static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq, 847 struct bnxt_qplib_srq *handle, u8 event) 848 { 849 struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq, 850 qplib_srq); 851 struct ib_event ib_event; 852 int rc = 0; 853 854 if (!srq) { 855 dev_err(NULL, "%s: SRQ is NULL, SRQN not handled", 856 ROCE_DRV_MODULE_NAME); 857 rc = -EINVAL; 858 goto done; 859 } 860 ib_event.device = &srq->rdev->ibdev; 861 ib_event.element.srq = &srq->ib_srq; 862 if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT) 863 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED; 864 else 865 ib_event.event = IB_EVENT_SRQ_ERR; 866 867 if (srq->ib_srq.event_handler) { 868 /* Lock event_handler? */ 869 (*srq->ib_srq.event_handler)(&ib_event, 870 srq->ib_srq.srq_context); 871 } 872 done: 873 return rc; 874 } 875 876 static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq, 877 struct bnxt_qplib_cq *handle) 878 { 879 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq, 880 qplib_cq); 881 882 if (!cq) { 883 dev_err(NULL, "%s: CQ is NULL, CQN not handled", 884 ROCE_DRV_MODULE_NAME); 885 return -EINVAL; 886 } 887 if (cq->ib_cq.comp_handler) { 888 /* Lock comp_handler? */ 889 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context); 890 } 891 892 return 0; 893 } 894 895 static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev) 896 { 897 int i; 898 899 if (rdev->nq[0].hwq.max_elements) { 900 for (i = 1; i < rdev->num_msix; i++) 901 bnxt_qplib_disable_nq(&rdev->nq[i - 1]); 902 } 903 904 if (rdev->qplib_res.rcfw) 905 bnxt_qplib_cleanup_res(&rdev->qplib_res); 906 } 907 908 static int bnxt_re_init_res(struct bnxt_re_dev *rdev) 909 { 910 int rc = 0, i; 911 912 bnxt_qplib_init_res(&rdev->qplib_res); 913 914 for (i = 1; i < rdev->num_msix ; i++) { 915 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1], 916 i - 1, rdev->msix_entries[i].vector, 917 rdev->msix_entries[i].db_offset, 918 &bnxt_re_cqn_handler, 919 &bnxt_re_srqn_handler); 920 921 if (rc) { 922 dev_err(rdev_to_dev(rdev), 923 "Failed to enable NQ with rc = 0x%x", rc); 924 goto fail; 925 } 926 } 927 return 0; 928 fail: 929 return rc; 930 } 931 932 static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev, bool lock_wait) 933 { 934 int i; 935 936 for (i = 0; i < rdev->num_msix - 1; i++) { 937 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, lock_wait); 938 bnxt_qplib_free_nq(&rdev->nq[i]); 939 } 940 } 941 942 static void bnxt_re_free_res(struct bnxt_re_dev *rdev, bool lock_wait) 943 { 944 bnxt_re_free_nq_res(rdev, lock_wait); 945 946 if (rdev->qplib_res.dpi_tbl.max) { 947 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 948 &rdev->qplib_res.dpi_tbl, 949 &rdev->dpi_privileged); 950 } 951 if (rdev->qplib_res.rcfw) { 952 bnxt_qplib_free_res(&rdev->qplib_res); 953 rdev->qplib_res.rcfw = NULL; 954 } 955 } 956 957 static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev) 958 { 959 int rc = 0, i; 960 961 /* Configure and allocate resources for qplib */ 962 rdev->qplib_res.rcfw = &rdev->rcfw; 963 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 964 rdev->is_virtfn); 965 if (rc) 966 goto fail; 967 968 rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev, 969 rdev->netdev, &rdev->dev_attr); 970 if (rc) 971 goto fail; 972 973 rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl, 974 &rdev->dpi_privileged, 975 rdev); 976 if (rc) 977 goto dealloc_res; 978 979 for (i = 0; i < rdev->num_msix - 1; i++) { 980 rdev->nq[i].hwq.max_elements = BNXT_RE_MAX_CQ_COUNT + 981 BNXT_RE_MAX_SRQC_COUNT + 2; 982 rc = bnxt_qplib_alloc_nq(rdev->en_dev->pdev, &rdev->nq[i]); 983 if (rc) { 984 dev_err(rdev_to_dev(rdev), "Alloc Failed NQ%d rc:%#x", 985 i, rc); 986 goto dealloc_dpi; 987 } 988 rc = bnxt_re_net_ring_alloc 989 (rdev, rdev->nq[i].hwq.pbl[PBL_LVL_0].pg_map_arr, 990 rdev->nq[i].hwq.pbl[rdev->nq[i].hwq.level].pg_count, 991 HWRM_RING_ALLOC_CMPL, 992 BNXT_QPLIB_NQE_MAX_CNT - 1, 993 rdev->msix_entries[i + 1].ring_idx, 994 &rdev->nq[i].ring_id); 995 if (rc) { 996 dev_err(rdev_to_dev(rdev), 997 "Failed to allocate NQ fw id with rc = 0x%x", 998 rc); 999 goto free_nq; 1000 } 1001 } 1002 return 0; 1003 free_nq: 1004 for (i = 0; i < rdev->num_msix - 1; i++) 1005 bnxt_qplib_free_nq(&rdev->nq[i]); 1006 dealloc_dpi: 1007 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 1008 &rdev->qplib_res.dpi_tbl, 1009 &rdev->dpi_privileged); 1010 dealloc_res: 1011 bnxt_qplib_free_res(&rdev->qplib_res); 1012 1013 fail: 1014 rdev->qplib_res.rcfw = NULL; 1015 return rc; 1016 } 1017 1018 static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp, 1019 u8 port_num, enum ib_event_type event) 1020 { 1021 struct ib_event ib_event; 1022 1023 ib_event.device = ibdev; 1024 if (qp) 1025 ib_event.element.qp = qp; 1026 else 1027 ib_event.element.port_num = port_num; 1028 ib_event.event = event; 1029 ib_dispatch_event(&ib_event); 1030 } 1031 1032 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02 1033 static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir, 1034 u64 *cid_map) 1035 { 1036 struct hwrm_queue_pri2cos_qcfg_input req = {0}; 1037 struct bnxt *bp = netdev_priv(rdev->netdev); 1038 struct hwrm_queue_pri2cos_qcfg_output resp; 1039 struct bnxt_en_dev *en_dev = rdev->en_dev; 1040 struct bnxt_fw_msg fw_msg; 1041 u32 flags = 0; 1042 u8 *qcfgmap, *tmp_map; 1043 int rc = 0, i; 1044 1045 if (!cid_map) 1046 return -EINVAL; 1047 1048 memset(&fw_msg, 0, sizeof(fw_msg)); 1049 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, 1050 HWRM_QUEUE_PRI2COS_QCFG, -1, -1); 1051 flags |= (dir & 0x01); 1052 flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN; 1053 req.flags = cpu_to_le32(flags); 1054 req.port_id = bp->pf.port_id; 1055 1056 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 1057 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 1058 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 1059 if (rc) 1060 return rc; 1061 1062 if (resp.queue_cfg_info) { 1063 dev_warn(rdev_to_dev(rdev), 1064 "Asymmetric cos queue configuration detected"); 1065 dev_warn(rdev_to_dev(rdev), 1066 " on device, QoS may not be fully functional\n"); 1067 } 1068 qcfgmap = &resp.pri0_cos_queue_id; 1069 tmp_map = (u8 *)cid_map; 1070 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) 1071 tmp_map[i] = qcfgmap[i]; 1072 1073 return rc; 1074 } 1075 1076 static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev, 1077 struct bnxt_re_qp *qp) 1078 { 1079 return (qp->ib_qp.qp_type == IB_QPT_GSI) || (qp == rdev->qp1_sqp); 1080 } 1081 1082 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev) 1083 { 1084 int mask = IB_QP_STATE; 1085 struct ib_qp_attr qp_attr; 1086 struct bnxt_re_qp *qp; 1087 1088 qp_attr.qp_state = IB_QPS_ERR; 1089 mutex_lock(&rdev->qp_lock); 1090 list_for_each_entry(qp, &rdev->qp_list, list) { 1091 /* Modify the state of all QPs except QP1/Shadow QP */ 1092 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) { 1093 if (qp->qplib_qp.state != 1094 CMDQ_MODIFY_QP_NEW_STATE_RESET && 1095 qp->qplib_qp.state != 1096 CMDQ_MODIFY_QP_NEW_STATE_ERR) { 1097 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp, 1098 1, IB_EVENT_QP_FATAL); 1099 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask, 1100 NULL); 1101 } 1102 } 1103 } 1104 mutex_unlock(&rdev->qp_lock); 1105 } 1106 1107 static int bnxt_re_update_gid(struct bnxt_re_dev *rdev) 1108 { 1109 struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl; 1110 struct bnxt_qplib_gid gid; 1111 u16 gid_idx, index; 1112 int rc = 0; 1113 1114 if (!test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) 1115 return 0; 1116 1117 if (!sgid_tbl) { 1118 dev_err(rdev_to_dev(rdev), "QPLIB: SGID table not allocated"); 1119 return -EINVAL; 1120 } 1121 1122 for (index = 0; index < sgid_tbl->active; index++) { 1123 gid_idx = sgid_tbl->hw_id[index]; 1124 1125 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero, 1126 sizeof(bnxt_qplib_gid_zero))) 1127 continue; 1128 /* need to modify the VLAN enable setting of non VLAN GID only 1129 * as setting is done for VLAN GID while adding GID 1130 */ 1131 if (sgid_tbl->vlan[index]) 1132 continue; 1133 1134 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid)); 1135 1136 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx, 1137 rdev->qplib_res.netdev->dev_addr); 1138 } 1139 1140 return rc; 1141 } 1142 1143 static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev) 1144 { 1145 u32 prio_map = 0, tmp_map = 0; 1146 struct net_device *netdev; 1147 struct dcb_app app; 1148 1149 netdev = rdev->netdev; 1150 1151 memset(&app, 0, sizeof(app)); 1152 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE; 1153 app.protocol = ETH_P_IBOE; 1154 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1155 prio_map = tmp_map; 1156 1157 app.selector = IEEE_8021QAZ_APP_SEL_DGRAM; 1158 app.protocol = ROCE_V2_UDP_DPORT; 1159 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1160 prio_map |= tmp_map; 1161 1162 return prio_map; 1163 } 1164 1165 static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq) 1166 { 1167 u16 prio; 1168 u8 id; 1169 1170 for (prio = 0, id = 0; prio < 8; prio++) { 1171 if (prio_map & (1 << prio)) { 1172 cosq[id] = cid_map[prio]; 1173 id++; 1174 if (id == 2) /* Max 2 tcs supported */ 1175 break; 1176 } 1177 } 1178 } 1179 1180 static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev) 1181 { 1182 u8 prio_map = 0; 1183 u64 cid_map; 1184 int rc; 1185 1186 /* Get priority for roce */ 1187 prio_map = bnxt_re_get_priority_mask(rdev); 1188 1189 if (prio_map == rdev->cur_prio_map) 1190 return 0; 1191 rdev->cur_prio_map = prio_map; 1192 /* Get cosq id for this priority */ 1193 rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map); 1194 if (rc) { 1195 dev_warn(rdev_to_dev(rdev), "no cos for p_mask %x\n", prio_map); 1196 return rc; 1197 } 1198 /* Parse CoS IDs for app priority */ 1199 bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq); 1200 1201 /* Config BONO. */ 1202 rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq); 1203 if (rc) { 1204 dev_warn(rdev_to_dev(rdev), "no tc for cos{%x, %x}\n", 1205 rdev->cosq[0], rdev->cosq[1]); 1206 return rc; 1207 } 1208 1209 /* Actual priorities are not programmed as they are already 1210 * done by L2 driver; just enable or disable priority vlan tagging 1211 */ 1212 if ((prio_map == 0 && rdev->qplib_res.prio) || 1213 (prio_map != 0 && !rdev->qplib_res.prio)) { 1214 rdev->qplib_res.prio = prio_map ? true : false; 1215 1216 bnxt_re_update_gid(rdev); 1217 } 1218 1219 return 0; 1220 } 1221 1222 static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev, bool lock_wait) 1223 { 1224 int i, rc; 1225 1226 if (test_and_clear_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) { 1227 for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++) 1228 device_remove_file(&rdev->ibdev.dev, 1229 bnxt_re_attributes[i]); 1230 /* Cleanup ib dev */ 1231 bnxt_re_unregister_ib(rdev); 1232 } 1233 if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags)) 1234 cancel_delayed_work(&rdev->worker); 1235 1236 bnxt_re_cleanup_res(rdev); 1237 bnxt_re_free_res(rdev, lock_wait); 1238 1239 if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) { 1240 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw); 1241 if (rc) 1242 dev_warn(rdev_to_dev(rdev), 1243 "Failed to deinitialize RCFW: %#x", rc); 1244 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id, 1245 lock_wait); 1246 bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx); 1247 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1248 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, lock_wait); 1249 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1250 } 1251 if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) { 1252 rc = bnxt_re_free_msix(rdev, lock_wait); 1253 if (rc) 1254 dev_warn(rdev_to_dev(rdev), 1255 "Failed to free MSI-X vectors: %#x", rc); 1256 } 1257 if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) { 1258 rc = bnxt_re_unregister_netdev(rdev, lock_wait); 1259 if (rc) 1260 dev_warn(rdev_to_dev(rdev), 1261 "Failed to unregister with netdev: %#x", rc); 1262 } 1263 } 1264 1265 /* worker thread for polling periodic events. Now used for QoS programming*/ 1266 static void bnxt_re_worker(struct work_struct *work) 1267 { 1268 struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev, 1269 worker.work); 1270 1271 bnxt_re_setup_qos(rdev); 1272 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1273 } 1274 1275 static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev) 1276 { 1277 int i, j, rc; 1278 1279 /* Registered a new RoCE device instance to netdev */ 1280 rc = bnxt_re_register_netdev(rdev); 1281 if (rc) { 1282 pr_err("Failed to register with netedev: %#x\n", rc); 1283 return -EINVAL; 1284 } 1285 set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags); 1286 1287 /* Check whether VF or PF */ 1288 bnxt_re_get_sriov_func_type(rdev); 1289 1290 rc = bnxt_re_request_msix(rdev); 1291 if (rc) { 1292 pr_err("Failed to get MSI-X vectors: %#x\n", rc); 1293 rc = -EINVAL; 1294 goto fail; 1295 } 1296 set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags); 1297 1298 /* Establish RCFW Communication Channel to initialize the context 1299 * memory for the function and all child VFs 1300 */ 1301 rc = bnxt_qplib_alloc_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw, 1302 BNXT_RE_MAX_QPC_COUNT); 1303 if (rc) { 1304 pr_err("Failed to allocate RCFW Channel: %#x\n", rc); 1305 goto fail; 1306 } 1307 rc = bnxt_re_net_ring_alloc 1308 (rdev, rdev->rcfw.creq.pbl[PBL_LVL_0].pg_map_arr, 1309 rdev->rcfw.creq.pbl[rdev->rcfw.creq.level].pg_count, 1310 HWRM_RING_ALLOC_CMPL, BNXT_QPLIB_CREQE_MAX_CNT - 1, 1311 rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx, 1312 &rdev->rcfw.creq_ring_id); 1313 if (rc) { 1314 pr_err("Failed to allocate CREQ: %#x\n", rc); 1315 goto free_rcfw; 1316 } 1317 rc = bnxt_qplib_enable_rcfw_channel 1318 (rdev->en_dev->pdev, &rdev->rcfw, 1319 rdev->msix_entries[BNXT_RE_AEQ_IDX].vector, 1320 rdev->msix_entries[BNXT_RE_AEQ_IDX].db_offset, 1321 rdev->is_virtfn, &bnxt_re_aeq_handler); 1322 if (rc) { 1323 pr_err("Failed to enable RCFW channel: %#x\n", rc); 1324 goto free_ring; 1325 } 1326 1327 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 1328 rdev->is_virtfn); 1329 if (rc) 1330 goto disable_rcfw; 1331 if (!rdev->is_virtfn) 1332 bnxt_re_set_resource_limits(rdev); 1333 1334 rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0); 1335 if (rc) { 1336 pr_err("Failed to allocate QPLIB context: %#x\n", rc); 1337 goto disable_rcfw; 1338 } 1339 rc = bnxt_re_net_stats_ctx_alloc(rdev, 1340 rdev->qplib_ctx.stats.dma_map, 1341 &rdev->qplib_ctx.stats.fw_id); 1342 if (rc) { 1343 pr_err("Failed to allocate stats context: %#x\n", rc); 1344 goto free_ctx; 1345 } 1346 1347 rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx, 1348 rdev->is_virtfn); 1349 if (rc) { 1350 pr_err("Failed to initialize RCFW: %#x\n", rc); 1351 goto free_sctx; 1352 } 1353 set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags); 1354 1355 /* Resources based on the 'new' device caps */ 1356 rc = bnxt_re_alloc_res(rdev); 1357 if (rc) { 1358 pr_err("Failed to allocate resources: %#x\n", rc); 1359 goto fail; 1360 } 1361 rc = bnxt_re_init_res(rdev); 1362 if (rc) { 1363 pr_err("Failed to initialize resources: %#x\n", rc); 1364 goto fail; 1365 } 1366 1367 if (!rdev->is_virtfn) { 1368 rc = bnxt_re_setup_qos(rdev); 1369 if (rc) 1370 pr_info("RoCE priority not yet configured\n"); 1371 1372 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker); 1373 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags); 1374 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1375 } 1376 1377 /* Register ib dev */ 1378 rc = bnxt_re_register_ib(rdev); 1379 if (rc) { 1380 pr_err("Failed to register with IB: %#x\n", rc); 1381 goto fail; 1382 } 1383 dev_info(rdev_to_dev(rdev), "Device registered successfully"); 1384 for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++) { 1385 rc = device_create_file(&rdev->ibdev.dev, 1386 bnxt_re_attributes[i]); 1387 if (rc) { 1388 dev_err(rdev_to_dev(rdev), 1389 "Failed to create IB sysfs: %#x", rc); 1390 /* Must clean up all created device files */ 1391 for (j = 0; j < i; j++) 1392 device_remove_file(&rdev->ibdev.dev, 1393 bnxt_re_attributes[j]); 1394 bnxt_re_unregister_ib(rdev); 1395 goto fail; 1396 } 1397 } 1398 set_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags); 1399 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1400 &rdev->active_width); 1401 set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags); 1402 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_PORT_ACTIVE); 1403 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_GID_CHANGE); 1404 1405 return 0; 1406 free_sctx: 1407 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id, true); 1408 free_ctx: 1409 bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx); 1410 disable_rcfw: 1411 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1412 free_ring: 1413 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, true); 1414 free_rcfw: 1415 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1416 fail: 1417 bnxt_re_ib_unreg(rdev, true); 1418 return rc; 1419 } 1420 1421 static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev) 1422 { 1423 struct bnxt_en_dev *en_dev = rdev->en_dev; 1424 struct net_device *netdev = rdev->netdev; 1425 1426 bnxt_re_dev_remove(rdev); 1427 1428 if (netdev) 1429 bnxt_re_dev_unprobe(netdev, en_dev); 1430 } 1431 1432 static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev) 1433 { 1434 struct bnxt_en_dev *en_dev; 1435 int rc = 0; 1436 1437 if (!is_bnxt_re_dev(netdev)) 1438 return -ENODEV; 1439 1440 en_dev = bnxt_re_dev_probe(netdev); 1441 if (IS_ERR(en_dev)) { 1442 if (en_dev != ERR_PTR(-ENODEV)) 1443 pr_err("%s: Failed to probe\n", ROCE_DRV_MODULE_NAME); 1444 rc = PTR_ERR(en_dev); 1445 goto exit; 1446 } 1447 *rdev = bnxt_re_dev_add(netdev, en_dev); 1448 if (!*rdev) { 1449 rc = -ENOMEM; 1450 bnxt_re_dev_unprobe(netdev, en_dev); 1451 goto exit; 1452 } 1453 exit: 1454 return rc; 1455 } 1456 1457 static void bnxt_re_remove_one(struct bnxt_re_dev *rdev) 1458 { 1459 pci_dev_put(rdev->en_dev->pdev); 1460 } 1461 1462 /* Handle all deferred netevents tasks */ 1463 static void bnxt_re_task(struct work_struct *work) 1464 { 1465 struct bnxt_re_work *re_work; 1466 struct bnxt_re_dev *rdev; 1467 int rc = 0; 1468 1469 re_work = container_of(work, struct bnxt_re_work, work); 1470 rdev = re_work->rdev; 1471 1472 if (re_work->event != NETDEV_REGISTER && 1473 !test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) 1474 return; 1475 1476 switch (re_work->event) { 1477 case NETDEV_REGISTER: 1478 rc = bnxt_re_ib_reg(rdev); 1479 if (rc) { 1480 dev_err(rdev_to_dev(rdev), 1481 "Failed to register with IB: %#x", rc); 1482 bnxt_re_remove_one(rdev); 1483 bnxt_re_dev_unreg(rdev); 1484 } 1485 break; 1486 case NETDEV_UP: 1487 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1488 IB_EVENT_PORT_ACTIVE); 1489 break; 1490 case NETDEV_DOWN: 1491 bnxt_re_dev_stop(rdev); 1492 break; 1493 case NETDEV_CHANGE: 1494 if (!netif_carrier_ok(rdev->netdev)) 1495 bnxt_re_dev_stop(rdev); 1496 else if (netif_carrier_ok(rdev->netdev)) 1497 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1498 IB_EVENT_PORT_ACTIVE); 1499 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1500 &rdev->active_width); 1501 break; 1502 default: 1503 break; 1504 } 1505 smp_mb__before_atomic(); 1506 atomic_dec(&rdev->sched_count); 1507 kfree(re_work); 1508 } 1509 1510 static void bnxt_re_init_one(struct bnxt_re_dev *rdev) 1511 { 1512 pci_dev_get(rdev->en_dev->pdev); 1513 } 1514 1515 /* 1516 * "Notifier chain callback can be invoked for the same chain from 1517 * different CPUs at the same time". 1518 * 1519 * For cases when the netdev is already present, our call to the 1520 * register_netdevice_notifier() will actually get the rtnl_lock() 1521 * before sending NETDEV_REGISTER and (if up) NETDEV_UP 1522 * events. 1523 * 1524 * But for cases when the netdev is not already present, the notifier 1525 * chain is subjected to be invoked from different CPUs simultaneously. 1526 * 1527 * This is protected by the netdev_mutex. 1528 */ 1529 static int bnxt_re_netdev_event(struct notifier_block *notifier, 1530 unsigned long event, void *ptr) 1531 { 1532 struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr); 1533 struct bnxt_re_work *re_work; 1534 struct bnxt_re_dev *rdev; 1535 int rc = 0; 1536 bool sch_work = false; 1537 1538 real_dev = rdma_vlan_dev_real_dev(netdev); 1539 if (!real_dev) 1540 real_dev = netdev; 1541 1542 rdev = bnxt_re_from_netdev(real_dev); 1543 if (!rdev && event != NETDEV_REGISTER) 1544 goto exit; 1545 if (real_dev != netdev) 1546 goto exit; 1547 1548 switch (event) { 1549 case NETDEV_REGISTER: 1550 if (rdev) 1551 break; 1552 rc = bnxt_re_dev_reg(&rdev, real_dev); 1553 if (rc == -ENODEV) 1554 break; 1555 if (rc) { 1556 pr_err("Failed to register with the device %s: %#x\n", 1557 real_dev->name, rc); 1558 break; 1559 } 1560 bnxt_re_init_one(rdev); 1561 sch_work = true; 1562 break; 1563 1564 case NETDEV_UNREGISTER: 1565 /* netdev notifier will call NETDEV_UNREGISTER again later since 1566 * we are still holding the reference to the netdev 1567 */ 1568 if (atomic_read(&rdev->sched_count) > 0) 1569 goto exit; 1570 bnxt_re_ib_unreg(rdev, false); 1571 bnxt_re_remove_one(rdev); 1572 bnxt_re_dev_unreg(rdev); 1573 break; 1574 1575 default: 1576 sch_work = true; 1577 break; 1578 } 1579 if (sch_work) { 1580 /* Allocate for the deferred task */ 1581 re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC); 1582 if (re_work) { 1583 re_work->rdev = rdev; 1584 re_work->event = event; 1585 re_work->vlan_dev = (real_dev == netdev ? 1586 NULL : netdev); 1587 INIT_WORK(&re_work->work, bnxt_re_task); 1588 atomic_inc(&rdev->sched_count); 1589 queue_work(bnxt_re_wq, &re_work->work); 1590 } 1591 } 1592 1593 exit: 1594 return NOTIFY_DONE; 1595 } 1596 1597 static struct notifier_block bnxt_re_netdev_notifier = { 1598 .notifier_call = bnxt_re_netdev_event 1599 }; 1600 1601 static int __init bnxt_re_mod_init(void) 1602 { 1603 int rc = 0; 1604 1605 pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version); 1606 1607 bnxt_re_wq = create_singlethread_workqueue("bnxt_re"); 1608 if (!bnxt_re_wq) 1609 return -ENOMEM; 1610 1611 INIT_LIST_HEAD(&bnxt_re_dev_list); 1612 1613 rc = register_netdevice_notifier(&bnxt_re_netdev_notifier); 1614 if (rc) { 1615 pr_err("%s: Cannot register to netdevice_notifier", 1616 ROCE_DRV_MODULE_NAME); 1617 goto err_netdev; 1618 } 1619 return 0; 1620 1621 err_netdev: 1622 destroy_workqueue(bnxt_re_wq); 1623 1624 return rc; 1625 } 1626 1627 static void __exit bnxt_re_mod_exit(void) 1628 { 1629 struct bnxt_re_dev *rdev, *next; 1630 LIST_HEAD(to_be_deleted); 1631 1632 mutex_lock(&bnxt_re_dev_lock); 1633 /* Free all adapter allocated resources */ 1634 if (!list_empty(&bnxt_re_dev_list)) 1635 list_splice_init(&bnxt_re_dev_list, &to_be_deleted); 1636 mutex_unlock(&bnxt_re_dev_lock); 1637 /* 1638 * Cleanup the devices in reverse order so that the VF device 1639 * cleanup is done before PF cleanup 1640 */ 1641 list_for_each_entry_safe_reverse(rdev, next, &to_be_deleted, list) { 1642 dev_info(rdev_to_dev(rdev), "Unregistering Device"); 1643 /* 1644 * Flush out any scheduled tasks before destroying the 1645 * resources 1646 */ 1647 flush_workqueue(bnxt_re_wq); 1648 bnxt_re_dev_stop(rdev); 1649 bnxt_re_ib_unreg(rdev, true); 1650 bnxt_re_remove_one(rdev); 1651 bnxt_re_dev_unreg(rdev); 1652 } 1653 unregister_netdevice_notifier(&bnxt_re_netdev_notifier); 1654 if (bnxt_re_wq) 1655 destroy_workqueue(bnxt_re_wq); 1656 } 1657 1658 module_init(bnxt_re_mod_init); 1659 module_exit(bnxt_re_mod_exit); 1660