1 /* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Main component of the bnxt_re driver 37 */ 38 39 #include <linux/module.h> 40 #include <linux/netdevice.h> 41 #include <linux/ethtool.h> 42 #include <linux/mutex.h> 43 #include <linux/list.h> 44 #include <linux/rculist.h> 45 #include <linux/spinlock.h> 46 #include <linux/pci.h> 47 #include <net/dcbnl.h> 48 #include <net/ipv6.h> 49 #include <net/addrconf.h> 50 #include <linux/if_ether.h> 51 52 #include <rdma/ib_verbs.h> 53 #include <rdma/ib_user_verbs.h> 54 #include <rdma/ib_umem.h> 55 #include <rdma/ib_addr.h> 56 57 #include "bnxt_ulp.h" 58 #include "roce_hsi.h" 59 #include "qplib_res.h" 60 #include "qplib_sp.h" 61 #include "qplib_fp.h" 62 #include "qplib_rcfw.h" 63 #include "bnxt_re.h" 64 #include "ib_verbs.h" 65 #include <rdma/bnxt_re-abi.h> 66 #include "bnxt.h" 67 #include "hw_counters.h" 68 69 static char version[] = 70 BNXT_RE_DESC "\n"; 71 72 MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>"); 73 MODULE_DESCRIPTION(BNXT_RE_DESC " Driver"); 74 MODULE_LICENSE("Dual BSD/GPL"); 75 76 /* globals */ 77 static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list); 78 /* Mutex to protect the list of bnxt_re devices added */ 79 static DEFINE_MUTEX(bnxt_re_dev_lock); 80 static struct workqueue_struct *bnxt_re_wq; 81 static void bnxt_re_remove_device(struct bnxt_re_dev *rdev); 82 static void bnxt_re_dealloc_driver(struct ib_device *ib_dev); 83 static void bnxt_re_stop_irq(void *handle); 84 85 static void bnxt_re_set_drv_mode(struct bnxt_re_dev *rdev, u8 mode) 86 { 87 struct bnxt_qplib_chip_ctx *cctx; 88 89 cctx = rdev->chip_ctx; 90 cctx->modes.wqe_mode = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ? 91 mode : BNXT_QPLIB_WQE_MODE_STATIC; 92 } 93 94 static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev) 95 { 96 struct bnxt_qplib_chip_ctx *chip_ctx; 97 98 if (!rdev->chip_ctx) 99 return; 100 chip_ctx = rdev->chip_ctx; 101 rdev->chip_ctx = NULL; 102 rdev->rcfw.res = NULL; 103 rdev->qplib_res.cctx = NULL; 104 rdev->qplib_res.pdev = NULL; 105 rdev->qplib_res.netdev = NULL; 106 kfree(chip_ctx); 107 } 108 109 static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev, u8 wqe_mode) 110 { 111 struct bnxt_qplib_chip_ctx *chip_ctx; 112 struct bnxt_en_dev *en_dev; 113 struct bnxt *bp; 114 115 en_dev = rdev->en_dev; 116 bp = netdev_priv(en_dev->net); 117 118 chip_ctx = kzalloc(sizeof(*chip_ctx), GFP_KERNEL); 119 if (!chip_ctx) 120 return -ENOMEM; 121 chip_ctx->chip_num = bp->chip_num; 122 123 rdev->chip_ctx = chip_ctx; 124 /* rest members to follow eventually */ 125 126 rdev->qplib_res.cctx = rdev->chip_ctx; 127 rdev->rcfw.res = &rdev->qplib_res; 128 129 bnxt_re_set_drv_mode(rdev, wqe_mode); 130 return 0; 131 } 132 133 /* SR-IOV helper functions */ 134 135 static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev) 136 { 137 struct bnxt *bp; 138 139 bp = netdev_priv(rdev->en_dev->net); 140 if (BNXT_VF(bp)) 141 rdev->is_virtfn = 1; 142 } 143 144 /* Set the maximum number of each resource that the driver actually wants 145 * to allocate. This may be up to the maximum number the firmware has 146 * reserved for the function. The driver may choose to allocate fewer 147 * resources than the firmware maximum. 148 */ 149 static void bnxt_re_limit_pf_res(struct bnxt_re_dev *rdev) 150 { 151 struct bnxt_qplib_dev_attr *attr; 152 struct bnxt_qplib_ctx *ctx; 153 int i; 154 155 attr = &rdev->dev_attr; 156 ctx = &rdev->qplib_ctx; 157 158 ctx->qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT, 159 attr->max_qp); 160 ctx->mrw_count = BNXT_RE_MAX_MRW_COUNT_256K; 161 /* Use max_mr from fw since max_mrw does not get set */ 162 ctx->mrw_count = min_t(u32, ctx->mrw_count, attr->max_mr); 163 ctx->srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT, 164 attr->max_srq); 165 ctx->cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, attr->max_cq); 166 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) 167 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++) 168 rdev->qplib_ctx.tqm_ctx.qcount[i] = 169 rdev->dev_attr.tqm_alloc_reqs[i]; 170 } 171 172 static void bnxt_re_limit_vf_res(struct bnxt_qplib_ctx *qplib_ctx, u32 num_vf) 173 { 174 struct bnxt_qplib_vf_res *vf_res; 175 u32 mrws = 0; 176 u32 vf_pct; 177 u32 nvfs; 178 179 vf_res = &qplib_ctx->vf_res; 180 /* 181 * Reserve a set of resources for the PF. Divide the remaining 182 * resources among the VFs 183 */ 184 vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF; 185 nvfs = num_vf; 186 num_vf = 100 * num_vf; 187 vf_res->max_qp_per_vf = (qplib_ctx->qpc_count * vf_pct) / num_vf; 188 vf_res->max_srq_per_vf = (qplib_ctx->srqc_count * vf_pct) / num_vf; 189 vf_res->max_cq_per_vf = (qplib_ctx->cq_count * vf_pct) / num_vf; 190 /* 191 * The driver allows many more MRs than other resources. If the 192 * firmware does also, then reserve a fixed amount for the PF and 193 * divide the rest among VFs. VFs may use many MRs for NFS 194 * mounts, ISER, NVME applications, etc. If the firmware severely 195 * restricts the number of MRs, then let PF have half and divide 196 * the rest among VFs, as for the other resource types. 197 */ 198 if (qplib_ctx->mrw_count < BNXT_RE_MAX_MRW_COUNT_64K) { 199 mrws = qplib_ctx->mrw_count * vf_pct; 200 nvfs = num_vf; 201 } else { 202 mrws = qplib_ctx->mrw_count - BNXT_RE_RESVD_MR_FOR_PF; 203 } 204 vf_res->max_mrw_per_vf = (mrws / nvfs); 205 vf_res->max_gid_per_vf = BNXT_RE_MAX_GID_PER_VF; 206 } 207 208 static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev) 209 { 210 u32 num_vfs; 211 212 memset(&rdev->qplib_ctx.vf_res, 0, sizeof(struct bnxt_qplib_vf_res)); 213 bnxt_re_limit_pf_res(rdev); 214 215 num_vfs = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ? 216 BNXT_RE_GEN_P5_MAX_VF : rdev->num_vfs; 217 if (num_vfs) 218 bnxt_re_limit_vf_res(&rdev->qplib_ctx, num_vfs); 219 } 220 221 /* for handling bnxt_en callbacks later */ 222 static void bnxt_re_stop(void *p) 223 { 224 } 225 226 static void bnxt_re_start(void *p) 227 { 228 } 229 230 static void bnxt_re_sriov_config(void *p, int num_vfs) 231 { 232 struct bnxt_re_dev *rdev = p; 233 234 if (!rdev) 235 return; 236 237 rdev->num_vfs = num_vfs; 238 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) { 239 bnxt_re_set_resource_limits(rdev); 240 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw, 241 &rdev->qplib_ctx); 242 } 243 } 244 245 static void bnxt_re_shutdown(void *p) 246 { 247 struct bnxt_re_dev *rdev = p; 248 249 if (!rdev) 250 return; 251 ASSERT_RTNL(); 252 /* Release the MSIx vectors before queuing unregister */ 253 bnxt_re_stop_irq(rdev); 254 ib_unregister_device_queued(&rdev->ibdev); 255 } 256 257 static void bnxt_re_stop_irq(void *handle) 258 { 259 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; 260 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; 261 struct bnxt_qplib_nq *nq; 262 int indx; 263 264 for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) { 265 nq = &rdev->nq[indx - 1]; 266 bnxt_qplib_nq_stop_irq(nq, false); 267 } 268 269 bnxt_qplib_rcfw_stop_irq(rcfw, false); 270 } 271 272 static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent) 273 { 274 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; 275 struct bnxt_msix_entry *msix_ent = rdev->msix_entries; 276 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; 277 struct bnxt_qplib_nq *nq; 278 int indx, rc; 279 280 if (!ent) { 281 /* Not setting the f/w timeout bit in rcfw. 282 * During the driver unload the first command 283 * to f/w will timeout and that will set the 284 * timeout bit. 285 */ 286 ibdev_err(&rdev->ibdev, "Failed to re-start IRQs\n"); 287 return; 288 } 289 290 /* Vectors may change after restart, so update with new vectors 291 * in device sctructure. 292 */ 293 for (indx = 0; indx < rdev->num_msix; indx++) 294 rdev->msix_entries[indx].vector = ent[indx].vector; 295 296 bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector, 297 false); 298 for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) { 299 nq = &rdev->nq[indx - 1]; 300 rc = bnxt_qplib_nq_start_irq(nq, indx - 1, 301 msix_ent[indx].vector, false); 302 if (rc) 303 ibdev_warn(&rdev->ibdev, "Failed to reinit NQ index %d\n", 304 indx - 1); 305 } 306 } 307 308 static struct bnxt_ulp_ops bnxt_re_ulp_ops = { 309 .ulp_async_notifier = NULL, 310 .ulp_stop = bnxt_re_stop, 311 .ulp_start = bnxt_re_start, 312 .ulp_sriov_config = bnxt_re_sriov_config, 313 .ulp_shutdown = bnxt_re_shutdown, 314 .ulp_irq_stop = bnxt_re_stop_irq, 315 .ulp_irq_restart = bnxt_re_start_irq 316 }; 317 318 /* RoCE -> Net driver */ 319 320 /* Driver registration routines used to let the networking driver (bnxt_en) 321 * to know that the RoCE driver is now installed 322 */ 323 static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev) 324 { 325 struct bnxt_en_dev *en_dev; 326 int rc; 327 328 if (!rdev) 329 return -EINVAL; 330 331 en_dev = rdev->en_dev; 332 333 rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev, 334 BNXT_ROCE_ULP); 335 return rc; 336 } 337 338 static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev) 339 { 340 struct bnxt_en_dev *en_dev; 341 int rc = 0; 342 343 if (!rdev) 344 return -EINVAL; 345 346 en_dev = rdev->en_dev; 347 348 rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP, 349 &bnxt_re_ulp_ops, rdev); 350 rdev->qplib_res.pdev = rdev->en_dev->pdev; 351 return rc; 352 } 353 354 static int bnxt_re_free_msix(struct bnxt_re_dev *rdev) 355 { 356 struct bnxt_en_dev *en_dev; 357 int rc; 358 359 if (!rdev) 360 return -EINVAL; 361 362 en_dev = rdev->en_dev; 363 364 365 rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP); 366 367 return rc; 368 } 369 370 static int bnxt_re_request_msix(struct bnxt_re_dev *rdev) 371 { 372 int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got; 373 struct bnxt_en_dev *en_dev; 374 375 if (!rdev) 376 return -EINVAL; 377 378 en_dev = rdev->en_dev; 379 380 num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus()); 381 382 num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP, 383 rdev->msix_entries, 384 num_msix_want); 385 if (num_msix_got < BNXT_RE_MIN_MSIX) { 386 rc = -EINVAL; 387 goto done; 388 } 389 if (num_msix_got != num_msix_want) { 390 ibdev_warn(&rdev->ibdev, 391 "Requested %d MSI-X vectors, got %d\n", 392 num_msix_want, num_msix_got); 393 } 394 rdev->num_msix = num_msix_got; 395 done: 396 return rc; 397 } 398 399 static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr, 400 u16 opcd, u16 crid, u16 trid) 401 { 402 hdr->req_type = cpu_to_le16(opcd); 403 hdr->cmpl_ring = cpu_to_le16(crid); 404 hdr->target_id = cpu_to_le16(trid); 405 } 406 407 static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg, 408 int msg_len, void *resp, int resp_max_len, 409 int timeout) 410 { 411 fw_msg->msg = msg; 412 fw_msg->msg_len = msg_len; 413 fw_msg->resp = resp; 414 fw_msg->resp_max_len = resp_max_len; 415 fw_msg->timeout = timeout; 416 } 417 418 static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, 419 u16 fw_ring_id, int type) 420 { 421 struct bnxt_en_dev *en_dev = rdev->en_dev; 422 struct hwrm_ring_free_input req = {0}; 423 struct hwrm_ring_free_output resp; 424 struct bnxt_fw_msg fw_msg; 425 int rc = -EINVAL; 426 427 if (!en_dev) 428 return rc; 429 430 memset(&fw_msg, 0, sizeof(fw_msg)); 431 432 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1); 433 req.ring_type = type; 434 req.ring_id = cpu_to_le16(fw_ring_id); 435 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 436 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 437 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 438 if (rc) 439 ibdev_err(&rdev->ibdev, "Failed to free HW ring:%d :%#x", 440 req.ring_id, rc); 441 return rc; 442 } 443 444 static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, 445 struct bnxt_re_ring_attr *ring_attr, 446 u16 *fw_ring_id) 447 { 448 struct bnxt_en_dev *en_dev = rdev->en_dev; 449 struct hwrm_ring_alloc_input req = {0}; 450 struct hwrm_ring_alloc_output resp; 451 struct bnxt_fw_msg fw_msg; 452 int rc = -EINVAL; 453 454 if (!en_dev) 455 return rc; 456 457 memset(&fw_msg, 0, sizeof(fw_msg)); 458 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1); 459 req.enables = 0; 460 req.page_tbl_addr = cpu_to_le64(ring_attr->dma_arr[0]); 461 if (ring_attr->pages > 1) { 462 /* Page size is in log2 units */ 463 req.page_size = BNXT_PAGE_SHIFT; 464 req.page_tbl_depth = 1; 465 } 466 req.fbo = 0; 467 /* Association of ring index with doorbell index and MSIX number */ 468 req.logical_id = cpu_to_le16(ring_attr->lrid); 469 req.length = cpu_to_le32(ring_attr->depth + 1); 470 req.ring_type = ring_attr->type; 471 req.int_mode = ring_attr->mode; 472 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 473 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 474 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 475 if (!rc) 476 *fw_ring_id = le16_to_cpu(resp.ring_id); 477 478 return rc; 479 } 480 481 static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev, 482 u32 fw_stats_ctx_id) 483 { 484 struct bnxt_en_dev *en_dev = rdev->en_dev; 485 struct hwrm_stat_ctx_free_input req = {0}; 486 struct bnxt_fw_msg fw_msg; 487 int rc = -EINVAL; 488 489 if (!en_dev) 490 return rc; 491 492 memset(&fw_msg, 0, sizeof(fw_msg)); 493 494 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1); 495 req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id); 496 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req, 497 sizeof(req), DFLT_HWRM_CMD_TIMEOUT); 498 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 499 if (rc) 500 ibdev_err(&rdev->ibdev, "Failed to free HW stats context %#x", 501 rc); 502 503 return rc; 504 } 505 506 static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev, 507 dma_addr_t dma_map, 508 u32 *fw_stats_ctx_id) 509 { 510 struct hwrm_stat_ctx_alloc_output resp = {0}; 511 struct hwrm_stat_ctx_alloc_input req = {0}; 512 struct bnxt_en_dev *en_dev = rdev->en_dev; 513 struct bnxt_fw_msg fw_msg; 514 int rc = -EINVAL; 515 516 *fw_stats_ctx_id = INVALID_STATS_CTX_ID; 517 518 if (!en_dev) 519 return rc; 520 521 memset(&fw_msg, 0, sizeof(fw_msg)); 522 523 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1); 524 req.update_period_ms = cpu_to_le32(1000); 525 req.stats_dma_addr = cpu_to_le64(dma_map); 526 req.stats_dma_length = cpu_to_le16(sizeof(struct ctx_hw_stats_ext)); 527 req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE; 528 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 529 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 530 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 531 if (!rc) 532 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id); 533 534 return rc; 535 } 536 537 /* Device */ 538 539 static bool is_bnxt_re_dev(struct net_device *netdev) 540 { 541 struct ethtool_drvinfo drvinfo; 542 543 if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) { 544 memset(&drvinfo, 0, sizeof(drvinfo)); 545 netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo); 546 547 if (strcmp(drvinfo.driver, "bnxt_en")) 548 return false; 549 return true; 550 } 551 return false; 552 } 553 554 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev) 555 { 556 struct ib_device *ibdev = 557 ib_device_get_by_netdev(netdev, RDMA_DRIVER_BNXT_RE); 558 if (!ibdev) 559 return NULL; 560 561 return container_of(ibdev, struct bnxt_re_dev, ibdev); 562 } 563 564 static void bnxt_re_dev_unprobe(struct net_device *netdev, 565 struct bnxt_en_dev *en_dev) 566 { 567 dev_put(netdev); 568 module_put(en_dev->pdev->driver->driver.owner); 569 } 570 571 static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev) 572 { 573 struct bnxt *bp = netdev_priv(netdev); 574 struct bnxt_en_dev *en_dev; 575 struct pci_dev *pdev; 576 577 /* Call bnxt_en's RoCE probe via indirect API */ 578 if (!bp->ulp_probe) 579 return ERR_PTR(-EINVAL); 580 581 en_dev = bp->ulp_probe(netdev); 582 if (IS_ERR(en_dev)) 583 return en_dev; 584 585 pdev = en_dev->pdev; 586 if (!pdev) 587 return ERR_PTR(-EINVAL); 588 589 if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) { 590 dev_info(&pdev->dev, 591 "%s: probe error: RoCE is not supported on this device", 592 ROCE_DRV_MODULE_NAME); 593 return ERR_PTR(-ENODEV); 594 } 595 596 /* Bump net device reference count */ 597 if (!try_module_get(pdev->driver->driver.owner)) 598 return ERR_PTR(-ENODEV); 599 600 dev_hold(netdev); 601 602 return en_dev; 603 } 604 605 static ssize_t hw_rev_show(struct device *device, struct device_attribute *attr, 606 char *buf) 607 { 608 struct bnxt_re_dev *rdev = 609 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev); 610 611 return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor); 612 } 613 static DEVICE_ATTR_RO(hw_rev); 614 615 static ssize_t hca_type_show(struct device *device, 616 struct device_attribute *attr, char *buf) 617 { 618 struct bnxt_re_dev *rdev = 619 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev); 620 621 return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc); 622 } 623 static DEVICE_ATTR_RO(hca_type); 624 625 static struct attribute *bnxt_re_attributes[] = { 626 &dev_attr_hw_rev.attr, 627 &dev_attr_hca_type.attr, 628 NULL 629 }; 630 631 static const struct attribute_group bnxt_re_dev_attr_group = { 632 .attrs = bnxt_re_attributes, 633 }; 634 635 static const struct ib_device_ops bnxt_re_dev_ops = { 636 .owner = THIS_MODULE, 637 .driver_id = RDMA_DRIVER_BNXT_RE, 638 .uverbs_abi_ver = BNXT_RE_ABI_VERSION, 639 640 .add_gid = bnxt_re_add_gid, 641 .alloc_hw_stats = bnxt_re_ib_alloc_hw_stats, 642 .alloc_mr = bnxt_re_alloc_mr, 643 .alloc_pd = bnxt_re_alloc_pd, 644 .alloc_ucontext = bnxt_re_alloc_ucontext, 645 .create_ah = bnxt_re_create_ah, 646 .create_cq = bnxt_re_create_cq, 647 .create_qp = bnxt_re_create_qp, 648 .create_srq = bnxt_re_create_srq, 649 .dealloc_driver = bnxt_re_dealloc_driver, 650 .dealloc_pd = bnxt_re_dealloc_pd, 651 .dealloc_ucontext = bnxt_re_dealloc_ucontext, 652 .del_gid = bnxt_re_del_gid, 653 .dereg_mr = bnxt_re_dereg_mr, 654 .destroy_ah = bnxt_re_destroy_ah, 655 .destroy_cq = bnxt_re_destroy_cq, 656 .destroy_qp = bnxt_re_destroy_qp, 657 .destroy_srq = bnxt_re_destroy_srq, 658 .get_dev_fw_str = bnxt_re_query_fw_str, 659 .get_dma_mr = bnxt_re_get_dma_mr, 660 .get_hw_stats = bnxt_re_ib_get_hw_stats, 661 .get_link_layer = bnxt_re_get_link_layer, 662 .get_port_immutable = bnxt_re_get_port_immutable, 663 .map_mr_sg = bnxt_re_map_mr_sg, 664 .mmap = bnxt_re_mmap, 665 .modify_ah = bnxt_re_modify_ah, 666 .modify_qp = bnxt_re_modify_qp, 667 .modify_srq = bnxt_re_modify_srq, 668 .poll_cq = bnxt_re_poll_cq, 669 .post_recv = bnxt_re_post_recv, 670 .post_send = bnxt_re_post_send, 671 .post_srq_recv = bnxt_re_post_srq_recv, 672 .query_ah = bnxt_re_query_ah, 673 .query_device = bnxt_re_query_device, 674 .query_pkey = bnxt_re_query_pkey, 675 .query_port = bnxt_re_query_port, 676 .query_qp = bnxt_re_query_qp, 677 .query_srq = bnxt_re_query_srq, 678 .reg_user_mr = bnxt_re_reg_user_mr, 679 .req_notify_cq = bnxt_re_req_notify_cq, 680 INIT_RDMA_OBJ_SIZE(ib_ah, bnxt_re_ah, ib_ah), 681 INIT_RDMA_OBJ_SIZE(ib_cq, bnxt_re_cq, ib_cq), 682 INIT_RDMA_OBJ_SIZE(ib_pd, bnxt_re_pd, ib_pd), 683 INIT_RDMA_OBJ_SIZE(ib_srq, bnxt_re_srq, ib_srq), 684 INIT_RDMA_OBJ_SIZE(ib_ucontext, bnxt_re_ucontext, ib_uctx), 685 }; 686 687 static int bnxt_re_register_ib(struct bnxt_re_dev *rdev) 688 { 689 struct ib_device *ibdev = &rdev->ibdev; 690 int ret; 691 692 /* ib device init */ 693 ibdev->node_type = RDMA_NODE_IB_CA; 694 strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA", 695 strlen(BNXT_RE_DESC) + 5); 696 ibdev->phys_port_cnt = 1; 697 698 bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid); 699 700 ibdev->num_comp_vectors = rdev->num_msix - 1; 701 ibdev->dev.parent = &rdev->en_dev->pdev->dev; 702 ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY; 703 704 /* User space */ 705 ibdev->uverbs_cmd_mask = 706 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 707 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 708 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 709 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 710 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 711 (1ull << IB_USER_VERBS_CMD_REG_MR) | 712 (1ull << IB_USER_VERBS_CMD_REREG_MR) | 713 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 714 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 715 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 716 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 717 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 718 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 719 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 720 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 721 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 722 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 723 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 724 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 725 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 726 (1ull << IB_USER_VERBS_CMD_CREATE_AH) | 727 (1ull << IB_USER_VERBS_CMD_MODIFY_AH) | 728 (1ull << IB_USER_VERBS_CMD_QUERY_AH) | 729 (1ull << IB_USER_VERBS_CMD_DESTROY_AH); 730 /* POLL_CQ and REQ_NOTIFY_CQ is directly handled in libbnxt_re */ 731 732 733 rdma_set_device_sysfs_group(ibdev, &bnxt_re_dev_attr_group); 734 ib_set_device_ops(ibdev, &bnxt_re_dev_ops); 735 ret = ib_device_set_netdev(&rdev->ibdev, rdev->netdev, 1); 736 if (ret) 737 return ret; 738 739 return ib_register_device(ibdev, "bnxt_re%d"); 740 } 741 742 static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev) 743 { 744 dev_put(rdev->netdev); 745 rdev->netdev = NULL; 746 mutex_lock(&bnxt_re_dev_lock); 747 list_del_rcu(&rdev->list); 748 mutex_unlock(&bnxt_re_dev_lock); 749 750 synchronize_rcu(); 751 } 752 753 static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev, 754 struct bnxt_en_dev *en_dev) 755 { 756 struct bnxt_re_dev *rdev; 757 758 /* Allocate bnxt_re_dev instance here */ 759 rdev = ib_alloc_device(bnxt_re_dev, ibdev); 760 if (!rdev) { 761 ibdev_err(NULL, "%s: bnxt_re_dev allocation failure!", 762 ROCE_DRV_MODULE_NAME); 763 return NULL; 764 } 765 /* Default values */ 766 rdev->netdev = netdev; 767 dev_hold(rdev->netdev); 768 rdev->en_dev = en_dev; 769 rdev->id = rdev->en_dev->pdev->devfn; 770 INIT_LIST_HEAD(&rdev->qp_list); 771 mutex_init(&rdev->qp_lock); 772 atomic_set(&rdev->qp_count, 0); 773 atomic_set(&rdev->cq_count, 0); 774 atomic_set(&rdev->srq_count, 0); 775 atomic_set(&rdev->mr_count, 0); 776 atomic_set(&rdev->mw_count, 0); 777 rdev->cosq[0] = 0xFFFF; 778 rdev->cosq[1] = 0xFFFF; 779 780 mutex_lock(&bnxt_re_dev_lock); 781 list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list); 782 mutex_unlock(&bnxt_re_dev_lock); 783 return rdev; 784 } 785 786 static int bnxt_re_handle_unaffi_async_event(struct creq_func_event 787 *unaffi_async) 788 { 789 switch (unaffi_async->event) { 790 case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR: 791 break; 792 case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR: 793 break; 794 case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR: 795 break; 796 case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR: 797 break; 798 case CREQ_FUNC_EVENT_EVENT_CQ_ERROR: 799 break; 800 case CREQ_FUNC_EVENT_EVENT_TQM_ERROR: 801 break; 802 case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR: 803 break; 804 case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR: 805 break; 806 case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR: 807 break; 808 case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR: 809 break; 810 case CREQ_FUNC_EVENT_EVENT_TIM_ERROR: 811 break; 812 default: 813 return -EINVAL; 814 } 815 return 0; 816 } 817 818 static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event, 819 struct bnxt_re_qp *qp) 820 { 821 struct ib_event event; 822 unsigned int flags; 823 824 if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR && 825 rdma_is_kernel_res(&qp->ib_qp.res)) { 826 flags = bnxt_re_lock_cqs(qp); 827 bnxt_qplib_add_flush_qp(&qp->qplib_qp); 828 bnxt_re_unlock_cqs(qp, flags); 829 } 830 831 memset(&event, 0, sizeof(event)); 832 if (qp->qplib_qp.srq) { 833 event.device = &qp->rdev->ibdev; 834 event.element.qp = &qp->ib_qp; 835 event.event = IB_EVENT_QP_LAST_WQE_REACHED; 836 } 837 838 if (event.device && qp->ib_qp.event_handler) 839 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context); 840 841 return 0; 842 } 843 844 static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async, 845 void *obj) 846 { 847 int rc = 0; 848 u8 event; 849 850 if (!obj) 851 return rc; /* QP was already dead, still return success */ 852 853 event = affi_async->event; 854 if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) { 855 struct bnxt_qplib_qp *lib_qp = obj; 856 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp, 857 qplib_qp); 858 rc = bnxt_re_handle_qp_async_event(affi_async, qp); 859 } 860 return rc; 861 } 862 863 static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw, 864 void *aeqe, void *obj) 865 { 866 struct creq_qp_event *affi_async; 867 struct creq_func_event *unaffi_async; 868 u8 type; 869 int rc; 870 871 type = ((struct creq_base *)aeqe)->type; 872 if (type == CREQ_BASE_TYPE_FUNC_EVENT) { 873 unaffi_async = aeqe; 874 rc = bnxt_re_handle_unaffi_async_event(unaffi_async); 875 } else { 876 affi_async = aeqe; 877 rc = bnxt_re_handle_affi_async_event(affi_async, obj); 878 } 879 880 return rc; 881 } 882 883 static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq, 884 struct bnxt_qplib_srq *handle, u8 event) 885 { 886 struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq, 887 qplib_srq); 888 struct ib_event ib_event; 889 int rc = 0; 890 891 if (!srq) { 892 ibdev_err(NULL, "%s: SRQ is NULL, SRQN not handled", 893 ROCE_DRV_MODULE_NAME); 894 rc = -EINVAL; 895 goto done; 896 } 897 ib_event.device = &srq->rdev->ibdev; 898 ib_event.element.srq = &srq->ib_srq; 899 if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT) 900 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED; 901 else 902 ib_event.event = IB_EVENT_SRQ_ERR; 903 904 if (srq->ib_srq.event_handler) { 905 /* Lock event_handler? */ 906 (*srq->ib_srq.event_handler)(&ib_event, 907 srq->ib_srq.srq_context); 908 } 909 done: 910 return rc; 911 } 912 913 static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq, 914 struct bnxt_qplib_cq *handle) 915 { 916 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq, 917 qplib_cq); 918 919 if (!cq) { 920 ibdev_err(NULL, "%s: CQ is NULL, CQN not handled", 921 ROCE_DRV_MODULE_NAME); 922 return -EINVAL; 923 } 924 if (cq->ib_cq.comp_handler) { 925 /* Lock comp_handler? */ 926 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context); 927 } 928 929 return 0; 930 } 931 932 #define BNXT_RE_GEN_P5_PF_NQ_DB 0x10000 933 #define BNXT_RE_GEN_P5_VF_NQ_DB 0x4000 934 static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx) 935 { 936 return bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ? 937 (rdev->is_virtfn ? BNXT_RE_GEN_P5_VF_NQ_DB : 938 BNXT_RE_GEN_P5_PF_NQ_DB) : 939 rdev->msix_entries[indx].db_offset; 940 } 941 942 static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev) 943 { 944 int i; 945 946 for (i = 1; i < rdev->num_msix; i++) 947 bnxt_qplib_disable_nq(&rdev->nq[i - 1]); 948 949 if (rdev->qplib_res.rcfw) 950 bnxt_qplib_cleanup_res(&rdev->qplib_res); 951 } 952 953 static int bnxt_re_init_res(struct bnxt_re_dev *rdev) 954 { 955 int num_vec_enabled = 0; 956 int rc = 0, i; 957 u32 db_offt; 958 959 bnxt_qplib_init_res(&rdev->qplib_res); 960 961 for (i = 1; i < rdev->num_msix ; i++) { 962 db_offt = bnxt_re_get_nqdb_offset(rdev, i); 963 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1], 964 i - 1, rdev->msix_entries[i].vector, 965 db_offt, &bnxt_re_cqn_handler, 966 &bnxt_re_srqn_handler); 967 if (rc) { 968 ibdev_err(&rdev->ibdev, 969 "Failed to enable NQ with rc = 0x%x", rc); 970 goto fail; 971 } 972 num_vec_enabled++; 973 } 974 return 0; 975 fail: 976 for (i = num_vec_enabled; i >= 0; i--) 977 bnxt_qplib_disable_nq(&rdev->nq[i]); 978 return rc; 979 } 980 981 static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev) 982 { 983 u8 type; 984 int i; 985 986 for (i = 0; i < rdev->num_msix - 1; i++) { 987 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 988 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type); 989 bnxt_qplib_free_nq(&rdev->nq[i]); 990 rdev->nq[i].res = NULL; 991 } 992 } 993 994 static void bnxt_re_free_res(struct bnxt_re_dev *rdev) 995 { 996 bnxt_re_free_nq_res(rdev); 997 998 if (rdev->qplib_res.dpi_tbl.max) { 999 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 1000 &rdev->qplib_res.dpi_tbl, 1001 &rdev->dpi_privileged); 1002 } 1003 if (rdev->qplib_res.rcfw) { 1004 bnxt_qplib_free_res(&rdev->qplib_res); 1005 rdev->qplib_res.rcfw = NULL; 1006 } 1007 } 1008 1009 static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev) 1010 { 1011 struct bnxt_re_ring_attr rattr = {}; 1012 int num_vec_created = 0; 1013 int rc = 0, i; 1014 u8 type; 1015 1016 /* Configure and allocate resources for qplib */ 1017 rdev->qplib_res.rcfw = &rdev->rcfw; 1018 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 1019 rdev->is_virtfn); 1020 if (rc) 1021 goto fail; 1022 1023 rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev, 1024 rdev->netdev, &rdev->dev_attr); 1025 if (rc) 1026 goto fail; 1027 1028 rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl, 1029 &rdev->dpi_privileged, 1030 rdev); 1031 if (rc) 1032 goto dealloc_res; 1033 1034 for (i = 0; i < rdev->num_msix - 1; i++) { 1035 struct bnxt_qplib_nq *nq; 1036 1037 nq = &rdev->nq[i]; 1038 nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT; 1039 rc = bnxt_qplib_alloc_nq(&rdev->qplib_res, &rdev->nq[i]); 1040 if (rc) { 1041 ibdev_err(&rdev->ibdev, "Alloc Failed NQ%d rc:%#x", 1042 i, rc); 1043 goto free_nq; 1044 } 1045 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1046 rattr.dma_arr = nq->hwq.pbl[PBL_LVL_0].pg_map_arr; 1047 rattr.pages = nq->hwq.pbl[rdev->nq[i].hwq.level].pg_count; 1048 rattr.type = type; 1049 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX; 1050 rattr.depth = BNXT_QPLIB_NQE_MAX_CNT - 1; 1051 rattr.lrid = rdev->msix_entries[i + 1].ring_idx; 1052 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &nq->ring_id); 1053 if (rc) { 1054 ibdev_err(&rdev->ibdev, 1055 "Failed to allocate NQ fw id with rc = 0x%x", 1056 rc); 1057 bnxt_qplib_free_nq(&rdev->nq[i]); 1058 goto free_nq; 1059 } 1060 num_vec_created++; 1061 } 1062 return 0; 1063 free_nq: 1064 for (i = num_vec_created - 1; i >= 0; i--) { 1065 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1066 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type); 1067 bnxt_qplib_free_nq(&rdev->nq[i]); 1068 } 1069 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 1070 &rdev->qplib_res.dpi_tbl, 1071 &rdev->dpi_privileged); 1072 dealloc_res: 1073 bnxt_qplib_free_res(&rdev->qplib_res); 1074 1075 fail: 1076 rdev->qplib_res.rcfw = NULL; 1077 return rc; 1078 } 1079 1080 static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp, 1081 u8 port_num, enum ib_event_type event) 1082 { 1083 struct ib_event ib_event; 1084 1085 ib_event.device = ibdev; 1086 if (qp) { 1087 ib_event.element.qp = qp; 1088 ib_event.event = event; 1089 if (qp->event_handler) 1090 qp->event_handler(&ib_event, qp->qp_context); 1091 1092 } else { 1093 ib_event.element.port_num = port_num; 1094 ib_event.event = event; 1095 ib_dispatch_event(&ib_event); 1096 } 1097 } 1098 1099 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02 1100 static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir, 1101 u64 *cid_map) 1102 { 1103 struct hwrm_queue_pri2cos_qcfg_input req = {0}; 1104 struct bnxt *bp = netdev_priv(rdev->netdev); 1105 struct hwrm_queue_pri2cos_qcfg_output resp; 1106 struct bnxt_en_dev *en_dev = rdev->en_dev; 1107 struct bnxt_fw_msg fw_msg; 1108 u32 flags = 0; 1109 u8 *qcfgmap, *tmp_map; 1110 int rc = 0, i; 1111 1112 if (!cid_map) 1113 return -EINVAL; 1114 1115 memset(&fw_msg, 0, sizeof(fw_msg)); 1116 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, 1117 HWRM_QUEUE_PRI2COS_QCFG, -1, -1); 1118 flags |= (dir & 0x01); 1119 flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN; 1120 req.flags = cpu_to_le32(flags); 1121 req.port_id = bp->pf.port_id; 1122 1123 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 1124 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 1125 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 1126 if (rc) 1127 return rc; 1128 1129 if (resp.queue_cfg_info) { 1130 ibdev_warn(&rdev->ibdev, 1131 "Asymmetric cos queue configuration detected"); 1132 ibdev_warn(&rdev->ibdev, 1133 " on device, QoS may not be fully functional\n"); 1134 } 1135 qcfgmap = &resp.pri0_cos_queue_id; 1136 tmp_map = (u8 *)cid_map; 1137 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) 1138 tmp_map[i] = qcfgmap[i]; 1139 1140 return rc; 1141 } 1142 1143 static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev, 1144 struct bnxt_re_qp *qp) 1145 { 1146 return (qp->ib_qp.qp_type == IB_QPT_GSI) || 1147 (qp == rdev->gsi_ctx.gsi_sqp); 1148 } 1149 1150 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev) 1151 { 1152 int mask = IB_QP_STATE; 1153 struct ib_qp_attr qp_attr; 1154 struct bnxt_re_qp *qp; 1155 1156 qp_attr.qp_state = IB_QPS_ERR; 1157 mutex_lock(&rdev->qp_lock); 1158 list_for_each_entry(qp, &rdev->qp_list, list) { 1159 /* Modify the state of all QPs except QP1/Shadow QP */ 1160 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) { 1161 if (qp->qplib_qp.state != 1162 CMDQ_MODIFY_QP_NEW_STATE_RESET && 1163 qp->qplib_qp.state != 1164 CMDQ_MODIFY_QP_NEW_STATE_ERR) { 1165 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp, 1166 1, IB_EVENT_QP_FATAL); 1167 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask, 1168 NULL); 1169 } 1170 } 1171 } 1172 mutex_unlock(&rdev->qp_lock); 1173 } 1174 1175 static int bnxt_re_update_gid(struct bnxt_re_dev *rdev) 1176 { 1177 struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl; 1178 struct bnxt_qplib_gid gid; 1179 u16 gid_idx, index; 1180 int rc = 0; 1181 1182 if (!ib_device_try_get(&rdev->ibdev)) 1183 return 0; 1184 1185 if (!sgid_tbl) { 1186 ibdev_err(&rdev->ibdev, "QPLIB: SGID table not allocated"); 1187 rc = -EINVAL; 1188 goto out; 1189 } 1190 1191 for (index = 0; index < sgid_tbl->active; index++) { 1192 gid_idx = sgid_tbl->hw_id[index]; 1193 1194 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero, 1195 sizeof(bnxt_qplib_gid_zero))) 1196 continue; 1197 /* need to modify the VLAN enable setting of non VLAN GID only 1198 * as setting is done for VLAN GID while adding GID 1199 */ 1200 if (sgid_tbl->vlan[index]) 1201 continue; 1202 1203 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid)); 1204 1205 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx, 1206 rdev->qplib_res.netdev->dev_addr); 1207 } 1208 out: 1209 ib_device_put(&rdev->ibdev); 1210 return rc; 1211 } 1212 1213 static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev) 1214 { 1215 u32 prio_map = 0, tmp_map = 0; 1216 struct net_device *netdev; 1217 struct dcb_app app; 1218 1219 netdev = rdev->netdev; 1220 1221 memset(&app, 0, sizeof(app)); 1222 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE; 1223 app.protocol = ETH_P_IBOE; 1224 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1225 prio_map = tmp_map; 1226 1227 app.selector = IEEE_8021QAZ_APP_SEL_DGRAM; 1228 app.protocol = ROCE_V2_UDP_DPORT; 1229 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1230 prio_map |= tmp_map; 1231 1232 return prio_map; 1233 } 1234 1235 static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq) 1236 { 1237 u16 prio; 1238 u8 id; 1239 1240 for (prio = 0, id = 0; prio < 8; prio++) { 1241 if (prio_map & (1 << prio)) { 1242 cosq[id] = cid_map[prio]; 1243 id++; 1244 if (id == 2) /* Max 2 tcs supported */ 1245 break; 1246 } 1247 } 1248 } 1249 1250 static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev) 1251 { 1252 u8 prio_map = 0; 1253 u64 cid_map; 1254 int rc; 1255 1256 /* Get priority for roce */ 1257 prio_map = bnxt_re_get_priority_mask(rdev); 1258 1259 if (prio_map == rdev->cur_prio_map) 1260 return 0; 1261 rdev->cur_prio_map = prio_map; 1262 /* Get cosq id for this priority */ 1263 rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map); 1264 if (rc) { 1265 ibdev_warn(&rdev->ibdev, "no cos for p_mask %x\n", prio_map); 1266 return rc; 1267 } 1268 /* Parse CoS IDs for app priority */ 1269 bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq); 1270 1271 /* Config BONO. */ 1272 rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq); 1273 if (rc) { 1274 ibdev_warn(&rdev->ibdev, "no tc for cos{%x, %x}\n", 1275 rdev->cosq[0], rdev->cosq[1]); 1276 return rc; 1277 } 1278 1279 /* Actual priorities are not programmed as they are already 1280 * done by L2 driver; just enable or disable priority vlan tagging 1281 */ 1282 if ((prio_map == 0 && rdev->qplib_res.prio) || 1283 (prio_map != 0 && !rdev->qplib_res.prio)) { 1284 rdev->qplib_res.prio = prio_map ? true : false; 1285 1286 bnxt_re_update_gid(rdev); 1287 } 1288 1289 return 0; 1290 } 1291 1292 static void bnxt_re_query_hwrm_intf_version(struct bnxt_re_dev *rdev) 1293 { 1294 struct bnxt_en_dev *en_dev = rdev->en_dev; 1295 struct hwrm_ver_get_output resp = {0}; 1296 struct hwrm_ver_get_input req = {0}; 1297 struct bnxt_fw_msg fw_msg; 1298 int rc = 0; 1299 1300 memset(&fw_msg, 0, sizeof(fw_msg)); 1301 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, 1302 HWRM_VER_GET, -1, -1); 1303 req.hwrm_intf_maj = HWRM_VERSION_MAJOR; 1304 req.hwrm_intf_min = HWRM_VERSION_MINOR; 1305 req.hwrm_intf_upd = HWRM_VERSION_UPDATE; 1306 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 1307 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 1308 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 1309 if (rc) { 1310 ibdev_err(&rdev->ibdev, "Failed to query HW version, rc = 0x%x", 1311 rc); 1312 return; 1313 } 1314 rdev->qplib_ctx.hwrm_intf_ver = 1315 (u64)le16_to_cpu(resp.hwrm_intf_major) << 48 | 1316 (u64)le16_to_cpu(resp.hwrm_intf_minor) << 32 | 1317 (u64)le16_to_cpu(resp.hwrm_intf_build) << 16 | 1318 le16_to_cpu(resp.hwrm_intf_patch); 1319 } 1320 1321 static int bnxt_re_ib_init(struct bnxt_re_dev *rdev) 1322 { 1323 int rc = 0; 1324 u32 event; 1325 1326 /* Register ib dev */ 1327 rc = bnxt_re_register_ib(rdev); 1328 if (rc) { 1329 pr_err("Failed to register with IB: %#x\n", rc); 1330 return rc; 1331 } 1332 dev_info(rdev_to_dev(rdev), "Device registered successfully"); 1333 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1334 &rdev->active_width); 1335 set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags); 1336 1337 event = netif_running(rdev->netdev) && netif_carrier_ok(rdev->netdev) ? 1338 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 1339 1340 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, event); 1341 1342 return rc; 1343 } 1344 1345 static void bnxt_re_dev_uninit(struct bnxt_re_dev *rdev) 1346 { 1347 u8 type; 1348 int rc; 1349 1350 if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags)) 1351 cancel_delayed_work_sync(&rdev->worker); 1352 1353 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, 1354 &rdev->flags)) 1355 bnxt_re_cleanup_res(rdev); 1356 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags)) 1357 bnxt_re_free_res(rdev); 1358 1359 if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) { 1360 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw); 1361 if (rc) 1362 ibdev_warn(&rdev->ibdev, 1363 "Failed to deinitialize RCFW: %#x", rc); 1364 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id); 1365 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx); 1366 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1367 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1368 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type); 1369 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1370 } 1371 if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) { 1372 rc = bnxt_re_free_msix(rdev); 1373 if (rc) 1374 ibdev_warn(&rdev->ibdev, 1375 "Failed to free MSI-X vectors: %#x", rc); 1376 } 1377 1378 bnxt_re_destroy_chip_ctx(rdev); 1379 if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) { 1380 rc = bnxt_re_unregister_netdev(rdev); 1381 if (rc) 1382 ibdev_warn(&rdev->ibdev, 1383 "Failed to unregister with netdev: %#x", rc); 1384 } 1385 } 1386 1387 /* worker thread for polling periodic events. Now used for QoS programming*/ 1388 static void bnxt_re_worker(struct work_struct *work) 1389 { 1390 struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev, 1391 worker.work); 1392 1393 bnxt_re_setup_qos(rdev); 1394 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1395 } 1396 1397 static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 wqe_mode) 1398 { 1399 struct bnxt_qplib_creq_ctx *creq; 1400 struct bnxt_re_ring_attr rattr; 1401 u32 db_offt; 1402 int vid; 1403 u8 type; 1404 int rc; 1405 1406 /* Registered a new RoCE device instance to netdev */ 1407 memset(&rattr, 0, sizeof(rattr)); 1408 rc = bnxt_re_register_netdev(rdev); 1409 if (rc) { 1410 rtnl_unlock(); 1411 ibdev_err(&rdev->ibdev, 1412 "Failed to register with netedev: %#x\n", rc); 1413 return -EINVAL; 1414 } 1415 set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags); 1416 1417 rc = bnxt_re_setup_chip_ctx(rdev, wqe_mode); 1418 if (rc) { 1419 ibdev_err(&rdev->ibdev, "Failed to get chip context\n"); 1420 return -EINVAL; 1421 } 1422 1423 /* Check whether VF or PF */ 1424 bnxt_re_get_sriov_func_type(rdev); 1425 1426 rc = bnxt_re_request_msix(rdev); 1427 if (rc) { 1428 ibdev_err(&rdev->ibdev, 1429 "Failed to get MSI-X vectors: %#x\n", rc); 1430 rc = -EINVAL; 1431 goto fail; 1432 } 1433 set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags); 1434 1435 bnxt_re_query_hwrm_intf_version(rdev); 1436 1437 /* Establish RCFW Communication Channel to initialize the context 1438 * memory for the function and all child VFs 1439 */ 1440 rc = bnxt_qplib_alloc_rcfw_channel(&rdev->qplib_res, &rdev->rcfw, 1441 &rdev->qplib_ctx, 1442 BNXT_RE_MAX_QPC_COUNT); 1443 if (rc) { 1444 ibdev_err(&rdev->ibdev, 1445 "Failed to allocate RCFW Channel: %#x\n", rc); 1446 goto fail; 1447 } 1448 1449 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1450 creq = &rdev->rcfw.creq; 1451 rattr.dma_arr = creq->hwq.pbl[PBL_LVL_0].pg_map_arr; 1452 rattr.pages = creq->hwq.pbl[creq->hwq.level].pg_count; 1453 rattr.type = type; 1454 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX; 1455 rattr.depth = BNXT_QPLIB_CREQE_MAX_CNT - 1; 1456 rattr.lrid = rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx; 1457 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &creq->ring_id); 1458 if (rc) { 1459 ibdev_err(&rdev->ibdev, "Failed to allocate CREQ: %#x\n", rc); 1460 goto free_rcfw; 1461 } 1462 db_offt = bnxt_re_get_nqdb_offset(rdev, BNXT_RE_AEQ_IDX); 1463 vid = rdev->msix_entries[BNXT_RE_AEQ_IDX].vector; 1464 rc = bnxt_qplib_enable_rcfw_channel(&rdev->rcfw, 1465 vid, db_offt, rdev->is_virtfn, 1466 &bnxt_re_aeq_handler); 1467 if (rc) { 1468 ibdev_err(&rdev->ibdev, "Failed to enable RCFW channel: %#x\n", 1469 rc); 1470 goto free_ring; 1471 } 1472 1473 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 1474 rdev->is_virtfn); 1475 if (rc) 1476 goto disable_rcfw; 1477 1478 bnxt_re_set_resource_limits(rdev); 1479 1480 rc = bnxt_qplib_alloc_ctx(&rdev->qplib_res, &rdev->qplib_ctx, 0, 1481 bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)); 1482 if (rc) { 1483 ibdev_err(&rdev->ibdev, 1484 "Failed to allocate QPLIB context: %#x\n", rc); 1485 goto disable_rcfw; 1486 } 1487 rc = bnxt_re_net_stats_ctx_alloc(rdev, 1488 rdev->qplib_ctx.stats.dma_map, 1489 &rdev->qplib_ctx.stats.fw_id); 1490 if (rc) { 1491 ibdev_err(&rdev->ibdev, 1492 "Failed to allocate stats context: %#x\n", rc); 1493 goto free_ctx; 1494 } 1495 1496 rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx, 1497 rdev->is_virtfn); 1498 if (rc) { 1499 ibdev_err(&rdev->ibdev, 1500 "Failed to initialize RCFW: %#x\n", rc); 1501 goto free_sctx; 1502 } 1503 set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags); 1504 1505 /* Resources based on the 'new' device caps */ 1506 rc = bnxt_re_alloc_res(rdev); 1507 if (rc) { 1508 ibdev_err(&rdev->ibdev, 1509 "Failed to allocate resources: %#x\n", rc); 1510 goto fail; 1511 } 1512 set_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags); 1513 rc = bnxt_re_init_res(rdev); 1514 if (rc) { 1515 ibdev_err(&rdev->ibdev, 1516 "Failed to initialize resources: %#x\n", rc); 1517 goto fail; 1518 } 1519 1520 set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags); 1521 1522 if (!rdev->is_virtfn) { 1523 rc = bnxt_re_setup_qos(rdev); 1524 if (rc) 1525 ibdev_info(&rdev->ibdev, 1526 "RoCE priority not yet configured\n"); 1527 1528 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker); 1529 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags); 1530 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1531 } 1532 1533 return 0; 1534 free_sctx: 1535 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id); 1536 free_ctx: 1537 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx); 1538 disable_rcfw: 1539 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1540 free_ring: 1541 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1542 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type); 1543 free_rcfw: 1544 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1545 fail: 1546 bnxt_re_dev_uninit(rdev); 1547 1548 return rc; 1549 } 1550 1551 static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev) 1552 { 1553 struct bnxt_en_dev *en_dev = rdev->en_dev; 1554 struct net_device *netdev = rdev->netdev; 1555 1556 bnxt_re_dev_remove(rdev); 1557 1558 if (netdev) 1559 bnxt_re_dev_unprobe(netdev, en_dev); 1560 } 1561 1562 static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev) 1563 { 1564 struct bnxt_en_dev *en_dev; 1565 int rc = 0; 1566 1567 if (!is_bnxt_re_dev(netdev)) 1568 return -ENODEV; 1569 1570 en_dev = bnxt_re_dev_probe(netdev); 1571 if (IS_ERR(en_dev)) { 1572 if (en_dev != ERR_PTR(-ENODEV)) 1573 ibdev_err(&(*rdev)->ibdev, "%s: Failed to probe\n", 1574 ROCE_DRV_MODULE_NAME); 1575 rc = PTR_ERR(en_dev); 1576 goto exit; 1577 } 1578 *rdev = bnxt_re_dev_add(netdev, en_dev); 1579 if (!*rdev) { 1580 rc = -ENOMEM; 1581 bnxt_re_dev_unprobe(netdev, en_dev); 1582 goto exit; 1583 } 1584 exit: 1585 return rc; 1586 } 1587 1588 static void bnxt_re_remove_device(struct bnxt_re_dev *rdev) 1589 { 1590 bnxt_re_dev_uninit(rdev); 1591 pci_dev_put(rdev->en_dev->pdev); 1592 bnxt_re_dev_unreg(rdev); 1593 } 1594 1595 static int bnxt_re_add_device(struct bnxt_re_dev **rdev, 1596 struct net_device *netdev, u8 wqe_mode) 1597 { 1598 int rc; 1599 1600 rc = bnxt_re_dev_reg(rdev, netdev); 1601 if (rc == -ENODEV) 1602 return rc; 1603 if (rc) { 1604 pr_err("Failed to register with the device %s: %#x\n", 1605 netdev->name, rc); 1606 return rc; 1607 } 1608 1609 pci_dev_get((*rdev)->en_dev->pdev); 1610 rc = bnxt_re_dev_init(*rdev, wqe_mode); 1611 if (rc) { 1612 pci_dev_put((*rdev)->en_dev->pdev); 1613 bnxt_re_dev_unreg(*rdev); 1614 } 1615 1616 return rc; 1617 } 1618 1619 static void bnxt_re_dealloc_driver(struct ib_device *ib_dev) 1620 { 1621 struct bnxt_re_dev *rdev = 1622 container_of(ib_dev, struct bnxt_re_dev, ibdev); 1623 1624 dev_info(rdev_to_dev(rdev), "Unregistering Device"); 1625 1626 rtnl_lock(); 1627 bnxt_re_remove_device(rdev); 1628 rtnl_unlock(); 1629 } 1630 1631 /* Handle all deferred netevents tasks */ 1632 static void bnxt_re_task(struct work_struct *work) 1633 { 1634 struct bnxt_re_work *re_work; 1635 struct bnxt_re_dev *rdev; 1636 int rc = 0; 1637 1638 re_work = container_of(work, struct bnxt_re_work, work); 1639 rdev = re_work->rdev; 1640 1641 if (re_work->event == NETDEV_REGISTER) { 1642 rc = bnxt_re_ib_init(rdev); 1643 if (rc) { 1644 ibdev_err(&rdev->ibdev, 1645 "Failed to register with IB: %#x", rc); 1646 rtnl_lock(); 1647 bnxt_re_remove_device(rdev); 1648 rtnl_unlock(); 1649 goto exit; 1650 } 1651 goto exit; 1652 } 1653 1654 if (!ib_device_try_get(&rdev->ibdev)) 1655 goto exit; 1656 1657 switch (re_work->event) { 1658 case NETDEV_UP: 1659 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1660 IB_EVENT_PORT_ACTIVE); 1661 break; 1662 case NETDEV_DOWN: 1663 bnxt_re_dev_stop(rdev); 1664 break; 1665 case NETDEV_CHANGE: 1666 if (!netif_carrier_ok(rdev->netdev)) 1667 bnxt_re_dev_stop(rdev); 1668 else if (netif_carrier_ok(rdev->netdev)) 1669 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1670 IB_EVENT_PORT_ACTIVE); 1671 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1672 &rdev->active_width); 1673 break; 1674 default: 1675 break; 1676 } 1677 ib_device_put(&rdev->ibdev); 1678 exit: 1679 put_device(&rdev->ibdev.dev); 1680 kfree(re_work); 1681 } 1682 1683 /* 1684 * "Notifier chain callback can be invoked for the same chain from 1685 * different CPUs at the same time". 1686 * 1687 * For cases when the netdev is already present, our call to the 1688 * register_netdevice_notifier() will actually get the rtnl_lock() 1689 * before sending NETDEV_REGISTER and (if up) NETDEV_UP 1690 * events. 1691 * 1692 * But for cases when the netdev is not already present, the notifier 1693 * chain is subjected to be invoked from different CPUs simultaneously. 1694 * 1695 * This is protected by the netdev_mutex. 1696 */ 1697 static int bnxt_re_netdev_event(struct notifier_block *notifier, 1698 unsigned long event, void *ptr) 1699 { 1700 struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr); 1701 struct bnxt_re_work *re_work; 1702 struct bnxt_re_dev *rdev; 1703 int rc = 0; 1704 bool sch_work = false; 1705 bool release = true; 1706 1707 real_dev = rdma_vlan_dev_real_dev(netdev); 1708 if (!real_dev) 1709 real_dev = netdev; 1710 1711 rdev = bnxt_re_from_netdev(real_dev); 1712 if (!rdev && event != NETDEV_REGISTER) 1713 return NOTIFY_OK; 1714 1715 if (real_dev != netdev) 1716 goto exit; 1717 1718 switch (event) { 1719 case NETDEV_REGISTER: 1720 if (rdev) 1721 break; 1722 rc = bnxt_re_add_device(&rdev, real_dev, 1723 BNXT_QPLIB_WQE_MODE_STATIC); 1724 if (!rc) 1725 sch_work = true; 1726 release = false; 1727 break; 1728 1729 case NETDEV_UNREGISTER: 1730 ib_unregister_device_queued(&rdev->ibdev); 1731 break; 1732 1733 default: 1734 sch_work = true; 1735 break; 1736 } 1737 if (sch_work) { 1738 /* Allocate for the deferred task */ 1739 re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC); 1740 if (re_work) { 1741 get_device(&rdev->ibdev.dev); 1742 re_work->rdev = rdev; 1743 re_work->event = event; 1744 re_work->vlan_dev = (real_dev == netdev ? 1745 NULL : netdev); 1746 INIT_WORK(&re_work->work, bnxt_re_task); 1747 queue_work(bnxt_re_wq, &re_work->work); 1748 } 1749 } 1750 1751 exit: 1752 if (rdev && release) 1753 ib_device_put(&rdev->ibdev); 1754 return NOTIFY_DONE; 1755 } 1756 1757 static struct notifier_block bnxt_re_netdev_notifier = { 1758 .notifier_call = bnxt_re_netdev_event 1759 }; 1760 1761 static int __init bnxt_re_mod_init(void) 1762 { 1763 int rc = 0; 1764 1765 pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version); 1766 1767 bnxt_re_wq = create_singlethread_workqueue("bnxt_re"); 1768 if (!bnxt_re_wq) 1769 return -ENOMEM; 1770 1771 INIT_LIST_HEAD(&bnxt_re_dev_list); 1772 1773 rc = register_netdevice_notifier(&bnxt_re_netdev_notifier); 1774 if (rc) { 1775 pr_err("%s: Cannot register to netdevice_notifier", 1776 ROCE_DRV_MODULE_NAME); 1777 goto err_netdev; 1778 } 1779 return 0; 1780 1781 err_netdev: 1782 destroy_workqueue(bnxt_re_wq); 1783 1784 return rc; 1785 } 1786 1787 static void __exit bnxt_re_mod_exit(void) 1788 { 1789 struct bnxt_re_dev *rdev; 1790 1791 unregister_netdevice_notifier(&bnxt_re_netdev_notifier); 1792 if (bnxt_re_wq) 1793 destroy_workqueue(bnxt_re_wq); 1794 list_for_each_entry(rdev, &bnxt_re_dev_list, list) { 1795 /* VF device removal should be called before the removal 1796 * of PF device. Queue VFs unregister first, so that VFs 1797 * shall be removed before the PF during the call of 1798 * ib_unregister_driver. 1799 */ 1800 if (rdev->is_virtfn) 1801 ib_unregister_device(&rdev->ibdev); 1802 } 1803 ib_unregister_driver(RDMA_DRIVER_BNXT_RE); 1804 } 1805 1806 module_init(bnxt_re_mod_init); 1807 module_exit(bnxt_re_mod_exit); 1808