1 /* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Main component of the bnxt_re driver 37 */ 38 39 #include <linux/module.h> 40 #include <linux/netdevice.h> 41 #include <linux/ethtool.h> 42 #include <linux/mutex.h> 43 #include <linux/list.h> 44 #include <linux/rculist.h> 45 #include <linux/spinlock.h> 46 #include <linux/pci.h> 47 #include <net/dcbnl.h> 48 #include <net/ipv6.h> 49 #include <net/addrconf.h> 50 #include <linux/if_ether.h> 51 52 #include <rdma/ib_verbs.h> 53 #include <rdma/ib_user_verbs.h> 54 #include <rdma/ib_umem.h> 55 #include <rdma/ib_addr.h> 56 57 #include "bnxt_ulp.h" 58 #include "roce_hsi.h" 59 #include "qplib_res.h" 60 #include "qplib_sp.h" 61 #include "qplib_fp.h" 62 #include "qplib_rcfw.h" 63 #include "bnxt_re.h" 64 #include "ib_verbs.h" 65 #include <rdma/bnxt_re-abi.h> 66 #include "bnxt.h" 67 #include "hw_counters.h" 68 69 static char version[] = 70 BNXT_RE_DESC " v" ROCE_DRV_MODULE_VERSION "\n"; 71 72 MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>"); 73 MODULE_DESCRIPTION(BNXT_RE_DESC " Driver"); 74 MODULE_LICENSE("Dual BSD/GPL"); 75 76 /* globals */ 77 static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list); 78 /* Mutex to protect the list of bnxt_re devices added */ 79 static DEFINE_MUTEX(bnxt_re_dev_lock); 80 static struct workqueue_struct *bnxt_re_wq; 81 static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev, bool lock_wait); 82 83 /* SR-IOV helper functions */ 84 85 static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev) 86 { 87 struct bnxt *bp; 88 89 bp = netdev_priv(rdev->en_dev->net); 90 if (BNXT_VF(bp)) 91 rdev->is_virtfn = 1; 92 } 93 94 /* Set the maximum number of each resource that the driver actually wants 95 * to allocate. This may be up to the maximum number the firmware has 96 * reserved for the function. The driver may choose to allocate fewer 97 * resources than the firmware maximum. 98 */ 99 static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev) 100 { 101 u32 vf_qps = 0, vf_srqs = 0, vf_cqs = 0, vf_mrws = 0, vf_gids = 0; 102 u32 i; 103 u32 vf_pct; 104 u32 num_vfs; 105 struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr; 106 107 rdev->qplib_ctx.qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT, 108 dev_attr->max_qp); 109 110 rdev->qplib_ctx.mrw_count = BNXT_RE_MAX_MRW_COUNT_256K; 111 /* Use max_mr from fw since max_mrw does not get set */ 112 rdev->qplib_ctx.mrw_count = min_t(u32, rdev->qplib_ctx.mrw_count, 113 dev_attr->max_mr); 114 rdev->qplib_ctx.srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT, 115 dev_attr->max_srq); 116 rdev->qplib_ctx.cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, 117 dev_attr->max_cq); 118 119 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++) 120 rdev->qplib_ctx.tqm_count[i] = 121 rdev->dev_attr.tqm_alloc_reqs[i]; 122 123 if (rdev->num_vfs) { 124 /* 125 * Reserve a set of resources for the PF. Divide the remaining 126 * resources among the VFs 127 */ 128 vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF; 129 num_vfs = 100 * rdev->num_vfs; 130 vf_qps = (rdev->qplib_ctx.qpc_count * vf_pct) / num_vfs; 131 vf_srqs = (rdev->qplib_ctx.srqc_count * vf_pct) / num_vfs; 132 vf_cqs = (rdev->qplib_ctx.cq_count * vf_pct) / num_vfs; 133 /* 134 * The driver allows many more MRs than other resources. If the 135 * firmware does also, then reserve a fixed amount for the PF 136 * and divide the rest among VFs. VFs may use many MRs for NFS 137 * mounts, ISER, NVME applications, etc. If the firmware 138 * severely restricts the number of MRs, then let PF have 139 * half and divide the rest among VFs, as for the other 140 * resource types. 141 */ 142 if (rdev->qplib_ctx.mrw_count < BNXT_RE_MAX_MRW_COUNT_64K) 143 vf_mrws = rdev->qplib_ctx.mrw_count * vf_pct / num_vfs; 144 else 145 vf_mrws = (rdev->qplib_ctx.mrw_count - 146 BNXT_RE_RESVD_MR_FOR_PF) / rdev->num_vfs; 147 vf_gids = BNXT_RE_MAX_GID_PER_VF; 148 } 149 rdev->qplib_ctx.vf_res.max_mrw_per_vf = vf_mrws; 150 rdev->qplib_ctx.vf_res.max_gid_per_vf = vf_gids; 151 rdev->qplib_ctx.vf_res.max_qp_per_vf = vf_qps; 152 rdev->qplib_ctx.vf_res.max_srq_per_vf = vf_srqs; 153 rdev->qplib_ctx.vf_res.max_cq_per_vf = vf_cqs; 154 } 155 156 /* for handling bnxt_en callbacks later */ 157 static void bnxt_re_stop(void *p) 158 { 159 } 160 161 static void bnxt_re_start(void *p) 162 { 163 } 164 165 static void bnxt_re_sriov_config(void *p, int num_vfs) 166 { 167 struct bnxt_re_dev *rdev = p; 168 169 if (!rdev) 170 return; 171 172 rdev->num_vfs = num_vfs; 173 bnxt_re_set_resource_limits(rdev); 174 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw, 175 &rdev->qplib_ctx); 176 } 177 178 static void bnxt_re_shutdown(void *p) 179 { 180 struct bnxt_re_dev *rdev = p; 181 182 if (!rdev) 183 return; 184 185 bnxt_re_ib_unreg(rdev, false); 186 } 187 188 static struct bnxt_ulp_ops bnxt_re_ulp_ops = { 189 .ulp_async_notifier = NULL, 190 .ulp_stop = bnxt_re_stop, 191 .ulp_start = bnxt_re_start, 192 .ulp_sriov_config = bnxt_re_sriov_config, 193 .ulp_shutdown = bnxt_re_shutdown 194 }; 195 196 /* RoCE -> Net driver */ 197 198 /* Driver registration routines used to let the networking driver (bnxt_en) 199 * to know that the RoCE driver is now installed 200 */ 201 static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev, bool lock_wait) 202 { 203 struct bnxt_en_dev *en_dev; 204 int rc; 205 206 if (!rdev) 207 return -EINVAL; 208 209 en_dev = rdev->en_dev; 210 /* Acquire rtnl lock if it is not invokded from netdev event */ 211 if (lock_wait) 212 rtnl_lock(); 213 214 rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev, 215 BNXT_ROCE_ULP); 216 if (lock_wait) 217 rtnl_unlock(); 218 return rc; 219 } 220 221 static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev) 222 { 223 struct bnxt_en_dev *en_dev; 224 int rc = 0; 225 226 if (!rdev) 227 return -EINVAL; 228 229 en_dev = rdev->en_dev; 230 231 rtnl_lock(); 232 rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP, 233 &bnxt_re_ulp_ops, rdev); 234 rtnl_unlock(); 235 return rc; 236 } 237 238 static int bnxt_re_free_msix(struct bnxt_re_dev *rdev, bool lock_wait) 239 { 240 struct bnxt_en_dev *en_dev; 241 int rc; 242 243 if (!rdev) 244 return -EINVAL; 245 246 en_dev = rdev->en_dev; 247 248 if (lock_wait) 249 rtnl_lock(); 250 251 rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP); 252 253 if (lock_wait) 254 rtnl_unlock(); 255 return rc; 256 } 257 258 static int bnxt_re_request_msix(struct bnxt_re_dev *rdev) 259 { 260 int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got; 261 struct bnxt_en_dev *en_dev; 262 263 if (!rdev) 264 return -EINVAL; 265 266 en_dev = rdev->en_dev; 267 268 num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus()); 269 270 rtnl_lock(); 271 num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP, 272 rdev->msix_entries, 273 num_msix_want); 274 if (num_msix_got < BNXT_RE_MIN_MSIX) { 275 rc = -EINVAL; 276 goto done; 277 } 278 if (num_msix_got != num_msix_want) { 279 dev_warn(rdev_to_dev(rdev), 280 "Requested %d MSI-X vectors, got %d\n", 281 num_msix_want, num_msix_got); 282 } 283 rdev->num_msix = num_msix_got; 284 done: 285 rtnl_unlock(); 286 return rc; 287 } 288 289 static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr, 290 u16 opcd, u16 crid, u16 trid) 291 { 292 hdr->req_type = cpu_to_le16(opcd); 293 hdr->cmpl_ring = cpu_to_le16(crid); 294 hdr->target_id = cpu_to_le16(trid); 295 } 296 297 static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg, 298 int msg_len, void *resp, int resp_max_len, 299 int timeout) 300 { 301 fw_msg->msg = msg; 302 fw_msg->msg_len = msg_len; 303 fw_msg->resp = resp; 304 fw_msg->resp_max_len = resp_max_len; 305 fw_msg->timeout = timeout; 306 } 307 308 static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, u16 fw_ring_id, 309 bool lock_wait) 310 { 311 struct bnxt_en_dev *en_dev = rdev->en_dev; 312 struct hwrm_ring_free_input req = {0}; 313 struct hwrm_ring_free_output resp; 314 struct bnxt_fw_msg fw_msg; 315 bool do_unlock = false; 316 int rc = -EINVAL; 317 318 if (!en_dev) 319 return rc; 320 321 memset(&fw_msg, 0, sizeof(fw_msg)); 322 if (lock_wait) { 323 rtnl_lock(); 324 do_unlock = true; 325 } 326 327 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1); 328 req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL; 329 req.ring_id = cpu_to_le16(fw_ring_id); 330 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 331 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 332 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 333 if (rc) 334 dev_err(rdev_to_dev(rdev), 335 "Failed to free HW ring:%d :%#x", req.ring_id, rc); 336 if (do_unlock) 337 rtnl_unlock(); 338 return rc; 339 } 340 341 static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, dma_addr_t *dma_arr, 342 int pages, int type, u32 ring_mask, 343 u32 map_index, u16 *fw_ring_id) 344 { 345 struct bnxt_en_dev *en_dev = rdev->en_dev; 346 struct hwrm_ring_alloc_input req = {0}; 347 struct hwrm_ring_alloc_output resp; 348 struct bnxt_fw_msg fw_msg; 349 int rc = -EINVAL; 350 351 if (!en_dev) 352 return rc; 353 354 memset(&fw_msg, 0, sizeof(fw_msg)); 355 rtnl_lock(); 356 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1); 357 req.enables = 0; 358 req.page_tbl_addr = cpu_to_le64(dma_arr[0]); 359 if (pages > 1) { 360 /* Page size is in log2 units */ 361 req.page_size = BNXT_PAGE_SHIFT; 362 req.page_tbl_depth = 1; 363 } 364 req.fbo = 0; 365 /* Association of ring index with doorbell index and MSIX number */ 366 req.logical_id = cpu_to_le16(map_index); 367 req.length = cpu_to_le32(ring_mask + 1); 368 req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL; 369 req.int_mode = RING_ALLOC_REQ_INT_MODE_MSIX; 370 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 371 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 372 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 373 if (!rc) 374 *fw_ring_id = le16_to_cpu(resp.ring_id); 375 376 rtnl_unlock(); 377 return rc; 378 } 379 380 static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev, 381 u32 fw_stats_ctx_id, bool lock_wait) 382 { 383 struct bnxt_en_dev *en_dev = rdev->en_dev; 384 struct hwrm_stat_ctx_free_input req = {0}; 385 struct bnxt_fw_msg fw_msg; 386 bool do_unlock = false; 387 int rc = -EINVAL; 388 389 if (!en_dev) 390 return rc; 391 392 memset(&fw_msg, 0, sizeof(fw_msg)); 393 if (lock_wait) { 394 rtnl_lock(); 395 do_unlock = true; 396 } 397 398 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1); 399 req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id); 400 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req, 401 sizeof(req), DFLT_HWRM_CMD_TIMEOUT); 402 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 403 if (rc) 404 dev_err(rdev_to_dev(rdev), 405 "Failed to free HW stats context %#x", rc); 406 407 if (do_unlock) 408 rtnl_unlock(); 409 return rc; 410 } 411 412 static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev, 413 dma_addr_t dma_map, 414 u32 *fw_stats_ctx_id) 415 { 416 struct hwrm_stat_ctx_alloc_output resp = {0}; 417 struct hwrm_stat_ctx_alloc_input req = {0}; 418 struct bnxt_en_dev *en_dev = rdev->en_dev; 419 struct bnxt_fw_msg fw_msg; 420 int rc = -EINVAL; 421 422 *fw_stats_ctx_id = INVALID_STATS_CTX_ID; 423 424 if (!en_dev) 425 return rc; 426 427 memset(&fw_msg, 0, sizeof(fw_msg)); 428 rtnl_lock(); 429 430 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1); 431 req.update_period_ms = cpu_to_le32(1000); 432 req.stats_dma_addr = cpu_to_le64(dma_map); 433 req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE; 434 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 435 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 436 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 437 if (!rc) 438 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id); 439 440 rtnl_unlock(); 441 return rc; 442 } 443 444 /* Device */ 445 446 static bool is_bnxt_re_dev(struct net_device *netdev) 447 { 448 struct ethtool_drvinfo drvinfo; 449 450 if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) { 451 memset(&drvinfo, 0, sizeof(drvinfo)); 452 netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo); 453 454 if (strcmp(drvinfo.driver, "bnxt_en")) 455 return false; 456 return true; 457 } 458 return false; 459 } 460 461 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev) 462 { 463 struct bnxt_re_dev *rdev; 464 465 rcu_read_lock(); 466 list_for_each_entry_rcu(rdev, &bnxt_re_dev_list, list) { 467 if (rdev->netdev == netdev) { 468 rcu_read_unlock(); 469 return rdev; 470 } 471 } 472 rcu_read_unlock(); 473 return NULL; 474 } 475 476 static void bnxt_re_dev_unprobe(struct net_device *netdev, 477 struct bnxt_en_dev *en_dev) 478 { 479 dev_put(netdev); 480 module_put(en_dev->pdev->driver->driver.owner); 481 } 482 483 static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev) 484 { 485 struct bnxt *bp = netdev_priv(netdev); 486 struct bnxt_en_dev *en_dev; 487 struct pci_dev *pdev; 488 489 /* Call bnxt_en's RoCE probe via indirect API */ 490 if (!bp->ulp_probe) 491 return ERR_PTR(-EINVAL); 492 493 en_dev = bp->ulp_probe(netdev); 494 if (IS_ERR(en_dev)) 495 return en_dev; 496 497 pdev = en_dev->pdev; 498 if (!pdev) 499 return ERR_PTR(-EINVAL); 500 501 if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) { 502 dev_info(&pdev->dev, 503 "%s: probe error: RoCE is not supported on this device", 504 ROCE_DRV_MODULE_NAME); 505 return ERR_PTR(-ENODEV); 506 } 507 508 /* Bump net device reference count */ 509 if (!try_module_get(pdev->driver->driver.owner)) 510 return ERR_PTR(-ENODEV); 511 512 dev_hold(netdev); 513 514 return en_dev; 515 } 516 517 static void bnxt_re_unregister_ib(struct bnxt_re_dev *rdev) 518 { 519 ib_unregister_device(&rdev->ibdev); 520 } 521 522 static int bnxt_re_register_ib(struct bnxt_re_dev *rdev) 523 { 524 struct ib_device *ibdev = &rdev->ibdev; 525 526 /* ib device init */ 527 ibdev->owner = THIS_MODULE; 528 ibdev->node_type = RDMA_NODE_IB_CA; 529 strlcpy(ibdev->name, "bnxt_re%d", IB_DEVICE_NAME_MAX); 530 strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA", 531 strlen(BNXT_RE_DESC) + 5); 532 ibdev->phys_port_cnt = 1; 533 534 bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid); 535 536 ibdev->num_comp_vectors = 1; 537 ibdev->dev.parent = &rdev->en_dev->pdev->dev; 538 ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY; 539 540 /* User space */ 541 ibdev->uverbs_abi_ver = BNXT_RE_ABI_VERSION; 542 ibdev->uverbs_cmd_mask = 543 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 544 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 545 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 546 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 547 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 548 (1ull << IB_USER_VERBS_CMD_REG_MR) | 549 (1ull << IB_USER_VERBS_CMD_REREG_MR) | 550 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 551 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 552 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 553 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 554 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 555 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 556 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 557 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 558 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 559 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 560 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 561 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 562 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 563 (1ull << IB_USER_VERBS_CMD_CREATE_AH) | 564 (1ull << IB_USER_VERBS_CMD_MODIFY_AH) | 565 (1ull << IB_USER_VERBS_CMD_QUERY_AH) | 566 (1ull << IB_USER_VERBS_CMD_DESTROY_AH); 567 /* POLL_CQ and REQ_NOTIFY_CQ is directly handled in libbnxt_re */ 568 569 /* Kernel verbs */ 570 ibdev->query_device = bnxt_re_query_device; 571 ibdev->modify_device = bnxt_re_modify_device; 572 573 ibdev->query_port = bnxt_re_query_port; 574 ibdev->get_port_immutable = bnxt_re_get_port_immutable; 575 ibdev->get_dev_fw_str = bnxt_re_query_fw_str; 576 ibdev->query_pkey = bnxt_re_query_pkey; 577 ibdev->query_gid = bnxt_re_query_gid; 578 ibdev->get_netdev = bnxt_re_get_netdev; 579 ibdev->add_gid = bnxt_re_add_gid; 580 ibdev->del_gid = bnxt_re_del_gid; 581 ibdev->get_link_layer = bnxt_re_get_link_layer; 582 583 ibdev->alloc_pd = bnxt_re_alloc_pd; 584 ibdev->dealloc_pd = bnxt_re_dealloc_pd; 585 586 ibdev->create_ah = bnxt_re_create_ah; 587 ibdev->modify_ah = bnxt_re_modify_ah; 588 ibdev->query_ah = bnxt_re_query_ah; 589 ibdev->destroy_ah = bnxt_re_destroy_ah; 590 591 ibdev->create_srq = bnxt_re_create_srq; 592 ibdev->modify_srq = bnxt_re_modify_srq; 593 ibdev->query_srq = bnxt_re_query_srq; 594 ibdev->destroy_srq = bnxt_re_destroy_srq; 595 ibdev->post_srq_recv = bnxt_re_post_srq_recv; 596 597 ibdev->create_qp = bnxt_re_create_qp; 598 ibdev->modify_qp = bnxt_re_modify_qp; 599 ibdev->query_qp = bnxt_re_query_qp; 600 ibdev->destroy_qp = bnxt_re_destroy_qp; 601 602 ibdev->post_send = bnxt_re_post_send; 603 ibdev->post_recv = bnxt_re_post_recv; 604 605 ibdev->create_cq = bnxt_re_create_cq; 606 ibdev->destroy_cq = bnxt_re_destroy_cq; 607 ibdev->poll_cq = bnxt_re_poll_cq; 608 ibdev->req_notify_cq = bnxt_re_req_notify_cq; 609 610 ibdev->get_dma_mr = bnxt_re_get_dma_mr; 611 ibdev->dereg_mr = bnxt_re_dereg_mr; 612 ibdev->alloc_mr = bnxt_re_alloc_mr; 613 ibdev->map_mr_sg = bnxt_re_map_mr_sg; 614 615 ibdev->reg_user_mr = bnxt_re_reg_user_mr; 616 ibdev->alloc_ucontext = bnxt_re_alloc_ucontext; 617 ibdev->dealloc_ucontext = bnxt_re_dealloc_ucontext; 618 ibdev->mmap = bnxt_re_mmap; 619 ibdev->get_hw_stats = bnxt_re_ib_get_hw_stats; 620 ibdev->alloc_hw_stats = bnxt_re_ib_alloc_hw_stats; 621 622 return ib_register_device(ibdev, NULL); 623 } 624 625 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 626 char *buf) 627 { 628 struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev); 629 630 return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor); 631 } 632 633 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 634 char *buf) 635 { 636 struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev); 637 638 return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc); 639 } 640 641 static DEVICE_ATTR(hw_rev, 0444, show_rev, NULL); 642 static DEVICE_ATTR(hca_type, 0444, show_hca, NULL); 643 644 static struct device_attribute *bnxt_re_attributes[] = { 645 &dev_attr_hw_rev, 646 &dev_attr_hca_type 647 }; 648 649 static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev) 650 { 651 dev_put(rdev->netdev); 652 rdev->netdev = NULL; 653 654 mutex_lock(&bnxt_re_dev_lock); 655 list_del_rcu(&rdev->list); 656 mutex_unlock(&bnxt_re_dev_lock); 657 658 synchronize_rcu(); 659 660 ib_dealloc_device(&rdev->ibdev); 661 /* rdev is gone */ 662 } 663 664 static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev, 665 struct bnxt_en_dev *en_dev) 666 { 667 struct bnxt_re_dev *rdev; 668 669 /* Allocate bnxt_re_dev instance here */ 670 rdev = (struct bnxt_re_dev *)ib_alloc_device(sizeof(*rdev)); 671 if (!rdev) { 672 dev_err(NULL, "%s: bnxt_re_dev allocation failure!", 673 ROCE_DRV_MODULE_NAME); 674 return NULL; 675 } 676 /* Default values */ 677 rdev->netdev = netdev; 678 dev_hold(rdev->netdev); 679 rdev->en_dev = en_dev; 680 rdev->id = rdev->en_dev->pdev->devfn; 681 INIT_LIST_HEAD(&rdev->qp_list); 682 mutex_init(&rdev->qp_lock); 683 atomic_set(&rdev->qp_count, 0); 684 atomic_set(&rdev->cq_count, 0); 685 atomic_set(&rdev->srq_count, 0); 686 atomic_set(&rdev->mr_count, 0); 687 atomic_set(&rdev->mw_count, 0); 688 rdev->cosq[0] = 0xFFFF; 689 rdev->cosq[1] = 0xFFFF; 690 691 mutex_lock(&bnxt_re_dev_lock); 692 list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list); 693 mutex_unlock(&bnxt_re_dev_lock); 694 return rdev; 695 } 696 697 static int bnxt_re_handle_unaffi_async_event(struct creq_func_event 698 *unaffi_async) 699 { 700 switch (unaffi_async->event) { 701 case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR: 702 break; 703 case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR: 704 break; 705 case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR: 706 break; 707 case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR: 708 break; 709 case CREQ_FUNC_EVENT_EVENT_CQ_ERROR: 710 break; 711 case CREQ_FUNC_EVENT_EVENT_TQM_ERROR: 712 break; 713 case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR: 714 break; 715 case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR: 716 break; 717 case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR: 718 break; 719 case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR: 720 break; 721 case CREQ_FUNC_EVENT_EVENT_TIM_ERROR: 722 break; 723 default: 724 return -EINVAL; 725 } 726 return 0; 727 } 728 729 static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event, 730 struct bnxt_re_qp *qp) 731 { 732 struct ib_event event; 733 734 memset(&event, 0, sizeof(event)); 735 if (qp->qplib_qp.srq) { 736 event.device = &qp->rdev->ibdev; 737 event.element.qp = &qp->ib_qp; 738 event.event = IB_EVENT_QP_LAST_WQE_REACHED; 739 } 740 741 if (event.device && qp->ib_qp.event_handler) 742 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context); 743 744 return 0; 745 } 746 747 static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async, 748 void *obj) 749 { 750 int rc = 0; 751 u8 event; 752 753 if (!obj) 754 return rc; /* QP was already dead, still return success */ 755 756 event = affi_async->event; 757 if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) { 758 struct bnxt_qplib_qp *lib_qp = obj; 759 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp, 760 qplib_qp); 761 rc = bnxt_re_handle_qp_async_event(affi_async, qp); 762 } 763 return rc; 764 } 765 766 static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw, 767 void *aeqe, void *obj) 768 { 769 struct creq_qp_event *affi_async; 770 struct creq_func_event *unaffi_async; 771 u8 type; 772 int rc; 773 774 type = ((struct creq_base *)aeqe)->type; 775 if (type == CREQ_BASE_TYPE_FUNC_EVENT) { 776 unaffi_async = aeqe; 777 rc = bnxt_re_handle_unaffi_async_event(unaffi_async); 778 } else { 779 affi_async = aeqe; 780 rc = bnxt_re_handle_affi_async_event(affi_async, obj); 781 } 782 783 return rc; 784 } 785 786 static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq, 787 struct bnxt_qplib_srq *handle, u8 event) 788 { 789 struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq, 790 qplib_srq); 791 struct ib_event ib_event; 792 int rc = 0; 793 794 if (!srq) { 795 dev_err(NULL, "%s: SRQ is NULL, SRQN not handled", 796 ROCE_DRV_MODULE_NAME); 797 rc = -EINVAL; 798 goto done; 799 } 800 ib_event.device = &srq->rdev->ibdev; 801 ib_event.element.srq = &srq->ib_srq; 802 if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT) 803 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED; 804 else 805 ib_event.event = IB_EVENT_SRQ_ERR; 806 807 if (srq->ib_srq.event_handler) { 808 /* Lock event_handler? */ 809 (*srq->ib_srq.event_handler)(&ib_event, 810 srq->ib_srq.srq_context); 811 } 812 done: 813 return rc; 814 } 815 816 static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq, 817 struct bnxt_qplib_cq *handle) 818 { 819 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq, 820 qplib_cq); 821 822 if (!cq) { 823 dev_err(NULL, "%s: CQ is NULL, CQN not handled", 824 ROCE_DRV_MODULE_NAME); 825 return -EINVAL; 826 } 827 if (cq->ib_cq.comp_handler) { 828 /* Lock comp_handler? */ 829 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context); 830 } 831 832 return 0; 833 } 834 835 static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev) 836 { 837 int i; 838 839 if (rdev->nq[0].hwq.max_elements) { 840 for (i = 1; i < rdev->num_msix; i++) 841 bnxt_qplib_disable_nq(&rdev->nq[i - 1]); 842 } 843 844 if (rdev->qplib_res.rcfw) 845 bnxt_qplib_cleanup_res(&rdev->qplib_res); 846 } 847 848 static int bnxt_re_init_res(struct bnxt_re_dev *rdev) 849 { 850 int rc = 0, i; 851 852 bnxt_qplib_init_res(&rdev->qplib_res); 853 854 for (i = 1; i < rdev->num_msix ; i++) { 855 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1], 856 i - 1, rdev->msix_entries[i].vector, 857 rdev->msix_entries[i].db_offset, 858 &bnxt_re_cqn_handler, 859 &bnxt_re_srqn_handler); 860 861 if (rc) { 862 dev_err(rdev_to_dev(rdev), 863 "Failed to enable NQ with rc = 0x%x", rc); 864 goto fail; 865 } 866 } 867 return 0; 868 fail: 869 return rc; 870 } 871 872 static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev, bool lock_wait) 873 { 874 int i; 875 876 for (i = 0; i < rdev->num_msix - 1; i++) { 877 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, lock_wait); 878 bnxt_qplib_free_nq(&rdev->nq[i]); 879 } 880 } 881 882 static void bnxt_re_free_res(struct bnxt_re_dev *rdev, bool lock_wait) 883 { 884 bnxt_re_free_nq_res(rdev, lock_wait); 885 886 if (rdev->qplib_res.dpi_tbl.max) { 887 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 888 &rdev->qplib_res.dpi_tbl, 889 &rdev->dpi_privileged); 890 } 891 if (rdev->qplib_res.rcfw) { 892 bnxt_qplib_free_res(&rdev->qplib_res); 893 rdev->qplib_res.rcfw = NULL; 894 } 895 } 896 897 static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev) 898 { 899 int rc = 0, i; 900 901 /* Configure and allocate resources for qplib */ 902 rdev->qplib_res.rcfw = &rdev->rcfw; 903 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 904 rdev->is_virtfn); 905 if (rc) 906 goto fail; 907 908 rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev, 909 rdev->netdev, &rdev->dev_attr); 910 if (rc) 911 goto fail; 912 913 rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl, 914 &rdev->dpi_privileged, 915 rdev); 916 if (rc) 917 goto dealloc_res; 918 919 for (i = 0; i < rdev->num_msix - 1; i++) { 920 rdev->nq[i].hwq.max_elements = BNXT_RE_MAX_CQ_COUNT + 921 BNXT_RE_MAX_SRQC_COUNT + 2; 922 rc = bnxt_qplib_alloc_nq(rdev->en_dev->pdev, &rdev->nq[i]); 923 if (rc) { 924 dev_err(rdev_to_dev(rdev), "Alloc Failed NQ%d rc:%#x", 925 i, rc); 926 goto dealloc_dpi; 927 } 928 rc = bnxt_re_net_ring_alloc 929 (rdev, rdev->nq[i].hwq.pbl[PBL_LVL_0].pg_map_arr, 930 rdev->nq[i].hwq.pbl[rdev->nq[i].hwq.level].pg_count, 931 HWRM_RING_ALLOC_CMPL, 932 BNXT_QPLIB_NQE_MAX_CNT - 1, 933 rdev->msix_entries[i + 1].ring_idx, 934 &rdev->nq[i].ring_id); 935 if (rc) { 936 dev_err(rdev_to_dev(rdev), 937 "Failed to allocate NQ fw id with rc = 0x%x", 938 rc); 939 goto free_nq; 940 } 941 } 942 return 0; 943 free_nq: 944 for (i = 0; i < rdev->num_msix - 1; i++) 945 bnxt_qplib_free_nq(&rdev->nq[i]); 946 dealloc_dpi: 947 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 948 &rdev->qplib_res.dpi_tbl, 949 &rdev->dpi_privileged); 950 dealloc_res: 951 bnxt_qplib_free_res(&rdev->qplib_res); 952 953 fail: 954 rdev->qplib_res.rcfw = NULL; 955 return rc; 956 } 957 958 static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp, 959 u8 port_num, enum ib_event_type event) 960 { 961 struct ib_event ib_event; 962 963 ib_event.device = ibdev; 964 if (qp) 965 ib_event.element.qp = qp; 966 else 967 ib_event.element.port_num = port_num; 968 ib_event.event = event; 969 ib_dispatch_event(&ib_event); 970 } 971 972 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02 973 static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir, 974 u64 *cid_map) 975 { 976 struct hwrm_queue_pri2cos_qcfg_input req = {0}; 977 struct bnxt *bp = netdev_priv(rdev->netdev); 978 struct hwrm_queue_pri2cos_qcfg_output resp; 979 struct bnxt_en_dev *en_dev = rdev->en_dev; 980 struct bnxt_fw_msg fw_msg; 981 u32 flags = 0; 982 u8 *qcfgmap, *tmp_map; 983 int rc = 0, i; 984 985 if (!cid_map) 986 return -EINVAL; 987 988 memset(&fw_msg, 0, sizeof(fw_msg)); 989 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, 990 HWRM_QUEUE_PRI2COS_QCFG, -1, -1); 991 flags |= (dir & 0x01); 992 flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN; 993 req.flags = cpu_to_le32(flags); 994 req.port_id = bp->pf.port_id; 995 996 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 997 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 998 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 999 if (rc) 1000 return rc; 1001 1002 if (resp.queue_cfg_info) { 1003 dev_warn(rdev_to_dev(rdev), 1004 "Asymmetric cos queue configuration detected"); 1005 dev_warn(rdev_to_dev(rdev), 1006 " on device, QoS may not be fully functional\n"); 1007 } 1008 qcfgmap = &resp.pri0_cos_queue_id; 1009 tmp_map = (u8 *)cid_map; 1010 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) 1011 tmp_map[i] = qcfgmap[i]; 1012 1013 return rc; 1014 } 1015 1016 static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev, 1017 struct bnxt_re_qp *qp) 1018 { 1019 return (qp->ib_qp.qp_type == IB_QPT_GSI) || (qp == rdev->qp1_sqp); 1020 } 1021 1022 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev) 1023 { 1024 int mask = IB_QP_STATE; 1025 struct ib_qp_attr qp_attr; 1026 struct bnxt_re_qp *qp; 1027 1028 qp_attr.qp_state = IB_QPS_ERR; 1029 mutex_lock(&rdev->qp_lock); 1030 list_for_each_entry(qp, &rdev->qp_list, list) { 1031 /* Modify the state of all QPs except QP1/Shadow QP */ 1032 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) { 1033 if (qp->qplib_qp.state != 1034 CMDQ_MODIFY_QP_NEW_STATE_RESET && 1035 qp->qplib_qp.state != 1036 CMDQ_MODIFY_QP_NEW_STATE_ERR) { 1037 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp, 1038 1, IB_EVENT_QP_FATAL); 1039 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask, 1040 NULL); 1041 } 1042 } 1043 } 1044 mutex_unlock(&rdev->qp_lock); 1045 } 1046 1047 static int bnxt_re_update_gid(struct bnxt_re_dev *rdev) 1048 { 1049 struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl; 1050 struct bnxt_qplib_gid gid; 1051 u16 gid_idx, index; 1052 int rc = 0; 1053 1054 if (!test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) 1055 return 0; 1056 1057 if (!sgid_tbl) { 1058 dev_err(rdev_to_dev(rdev), "QPLIB: SGID table not allocated"); 1059 return -EINVAL; 1060 } 1061 1062 for (index = 0; index < sgid_tbl->active; index++) { 1063 gid_idx = sgid_tbl->hw_id[index]; 1064 1065 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero, 1066 sizeof(bnxt_qplib_gid_zero))) 1067 continue; 1068 /* need to modify the VLAN enable setting of non VLAN GID only 1069 * as setting is done for VLAN GID while adding GID 1070 */ 1071 if (sgid_tbl->vlan[index]) 1072 continue; 1073 1074 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid)); 1075 1076 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx, 1077 rdev->qplib_res.netdev->dev_addr); 1078 } 1079 1080 return rc; 1081 } 1082 1083 static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev) 1084 { 1085 u32 prio_map = 0, tmp_map = 0; 1086 struct net_device *netdev; 1087 struct dcb_app app; 1088 1089 netdev = rdev->netdev; 1090 1091 memset(&app, 0, sizeof(app)); 1092 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE; 1093 app.protocol = ETH_P_IBOE; 1094 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1095 prio_map = tmp_map; 1096 1097 app.selector = IEEE_8021QAZ_APP_SEL_DGRAM; 1098 app.protocol = ROCE_V2_UDP_DPORT; 1099 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1100 prio_map |= tmp_map; 1101 1102 return prio_map; 1103 } 1104 1105 static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq) 1106 { 1107 u16 prio; 1108 u8 id; 1109 1110 for (prio = 0, id = 0; prio < 8; prio++) { 1111 if (prio_map & (1 << prio)) { 1112 cosq[id] = cid_map[prio]; 1113 id++; 1114 if (id == 2) /* Max 2 tcs supported */ 1115 break; 1116 } 1117 } 1118 } 1119 1120 static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev) 1121 { 1122 u8 prio_map = 0; 1123 u64 cid_map; 1124 int rc; 1125 1126 /* Get priority for roce */ 1127 prio_map = bnxt_re_get_priority_mask(rdev); 1128 1129 if (prio_map == rdev->cur_prio_map) 1130 return 0; 1131 rdev->cur_prio_map = prio_map; 1132 /* Get cosq id for this priority */ 1133 rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map); 1134 if (rc) { 1135 dev_warn(rdev_to_dev(rdev), "no cos for p_mask %x\n", prio_map); 1136 return rc; 1137 } 1138 /* Parse CoS IDs for app priority */ 1139 bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq); 1140 1141 /* Config BONO. */ 1142 rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq); 1143 if (rc) { 1144 dev_warn(rdev_to_dev(rdev), "no tc for cos{%x, %x}\n", 1145 rdev->cosq[0], rdev->cosq[1]); 1146 return rc; 1147 } 1148 1149 /* Actual priorities are not programmed as they are already 1150 * done by L2 driver; just enable or disable priority vlan tagging 1151 */ 1152 if ((prio_map == 0 && rdev->qplib_res.prio) || 1153 (prio_map != 0 && !rdev->qplib_res.prio)) { 1154 rdev->qplib_res.prio = prio_map ? true : false; 1155 1156 bnxt_re_update_gid(rdev); 1157 } 1158 1159 return 0; 1160 } 1161 1162 static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev, bool lock_wait) 1163 { 1164 int i, rc; 1165 1166 if (test_and_clear_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) { 1167 for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++) 1168 device_remove_file(&rdev->ibdev.dev, 1169 bnxt_re_attributes[i]); 1170 /* Cleanup ib dev */ 1171 bnxt_re_unregister_ib(rdev); 1172 } 1173 if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags)) 1174 cancel_delayed_work(&rdev->worker); 1175 1176 bnxt_re_cleanup_res(rdev); 1177 bnxt_re_free_res(rdev, lock_wait); 1178 1179 if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) { 1180 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw); 1181 if (rc) 1182 dev_warn(rdev_to_dev(rdev), 1183 "Failed to deinitialize RCFW: %#x", rc); 1184 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id, 1185 lock_wait); 1186 bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx); 1187 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1188 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, lock_wait); 1189 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1190 } 1191 if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) { 1192 rc = bnxt_re_free_msix(rdev, lock_wait); 1193 if (rc) 1194 dev_warn(rdev_to_dev(rdev), 1195 "Failed to free MSI-X vectors: %#x", rc); 1196 } 1197 if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) { 1198 rc = bnxt_re_unregister_netdev(rdev, lock_wait); 1199 if (rc) 1200 dev_warn(rdev_to_dev(rdev), 1201 "Failed to unregister with netdev: %#x", rc); 1202 } 1203 } 1204 1205 /* worker thread for polling periodic events. Now used for QoS programming*/ 1206 static void bnxt_re_worker(struct work_struct *work) 1207 { 1208 struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev, 1209 worker.work); 1210 1211 bnxt_re_setup_qos(rdev); 1212 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1213 } 1214 1215 static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev) 1216 { 1217 int i, j, rc; 1218 1219 /* Registered a new RoCE device instance to netdev */ 1220 rc = bnxt_re_register_netdev(rdev); 1221 if (rc) { 1222 pr_err("Failed to register with netedev: %#x\n", rc); 1223 return -EINVAL; 1224 } 1225 set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags); 1226 1227 /* Check whether VF or PF */ 1228 bnxt_re_get_sriov_func_type(rdev); 1229 1230 rc = bnxt_re_request_msix(rdev); 1231 if (rc) { 1232 pr_err("Failed to get MSI-X vectors: %#x\n", rc); 1233 rc = -EINVAL; 1234 goto fail; 1235 } 1236 set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags); 1237 1238 /* Establish RCFW Communication Channel to initialize the context 1239 * memory for the function and all child VFs 1240 */ 1241 rc = bnxt_qplib_alloc_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw, 1242 BNXT_RE_MAX_QPC_COUNT); 1243 if (rc) { 1244 pr_err("Failed to allocate RCFW Channel: %#x\n", rc); 1245 goto fail; 1246 } 1247 rc = bnxt_re_net_ring_alloc 1248 (rdev, rdev->rcfw.creq.pbl[PBL_LVL_0].pg_map_arr, 1249 rdev->rcfw.creq.pbl[rdev->rcfw.creq.level].pg_count, 1250 HWRM_RING_ALLOC_CMPL, BNXT_QPLIB_CREQE_MAX_CNT - 1, 1251 rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx, 1252 &rdev->rcfw.creq_ring_id); 1253 if (rc) { 1254 pr_err("Failed to allocate CREQ: %#x\n", rc); 1255 goto free_rcfw; 1256 } 1257 rc = bnxt_qplib_enable_rcfw_channel 1258 (rdev->en_dev->pdev, &rdev->rcfw, 1259 rdev->msix_entries[BNXT_RE_AEQ_IDX].vector, 1260 rdev->msix_entries[BNXT_RE_AEQ_IDX].db_offset, 1261 rdev->is_virtfn, &bnxt_re_aeq_handler); 1262 if (rc) { 1263 pr_err("Failed to enable RCFW channel: %#x\n", rc); 1264 goto free_ring; 1265 } 1266 1267 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 1268 rdev->is_virtfn); 1269 if (rc) 1270 goto disable_rcfw; 1271 if (!rdev->is_virtfn) 1272 bnxt_re_set_resource_limits(rdev); 1273 1274 rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0); 1275 if (rc) { 1276 pr_err("Failed to allocate QPLIB context: %#x\n", rc); 1277 goto disable_rcfw; 1278 } 1279 rc = bnxt_re_net_stats_ctx_alloc(rdev, 1280 rdev->qplib_ctx.stats.dma_map, 1281 &rdev->qplib_ctx.stats.fw_id); 1282 if (rc) { 1283 pr_err("Failed to allocate stats context: %#x\n", rc); 1284 goto free_ctx; 1285 } 1286 1287 rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx, 1288 rdev->is_virtfn); 1289 if (rc) { 1290 pr_err("Failed to initialize RCFW: %#x\n", rc); 1291 goto free_sctx; 1292 } 1293 set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags); 1294 1295 /* Resources based on the 'new' device caps */ 1296 rc = bnxt_re_alloc_res(rdev); 1297 if (rc) { 1298 pr_err("Failed to allocate resources: %#x\n", rc); 1299 goto fail; 1300 } 1301 rc = bnxt_re_init_res(rdev); 1302 if (rc) { 1303 pr_err("Failed to initialize resources: %#x\n", rc); 1304 goto fail; 1305 } 1306 1307 if (!rdev->is_virtfn) { 1308 rc = bnxt_re_setup_qos(rdev); 1309 if (rc) 1310 pr_info("RoCE priority not yet configured\n"); 1311 1312 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker); 1313 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags); 1314 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1315 } 1316 1317 /* Register ib dev */ 1318 rc = bnxt_re_register_ib(rdev); 1319 if (rc) { 1320 pr_err("Failed to register with IB: %#x\n", rc); 1321 goto fail; 1322 } 1323 dev_info(rdev_to_dev(rdev), "Device registered successfully"); 1324 for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++) { 1325 rc = device_create_file(&rdev->ibdev.dev, 1326 bnxt_re_attributes[i]); 1327 if (rc) { 1328 dev_err(rdev_to_dev(rdev), 1329 "Failed to create IB sysfs: %#x", rc); 1330 /* Must clean up all created device files */ 1331 for (j = 0; j < i; j++) 1332 device_remove_file(&rdev->ibdev.dev, 1333 bnxt_re_attributes[j]); 1334 bnxt_re_unregister_ib(rdev); 1335 goto fail; 1336 } 1337 } 1338 set_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags); 1339 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1340 &rdev->active_width); 1341 set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags); 1342 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_PORT_ACTIVE); 1343 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_GID_CHANGE); 1344 1345 return 0; 1346 free_sctx: 1347 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id, true); 1348 free_ctx: 1349 bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx); 1350 disable_rcfw: 1351 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1352 free_ring: 1353 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id, true); 1354 free_rcfw: 1355 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1356 fail: 1357 bnxt_re_ib_unreg(rdev, true); 1358 return rc; 1359 } 1360 1361 static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev) 1362 { 1363 struct bnxt_en_dev *en_dev = rdev->en_dev; 1364 struct net_device *netdev = rdev->netdev; 1365 1366 bnxt_re_dev_remove(rdev); 1367 1368 if (netdev) 1369 bnxt_re_dev_unprobe(netdev, en_dev); 1370 } 1371 1372 static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev) 1373 { 1374 struct bnxt_en_dev *en_dev; 1375 int rc = 0; 1376 1377 if (!is_bnxt_re_dev(netdev)) 1378 return -ENODEV; 1379 1380 en_dev = bnxt_re_dev_probe(netdev); 1381 if (IS_ERR(en_dev)) { 1382 if (en_dev != ERR_PTR(-ENODEV)) 1383 pr_err("%s: Failed to probe\n", ROCE_DRV_MODULE_NAME); 1384 rc = PTR_ERR(en_dev); 1385 goto exit; 1386 } 1387 *rdev = bnxt_re_dev_add(netdev, en_dev); 1388 if (!*rdev) { 1389 rc = -ENOMEM; 1390 bnxt_re_dev_unprobe(netdev, en_dev); 1391 goto exit; 1392 } 1393 exit: 1394 return rc; 1395 } 1396 1397 static void bnxt_re_remove_one(struct bnxt_re_dev *rdev) 1398 { 1399 pci_dev_put(rdev->en_dev->pdev); 1400 } 1401 1402 /* Handle all deferred netevents tasks */ 1403 static void bnxt_re_task(struct work_struct *work) 1404 { 1405 struct bnxt_re_work *re_work; 1406 struct bnxt_re_dev *rdev; 1407 int rc = 0; 1408 1409 re_work = container_of(work, struct bnxt_re_work, work); 1410 rdev = re_work->rdev; 1411 1412 if (re_work->event != NETDEV_REGISTER && 1413 !test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) 1414 return; 1415 1416 switch (re_work->event) { 1417 case NETDEV_REGISTER: 1418 rc = bnxt_re_ib_reg(rdev); 1419 if (rc) 1420 dev_err(rdev_to_dev(rdev), 1421 "Failed to register with IB: %#x", rc); 1422 break; 1423 case NETDEV_UP: 1424 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1425 IB_EVENT_PORT_ACTIVE); 1426 break; 1427 case NETDEV_DOWN: 1428 bnxt_re_dev_stop(rdev); 1429 break; 1430 case NETDEV_CHANGE: 1431 if (!netif_carrier_ok(rdev->netdev)) 1432 bnxt_re_dev_stop(rdev); 1433 else if (netif_carrier_ok(rdev->netdev)) 1434 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1435 IB_EVENT_PORT_ACTIVE); 1436 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1437 &rdev->active_width); 1438 break; 1439 default: 1440 break; 1441 } 1442 smp_mb__before_atomic(); 1443 atomic_dec(&rdev->sched_count); 1444 kfree(re_work); 1445 } 1446 1447 static void bnxt_re_init_one(struct bnxt_re_dev *rdev) 1448 { 1449 pci_dev_get(rdev->en_dev->pdev); 1450 } 1451 1452 /* 1453 * "Notifier chain callback can be invoked for the same chain from 1454 * different CPUs at the same time". 1455 * 1456 * For cases when the netdev is already present, our call to the 1457 * register_netdevice_notifier() will actually get the rtnl_lock() 1458 * before sending NETDEV_REGISTER and (if up) NETDEV_UP 1459 * events. 1460 * 1461 * But for cases when the netdev is not already present, the notifier 1462 * chain is subjected to be invoked from different CPUs simultaneously. 1463 * 1464 * This is protected by the netdev_mutex. 1465 */ 1466 static int bnxt_re_netdev_event(struct notifier_block *notifier, 1467 unsigned long event, void *ptr) 1468 { 1469 struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr); 1470 struct bnxt_re_work *re_work; 1471 struct bnxt_re_dev *rdev; 1472 int rc = 0; 1473 bool sch_work = false; 1474 1475 real_dev = rdma_vlan_dev_real_dev(netdev); 1476 if (!real_dev) 1477 real_dev = netdev; 1478 1479 rdev = bnxt_re_from_netdev(real_dev); 1480 if (!rdev && event != NETDEV_REGISTER) 1481 goto exit; 1482 if (real_dev != netdev) 1483 goto exit; 1484 1485 switch (event) { 1486 case NETDEV_REGISTER: 1487 if (rdev) 1488 break; 1489 rc = bnxt_re_dev_reg(&rdev, real_dev); 1490 if (rc == -ENODEV) 1491 break; 1492 if (rc) { 1493 pr_err("Failed to register with the device %s: %#x\n", 1494 real_dev->name, rc); 1495 break; 1496 } 1497 bnxt_re_init_one(rdev); 1498 sch_work = true; 1499 break; 1500 1501 case NETDEV_UNREGISTER: 1502 /* netdev notifier will call NETDEV_UNREGISTER again later since 1503 * we are still holding the reference to the netdev 1504 */ 1505 if (atomic_read(&rdev->sched_count) > 0) 1506 goto exit; 1507 bnxt_re_ib_unreg(rdev, false); 1508 bnxt_re_remove_one(rdev); 1509 bnxt_re_dev_unreg(rdev); 1510 break; 1511 1512 default: 1513 sch_work = true; 1514 break; 1515 } 1516 if (sch_work) { 1517 /* Allocate for the deferred task */ 1518 re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC); 1519 if (re_work) { 1520 re_work->rdev = rdev; 1521 re_work->event = event; 1522 re_work->vlan_dev = (real_dev == netdev ? 1523 NULL : netdev); 1524 INIT_WORK(&re_work->work, bnxt_re_task); 1525 atomic_inc(&rdev->sched_count); 1526 queue_work(bnxt_re_wq, &re_work->work); 1527 } 1528 } 1529 1530 exit: 1531 return NOTIFY_DONE; 1532 } 1533 1534 static struct notifier_block bnxt_re_netdev_notifier = { 1535 .notifier_call = bnxt_re_netdev_event 1536 }; 1537 1538 static int __init bnxt_re_mod_init(void) 1539 { 1540 int rc = 0; 1541 1542 pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version); 1543 1544 bnxt_re_wq = create_singlethread_workqueue("bnxt_re"); 1545 if (!bnxt_re_wq) 1546 return -ENOMEM; 1547 1548 INIT_LIST_HEAD(&bnxt_re_dev_list); 1549 1550 rc = register_netdevice_notifier(&bnxt_re_netdev_notifier); 1551 if (rc) { 1552 pr_err("%s: Cannot register to netdevice_notifier", 1553 ROCE_DRV_MODULE_NAME); 1554 goto err_netdev; 1555 } 1556 return 0; 1557 1558 err_netdev: 1559 destroy_workqueue(bnxt_re_wq); 1560 1561 return rc; 1562 } 1563 1564 static void __exit bnxt_re_mod_exit(void) 1565 { 1566 struct bnxt_re_dev *rdev, *next; 1567 LIST_HEAD(to_be_deleted); 1568 1569 mutex_lock(&bnxt_re_dev_lock); 1570 /* Free all adapter allocated resources */ 1571 if (!list_empty(&bnxt_re_dev_list)) 1572 list_splice_init(&bnxt_re_dev_list, &to_be_deleted); 1573 mutex_unlock(&bnxt_re_dev_lock); 1574 /* 1575 * Cleanup the devices in reverse order so that the VF device 1576 * cleanup is done before PF cleanup 1577 */ 1578 list_for_each_entry_safe_reverse(rdev, next, &to_be_deleted, list) { 1579 dev_info(rdev_to_dev(rdev), "Unregistering Device"); 1580 /* 1581 * Flush out any scheduled tasks before destroying the 1582 * resources 1583 */ 1584 flush_workqueue(bnxt_re_wq); 1585 bnxt_re_dev_stop(rdev); 1586 bnxt_re_ib_unreg(rdev, true); 1587 bnxt_re_remove_one(rdev); 1588 bnxt_re_dev_unreg(rdev); 1589 } 1590 unregister_netdevice_notifier(&bnxt_re_netdev_notifier); 1591 if (bnxt_re_wq) 1592 destroy_workqueue(bnxt_re_wq); 1593 } 1594 1595 module_init(bnxt_re_mod_init); 1596 module_exit(bnxt_re_mod_exit); 1597