1 /* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Main component of the bnxt_re driver 37 */ 38 39 #include <linux/module.h> 40 #include <linux/netdevice.h> 41 #include <linux/ethtool.h> 42 #include <linux/mutex.h> 43 #include <linux/list.h> 44 #include <linux/rculist.h> 45 #include <linux/spinlock.h> 46 #include <linux/pci.h> 47 #include <net/dcbnl.h> 48 #include <net/ipv6.h> 49 #include <net/addrconf.h> 50 #include <linux/if_ether.h> 51 52 #include <rdma/ib_verbs.h> 53 #include <rdma/ib_user_verbs.h> 54 #include <rdma/ib_umem.h> 55 #include <rdma/ib_addr.h> 56 57 #include "bnxt_ulp.h" 58 #include "roce_hsi.h" 59 #include "qplib_res.h" 60 #include "qplib_sp.h" 61 #include "qplib_fp.h" 62 #include "qplib_rcfw.h" 63 #include "bnxt_re.h" 64 #include "ib_verbs.h" 65 #include <rdma/bnxt_re-abi.h> 66 #include "bnxt.h" 67 #include "hw_counters.h" 68 69 static char version[] = 70 BNXT_RE_DESC " v" ROCE_DRV_MODULE_VERSION "\n"; 71 72 MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>"); 73 MODULE_DESCRIPTION(BNXT_RE_DESC " Driver"); 74 MODULE_LICENSE("Dual BSD/GPL"); 75 76 /* globals */ 77 static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list); 78 /* Mutex to protect the list of bnxt_re devices added */ 79 static DEFINE_MUTEX(bnxt_re_dev_lock); 80 static struct workqueue_struct *bnxt_re_wq; 81 static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev); 82 83 /* SR-IOV helper functions */ 84 85 static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev) 86 { 87 struct bnxt *bp; 88 89 bp = netdev_priv(rdev->en_dev->net); 90 if (BNXT_VF(bp)) 91 rdev->is_virtfn = 1; 92 } 93 94 /* Set the maximum number of each resource that the driver actually wants 95 * to allocate. This may be up to the maximum number the firmware has 96 * reserved for the function. The driver may choose to allocate fewer 97 * resources than the firmware maximum. 98 */ 99 static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev) 100 { 101 u32 vf_qps = 0, vf_srqs = 0, vf_cqs = 0, vf_mrws = 0, vf_gids = 0; 102 u32 i; 103 u32 vf_pct; 104 u32 num_vfs; 105 struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr; 106 107 rdev->qplib_ctx.qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT, 108 dev_attr->max_qp); 109 110 rdev->qplib_ctx.mrw_count = BNXT_RE_MAX_MRW_COUNT_256K; 111 /* Use max_mr from fw since max_mrw does not get set */ 112 rdev->qplib_ctx.mrw_count = min_t(u32, rdev->qplib_ctx.mrw_count, 113 dev_attr->max_mr); 114 rdev->qplib_ctx.srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT, 115 dev_attr->max_srq); 116 rdev->qplib_ctx.cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, 117 dev_attr->max_cq); 118 119 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++) 120 rdev->qplib_ctx.tqm_count[i] = 121 rdev->dev_attr.tqm_alloc_reqs[i]; 122 123 if (rdev->num_vfs) { 124 /* 125 * Reserve a set of resources for the PF. Divide the remaining 126 * resources among the VFs 127 */ 128 vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF; 129 num_vfs = 100 * rdev->num_vfs; 130 vf_qps = (rdev->qplib_ctx.qpc_count * vf_pct) / num_vfs; 131 vf_srqs = (rdev->qplib_ctx.srqc_count * vf_pct) / num_vfs; 132 vf_cqs = (rdev->qplib_ctx.cq_count * vf_pct) / num_vfs; 133 /* 134 * The driver allows many more MRs than other resources. If the 135 * firmware does also, then reserve a fixed amount for the PF 136 * and divide the rest among VFs. VFs may use many MRs for NFS 137 * mounts, ISER, NVME applications, etc. If the firmware 138 * severely restricts the number of MRs, then let PF have 139 * half and divide the rest among VFs, as for the other 140 * resource types. 141 */ 142 if (rdev->qplib_ctx.mrw_count < BNXT_RE_MAX_MRW_COUNT_64K) 143 vf_mrws = rdev->qplib_ctx.mrw_count * vf_pct / num_vfs; 144 else 145 vf_mrws = (rdev->qplib_ctx.mrw_count - 146 BNXT_RE_RESVD_MR_FOR_PF) / rdev->num_vfs; 147 vf_gids = BNXT_RE_MAX_GID_PER_VF; 148 } 149 rdev->qplib_ctx.vf_res.max_mrw_per_vf = vf_mrws; 150 rdev->qplib_ctx.vf_res.max_gid_per_vf = vf_gids; 151 rdev->qplib_ctx.vf_res.max_qp_per_vf = vf_qps; 152 rdev->qplib_ctx.vf_res.max_srq_per_vf = vf_srqs; 153 rdev->qplib_ctx.vf_res.max_cq_per_vf = vf_cqs; 154 } 155 156 /* for handling bnxt_en callbacks later */ 157 static void bnxt_re_stop(void *p) 158 { 159 } 160 161 static void bnxt_re_start(void *p) 162 { 163 } 164 165 static void bnxt_re_sriov_config(void *p, int num_vfs) 166 { 167 struct bnxt_re_dev *rdev = p; 168 169 if (!rdev) 170 return; 171 172 rdev->num_vfs = num_vfs; 173 bnxt_re_set_resource_limits(rdev); 174 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw, 175 &rdev->qplib_ctx); 176 } 177 178 static void bnxt_re_shutdown(void *p) 179 { 180 struct bnxt_re_dev *rdev = p; 181 182 if (!rdev) 183 return; 184 185 bnxt_re_ib_unreg(rdev); 186 } 187 188 static void bnxt_re_stop_irq(void *handle) 189 { 190 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; 191 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; 192 struct bnxt_qplib_nq *nq; 193 int indx; 194 195 for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) { 196 nq = &rdev->nq[indx - 1]; 197 bnxt_qplib_nq_stop_irq(nq, false); 198 } 199 200 bnxt_qplib_rcfw_stop_irq(rcfw, false); 201 } 202 203 static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent) 204 { 205 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; 206 struct bnxt_msix_entry *msix_ent = rdev->msix_entries; 207 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; 208 struct bnxt_qplib_nq *nq; 209 int indx, rc; 210 211 if (!ent) { 212 /* Not setting the f/w timeout bit in rcfw. 213 * During the driver unload the first command 214 * to f/w will timeout and that will set the 215 * timeout bit. 216 */ 217 dev_err(rdev_to_dev(rdev), "Failed to re-start IRQs\n"); 218 return; 219 } 220 221 /* Vectors may change after restart, so update with new vectors 222 * in device sctructure. 223 */ 224 for (indx = 0; indx < rdev->num_msix; indx++) 225 rdev->msix_entries[indx].vector = ent[indx].vector; 226 227 bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector, 228 false); 229 for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) { 230 nq = &rdev->nq[indx - 1]; 231 rc = bnxt_qplib_nq_start_irq(nq, indx - 1, 232 msix_ent[indx].vector, false); 233 if (rc) 234 dev_warn(rdev_to_dev(rdev), 235 "Failed to reinit NQ index %d\n", indx - 1); 236 } 237 } 238 239 static struct bnxt_ulp_ops bnxt_re_ulp_ops = { 240 .ulp_async_notifier = NULL, 241 .ulp_stop = bnxt_re_stop, 242 .ulp_start = bnxt_re_start, 243 .ulp_sriov_config = bnxt_re_sriov_config, 244 .ulp_shutdown = bnxt_re_shutdown, 245 .ulp_irq_stop = bnxt_re_stop_irq, 246 .ulp_irq_restart = bnxt_re_start_irq 247 }; 248 249 /* RoCE -> Net driver */ 250 251 /* Driver registration routines used to let the networking driver (bnxt_en) 252 * to know that the RoCE driver is now installed 253 */ 254 static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev) 255 { 256 struct bnxt_en_dev *en_dev; 257 int rc; 258 259 if (!rdev) 260 return -EINVAL; 261 262 en_dev = rdev->en_dev; 263 264 rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev, 265 BNXT_ROCE_ULP); 266 return rc; 267 } 268 269 static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev) 270 { 271 struct bnxt_en_dev *en_dev; 272 int rc = 0; 273 274 if (!rdev) 275 return -EINVAL; 276 277 en_dev = rdev->en_dev; 278 279 rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP, 280 &bnxt_re_ulp_ops, rdev); 281 return rc; 282 } 283 284 static int bnxt_re_free_msix(struct bnxt_re_dev *rdev) 285 { 286 struct bnxt_en_dev *en_dev; 287 int rc; 288 289 if (!rdev) 290 return -EINVAL; 291 292 en_dev = rdev->en_dev; 293 294 295 rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP); 296 297 return rc; 298 } 299 300 static int bnxt_re_request_msix(struct bnxt_re_dev *rdev) 301 { 302 int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got; 303 struct bnxt_en_dev *en_dev; 304 305 if (!rdev) 306 return -EINVAL; 307 308 en_dev = rdev->en_dev; 309 310 num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus()); 311 312 num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP, 313 rdev->msix_entries, 314 num_msix_want); 315 if (num_msix_got < BNXT_RE_MIN_MSIX) { 316 rc = -EINVAL; 317 goto done; 318 } 319 if (num_msix_got != num_msix_want) { 320 dev_warn(rdev_to_dev(rdev), 321 "Requested %d MSI-X vectors, got %d\n", 322 num_msix_want, num_msix_got); 323 } 324 rdev->num_msix = num_msix_got; 325 done: 326 return rc; 327 } 328 329 static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr, 330 u16 opcd, u16 crid, u16 trid) 331 { 332 hdr->req_type = cpu_to_le16(opcd); 333 hdr->cmpl_ring = cpu_to_le16(crid); 334 hdr->target_id = cpu_to_le16(trid); 335 } 336 337 static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg, 338 int msg_len, void *resp, int resp_max_len, 339 int timeout) 340 { 341 fw_msg->msg = msg; 342 fw_msg->msg_len = msg_len; 343 fw_msg->resp = resp; 344 fw_msg->resp_max_len = resp_max_len; 345 fw_msg->timeout = timeout; 346 } 347 348 static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, u16 fw_ring_id) 349 { 350 struct bnxt_en_dev *en_dev = rdev->en_dev; 351 struct hwrm_ring_free_input req = {0}; 352 struct hwrm_ring_free_output resp; 353 struct bnxt_fw_msg fw_msg; 354 int rc = -EINVAL; 355 356 if (!en_dev) 357 return rc; 358 359 memset(&fw_msg, 0, sizeof(fw_msg)); 360 361 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1); 362 req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL; 363 req.ring_id = cpu_to_le16(fw_ring_id); 364 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 365 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 366 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 367 if (rc) 368 dev_err(rdev_to_dev(rdev), 369 "Failed to free HW ring:%d :%#x", req.ring_id, rc); 370 return rc; 371 } 372 373 static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, dma_addr_t *dma_arr, 374 int pages, int type, u32 ring_mask, 375 u32 map_index, u16 *fw_ring_id) 376 { 377 struct bnxt_en_dev *en_dev = rdev->en_dev; 378 struct hwrm_ring_alloc_input req = {0}; 379 struct hwrm_ring_alloc_output resp; 380 struct bnxt_fw_msg fw_msg; 381 int rc = -EINVAL; 382 383 if (!en_dev) 384 return rc; 385 386 memset(&fw_msg, 0, sizeof(fw_msg)); 387 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1); 388 req.enables = 0; 389 req.page_tbl_addr = cpu_to_le64(dma_arr[0]); 390 if (pages > 1) { 391 /* Page size is in log2 units */ 392 req.page_size = BNXT_PAGE_SHIFT; 393 req.page_tbl_depth = 1; 394 } 395 req.fbo = 0; 396 /* Association of ring index with doorbell index and MSIX number */ 397 req.logical_id = cpu_to_le16(map_index); 398 req.length = cpu_to_le32(ring_mask + 1); 399 req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL; 400 req.int_mode = RING_ALLOC_REQ_INT_MODE_MSIX; 401 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 402 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 403 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 404 if (!rc) 405 *fw_ring_id = le16_to_cpu(resp.ring_id); 406 407 return rc; 408 } 409 410 static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev, 411 u32 fw_stats_ctx_id) 412 { 413 struct bnxt_en_dev *en_dev = rdev->en_dev; 414 struct hwrm_stat_ctx_free_input req = {0}; 415 struct bnxt_fw_msg fw_msg; 416 int rc = -EINVAL; 417 418 if (!en_dev) 419 return rc; 420 421 memset(&fw_msg, 0, sizeof(fw_msg)); 422 423 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1); 424 req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id); 425 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req, 426 sizeof(req), DFLT_HWRM_CMD_TIMEOUT); 427 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 428 if (rc) 429 dev_err(rdev_to_dev(rdev), 430 "Failed to free HW stats context %#x", rc); 431 432 return rc; 433 } 434 435 static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev, 436 dma_addr_t dma_map, 437 u32 *fw_stats_ctx_id) 438 { 439 struct hwrm_stat_ctx_alloc_output resp = {0}; 440 struct hwrm_stat_ctx_alloc_input req = {0}; 441 struct bnxt_en_dev *en_dev = rdev->en_dev; 442 struct bnxt_fw_msg fw_msg; 443 int rc = -EINVAL; 444 445 *fw_stats_ctx_id = INVALID_STATS_CTX_ID; 446 447 if (!en_dev) 448 return rc; 449 450 memset(&fw_msg, 0, sizeof(fw_msg)); 451 452 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1); 453 req.update_period_ms = cpu_to_le32(1000); 454 req.stats_dma_addr = cpu_to_le64(dma_map); 455 req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE; 456 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 457 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 458 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 459 if (!rc) 460 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id); 461 462 return rc; 463 } 464 465 /* Device */ 466 467 static bool is_bnxt_re_dev(struct net_device *netdev) 468 { 469 struct ethtool_drvinfo drvinfo; 470 471 if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) { 472 memset(&drvinfo, 0, sizeof(drvinfo)); 473 netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo); 474 475 if (strcmp(drvinfo.driver, "bnxt_en")) 476 return false; 477 return true; 478 } 479 return false; 480 } 481 482 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev) 483 { 484 struct bnxt_re_dev *rdev; 485 486 rcu_read_lock(); 487 list_for_each_entry_rcu(rdev, &bnxt_re_dev_list, list) { 488 if (rdev->netdev == netdev) { 489 rcu_read_unlock(); 490 return rdev; 491 } 492 } 493 rcu_read_unlock(); 494 return NULL; 495 } 496 497 static void bnxt_re_dev_unprobe(struct net_device *netdev, 498 struct bnxt_en_dev *en_dev) 499 { 500 dev_put(netdev); 501 module_put(en_dev->pdev->driver->driver.owner); 502 } 503 504 static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev) 505 { 506 struct bnxt *bp = netdev_priv(netdev); 507 struct bnxt_en_dev *en_dev; 508 struct pci_dev *pdev; 509 510 /* Call bnxt_en's RoCE probe via indirect API */ 511 if (!bp->ulp_probe) 512 return ERR_PTR(-EINVAL); 513 514 en_dev = bp->ulp_probe(netdev); 515 if (IS_ERR(en_dev)) 516 return en_dev; 517 518 pdev = en_dev->pdev; 519 if (!pdev) 520 return ERR_PTR(-EINVAL); 521 522 if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) { 523 dev_info(&pdev->dev, 524 "%s: probe error: RoCE is not supported on this device", 525 ROCE_DRV_MODULE_NAME); 526 return ERR_PTR(-ENODEV); 527 } 528 529 /* Bump net device reference count */ 530 if (!try_module_get(pdev->driver->driver.owner)) 531 return ERR_PTR(-ENODEV); 532 533 dev_hold(netdev); 534 535 return en_dev; 536 } 537 538 static void bnxt_re_unregister_ib(struct bnxt_re_dev *rdev) 539 { 540 ib_unregister_device(&rdev->ibdev); 541 } 542 543 static int bnxt_re_register_ib(struct bnxt_re_dev *rdev) 544 { 545 struct ib_device *ibdev = &rdev->ibdev; 546 547 /* ib device init */ 548 ibdev->owner = THIS_MODULE; 549 ibdev->node_type = RDMA_NODE_IB_CA; 550 strlcpy(ibdev->name, "bnxt_re%d", IB_DEVICE_NAME_MAX); 551 strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA", 552 strlen(BNXT_RE_DESC) + 5); 553 ibdev->phys_port_cnt = 1; 554 555 bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid); 556 557 ibdev->num_comp_vectors = 1; 558 ibdev->dev.parent = &rdev->en_dev->pdev->dev; 559 ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY; 560 561 /* User space */ 562 ibdev->uverbs_abi_ver = BNXT_RE_ABI_VERSION; 563 ibdev->uverbs_cmd_mask = 564 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 565 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 566 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 567 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 568 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 569 (1ull << IB_USER_VERBS_CMD_REG_MR) | 570 (1ull << IB_USER_VERBS_CMD_REREG_MR) | 571 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 572 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 573 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 574 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 575 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 576 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 577 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 578 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 579 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 580 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 581 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 582 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 583 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 584 (1ull << IB_USER_VERBS_CMD_CREATE_AH) | 585 (1ull << IB_USER_VERBS_CMD_MODIFY_AH) | 586 (1ull << IB_USER_VERBS_CMD_QUERY_AH) | 587 (1ull << IB_USER_VERBS_CMD_DESTROY_AH); 588 /* POLL_CQ and REQ_NOTIFY_CQ is directly handled in libbnxt_re */ 589 590 /* Kernel verbs */ 591 ibdev->query_device = bnxt_re_query_device; 592 ibdev->modify_device = bnxt_re_modify_device; 593 594 ibdev->query_port = bnxt_re_query_port; 595 ibdev->get_port_immutable = bnxt_re_get_port_immutable; 596 ibdev->get_dev_fw_str = bnxt_re_query_fw_str; 597 ibdev->query_pkey = bnxt_re_query_pkey; 598 ibdev->get_netdev = bnxt_re_get_netdev; 599 ibdev->add_gid = bnxt_re_add_gid; 600 ibdev->del_gid = bnxt_re_del_gid; 601 ibdev->get_link_layer = bnxt_re_get_link_layer; 602 603 ibdev->alloc_pd = bnxt_re_alloc_pd; 604 ibdev->dealloc_pd = bnxt_re_dealloc_pd; 605 606 ibdev->create_ah = bnxt_re_create_ah; 607 ibdev->modify_ah = bnxt_re_modify_ah; 608 ibdev->query_ah = bnxt_re_query_ah; 609 ibdev->destroy_ah = bnxt_re_destroy_ah; 610 611 ibdev->create_srq = bnxt_re_create_srq; 612 ibdev->modify_srq = bnxt_re_modify_srq; 613 ibdev->query_srq = bnxt_re_query_srq; 614 ibdev->destroy_srq = bnxt_re_destroy_srq; 615 ibdev->post_srq_recv = bnxt_re_post_srq_recv; 616 617 ibdev->create_qp = bnxt_re_create_qp; 618 ibdev->modify_qp = bnxt_re_modify_qp; 619 ibdev->query_qp = bnxt_re_query_qp; 620 ibdev->destroy_qp = bnxt_re_destroy_qp; 621 622 ibdev->post_send = bnxt_re_post_send; 623 ibdev->post_recv = bnxt_re_post_recv; 624 625 ibdev->create_cq = bnxt_re_create_cq; 626 ibdev->destroy_cq = bnxt_re_destroy_cq; 627 ibdev->poll_cq = bnxt_re_poll_cq; 628 ibdev->req_notify_cq = bnxt_re_req_notify_cq; 629 630 ibdev->get_dma_mr = bnxt_re_get_dma_mr; 631 ibdev->dereg_mr = bnxt_re_dereg_mr; 632 ibdev->alloc_mr = bnxt_re_alloc_mr; 633 ibdev->map_mr_sg = bnxt_re_map_mr_sg; 634 635 ibdev->reg_user_mr = bnxt_re_reg_user_mr; 636 ibdev->alloc_ucontext = bnxt_re_alloc_ucontext; 637 ibdev->dealloc_ucontext = bnxt_re_dealloc_ucontext; 638 ibdev->mmap = bnxt_re_mmap; 639 ibdev->get_hw_stats = bnxt_re_ib_get_hw_stats; 640 ibdev->alloc_hw_stats = bnxt_re_ib_alloc_hw_stats; 641 642 ibdev->driver_id = RDMA_DRIVER_BNXT_RE; 643 return ib_register_device(ibdev, NULL); 644 } 645 646 static ssize_t show_rev(struct device *device, struct device_attribute *attr, 647 char *buf) 648 { 649 struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev); 650 651 return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor); 652 } 653 654 static ssize_t show_hca(struct device *device, struct device_attribute *attr, 655 char *buf) 656 { 657 struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev); 658 659 return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc); 660 } 661 662 static DEVICE_ATTR(hw_rev, 0444, show_rev, NULL); 663 static DEVICE_ATTR(hca_type, 0444, show_hca, NULL); 664 665 static struct device_attribute *bnxt_re_attributes[] = { 666 &dev_attr_hw_rev, 667 &dev_attr_hca_type 668 }; 669 670 static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev) 671 { 672 dev_put(rdev->netdev); 673 rdev->netdev = NULL; 674 675 mutex_lock(&bnxt_re_dev_lock); 676 list_del_rcu(&rdev->list); 677 mutex_unlock(&bnxt_re_dev_lock); 678 679 synchronize_rcu(); 680 681 ib_dealloc_device(&rdev->ibdev); 682 /* rdev is gone */ 683 } 684 685 static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev, 686 struct bnxt_en_dev *en_dev) 687 { 688 struct bnxt_re_dev *rdev; 689 690 /* Allocate bnxt_re_dev instance here */ 691 rdev = (struct bnxt_re_dev *)ib_alloc_device(sizeof(*rdev)); 692 if (!rdev) { 693 dev_err(NULL, "%s: bnxt_re_dev allocation failure!", 694 ROCE_DRV_MODULE_NAME); 695 return NULL; 696 } 697 /* Default values */ 698 rdev->netdev = netdev; 699 dev_hold(rdev->netdev); 700 rdev->en_dev = en_dev; 701 rdev->id = rdev->en_dev->pdev->devfn; 702 INIT_LIST_HEAD(&rdev->qp_list); 703 mutex_init(&rdev->qp_lock); 704 atomic_set(&rdev->qp_count, 0); 705 atomic_set(&rdev->cq_count, 0); 706 atomic_set(&rdev->srq_count, 0); 707 atomic_set(&rdev->mr_count, 0); 708 atomic_set(&rdev->mw_count, 0); 709 rdev->cosq[0] = 0xFFFF; 710 rdev->cosq[1] = 0xFFFF; 711 712 mutex_lock(&bnxt_re_dev_lock); 713 list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list); 714 mutex_unlock(&bnxt_re_dev_lock); 715 return rdev; 716 } 717 718 static int bnxt_re_handle_unaffi_async_event(struct creq_func_event 719 *unaffi_async) 720 { 721 switch (unaffi_async->event) { 722 case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR: 723 break; 724 case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR: 725 break; 726 case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR: 727 break; 728 case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR: 729 break; 730 case CREQ_FUNC_EVENT_EVENT_CQ_ERROR: 731 break; 732 case CREQ_FUNC_EVENT_EVENT_TQM_ERROR: 733 break; 734 case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR: 735 break; 736 case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR: 737 break; 738 case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR: 739 break; 740 case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR: 741 break; 742 case CREQ_FUNC_EVENT_EVENT_TIM_ERROR: 743 break; 744 default: 745 return -EINVAL; 746 } 747 return 0; 748 } 749 750 static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event, 751 struct bnxt_re_qp *qp) 752 { 753 struct ib_event event; 754 unsigned int flags; 755 756 if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR) { 757 flags = bnxt_re_lock_cqs(qp); 758 bnxt_qplib_add_flush_qp(&qp->qplib_qp); 759 bnxt_re_unlock_cqs(qp, flags); 760 } 761 762 memset(&event, 0, sizeof(event)); 763 if (qp->qplib_qp.srq) { 764 event.device = &qp->rdev->ibdev; 765 event.element.qp = &qp->ib_qp; 766 event.event = IB_EVENT_QP_LAST_WQE_REACHED; 767 } 768 769 if (event.device && qp->ib_qp.event_handler) 770 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context); 771 772 return 0; 773 } 774 775 static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async, 776 void *obj) 777 { 778 int rc = 0; 779 u8 event; 780 781 if (!obj) 782 return rc; /* QP was already dead, still return success */ 783 784 event = affi_async->event; 785 if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) { 786 struct bnxt_qplib_qp *lib_qp = obj; 787 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp, 788 qplib_qp); 789 rc = bnxt_re_handle_qp_async_event(affi_async, qp); 790 } 791 return rc; 792 } 793 794 static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw, 795 void *aeqe, void *obj) 796 { 797 struct creq_qp_event *affi_async; 798 struct creq_func_event *unaffi_async; 799 u8 type; 800 int rc; 801 802 type = ((struct creq_base *)aeqe)->type; 803 if (type == CREQ_BASE_TYPE_FUNC_EVENT) { 804 unaffi_async = aeqe; 805 rc = bnxt_re_handle_unaffi_async_event(unaffi_async); 806 } else { 807 affi_async = aeqe; 808 rc = bnxt_re_handle_affi_async_event(affi_async, obj); 809 } 810 811 return rc; 812 } 813 814 static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq, 815 struct bnxt_qplib_srq *handle, u8 event) 816 { 817 struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq, 818 qplib_srq); 819 struct ib_event ib_event; 820 int rc = 0; 821 822 if (!srq) { 823 dev_err(NULL, "%s: SRQ is NULL, SRQN not handled", 824 ROCE_DRV_MODULE_NAME); 825 rc = -EINVAL; 826 goto done; 827 } 828 ib_event.device = &srq->rdev->ibdev; 829 ib_event.element.srq = &srq->ib_srq; 830 if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT) 831 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED; 832 else 833 ib_event.event = IB_EVENT_SRQ_ERR; 834 835 if (srq->ib_srq.event_handler) { 836 /* Lock event_handler? */ 837 (*srq->ib_srq.event_handler)(&ib_event, 838 srq->ib_srq.srq_context); 839 } 840 done: 841 return rc; 842 } 843 844 static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq, 845 struct bnxt_qplib_cq *handle) 846 { 847 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq, 848 qplib_cq); 849 850 if (!cq) { 851 dev_err(NULL, "%s: CQ is NULL, CQN not handled", 852 ROCE_DRV_MODULE_NAME); 853 return -EINVAL; 854 } 855 if (cq->ib_cq.comp_handler) { 856 /* Lock comp_handler? */ 857 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context); 858 } 859 860 return 0; 861 } 862 863 static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev) 864 { 865 int i; 866 867 if (rdev->nq[0].hwq.max_elements) { 868 for (i = 1; i < rdev->num_msix; i++) 869 bnxt_qplib_disable_nq(&rdev->nq[i - 1]); 870 } 871 872 if (rdev->qplib_res.rcfw) 873 bnxt_qplib_cleanup_res(&rdev->qplib_res); 874 } 875 876 static int bnxt_re_init_res(struct bnxt_re_dev *rdev) 877 { 878 int rc = 0, i; 879 880 bnxt_qplib_init_res(&rdev->qplib_res); 881 882 for (i = 1; i < rdev->num_msix ; i++) { 883 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1], 884 i - 1, rdev->msix_entries[i].vector, 885 rdev->msix_entries[i].db_offset, 886 &bnxt_re_cqn_handler, 887 &bnxt_re_srqn_handler); 888 889 if (rc) { 890 dev_err(rdev_to_dev(rdev), 891 "Failed to enable NQ with rc = 0x%x", rc); 892 goto fail; 893 } 894 } 895 return 0; 896 fail: 897 return rc; 898 } 899 900 static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev) 901 { 902 int i; 903 904 for (i = 0; i < rdev->num_msix - 1; i++) { 905 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id); 906 bnxt_qplib_free_nq(&rdev->nq[i]); 907 } 908 } 909 910 static void bnxt_re_free_res(struct bnxt_re_dev *rdev) 911 { 912 bnxt_re_free_nq_res(rdev); 913 914 if (rdev->qplib_res.dpi_tbl.max) { 915 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 916 &rdev->qplib_res.dpi_tbl, 917 &rdev->dpi_privileged); 918 } 919 if (rdev->qplib_res.rcfw) { 920 bnxt_qplib_free_res(&rdev->qplib_res); 921 rdev->qplib_res.rcfw = NULL; 922 } 923 } 924 925 static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev) 926 { 927 int rc = 0, i; 928 929 /* Configure and allocate resources for qplib */ 930 rdev->qplib_res.rcfw = &rdev->rcfw; 931 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 932 rdev->is_virtfn); 933 if (rc) 934 goto fail; 935 936 rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev, 937 rdev->netdev, &rdev->dev_attr); 938 if (rc) 939 goto fail; 940 941 rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl, 942 &rdev->dpi_privileged, 943 rdev); 944 if (rc) 945 goto dealloc_res; 946 947 for (i = 0; i < rdev->num_msix - 1; i++) { 948 rdev->nq[i].hwq.max_elements = BNXT_RE_MAX_CQ_COUNT + 949 BNXT_RE_MAX_SRQC_COUNT + 2; 950 rc = bnxt_qplib_alloc_nq(rdev->en_dev->pdev, &rdev->nq[i]); 951 if (rc) { 952 dev_err(rdev_to_dev(rdev), "Alloc Failed NQ%d rc:%#x", 953 i, rc); 954 goto dealloc_dpi; 955 } 956 rc = bnxt_re_net_ring_alloc 957 (rdev, rdev->nq[i].hwq.pbl[PBL_LVL_0].pg_map_arr, 958 rdev->nq[i].hwq.pbl[rdev->nq[i].hwq.level].pg_count, 959 HWRM_RING_ALLOC_CMPL, 960 BNXT_QPLIB_NQE_MAX_CNT - 1, 961 rdev->msix_entries[i + 1].ring_idx, 962 &rdev->nq[i].ring_id); 963 if (rc) { 964 dev_err(rdev_to_dev(rdev), 965 "Failed to allocate NQ fw id with rc = 0x%x", 966 rc); 967 goto free_nq; 968 } 969 } 970 return 0; 971 free_nq: 972 for (i = 0; i < rdev->num_msix - 1; i++) 973 bnxt_qplib_free_nq(&rdev->nq[i]); 974 dealloc_dpi: 975 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 976 &rdev->qplib_res.dpi_tbl, 977 &rdev->dpi_privileged); 978 dealloc_res: 979 bnxt_qplib_free_res(&rdev->qplib_res); 980 981 fail: 982 rdev->qplib_res.rcfw = NULL; 983 return rc; 984 } 985 986 static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp, 987 u8 port_num, enum ib_event_type event) 988 { 989 struct ib_event ib_event; 990 991 ib_event.device = ibdev; 992 if (qp) 993 ib_event.element.qp = qp; 994 else 995 ib_event.element.port_num = port_num; 996 ib_event.event = event; 997 ib_dispatch_event(&ib_event); 998 } 999 1000 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02 1001 static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir, 1002 u64 *cid_map) 1003 { 1004 struct hwrm_queue_pri2cos_qcfg_input req = {0}; 1005 struct bnxt *bp = netdev_priv(rdev->netdev); 1006 struct hwrm_queue_pri2cos_qcfg_output resp; 1007 struct bnxt_en_dev *en_dev = rdev->en_dev; 1008 struct bnxt_fw_msg fw_msg; 1009 u32 flags = 0; 1010 u8 *qcfgmap, *tmp_map; 1011 int rc = 0, i; 1012 1013 if (!cid_map) 1014 return -EINVAL; 1015 1016 memset(&fw_msg, 0, sizeof(fw_msg)); 1017 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, 1018 HWRM_QUEUE_PRI2COS_QCFG, -1, -1); 1019 flags |= (dir & 0x01); 1020 flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN; 1021 req.flags = cpu_to_le32(flags); 1022 req.port_id = bp->pf.port_id; 1023 1024 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 1025 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 1026 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 1027 if (rc) 1028 return rc; 1029 1030 if (resp.queue_cfg_info) { 1031 dev_warn(rdev_to_dev(rdev), 1032 "Asymmetric cos queue configuration detected"); 1033 dev_warn(rdev_to_dev(rdev), 1034 " on device, QoS may not be fully functional\n"); 1035 } 1036 qcfgmap = &resp.pri0_cos_queue_id; 1037 tmp_map = (u8 *)cid_map; 1038 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) 1039 tmp_map[i] = qcfgmap[i]; 1040 1041 return rc; 1042 } 1043 1044 static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev, 1045 struct bnxt_re_qp *qp) 1046 { 1047 return (qp->ib_qp.qp_type == IB_QPT_GSI) || (qp == rdev->qp1_sqp); 1048 } 1049 1050 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev) 1051 { 1052 int mask = IB_QP_STATE; 1053 struct ib_qp_attr qp_attr; 1054 struct bnxt_re_qp *qp; 1055 1056 qp_attr.qp_state = IB_QPS_ERR; 1057 mutex_lock(&rdev->qp_lock); 1058 list_for_each_entry(qp, &rdev->qp_list, list) { 1059 /* Modify the state of all QPs except QP1/Shadow QP */ 1060 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) { 1061 if (qp->qplib_qp.state != 1062 CMDQ_MODIFY_QP_NEW_STATE_RESET && 1063 qp->qplib_qp.state != 1064 CMDQ_MODIFY_QP_NEW_STATE_ERR) { 1065 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp, 1066 1, IB_EVENT_QP_FATAL); 1067 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask, 1068 NULL); 1069 } 1070 } 1071 } 1072 mutex_unlock(&rdev->qp_lock); 1073 } 1074 1075 static int bnxt_re_update_gid(struct bnxt_re_dev *rdev) 1076 { 1077 struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl; 1078 struct bnxt_qplib_gid gid; 1079 u16 gid_idx, index; 1080 int rc = 0; 1081 1082 if (!test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) 1083 return 0; 1084 1085 if (!sgid_tbl) { 1086 dev_err(rdev_to_dev(rdev), "QPLIB: SGID table not allocated"); 1087 return -EINVAL; 1088 } 1089 1090 for (index = 0; index < sgid_tbl->active; index++) { 1091 gid_idx = sgid_tbl->hw_id[index]; 1092 1093 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero, 1094 sizeof(bnxt_qplib_gid_zero))) 1095 continue; 1096 /* need to modify the VLAN enable setting of non VLAN GID only 1097 * as setting is done for VLAN GID while adding GID 1098 */ 1099 if (sgid_tbl->vlan[index]) 1100 continue; 1101 1102 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid)); 1103 1104 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx, 1105 rdev->qplib_res.netdev->dev_addr); 1106 } 1107 1108 return rc; 1109 } 1110 1111 static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev) 1112 { 1113 u32 prio_map = 0, tmp_map = 0; 1114 struct net_device *netdev; 1115 struct dcb_app app; 1116 1117 netdev = rdev->netdev; 1118 1119 memset(&app, 0, sizeof(app)); 1120 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE; 1121 app.protocol = ETH_P_IBOE; 1122 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1123 prio_map = tmp_map; 1124 1125 app.selector = IEEE_8021QAZ_APP_SEL_DGRAM; 1126 app.protocol = ROCE_V2_UDP_DPORT; 1127 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1128 prio_map |= tmp_map; 1129 1130 return prio_map; 1131 } 1132 1133 static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq) 1134 { 1135 u16 prio; 1136 u8 id; 1137 1138 for (prio = 0, id = 0; prio < 8; prio++) { 1139 if (prio_map & (1 << prio)) { 1140 cosq[id] = cid_map[prio]; 1141 id++; 1142 if (id == 2) /* Max 2 tcs supported */ 1143 break; 1144 } 1145 } 1146 } 1147 1148 static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev) 1149 { 1150 u8 prio_map = 0; 1151 u64 cid_map; 1152 int rc; 1153 1154 /* Get priority for roce */ 1155 prio_map = bnxt_re_get_priority_mask(rdev); 1156 1157 if (prio_map == rdev->cur_prio_map) 1158 return 0; 1159 rdev->cur_prio_map = prio_map; 1160 /* Get cosq id for this priority */ 1161 rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map); 1162 if (rc) { 1163 dev_warn(rdev_to_dev(rdev), "no cos for p_mask %x\n", prio_map); 1164 return rc; 1165 } 1166 /* Parse CoS IDs for app priority */ 1167 bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq); 1168 1169 /* Config BONO. */ 1170 rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq); 1171 if (rc) { 1172 dev_warn(rdev_to_dev(rdev), "no tc for cos{%x, %x}\n", 1173 rdev->cosq[0], rdev->cosq[1]); 1174 return rc; 1175 } 1176 1177 /* Actual priorities are not programmed as they are already 1178 * done by L2 driver; just enable or disable priority vlan tagging 1179 */ 1180 if ((prio_map == 0 && rdev->qplib_res.prio) || 1181 (prio_map != 0 && !rdev->qplib_res.prio)) { 1182 rdev->qplib_res.prio = prio_map ? true : false; 1183 1184 bnxt_re_update_gid(rdev); 1185 } 1186 1187 return 0; 1188 } 1189 1190 static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev) 1191 { 1192 int i, rc; 1193 1194 if (test_and_clear_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) { 1195 for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++) 1196 device_remove_file(&rdev->ibdev.dev, 1197 bnxt_re_attributes[i]); 1198 /* Cleanup ib dev */ 1199 bnxt_re_unregister_ib(rdev); 1200 } 1201 if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags)) 1202 cancel_delayed_work(&rdev->worker); 1203 1204 bnxt_re_cleanup_res(rdev); 1205 bnxt_re_free_res(rdev); 1206 1207 if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) { 1208 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw); 1209 if (rc) 1210 dev_warn(rdev_to_dev(rdev), 1211 "Failed to deinitialize RCFW: %#x", rc); 1212 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id); 1213 bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx); 1214 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1215 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id); 1216 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1217 } 1218 if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) { 1219 rc = bnxt_re_free_msix(rdev); 1220 if (rc) 1221 dev_warn(rdev_to_dev(rdev), 1222 "Failed to free MSI-X vectors: %#x", rc); 1223 } 1224 if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) { 1225 rc = bnxt_re_unregister_netdev(rdev); 1226 if (rc) 1227 dev_warn(rdev_to_dev(rdev), 1228 "Failed to unregister with netdev: %#x", rc); 1229 } 1230 } 1231 1232 /* worker thread for polling periodic events. Now used for QoS programming*/ 1233 static void bnxt_re_worker(struct work_struct *work) 1234 { 1235 struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev, 1236 worker.work); 1237 1238 bnxt_re_setup_qos(rdev); 1239 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1240 } 1241 1242 static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev) 1243 { 1244 int i, j, rc; 1245 1246 bool locked; 1247 1248 /* Acquire rtnl lock through out this function */ 1249 rtnl_lock(); 1250 locked = true; 1251 1252 /* Registered a new RoCE device instance to netdev */ 1253 rc = bnxt_re_register_netdev(rdev); 1254 if (rc) { 1255 pr_err("Failed to register with netedev: %#x\n", rc); 1256 return -EINVAL; 1257 } 1258 set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags); 1259 1260 /* Check whether VF or PF */ 1261 bnxt_re_get_sriov_func_type(rdev); 1262 1263 rc = bnxt_re_request_msix(rdev); 1264 if (rc) { 1265 pr_err("Failed to get MSI-X vectors: %#x\n", rc); 1266 rc = -EINVAL; 1267 goto fail; 1268 } 1269 set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags); 1270 1271 /* Establish RCFW Communication Channel to initialize the context 1272 * memory for the function and all child VFs 1273 */ 1274 rc = bnxt_qplib_alloc_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw, 1275 BNXT_RE_MAX_QPC_COUNT); 1276 if (rc) { 1277 pr_err("Failed to allocate RCFW Channel: %#x\n", rc); 1278 goto fail; 1279 } 1280 rc = bnxt_re_net_ring_alloc 1281 (rdev, rdev->rcfw.creq.pbl[PBL_LVL_0].pg_map_arr, 1282 rdev->rcfw.creq.pbl[rdev->rcfw.creq.level].pg_count, 1283 HWRM_RING_ALLOC_CMPL, BNXT_QPLIB_CREQE_MAX_CNT - 1, 1284 rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx, 1285 &rdev->rcfw.creq_ring_id); 1286 if (rc) { 1287 pr_err("Failed to allocate CREQ: %#x\n", rc); 1288 goto free_rcfw; 1289 } 1290 rc = bnxt_qplib_enable_rcfw_channel 1291 (rdev->en_dev->pdev, &rdev->rcfw, 1292 rdev->msix_entries[BNXT_RE_AEQ_IDX].vector, 1293 rdev->msix_entries[BNXT_RE_AEQ_IDX].db_offset, 1294 rdev->is_virtfn, &bnxt_re_aeq_handler); 1295 if (rc) { 1296 pr_err("Failed to enable RCFW channel: %#x\n", rc); 1297 goto free_ring; 1298 } 1299 1300 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 1301 rdev->is_virtfn); 1302 if (rc) 1303 goto disable_rcfw; 1304 if (!rdev->is_virtfn) 1305 bnxt_re_set_resource_limits(rdev); 1306 1307 rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0); 1308 if (rc) { 1309 pr_err("Failed to allocate QPLIB context: %#x\n", rc); 1310 goto disable_rcfw; 1311 } 1312 rc = bnxt_re_net_stats_ctx_alloc(rdev, 1313 rdev->qplib_ctx.stats.dma_map, 1314 &rdev->qplib_ctx.stats.fw_id); 1315 if (rc) { 1316 pr_err("Failed to allocate stats context: %#x\n", rc); 1317 goto free_ctx; 1318 } 1319 1320 rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx, 1321 rdev->is_virtfn); 1322 if (rc) { 1323 pr_err("Failed to initialize RCFW: %#x\n", rc); 1324 goto free_sctx; 1325 } 1326 set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags); 1327 1328 /* Resources based on the 'new' device caps */ 1329 rc = bnxt_re_alloc_res(rdev); 1330 if (rc) { 1331 pr_err("Failed to allocate resources: %#x\n", rc); 1332 goto fail; 1333 } 1334 rc = bnxt_re_init_res(rdev); 1335 if (rc) { 1336 pr_err("Failed to initialize resources: %#x\n", rc); 1337 goto fail; 1338 } 1339 1340 if (!rdev->is_virtfn) { 1341 rc = bnxt_re_setup_qos(rdev); 1342 if (rc) 1343 pr_info("RoCE priority not yet configured\n"); 1344 1345 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker); 1346 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags); 1347 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1348 } 1349 1350 rtnl_unlock(); 1351 locked = false; 1352 1353 /* Register ib dev */ 1354 rc = bnxt_re_register_ib(rdev); 1355 if (rc) { 1356 pr_err("Failed to register with IB: %#x\n", rc); 1357 goto fail; 1358 } 1359 set_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags); 1360 dev_info(rdev_to_dev(rdev), "Device registered successfully"); 1361 for (i = 0; i < ARRAY_SIZE(bnxt_re_attributes); i++) { 1362 rc = device_create_file(&rdev->ibdev.dev, 1363 bnxt_re_attributes[i]); 1364 if (rc) { 1365 dev_err(rdev_to_dev(rdev), 1366 "Failed to create IB sysfs: %#x", rc); 1367 /* Must clean up all created device files */ 1368 for (j = 0; j < i; j++) 1369 device_remove_file(&rdev->ibdev.dev, 1370 bnxt_re_attributes[j]); 1371 bnxt_re_unregister_ib(rdev); 1372 goto fail; 1373 } 1374 } 1375 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1376 &rdev->active_width); 1377 set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags); 1378 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_PORT_ACTIVE); 1379 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_GID_CHANGE); 1380 1381 return 0; 1382 free_sctx: 1383 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id); 1384 free_ctx: 1385 bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx); 1386 disable_rcfw: 1387 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1388 free_ring: 1389 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id); 1390 free_rcfw: 1391 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1392 fail: 1393 if (!locked) 1394 rtnl_lock(); 1395 bnxt_re_ib_unreg(rdev); 1396 rtnl_unlock(); 1397 1398 return rc; 1399 } 1400 1401 static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev) 1402 { 1403 struct bnxt_en_dev *en_dev = rdev->en_dev; 1404 struct net_device *netdev = rdev->netdev; 1405 1406 bnxt_re_dev_remove(rdev); 1407 1408 if (netdev) 1409 bnxt_re_dev_unprobe(netdev, en_dev); 1410 } 1411 1412 static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev) 1413 { 1414 struct bnxt_en_dev *en_dev; 1415 int rc = 0; 1416 1417 if (!is_bnxt_re_dev(netdev)) 1418 return -ENODEV; 1419 1420 en_dev = bnxt_re_dev_probe(netdev); 1421 if (IS_ERR(en_dev)) { 1422 if (en_dev != ERR_PTR(-ENODEV)) 1423 pr_err("%s: Failed to probe\n", ROCE_DRV_MODULE_NAME); 1424 rc = PTR_ERR(en_dev); 1425 goto exit; 1426 } 1427 *rdev = bnxt_re_dev_add(netdev, en_dev); 1428 if (!*rdev) { 1429 rc = -ENOMEM; 1430 bnxt_re_dev_unprobe(netdev, en_dev); 1431 goto exit; 1432 } 1433 exit: 1434 return rc; 1435 } 1436 1437 static void bnxt_re_remove_one(struct bnxt_re_dev *rdev) 1438 { 1439 pci_dev_put(rdev->en_dev->pdev); 1440 } 1441 1442 /* Handle all deferred netevents tasks */ 1443 static void bnxt_re_task(struct work_struct *work) 1444 { 1445 struct bnxt_re_work *re_work; 1446 struct bnxt_re_dev *rdev; 1447 int rc = 0; 1448 1449 re_work = container_of(work, struct bnxt_re_work, work); 1450 rdev = re_work->rdev; 1451 1452 if (re_work->event != NETDEV_REGISTER && 1453 !test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) 1454 return; 1455 1456 switch (re_work->event) { 1457 case NETDEV_REGISTER: 1458 rc = bnxt_re_ib_reg(rdev); 1459 if (rc) { 1460 dev_err(rdev_to_dev(rdev), 1461 "Failed to register with IB: %#x", rc); 1462 bnxt_re_remove_one(rdev); 1463 bnxt_re_dev_unreg(rdev); 1464 } 1465 break; 1466 case NETDEV_UP: 1467 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1468 IB_EVENT_PORT_ACTIVE); 1469 break; 1470 case NETDEV_DOWN: 1471 bnxt_re_dev_stop(rdev); 1472 break; 1473 case NETDEV_CHANGE: 1474 if (!netif_carrier_ok(rdev->netdev)) 1475 bnxt_re_dev_stop(rdev); 1476 else if (netif_carrier_ok(rdev->netdev)) 1477 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1478 IB_EVENT_PORT_ACTIVE); 1479 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1480 &rdev->active_width); 1481 break; 1482 default: 1483 break; 1484 } 1485 smp_mb__before_atomic(); 1486 atomic_dec(&rdev->sched_count); 1487 kfree(re_work); 1488 } 1489 1490 static void bnxt_re_init_one(struct bnxt_re_dev *rdev) 1491 { 1492 pci_dev_get(rdev->en_dev->pdev); 1493 } 1494 1495 /* 1496 * "Notifier chain callback can be invoked for the same chain from 1497 * different CPUs at the same time". 1498 * 1499 * For cases when the netdev is already present, our call to the 1500 * register_netdevice_notifier() will actually get the rtnl_lock() 1501 * before sending NETDEV_REGISTER and (if up) NETDEV_UP 1502 * events. 1503 * 1504 * But for cases when the netdev is not already present, the notifier 1505 * chain is subjected to be invoked from different CPUs simultaneously. 1506 * 1507 * This is protected by the netdev_mutex. 1508 */ 1509 static int bnxt_re_netdev_event(struct notifier_block *notifier, 1510 unsigned long event, void *ptr) 1511 { 1512 struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr); 1513 struct bnxt_re_work *re_work; 1514 struct bnxt_re_dev *rdev; 1515 int rc = 0; 1516 bool sch_work = false; 1517 1518 real_dev = rdma_vlan_dev_real_dev(netdev); 1519 if (!real_dev) 1520 real_dev = netdev; 1521 1522 rdev = bnxt_re_from_netdev(real_dev); 1523 if (!rdev && event != NETDEV_REGISTER) 1524 goto exit; 1525 if (real_dev != netdev) 1526 goto exit; 1527 1528 switch (event) { 1529 case NETDEV_REGISTER: 1530 if (rdev) 1531 break; 1532 rc = bnxt_re_dev_reg(&rdev, real_dev); 1533 if (rc == -ENODEV) 1534 break; 1535 if (rc) { 1536 pr_err("Failed to register with the device %s: %#x\n", 1537 real_dev->name, rc); 1538 break; 1539 } 1540 bnxt_re_init_one(rdev); 1541 sch_work = true; 1542 break; 1543 1544 case NETDEV_UNREGISTER: 1545 /* netdev notifier will call NETDEV_UNREGISTER again later since 1546 * we are still holding the reference to the netdev 1547 */ 1548 if (atomic_read(&rdev->sched_count) > 0) 1549 goto exit; 1550 bnxt_re_ib_unreg(rdev); 1551 bnxt_re_remove_one(rdev); 1552 bnxt_re_dev_unreg(rdev); 1553 break; 1554 1555 default: 1556 sch_work = true; 1557 break; 1558 } 1559 if (sch_work) { 1560 /* Allocate for the deferred task */ 1561 re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC); 1562 if (re_work) { 1563 re_work->rdev = rdev; 1564 re_work->event = event; 1565 re_work->vlan_dev = (real_dev == netdev ? 1566 NULL : netdev); 1567 INIT_WORK(&re_work->work, bnxt_re_task); 1568 atomic_inc(&rdev->sched_count); 1569 queue_work(bnxt_re_wq, &re_work->work); 1570 } 1571 } 1572 1573 exit: 1574 return NOTIFY_DONE; 1575 } 1576 1577 static struct notifier_block bnxt_re_netdev_notifier = { 1578 .notifier_call = bnxt_re_netdev_event 1579 }; 1580 1581 static int __init bnxt_re_mod_init(void) 1582 { 1583 int rc = 0; 1584 1585 pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version); 1586 1587 bnxt_re_wq = create_singlethread_workqueue("bnxt_re"); 1588 if (!bnxt_re_wq) 1589 return -ENOMEM; 1590 1591 INIT_LIST_HEAD(&bnxt_re_dev_list); 1592 1593 rc = register_netdevice_notifier(&bnxt_re_netdev_notifier); 1594 if (rc) { 1595 pr_err("%s: Cannot register to netdevice_notifier", 1596 ROCE_DRV_MODULE_NAME); 1597 goto err_netdev; 1598 } 1599 return 0; 1600 1601 err_netdev: 1602 destroy_workqueue(bnxt_re_wq); 1603 1604 return rc; 1605 } 1606 1607 static void __exit bnxt_re_mod_exit(void) 1608 { 1609 struct bnxt_re_dev *rdev, *next; 1610 LIST_HEAD(to_be_deleted); 1611 1612 mutex_lock(&bnxt_re_dev_lock); 1613 /* Free all adapter allocated resources */ 1614 if (!list_empty(&bnxt_re_dev_list)) 1615 list_splice_init(&bnxt_re_dev_list, &to_be_deleted); 1616 mutex_unlock(&bnxt_re_dev_lock); 1617 /* 1618 * Cleanup the devices in reverse order so that the VF device 1619 * cleanup is done before PF cleanup 1620 */ 1621 list_for_each_entry_safe_reverse(rdev, next, &to_be_deleted, list) { 1622 dev_info(rdev_to_dev(rdev), "Unregistering Device"); 1623 /* 1624 * Flush out any scheduled tasks before destroying the 1625 * resources 1626 */ 1627 flush_workqueue(bnxt_re_wq); 1628 bnxt_re_dev_stop(rdev); 1629 /* Acquire the rtnl_lock as the L2 resources are freed here */ 1630 rtnl_lock(); 1631 bnxt_re_ib_unreg(rdev); 1632 rtnl_unlock(); 1633 bnxt_re_remove_one(rdev); 1634 bnxt_re_dev_unreg(rdev); 1635 } 1636 unregister_netdevice_notifier(&bnxt_re_netdev_notifier); 1637 if (bnxt_re_wq) 1638 destroy_workqueue(bnxt_re_wq); 1639 } 1640 1641 module_init(bnxt_re_mod_init); 1642 module_exit(bnxt_re_mod_exit); 1643