1 /* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Main component of the bnxt_re driver 37 */ 38 39 #include <linux/module.h> 40 #include <linux/netdevice.h> 41 #include <linux/ethtool.h> 42 #include <linux/mutex.h> 43 #include <linux/list.h> 44 #include <linux/rculist.h> 45 #include <linux/spinlock.h> 46 #include <linux/pci.h> 47 #include <net/dcbnl.h> 48 #include <net/ipv6.h> 49 #include <net/addrconf.h> 50 #include <linux/if_ether.h> 51 52 #include <rdma/ib_verbs.h> 53 #include <rdma/ib_user_verbs.h> 54 #include <rdma/ib_umem.h> 55 #include <rdma/ib_addr.h> 56 57 #include "bnxt_ulp.h" 58 #include "roce_hsi.h" 59 #include "qplib_res.h" 60 #include "qplib_sp.h" 61 #include "qplib_fp.h" 62 #include "qplib_rcfw.h" 63 #include "bnxt_re.h" 64 #include "ib_verbs.h" 65 #include <rdma/bnxt_re-abi.h> 66 #include "bnxt.h" 67 #include "hw_counters.h" 68 69 static char version[] = 70 BNXT_RE_DESC "\n"; 71 72 MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>"); 73 MODULE_DESCRIPTION(BNXT_RE_DESC " Driver"); 74 MODULE_LICENSE("Dual BSD/GPL"); 75 76 /* globals */ 77 static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list); 78 /* Mutex to protect the list of bnxt_re devices added */ 79 static DEFINE_MUTEX(bnxt_re_dev_lock); 80 static struct workqueue_struct *bnxt_re_wq; 81 static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev); 82 83 /* SR-IOV helper functions */ 84 85 static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev) 86 { 87 struct bnxt *bp; 88 89 bp = netdev_priv(rdev->en_dev->net); 90 if (BNXT_VF(bp)) 91 rdev->is_virtfn = 1; 92 } 93 94 /* Set the maximum number of each resource that the driver actually wants 95 * to allocate. This may be up to the maximum number the firmware has 96 * reserved for the function. The driver may choose to allocate fewer 97 * resources than the firmware maximum. 98 */ 99 static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev) 100 { 101 u32 vf_qps = 0, vf_srqs = 0, vf_cqs = 0, vf_mrws = 0, vf_gids = 0; 102 u32 i; 103 u32 vf_pct; 104 u32 num_vfs; 105 struct bnxt_qplib_dev_attr *dev_attr = &rdev->dev_attr; 106 107 rdev->qplib_ctx.qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT, 108 dev_attr->max_qp); 109 110 rdev->qplib_ctx.mrw_count = BNXT_RE_MAX_MRW_COUNT_256K; 111 /* Use max_mr from fw since max_mrw does not get set */ 112 rdev->qplib_ctx.mrw_count = min_t(u32, rdev->qplib_ctx.mrw_count, 113 dev_attr->max_mr); 114 rdev->qplib_ctx.srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT, 115 dev_attr->max_srq); 116 rdev->qplib_ctx.cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, 117 dev_attr->max_cq); 118 119 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++) 120 rdev->qplib_ctx.tqm_count[i] = 121 rdev->dev_attr.tqm_alloc_reqs[i]; 122 123 if (rdev->num_vfs) { 124 /* 125 * Reserve a set of resources for the PF. Divide the remaining 126 * resources among the VFs 127 */ 128 vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF; 129 num_vfs = 100 * rdev->num_vfs; 130 vf_qps = (rdev->qplib_ctx.qpc_count * vf_pct) / num_vfs; 131 vf_srqs = (rdev->qplib_ctx.srqc_count * vf_pct) / num_vfs; 132 vf_cqs = (rdev->qplib_ctx.cq_count * vf_pct) / num_vfs; 133 /* 134 * The driver allows many more MRs than other resources. If the 135 * firmware does also, then reserve a fixed amount for the PF 136 * and divide the rest among VFs. VFs may use many MRs for NFS 137 * mounts, ISER, NVME applications, etc. If the firmware 138 * severely restricts the number of MRs, then let PF have 139 * half and divide the rest among VFs, as for the other 140 * resource types. 141 */ 142 if (rdev->qplib_ctx.mrw_count < BNXT_RE_MAX_MRW_COUNT_64K) 143 vf_mrws = rdev->qplib_ctx.mrw_count * vf_pct / num_vfs; 144 else 145 vf_mrws = (rdev->qplib_ctx.mrw_count - 146 BNXT_RE_RESVD_MR_FOR_PF) / rdev->num_vfs; 147 vf_gids = BNXT_RE_MAX_GID_PER_VF; 148 } 149 rdev->qplib_ctx.vf_res.max_mrw_per_vf = vf_mrws; 150 rdev->qplib_ctx.vf_res.max_gid_per_vf = vf_gids; 151 rdev->qplib_ctx.vf_res.max_qp_per_vf = vf_qps; 152 rdev->qplib_ctx.vf_res.max_srq_per_vf = vf_srqs; 153 rdev->qplib_ctx.vf_res.max_cq_per_vf = vf_cqs; 154 } 155 156 /* for handling bnxt_en callbacks later */ 157 static void bnxt_re_stop(void *p) 158 { 159 } 160 161 static void bnxt_re_start(void *p) 162 { 163 } 164 165 static void bnxt_re_sriov_config(void *p, int num_vfs) 166 { 167 struct bnxt_re_dev *rdev = p; 168 169 if (!rdev) 170 return; 171 172 rdev->num_vfs = num_vfs; 173 bnxt_re_set_resource_limits(rdev); 174 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw, 175 &rdev->qplib_ctx); 176 } 177 178 static void bnxt_re_shutdown(void *p) 179 { 180 struct bnxt_re_dev *rdev = p; 181 182 if (!rdev) 183 return; 184 185 bnxt_re_ib_unreg(rdev); 186 } 187 188 static void bnxt_re_stop_irq(void *handle) 189 { 190 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; 191 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; 192 struct bnxt_qplib_nq *nq; 193 int indx; 194 195 for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) { 196 nq = &rdev->nq[indx - 1]; 197 bnxt_qplib_nq_stop_irq(nq, false); 198 } 199 200 bnxt_qplib_rcfw_stop_irq(rcfw, false); 201 } 202 203 static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent) 204 { 205 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; 206 struct bnxt_msix_entry *msix_ent = rdev->msix_entries; 207 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; 208 struct bnxt_qplib_nq *nq; 209 int indx, rc; 210 211 if (!ent) { 212 /* Not setting the f/w timeout bit in rcfw. 213 * During the driver unload the first command 214 * to f/w will timeout and that will set the 215 * timeout bit. 216 */ 217 dev_err(rdev_to_dev(rdev), "Failed to re-start IRQs\n"); 218 return; 219 } 220 221 /* Vectors may change after restart, so update with new vectors 222 * in device sctructure. 223 */ 224 for (indx = 0; indx < rdev->num_msix; indx++) 225 rdev->msix_entries[indx].vector = ent[indx].vector; 226 227 bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector, 228 false); 229 for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) { 230 nq = &rdev->nq[indx - 1]; 231 rc = bnxt_qplib_nq_start_irq(nq, indx - 1, 232 msix_ent[indx].vector, false); 233 if (rc) 234 dev_warn(rdev_to_dev(rdev), 235 "Failed to reinit NQ index %d\n", indx - 1); 236 } 237 } 238 239 static struct bnxt_ulp_ops bnxt_re_ulp_ops = { 240 .ulp_async_notifier = NULL, 241 .ulp_stop = bnxt_re_stop, 242 .ulp_start = bnxt_re_start, 243 .ulp_sriov_config = bnxt_re_sriov_config, 244 .ulp_shutdown = bnxt_re_shutdown, 245 .ulp_irq_stop = bnxt_re_stop_irq, 246 .ulp_irq_restart = bnxt_re_start_irq 247 }; 248 249 /* RoCE -> Net driver */ 250 251 /* Driver registration routines used to let the networking driver (bnxt_en) 252 * to know that the RoCE driver is now installed 253 */ 254 static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev) 255 { 256 struct bnxt_en_dev *en_dev; 257 int rc; 258 259 if (!rdev) 260 return -EINVAL; 261 262 en_dev = rdev->en_dev; 263 264 rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev, 265 BNXT_ROCE_ULP); 266 return rc; 267 } 268 269 static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev) 270 { 271 struct bnxt_en_dev *en_dev; 272 int rc = 0; 273 274 if (!rdev) 275 return -EINVAL; 276 277 en_dev = rdev->en_dev; 278 279 rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP, 280 &bnxt_re_ulp_ops, rdev); 281 return rc; 282 } 283 284 static int bnxt_re_free_msix(struct bnxt_re_dev *rdev) 285 { 286 struct bnxt_en_dev *en_dev; 287 int rc; 288 289 if (!rdev) 290 return -EINVAL; 291 292 en_dev = rdev->en_dev; 293 294 295 rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP); 296 297 return rc; 298 } 299 300 static int bnxt_re_request_msix(struct bnxt_re_dev *rdev) 301 { 302 int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got; 303 struct bnxt_en_dev *en_dev; 304 305 if (!rdev) 306 return -EINVAL; 307 308 en_dev = rdev->en_dev; 309 310 num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus()); 311 312 num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP, 313 rdev->msix_entries, 314 num_msix_want); 315 if (num_msix_got < BNXT_RE_MIN_MSIX) { 316 rc = -EINVAL; 317 goto done; 318 } 319 if (num_msix_got != num_msix_want) { 320 dev_warn(rdev_to_dev(rdev), 321 "Requested %d MSI-X vectors, got %d\n", 322 num_msix_want, num_msix_got); 323 } 324 rdev->num_msix = num_msix_got; 325 done: 326 return rc; 327 } 328 329 static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr, 330 u16 opcd, u16 crid, u16 trid) 331 { 332 hdr->req_type = cpu_to_le16(opcd); 333 hdr->cmpl_ring = cpu_to_le16(crid); 334 hdr->target_id = cpu_to_le16(trid); 335 } 336 337 static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg, 338 int msg_len, void *resp, int resp_max_len, 339 int timeout) 340 { 341 fw_msg->msg = msg; 342 fw_msg->msg_len = msg_len; 343 fw_msg->resp = resp; 344 fw_msg->resp_max_len = resp_max_len; 345 fw_msg->timeout = timeout; 346 } 347 348 static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, u16 fw_ring_id) 349 { 350 struct bnxt_en_dev *en_dev = rdev->en_dev; 351 struct hwrm_ring_free_input req = {0}; 352 struct hwrm_ring_free_output resp; 353 struct bnxt_fw_msg fw_msg; 354 int rc = -EINVAL; 355 356 if (!en_dev) 357 return rc; 358 359 memset(&fw_msg, 0, sizeof(fw_msg)); 360 361 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1); 362 req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL; 363 req.ring_id = cpu_to_le16(fw_ring_id); 364 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 365 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 366 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 367 if (rc) 368 dev_err(rdev_to_dev(rdev), 369 "Failed to free HW ring:%d :%#x", req.ring_id, rc); 370 return rc; 371 } 372 373 static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, dma_addr_t *dma_arr, 374 int pages, int type, u32 ring_mask, 375 u32 map_index, u16 *fw_ring_id) 376 { 377 struct bnxt_en_dev *en_dev = rdev->en_dev; 378 struct hwrm_ring_alloc_input req = {0}; 379 struct hwrm_ring_alloc_output resp; 380 struct bnxt_fw_msg fw_msg; 381 int rc = -EINVAL; 382 383 if (!en_dev) 384 return rc; 385 386 memset(&fw_msg, 0, sizeof(fw_msg)); 387 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1); 388 req.enables = 0; 389 req.page_tbl_addr = cpu_to_le64(dma_arr[0]); 390 if (pages > 1) { 391 /* Page size is in log2 units */ 392 req.page_size = BNXT_PAGE_SHIFT; 393 req.page_tbl_depth = 1; 394 } 395 req.fbo = 0; 396 /* Association of ring index with doorbell index and MSIX number */ 397 req.logical_id = cpu_to_le16(map_index); 398 req.length = cpu_to_le32(ring_mask + 1); 399 req.ring_type = RING_ALLOC_REQ_RING_TYPE_L2_CMPL; 400 req.int_mode = RING_ALLOC_REQ_INT_MODE_MSIX; 401 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 402 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 403 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 404 if (!rc) 405 *fw_ring_id = le16_to_cpu(resp.ring_id); 406 407 return rc; 408 } 409 410 static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev, 411 u32 fw_stats_ctx_id) 412 { 413 struct bnxt_en_dev *en_dev = rdev->en_dev; 414 struct hwrm_stat_ctx_free_input req = {0}; 415 struct bnxt_fw_msg fw_msg; 416 int rc = -EINVAL; 417 418 if (!en_dev) 419 return rc; 420 421 memset(&fw_msg, 0, sizeof(fw_msg)); 422 423 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1); 424 req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id); 425 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req, 426 sizeof(req), DFLT_HWRM_CMD_TIMEOUT); 427 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 428 if (rc) 429 dev_err(rdev_to_dev(rdev), 430 "Failed to free HW stats context %#x", rc); 431 432 return rc; 433 } 434 435 static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev, 436 dma_addr_t dma_map, 437 u32 *fw_stats_ctx_id) 438 { 439 struct hwrm_stat_ctx_alloc_output resp = {0}; 440 struct hwrm_stat_ctx_alloc_input req = {0}; 441 struct bnxt_en_dev *en_dev = rdev->en_dev; 442 struct bnxt_fw_msg fw_msg; 443 int rc = -EINVAL; 444 445 *fw_stats_ctx_id = INVALID_STATS_CTX_ID; 446 447 if (!en_dev) 448 return rc; 449 450 memset(&fw_msg, 0, sizeof(fw_msg)); 451 452 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1); 453 req.update_period_ms = cpu_to_le32(1000); 454 req.stats_dma_addr = cpu_to_le64(dma_map); 455 req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE; 456 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 457 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 458 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 459 if (!rc) 460 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id); 461 462 return rc; 463 } 464 465 /* Device */ 466 467 static bool is_bnxt_re_dev(struct net_device *netdev) 468 { 469 struct ethtool_drvinfo drvinfo; 470 471 if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) { 472 memset(&drvinfo, 0, sizeof(drvinfo)); 473 netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo); 474 475 if (strcmp(drvinfo.driver, "bnxt_en")) 476 return false; 477 return true; 478 } 479 return false; 480 } 481 482 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev) 483 { 484 struct bnxt_re_dev *rdev; 485 486 rcu_read_lock(); 487 list_for_each_entry_rcu(rdev, &bnxt_re_dev_list, list) { 488 if (rdev->netdev == netdev) { 489 rcu_read_unlock(); 490 return rdev; 491 } 492 } 493 rcu_read_unlock(); 494 return NULL; 495 } 496 497 static void bnxt_re_dev_unprobe(struct net_device *netdev, 498 struct bnxt_en_dev *en_dev) 499 { 500 dev_put(netdev); 501 module_put(en_dev->pdev->driver->driver.owner); 502 } 503 504 static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev) 505 { 506 struct bnxt *bp = netdev_priv(netdev); 507 struct bnxt_en_dev *en_dev; 508 struct pci_dev *pdev; 509 510 /* Call bnxt_en's RoCE probe via indirect API */ 511 if (!bp->ulp_probe) 512 return ERR_PTR(-EINVAL); 513 514 en_dev = bp->ulp_probe(netdev); 515 if (IS_ERR(en_dev)) 516 return en_dev; 517 518 pdev = en_dev->pdev; 519 if (!pdev) 520 return ERR_PTR(-EINVAL); 521 522 if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) { 523 dev_info(&pdev->dev, 524 "%s: probe error: RoCE is not supported on this device", 525 ROCE_DRV_MODULE_NAME); 526 return ERR_PTR(-ENODEV); 527 } 528 529 /* Bump net device reference count */ 530 if (!try_module_get(pdev->driver->driver.owner)) 531 return ERR_PTR(-ENODEV); 532 533 dev_hold(netdev); 534 535 return en_dev; 536 } 537 538 static ssize_t hw_rev_show(struct device *device, struct device_attribute *attr, 539 char *buf) 540 { 541 struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev); 542 543 return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor); 544 } 545 static DEVICE_ATTR_RO(hw_rev); 546 547 static ssize_t hca_type_show(struct device *device, 548 struct device_attribute *attr, char *buf) 549 { 550 struct bnxt_re_dev *rdev = to_bnxt_re_dev(device, ibdev.dev); 551 552 return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc); 553 } 554 static DEVICE_ATTR_RO(hca_type); 555 556 static struct attribute *bnxt_re_attributes[] = { 557 &dev_attr_hw_rev.attr, 558 &dev_attr_hca_type.attr, 559 NULL 560 }; 561 562 static const struct attribute_group bnxt_re_dev_attr_group = { 563 .attrs = bnxt_re_attributes, 564 }; 565 566 static void bnxt_re_unregister_ib(struct bnxt_re_dev *rdev) 567 { 568 ib_unregister_device(&rdev->ibdev); 569 } 570 571 static int bnxt_re_register_ib(struct bnxt_re_dev *rdev) 572 { 573 struct ib_device *ibdev = &rdev->ibdev; 574 575 /* ib device init */ 576 ibdev->owner = THIS_MODULE; 577 ibdev->node_type = RDMA_NODE_IB_CA; 578 strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA", 579 strlen(BNXT_RE_DESC) + 5); 580 ibdev->phys_port_cnt = 1; 581 582 bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid); 583 584 ibdev->num_comp_vectors = 1; 585 ibdev->dev.parent = &rdev->en_dev->pdev->dev; 586 ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY; 587 588 /* User space */ 589 ibdev->uverbs_abi_ver = BNXT_RE_ABI_VERSION; 590 ibdev->uverbs_cmd_mask = 591 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 592 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 593 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 594 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 595 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 596 (1ull << IB_USER_VERBS_CMD_REG_MR) | 597 (1ull << IB_USER_VERBS_CMD_REREG_MR) | 598 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 599 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 600 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 601 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 602 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 603 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 604 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 605 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 606 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 607 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 608 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 609 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 610 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 611 (1ull << IB_USER_VERBS_CMD_CREATE_AH) | 612 (1ull << IB_USER_VERBS_CMD_MODIFY_AH) | 613 (1ull << IB_USER_VERBS_CMD_QUERY_AH) | 614 (1ull << IB_USER_VERBS_CMD_DESTROY_AH); 615 /* POLL_CQ and REQ_NOTIFY_CQ is directly handled in libbnxt_re */ 616 617 /* Kernel verbs */ 618 ibdev->query_device = bnxt_re_query_device; 619 ibdev->modify_device = bnxt_re_modify_device; 620 621 ibdev->query_port = bnxt_re_query_port; 622 ibdev->get_port_immutable = bnxt_re_get_port_immutable; 623 ibdev->get_dev_fw_str = bnxt_re_query_fw_str; 624 ibdev->query_pkey = bnxt_re_query_pkey; 625 ibdev->get_netdev = bnxt_re_get_netdev; 626 ibdev->add_gid = bnxt_re_add_gid; 627 ibdev->del_gid = bnxt_re_del_gid; 628 ibdev->get_link_layer = bnxt_re_get_link_layer; 629 630 ibdev->alloc_pd = bnxt_re_alloc_pd; 631 ibdev->dealloc_pd = bnxt_re_dealloc_pd; 632 633 ibdev->create_ah = bnxt_re_create_ah; 634 ibdev->modify_ah = bnxt_re_modify_ah; 635 ibdev->query_ah = bnxt_re_query_ah; 636 ibdev->destroy_ah = bnxt_re_destroy_ah; 637 638 ibdev->create_srq = bnxt_re_create_srq; 639 ibdev->modify_srq = bnxt_re_modify_srq; 640 ibdev->query_srq = bnxt_re_query_srq; 641 ibdev->destroy_srq = bnxt_re_destroy_srq; 642 ibdev->post_srq_recv = bnxt_re_post_srq_recv; 643 644 ibdev->create_qp = bnxt_re_create_qp; 645 ibdev->modify_qp = bnxt_re_modify_qp; 646 ibdev->query_qp = bnxt_re_query_qp; 647 ibdev->destroy_qp = bnxt_re_destroy_qp; 648 649 ibdev->post_send = bnxt_re_post_send; 650 ibdev->post_recv = bnxt_re_post_recv; 651 652 ibdev->create_cq = bnxt_re_create_cq; 653 ibdev->destroy_cq = bnxt_re_destroy_cq; 654 ibdev->poll_cq = bnxt_re_poll_cq; 655 ibdev->req_notify_cq = bnxt_re_req_notify_cq; 656 657 ibdev->get_dma_mr = bnxt_re_get_dma_mr; 658 ibdev->dereg_mr = bnxt_re_dereg_mr; 659 ibdev->alloc_mr = bnxt_re_alloc_mr; 660 ibdev->map_mr_sg = bnxt_re_map_mr_sg; 661 662 ibdev->reg_user_mr = bnxt_re_reg_user_mr; 663 ibdev->alloc_ucontext = bnxt_re_alloc_ucontext; 664 ibdev->dealloc_ucontext = bnxt_re_dealloc_ucontext; 665 ibdev->mmap = bnxt_re_mmap; 666 ibdev->get_hw_stats = bnxt_re_ib_get_hw_stats; 667 ibdev->alloc_hw_stats = bnxt_re_ib_alloc_hw_stats; 668 669 rdma_set_device_sysfs_group(ibdev, &bnxt_re_dev_attr_group); 670 ibdev->driver_id = RDMA_DRIVER_BNXT_RE; 671 return ib_register_device(ibdev, "bnxt_re%d", NULL); 672 } 673 674 static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev) 675 { 676 dev_put(rdev->netdev); 677 rdev->netdev = NULL; 678 679 mutex_lock(&bnxt_re_dev_lock); 680 list_del_rcu(&rdev->list); 681 mutex_unlock(&bnxt_re_dev_lock); 682 683 synchronize_rcu(); 684 685 ib_dealloc_device(&rdev->ibdev); 686 /* rdev is gone */ 687 } 688 689 static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev, 690 struct bnxt_en_dev *en_dev) 691 { 692 struct bnxt_re_dev *rdev; 693 694 /* Allocate bnxt_re_dev instance here */ 695 rdev = (struct bnxt_re_dev *)ib_alloc_device(sizeof(*rdev)); 696 if (!rdev) { 697 dev_err(NULL, "%s: bnxt_re_dev allocation failure!", 698 ROCE_DRV_MODULE_NAME); 699 return NULL; 700 } 701 /* Default values */ 702 rdev->netdev = netdev; 703 dev_hold(rdev->netdev); 704 rdev->en_dev = en_dev; 705 rdev->id = rdev->en_dev->pdev->devfn; 706 INIT_LIST_HEAD(&rdev->qp_list); 707 mutex_init(&rdev->qp_lock); 708 atomic_set(&rdev->qp_count, 0); 709 atomic_set(&rdev->cq_count, 0); 710 atomic_set(&rdev->srq_count, 0); 711 atomic_set(&rdev->mr_count, 0); 712 atomic_set(&rdev->mw_count, 0); 713 rdev->cosq[0] = 0xFFFF; 714 rdev->cosq[1] = 0xFFFF; 715 716 mutex_lock(&bnxt_re_dev_lock); 717 list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list); 718 mutex_unlock(&bnxt_re_dev_lock); 719 return rdev; 720 } 721 722 static int bnxt_re_handle_unaffi_async_event(struct creq_func_event 723 *unaffi_async) 724 { 725 switch (unaffi_async->event) { 726 case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR: 727 break; 728 case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR: 729 break; 730 case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR: 731 break; 732 case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR: 733 break; 734 case CREQ_FUNC_EVENT_EVENT_CQ_ERROR: 735 break; 736 case CREQ_FUNC_EVENT_EVENT_TQM_ERROR: 737 break; 738 case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR: 739 break; 740 case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR: 741 break; 742 case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR: 743 break; 744 case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR: 745 break; 746 case CREQ_FUNC_EVENT_EVENT_TIM_ERROR: 747 break; 748 default: 749 return -EINVAL; 750 } 751 return 0; 752 } 753 754 static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event, 755 struct bnxt_re_qp *qp) 756 { 757 struct ib_event event; 758 unsigned int flags; 759 760 if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR) { 761 flags = bnxt_re_lock_cqs(qp); 762 bnxt_qplib_add_flush_qp(&qp->qplib_qp); 763 bnxt_re_unlock_cqs(qp, flags); 764 } 765 766 memset(&event, 0, sizeof(event)); 767 if (qp->qplib_qp.srq) { 768 event.device = &qp->rdev->ibdev; 769 event.element.qp = &qp->ib_qp; 770 event.event = IB_EVENT_QP_LAST_WQE_REACHED; 771 } 772 773 if (event.device && qp->ib_qp.event_handler) 774 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context); 775 776 return 0; 777 } 778 779 static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async, 780 void *obj) 781 { 782 int rc = 0; 783 u8 event; 784 785 if (!obj) 786 return rc; /* QP was already dead, still return success */ 787 788 event = affi_async->event; 789 if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) { 790 struct bnxt_qplib_qp *lib_qp = obj; 791 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp, 792 qplib_qp); 793 rc = bnxt_re_handle_qp_async_event(affi_async, qp); 794 } 795 return rc; 796 } 797 798 static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw, 799 void *aeqe, void *obj) 800 { 801 struct creq_qp_event *affi_async; 802 struct creq_func_event *unaffi_async; 803 u8 type; 804 int rc; 805 806 type = ((struct creq_base *)aeqe)->type; 807 if (type == CREQ_BASE_TYPE_FUNC_EVENT) { 808 unaffi_async = aeqe; 809 rc = bnxt_re_handle_unaffi_async_event(unaffi_async); 810 } else { 811 affi_async = aeqe; 812 rc = bnxt_re_handle_affi_async_event(affi_async, obj); 813 } 814 815 return rc; 816 } 817 818 static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq, 819 struct bnxt_qplib_srq *handle, u8 event) 820 { 821 struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq, 822 qplib_srq); 823 struct ib_event ib_event; 824 int rc = 0; 825 826 if (!srq) { 827 dev_err(NULL, "%s: SRQ is NULL, SRQN not handled", 828 ROCE_DRV_MODULE_NAME); 829 rc = -EINVAL; 830 goto done; 831 } 832 ib_event.device = &srq->rdev->ibdev; 833 ib_event.element.srq = &srq->ib_srq; 834 if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT) 835 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED; 836 else 837 ib_event.event = IB_EVENT_SRQ_ERR; 838 839 if (srq->ib_srq.event_handler) { 840 /* Lock event_handler? */ 841 (*srq->ib_srq.event_handler)(&ib_event, 842 srq->ib_srq.srq_context); 843 } 844 done: 845 return rc; 846 } 847 848 static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq, 849 struct bnxt_qplib_cq *handle) 850 { 851 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq, 852 qplib_cq); 853 854 if (!cq) { 855 dev_err(NULL, "%s: CQ is NULL, CQN not handled", 856 ROCE_DRV_MODULE_NAME); 857 return -EINVAL; 858 } 859 if (cq->ib_cq.comp_handler) { 860 /* Lock comp_handler? */ 861 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context); 862 } 863 864 return 0; 865 } 866 867 static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev) 868 { 869 int i; 870 871 for (i = 1; i < rdev->num_msix; i++) 872 bnxt_qplib_disable_nq(&rdev->nq[i - 1]); 873 874 if (rdev->qplib_res.rcfw) 875 bnxt_qplib_cleanup_res(&rdev->qplib_res); 876 } 877 878 static int bnxt_re_init_res(struct bnxt_re_dev *rdev) 879 { 880 int rc = 0, i; 881 int num_vec_enabled = 0; 882 883 bnxt_qplib_init_res(&rdev->qplib_res); 884 885 for (i = 1; i < rdev->num_msix ; i++) { 886 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1], 887 i - 1, rdev->msix_entries[i].vector, 888 rdev->msix_entries[i].db_offset, 889 &bnxt_re_cqn_handler, 890 &bnxt_re_srqn_handler); 891 892 if (rc) { 893 dev_err(rdev_to_dev(rdev), 894 "Failed to enable NQ with rc = 0x%x", rc); 895 goto fail; 896 } 897 num_vec_enabled++; 898 } 899 return 0; 900 fail: 901 for (i = num_vec_enabled; i >= 0; i--) 902 bnxt_qplib_disable_nq(&rdev->nq[i]); 903 904 return rc; 905 } 906 907 static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev) 908 { 909 int i; 910 911 for (i = 0; i < rdev->num_msix - 1; i++) { 912 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id); 913 bnxt_qplib_free_nq(&rdev->nq[i]); 914 } 915 } 916 917 static void bnxt_re_free_res(struct bnxt_re_dev *rdev) 918 { 919 bnxt_re_free_nq_res(rdev); 920 921 if (rdev->qplib_res.dpi_tbl.max) { 922 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 923 &rdev->qplib_res.dpi_tbl, 924 &rdev->dpi_privileged); 925 } 926 if (rdev->qplib_res.rcfw) { 927 bnxt_qplib_free_res(&rdev->qplib_res); 928 rdev->qplib_res.rcfw = NULL; 929 } 930 } 931 932 static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev) 933 { 934 int rc = 0, i; 935 int num_vec_created = 0; 936 937 /* Configure and allocate resources for qplib */ 938 rdev->qplib_res.rcfw = &rdev->rcfw; 939 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 940 rdev->is_virtfn); 941 if (rc) 942 goto fail; 943 944 rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev, 945 rdev->netdev, &rdev->dev_attr); 946 if (rc) 947 goto fail; 948 949 rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl, 950 &rdev->dpi_privileged, 951 rdev); 952 if (rc) 953 goto dealloc_res; 954 955 for (i = 0; i < rdev->num_msix - 1; i++) { 956 rdev->nq[i].hwq.max_elements = BNXT_RE_MAX_CQ_COUNT + 957 BNXT_RE_MAX_SRQC_COUNT + 2; 958 rc = bnxt_qplib_alloc_nq(rdev->en_dev->pdev, &rdev->nq[i]); 959 if (rc) { 960 dev_err(rdev_to_dev(rdev), "Alloc Failed NQ%d rc:%#x", 961 i, rc); 962 goto free_nq; 963 } 964 rc = bnxt_re_net_ring_alloc 965 (rdev, rdev->nq[i].hwq.pbl[PBL_LVL_0].pg_map_arr, 966 rdev->nq[i].hwq.pbl[rdev->nq[i].hwq.level].pg_count, 967 HWRM_RING_ALLOC_CMPL, 968 BNXT_QPLIB_NQE_MAX_CNT - 1, 969 rdev->msix_entries[i + 1].ring_idx, 970 &rdev->nq[i].ring_id); 971 if (rc) { 972 dev_err(rdev_to_dev(rdev), 973 "Failed to allocate NQ fw id with rc = 0x%x", 974 rc); 975 bnxt_qplib_free_nq(&rdev->nq[i]); 976 goto free_nq; 977 } 978 num_vec_created++; 979 } 980 return 0; 981 free_nq: 982 for (i = num_vec_created; i >= 0; i--) { 983 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id); 984 bnxt_qplib_free_nq(&rdev->nq[i]); 985 } 986 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 987 &rdev->qplib_res.dpi_tbl, 988 &rdev->dpi_privileged); 989 dealloc_res: 990 bnxt_qplib_free_res(&rdev->qplib_res); 991 992 fail: 993 rdev->qplib_res.rcfw = NULL; 994 return rc; 995 } 996 997 static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp, 998 u8 port_num, enum ib_event_type event) 999 { 1000 struct ib_event ib_event; 1001 1002 ib_event.device = ibdev; 1003 if (qp) { 1004 ib_event.element.qp = qp; 1005 ib_event.event = event; 1006 if (qp->event_handler) 1007 qp->event_handler(&ib_event, qp->qp_context); 1008 1009 } else { 1010 ib_event.element.port_num = port_num; 1011 ib_event.event = event; 1012 ib_dispatch_event(&ib_event); 1013 } 1014 } 1015 1016 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02 1017 static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir, 1018 u64 *cid_map) 1019 { 1020 struct hwrm_queue_pri2cos_qcfg_input req = {0}; 1021 struct bnxt *bp = netdev_priv(rdev->netdev); 1022 struct hwrm_queue_pri2cos_qcfg_output resp; 1023 struct bnxt_en_dev *en_dev = rdev->en_dev; 1024 struct bnxt_fw_msg fw_msg; 1025 u32 flags = 0; 1026 u8 *qcfgmap, *tmp_map; 1027 int rc = 0, i; 1028 1029 if (!cid_map) 1030 return -EINVAL; 1031 1032 memset(&fw_msg, 0, sizeof(fw_msg)); 1033 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, 1034 HWRM_QUEUE_PRI2COS_QCFG, -1, -1); 1035 flags |= (dir & 0x01); 1036 flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN; 1037 req.flags = cpu_to_le32(flags); 1038 req.port_id = bp->pf.port_id; 1039 1040 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 1041 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 1042 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 1043 if (rc) 1044 return rc; 1045 1046 if (resp.queue_cfg_info) { 1047 dev_warn(rdev_to_dev(rdev), 1048 "Asymmetric cos queue configuration detected"); 1049 dev_warn(rdev_to_dev(rdev), 1050 " on device, QoS may not be fully functional\n"); 1051 } 1052 qcfgmap = &resp.pri0_cos_queue_id; 1053 tmp_map = (u8 *)cid_map; 1054 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) 1055 tmp_map[i] = qcfgmap[i]; 1056 1057 return rc; 1058 } 1059 1060 static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev, 1061 struct bnxt_re_qp *qp) 1062 { 1063 return (qp->ib_qp.qp_type == IB_QPT_GSI) || (qp == rdev->qp1_sqp); 1064 } 1065 1066 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev) 1067 { 1068 int mask = IB_QP_STATE; 1069 struct ib_qp_attr qp_attr; 1070 struct bnxt_re_qp *qp; 1071 1072 qp_attr.qp_state = IB_QPS_ERR; 1073 mutex_lock(&rdev->qp_lock); 1074 list_for_each_entry(qp, &rdev->qp_list, list) { 1075 /* Modify the state of all QPs except QP1/Shadow QP */ 1076 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) { 1077 if (qp->qplib_qp.state != 1078 CMDQ_MODIFY_QP_NEW_STATE_RESET && 1079 qp->qplib_qp.state != 1080 CMDQ_MODIFY_QP_NEW_STATE_ERR) { 1081 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp, 1082 1, IB_EVENT_QP_FATAL); 1083 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask, 1084 NULL); 1085 } 1086 } 1087 } 1088 mutex_unlock(&rdev->qp_lock); 1089 } 1090 1091 static int bnxt_re_update_gid(struct bnxt_re_dev *rdev) 1092 { 1093 struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl; 1094 struct bnxt_qplib_gid gid; 1095 u16 gid_idx, index; 1096 int rc = 0; 1097 1098 if (!test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) 1099 return 0; 1100 1101 if (!sgid_tbl) { 1102 dev_err(rdev_to_dev(rdev), "QPLIB: SGID table not allocated"); 1103 return -EINVAL; 1104 } 1105 1106 for (index = 0; index < sgid_tbl->active; index++) { 1107 gid_idx = sgid_tbl->hw_id[index]; 1108 1109 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero, 1110 sizeof(bnxt_qplib_gid_zero))) 1111 continue; 1112 /* need to modify the VLAN enable setting of non VLAN GID only 1113 * as setting is done for VLAN GID while adding GID 1114 */ 1115 if (sgid_tbl->vlan[index]) 1116 continue; 1117 1118 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid)); 1119 1120 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx, 1121 rdev->qplib_res.netdev->dev_addr); 1122 } 1123 1124 return rc; 1125 } 1126 1127 static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev) 1128 { 1129 u32 prio_map = 0, tmp_map = 0; 1130 struct net_device *netdev; 1131 struct dcb_app app; 1132 1133 netdev = rdev->netdev; 1134 1135 memset(&app, 0, sizeof(app)); 1136 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE; 1137 app.protocol = ETH_P_IBOE; 1138 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1139 prio_map = tmp_map; 1140 1141 app.selector = IEEE_8021QAZ_APP_SEL_DGRAM; 1142 app.protocol = ROCE_V2_UDP_DPORT; 1143 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1144 prio_map |= tmp_map; 1145 1146 return prio_map; 1147 } 1148 1149 static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq) 1150 { 1151 u16 prio; 1152 u8 id; 1153 1154 for (prio = 0, id = 0; prio < 8; prio++) { 1155 if (prio_map & (1 << prio)) { 1156 cosq[id] = cid_map[prio]; 1157 id++; 1158 if (id == 2) /* Max 2 tcs supported */ 1159 break; 1160 } 1161 } 1162 } 1163 1164 static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev) 1165 { 1166 u8 prio_map = 0; 1167 u64 cid_map; 1168 int rc; 1169 1170 /* Get priority for roce */ 1171 prio_map = bnxt_re_get_priority_mask(rdev); 1172 1173 if (prio_map == rdev->cur_prio_map) 1174 return 0; 1175 rdev->cur_prio_map = prio_map; 1176 /* Get cosq id for this priority */ 1177 rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map); 1178 if (rc) { 1179 dev_warn(rdev_to_dev(rdev), "no cos for p_mask %x\n", prio_map); 1180 return rc; 1181 } 1182 /* Parse CoS IDs for app priority */ 1183 bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq); 1184 1185 /* Config BONO. */ 1186 rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq); 1187 if (rc) { 1188 dev_warn(rdev_to_dev(rdev), "no tc for cos{%x, %x}\n", 1189 rdev->cosq[0], rdev->cosq[1]); 1190 return rc; 1191 } 1192 1193 /* Actual priorities are not programmed as they are already 1194 * done by L2 driver; just enable or disable priority vlan tagging 1195 */ 1196 if ((prio_map == 0 && rdev->qplib_res.prio) || 1197 (prio_map != 0 && !rdev->qplib_res.prio)) { 1198 rdev->qplib_res.prio = prio_map ? true : false; 1199 1200 bnxt_re_update_gid(rdev); 1201 } 1202 1203 return 0; 1204 } 1205 1206 static void bnxt_re_ib_unreg(struct bnxt_re_dev *rdev) 1207 { 1208 int rc; 1209 1210 if (test_and_clear_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) { 1211 /* Cleanup ib dev */ 1212 bnxt_re_unregister_ib(rdev); 1213 } 1214 if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags)) 1215 cancel_delayed_work_sync(&rdev->worker); 1216 1217 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, 1218 &rdev->flags)) 1219 bnxt_re_cleanup_res(rdev); 1220 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags)) 1221 bnxt_re_free_res(rdev); 1222 1223 if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) { 1224 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw); 1225 if (rc) 1226 dev_warn(rdev_to_dev(rdev), 1227 "Failed to deinitialize RCFW: %#x", rc); 1228 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id); 1229 bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx); 1230 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1231 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id); 1232 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1233 } 1234 if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) { 1235 rc = bnxt_re_free_msix(rdev); 1236 if (rc) 1237 dev_warn(rdev_to_dev(rdev), 1238 "Failed to free MSI-X vectors: %#x", rc); 1239 } 1240 if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) { 1241 rc = bnxt_re_unregister_netdev(rdev); 1242 if (rc) 1243 dev_warn(rdev_to_dev(rdev), 1244 "Failed to unregister with netdev: %#x", rc); 1245 } 1246 } 1247 1248 /* worker thread for polling periodic events. Now used for QoS programming*/ 1249 static void bnxt_re_worker(struct work_struct *work) 1250 { 1251 struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev, 1252 worker.work); 1253 1254 bnxt_re_setup_qos(rdev); 1255 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1256 } 1257 1258 static int bnxt_re_ib_reg(struct bnxt_re_dev *rdev) 1259 { 1260 int rc; 1261 1262 bool locked; 1263 1264 /* Acquire rtnl lock through out this function */ 1265 rtnl_lock(); 1266 locked = true; 1267 1268 /* Registered a new RoCE device instance to netdev */ 1269 rc = bnxt_re_register_netdev(rdev); 1270 if (rc) { 1271 pr_err("Failed to register with netedev: %#x\n", rc); 1272 return -EINVAL; 1273 } 1274 set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags); 1275 1276 /* Check whether VF or PF */ 1277 bnxt_re_get_sriov_func_type(rdev); 1278 1279 rc = bnxt_re_request_msix(rdev); 1280 if (rc) { 1281 pr_err("Failed to get MSI-X vectors: %#x\n", rc); 1282 rc = -EINVAL; 1283 goto fail; 1284 } 1285 set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags); 1286 1287 /* Establish RCFW Communication Channel to initialize the context 1288 * memory for the function and all child VFs 1289 */ 1290 rc = bnxt_qplib_alloc_rcfw_channel(rdev->en_dev->pdev, &rdev->rcfw, 1291 BNXT_RE_MAX_QPC_COUNT); 1292 if (rc) { 1293 pr_err("Failed to allocate RCFW Channel: %#x\n", rc); 1294 goto fail; 1295 } 1296 rc = bnxt_re_net_ring_alloc 1297 (rdev, rdev->rcfw.creq.pbl[PBL_LVL_0].pg_map_arr, 1298 rdev->rcfw.creq.pbl[rdev->rcfw.creq.level].pg_count, 1299 HWRM_RING_ALLOC_CMPL, BNXT_QPLIB_CREQE_MAX_CNT - 1, 1300 rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx, 1301 &rdev->rcfw.creq_ring_id); 1302 if (rc) { 1303 pr_err("Failed to allocate CREQ: %#x\n", rc); 1304 goto free_rcfw; 1305 } 1306 rc = bnxt_qplib_enable_rcfw_channel 1307 (rdev->en_dev->pdev, &rdev->rcfw, 1308 rdev->msix_entries[BNXT_RE_AEQ_IDX].vector, 1309 rdev->msix_entries[BNXT_RE_AEQ_IDX].db_offset, 1310 rdev->is_virtfn, &bnxt_re_aeq_handler); 1311 if (rc) { 1312 pr_err("Failed to enable RCFW channel: %#x\n", rc); 1313 goto free_ring; 1314 } 1315 1316 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 1317 rdev->is_virtfn); 1318 if (rc) 1319 goto disable_rcfw; 1320 if (!rdev->is_virtfn) 1321 bnxt_re_set_resource_limits(rdev); 1322 1323 rc = bnxt_qplib_alloc_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx, 0); 1324 if (rc) { 1325 pr_err("Failed to allocate QPLIB context: %#x\n", rc); 1326 goto disable_rcfw; 1327 } 1328 rc = bnxt_re_net_stats_ctx_alloc(rdev, 1329 rdev->qplib_ctx.stats.dma_map, 1330 &rdev->qplib_ctx.stats.fw_id); 1331 if (rc) { 1332 pr_err("Failed to allocate stats context: %#x\n", rc); 1333 goto free_ctx; 1334 } 1335 1336 rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx, 1337 rdev->is_virtfn); 1338 if (rc) { 1339 pr_err("Failed to initialize RCFW: %#x\n", rc); 1340 goto free_sctx; 1341 } 1342 set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags); 1343 1344 /* Resources based on the 'new' device caps */ 1345 rc = bnxt_re_alloc_res(rdev); 1346 if (rc) { 1347 pr_err("Failed to allocate resources: %#x\n", rc); 1348 goto fail; 1349 } 1350 set_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags); 1351 rc = bnxt_re_init_res(rdev); 1352 if (rc) { 1353 pr_err("Failed to initialize resources: %#x\n", rc); 1354 goto fail; 1355 } 1356 1357 set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags); 1358 1359 if (!rdev->is_virtfn) { 1360 rc = bnxt_re_setup_qos(rdev); 1361 if (rc) 1362 pr_info("RoCE priority not yet configured\n"); 1363 1364 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker); 1365 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags); 1366 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1367 } 1368 1369 rtnl_unlock(); 1370 locked = false; 1371 1372 /* Register ib dev */ 1373 rc = bnxt_re_register_ib(rdev); 1374 if (rc) { 1375 pr_err("Failed to register with IB: %#x\n", rc); 1376 goto fail; 1377 } 1378 set_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags); 1379 dev_info(rdev_to_dev(rdev), "Device registered successfully"); 1380 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1381 &rdev->active_width); 1382 set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags); 1383 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_PORT_ACTIVE); 1384 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, IB_EVENT_GID_CHANGE); 1385 1386 return 0; 1387 free_sctx: 1388 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id); 1389 free_ctx: 1390 bnxt_qplib_free_ctx(rdev->en_dev->pdev, &rdev->qplib_ctx); 1391 disable_rcfw: 1392 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1393 free_ring: 1394 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq_ring_id); 1395 free_rcfw: 1396 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1397 fail: 1398 if (!locked) 1399 rtnl_lock(); 1400 bnxt_re_ib_unreg(rdev); 1401 rtnl_unlock(); 1402 1403 return rc; 1404 } 1405 1406 static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev) 1407 { 1408 struct bnxt_en_dev *en_dev = rdev->en_dev; 1409 struct net_device *netdev = rdev->netdev; 1410 1411 bnxt_re_dev_remove(rdev); 1412 1413 if (netdev) 1414 bnxt_re_dev_unprobe(netdev, en_dev); 1415 } 1416 1417 static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev) 1418 { 1419 struct bnxt_en_dev *en_dev; 1420 int rc = 0; 1421 1422 if (!is_bnxt_re_dev(netdev)) 1423 return -ENODEV; 1424 1425 en_dev = bnxt_re_dev_probe(netdev); 1426 if (IS_ERR(en_dev)) { 1427 if (en_dev != ERR_PTR(-ENODEV)) 1428 pr_err("%s: Failed to probe\n", ROCE_DRV_MODULE_NAME); 1429 rc = PTR_ERR(en_dev); 1430 goto exit; 1431 } 1432 *rdev = bnxt_re_dev_add(netdev, en_dev); 1433 if (!*rdev) { 1434 rc = -ENOMEM; 1435 bnxt_re_dev_unprobe(netdev, en_dev); 1436 goto exit; 1437 } 1438 exit: 1439 return rc; 1440 } 1441 1442 static void bnxt_re_remove_one(struct bnxt_re_dev *rdev) 1443 { 1444 pci_dev_put(rdev->en_dev->pdev); 1445 } 1446 1447 /* Handle all deferred netevents tasks */ 1448 static void bnxt_re_task(struct work_struct *work) 1449 { 1450 struct bnxt_re_work *re_work; 1451 struct bnxt_re_dev *rdev; 1452 int rc = 0; 1453 1454 re_work = container_of(work, struct bnxt_re_work, work); 1455 rdev = re_work->rdev; 1456 1457 if (re_work->event != NETDEV_REGISTER && 1458 !test_bit(BNXT_RE_FLAG_IBDEV_REGISTERED, &rdev->flags)) 1459 return; 1460 1461 switch (re_work->event) { 1462 case NETDEV_REGISTER: 1463 rc = bnxt_re_ib_reg(rdev); 1464 if (rc) { 1465 dev_err(rdev_to_dev(rdev), 1466 "Failed to register with IB: %#x", rc); 1467 bnxt_re_remove_one(rdev); 1468 bnxt_re_dev_unreg(rdev); 1469 } 1470 break; 1471 case NETDEV_UP: 1472 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1473 IB_EVENT_PORT_ACTIVE); 1474 break; 1475 case NETDEV_DOWN: 1476 bnxt_re_dev_stop(rdev); 1477 break; 1478 case NETDEV_CHANGE: 1479 if (!netif_carrier_ok(rdev->netdev)) 1480 bnxt_re_dev_stop(rdev); 1481 else if (netif_carrier_ok(rdev->netdev)) 1482 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1483 IB_EVENT_PORT_ACTIVE); 1484 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1485 &rdev->active_width); 1486 break; 1487 default: 1488 break; 1489 } 1490 smp_mb__before_atomic(); 1491 atomic_dec(&rdev->sched_count); 1492 kfree(re_work); 1493 } 1494 1495 static void bnxt_re_init_one(struct bnxt_re_dev *rdev) 1496 { 1497 pci_dev_get(rdev->en_dev->pdev); 1498 } 1499 1500 /* 1501 * "Notifier chain callback can be invoked for the same chain from 1502 * different CPUs at the same time". 1503 * 1504 * For cases when the netdev is already present, our call to the 1505 * register_netdevice_notifier() will actually get the rtnl_lock() 1506 * before sending NETDEV_REGISTER and (if up) NETDEV_UP 1507 * events. 1508 * 1509 * But for cases when the netdev is not already present, the notifier 1510 * chain is subjected to be invoked from different CPUs simultaneously. 1511 * 1512 * This is protected by the netdev_mutex. 1513 */ 1514 static int bnxt_re_netdev_event(struct notifier_block *notifier, 1515 unsigned long event, void *ptr) 1516 { 1517 struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr); 1518 struct bnxt_re_work *re_work; 1519 struct bnxt_re_dev *rdev; 1520 int rc = 0; 1521 bool sch_work = false; 1522 1523 real_dev = rdma_vlan_dev_real_dev(netdev); 1524 if (!real_dev) 1525 real_dev = netdev; 1526 1527 rdev = bnxt_re_from_netdev(real_dev); 1528 if (!rdev && event != NETDEV_REGISTER) 1529 goto exit; 1530 if (real_dev != netdev) 1531 goto exit; 1532 1533 switch (event) { 1534 case NETDEV_REGISTER: 1535 if (rdev) 1536 break; 1537 rc = bnxt_re_dev_reg(&rdev, real_dev); 1538 if (rc == -ENODEV) 1539 break; 1540 if (rc) { 1541 pr_err("Failed to register with the device %s: %#x\n", 1542 real_dev->name, rc); 1543 break; 1544 } 1545 bnxt_re_init_one(rdev); 1546 sch_work = true; 1547 break; 1548 1549 case NETDEV_UNREGISTER: 1550 /* netdev notifier will call NETDEV_UNREGISTER again later since 1551 * we are still holding the reference to the netdev 1552 */ 1553 if (atomic_read(&rdev->sched_count) > 0) 1554 goto exit; 1555 bnxt_re_ib_unreg(rdev); 1556 bnxt_re_remove_one(rdev); 1557 bnxt_re_dev_unreg(rdev); 1558 break; 1559 1560 default: 1561 sch_work = true; 1562 break; 1563 } 1564 if (sch_work) { 1565 /* Allocate for the deferred task */ 1566 re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC); 1567 if (re_work) { 1568 re_work->rdev = rdev; 1569 re_work->event = event; 1570 re_work->vlan_dev = (real_dev == netdev ? 1571 NULL : netdev); 1572 INIT_WORK(&re_work->work, bnxt_re_task); 1573 atomic_inc(&rdev->sched_count); 1574 queue_work(bnxt_re_wq, &re_work->work); 1575 } 1576 } 1577 1578 exit: 1579 return NOTIFY_DONE; 1580 } 1581 1582 static struct notifier_block bnxt_re_netdev_notifier = { 1583 .notifier_call = bnxt_re_netdev_event 1584 }; 1585 1586 static int __init bnxt_re_mod_init(void) 1587 { 1588 int rc = 0; 1589 1590 pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version); 1591 1592 bnxt_re_wq = create_singlethread_workqueue("bnxt_re"); 1593 if (!bnxt_re_wq) 1594 return -ENOMEM; 1595 1596 INIT_LIST_HEAD(&bnxt_re_dev_list); 1597 1598 rc = register_netdevice_notifier(&bnxt_re_netdev_notifier); 1599 if (rc) { 1600 pr_err("%s: Cannot register to netdevice_notifier", 1601 ROCE_DRV_MODULE_NAME); 1602 goto err_netdev; 1603 } 1604 return 0; 1605 1606 err_netdev: 1607 destroy_workqueue(bnxt_re_wq); 1608 1609 return rc; 1610 } 1611 1612 static void __exit bnxt_re_mod_exit(void) 1613 { 1614 struct bnxt_re_dev *rdev, *next; 1615 LIST_HEAD(to_be_deleted); 1616 1617 mutex_lock(&bnxt_re_dev_lock); 1618 /* Free all adapter allocated resources */ 1619 if (!list_empty(&bnxt_re_dev_list)) 1620 list_splice_init(&bnxt_re_dev_list, &to_be_deleted); 1621 mutex_unlock(&bnxt_re_dev_lock); 1622 /* 1623 * Cleanup the devices in reverse order so that the VF device 1624 * cleanup is done before PF cleanup 1625 */ 1626 list_for_each_entry_safe_reverse(rdev, next, &to_be_deleted, list) { 1627 dev_info(rdev_to_dev(rdev), "Unregistering Device"); 1628 /* 1629 * Flush out any scheduled tasks before destroying the 1630 * resources 1631 */ 1632 flush_workqueue(bnxt_re_wq); 1633 bnxt_re_dev_stop(rdev); 1634 /* Acquire the rtnl_lock as the L2 resources are freed here */ 1635 rtnl_lock(); 1636 bnxt_re_ib_unreg(rdev); 1637 rtnl_unlock(); 1638 bnxt_re_remove_one(rdev); 1639 bnxt_re_dev_unreg(rdev); 1640 } 1641 unregister_netdevice_notifier(&bnxt_re_netdev_notifier); 1642 if (bnxt_re_wq) 1643 destroy_workqueue(bnxt_re_wq); 1644 } 1645 1646 module_init(bnxt_re_mod_init); 1647 module_exit(bnxt_re_mod_exit); 1648