1 /* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Main component of the bnxt_re driver 37 */ 38 39 #include <linux/module.h> 40 #include <linux/netdevice.h> 41 #include <linux/ethtool.h> 42 #include <linux/mutex.h> 43 #include <linux/list.h> 44 #include <linux/rculist.h> 45 #include <linux/spinlock.h> 46 #include <linux/pci.h> 47 #include <net/dcbnl.h> 48 #include <net/ipv6.h> 49 #include <net/addrconf.h> 50 #include <linux/if_ether.h> 51 52 #include <rdma/ib_verbs.h> 53 #include <rdma/ib_user_verbs.h> 54 #include <rdma/ib_umem.h> 55 #include <rdma/ib_addr.h> 56 57 #include "bnxt_ulp.h" 58 #include "roce_hsi.h" 59 #include "qplib_res.h" 60 #include "qplib_sp.h" 61 #include "qplib_fp.h" 62 #include "qplib_rcfw.h" 63 #include "bnxt_re.h" 64 #include "ib_verbs.h" 65 #include <rdma/bnxt_re-abi.h> 66 #include "bnxt.h" 67 #include "hw_counters.h" 68 69 static char version[] = 70 BNXT_RE_DESC "\n"; 71 72 MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>"); 73 MODULE_DESCRIPTION(BNXT_RE_DESC " Driver"); 74 MODULE_LICENSE("Dual BSD/GPL"); 75 76 /* globals */ 77 static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list); 78 /* Mutex to protect the list of bnxt_re devices added */ 79 static DEFINE_MUTEX(bnxt_re_dev_lock); 80 static struct workqueue_struct *bnxt_re_wq; 81 static void bnxt_re_remove_device(struct bnxt_re_dev *rdev); 82 static void bnxt_re_dealloc_driver(struct ib_device *ib_dev); 83 static void bnxt_re_stop_irq(void *handle); 84 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev); 85 86 static void bnxt_re_set_drv_mode(struct bnxt_re_dev *rdev, u8 mode) 87 { 88 struct bnxt_qplib_chip_ctx *cctx; 89 90 cctx = rdev->chip_ctx; 91 cctx->modes.wqe_mode = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ? 92 mode : BNXT_QPLIB_WQE_MODE_STATIC; 93 } 94 95 static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev) 96 { 97 struct bnxt_qplib_chip_ctx *chip_ctx; 98 99 if (!rdev->chip_ctx) 100 return; 101 chip_ctx = rdev->chip_ctx; 102 rdev->chip_ctx = NULL; 103 rdev->rcfw.res = NULL; 104 rdev->qplib_res.cctx = NULL; 105 rdev->qplib_res.pdev = NULL; 106 rdev->qplib_res.netdev = NULL; 107 kfree(chip_ctx); 108 } 109 110 static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev, u8 wqe_mode) 111 { 112 struct bnxt_qplib_chip_ctx *chip_ctx; 113 struct bnxt_en_dev *en_dev; 114 struct bnxt *bp; 115 116 en_dev = rdev->en_dev; 117 bp = netdev_priv(en_dev->net); 118 119 chip_ctx = kzalloc(sizeof(*chip_ctx), GFP_KERNEL); 120 if (!chip_ctx) 121 return -ENOMEM; 122 chip_ctx->chip_num = bp->chip_num; 123 124 rdev->chip_ctx = chip_ctx; 125 /* rest members to follow eventually */ 126 127 rdev->qplib_res.cctx = rdev->chip_ctx; 128 rdev->rcfw.res = &rdev->qplib_res; 129 130 bnxt_re_set_drv_mode(rdev, wqe_mode); 131 return 0; 132 } 133 134 /* SR-IOV helper functions */ 135 136 static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev) 137 { 138 struct bnxt *bp; 139 140 bp = netdev_priv(rdev->en_dev->net); 141 if (BNXT_VF(bp)) 142 rdev->is_virtfn = 1; 143 } 144 145 /* Set the maximum number of each resource that the driver actually wants 146 * to allocate. This may be up to the maximum number the firmware has 147 * reserved for the function. The driver may choose to allocate fewer 148 * resources than the firmware maximum. 149 */ 150 static void bnxt_re_limit_pf_res(struct bnxt_re_dev *rdev) 151 { 152 struct bnxt_qplib_dev_attr *attr; 153 struct bnxt_qplib_ctx *ctx; 154 int i; 155 156 attr = &rdev->dev_attr; 157 ctx = &rdev->qplib_ctx; 158 159 ctx->qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT, 160 attr->max_qp); 161 ctx->mrw_count = BNXT_RE_MAX_MRW_COUNT_256K; 162 /* Use max_mr from fw since max_mrw does not get set */ 163 ctx->mrw_count = min_t(u32, ctx->mrw_count, attr->max_mr); 164 ctx->srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT, 165 attr->max_srq); 166 ctx->cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, attr->max_cq); 167 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) 168 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++) 169 rdev->qplib_ctx.tqm_ctx.qcount[i] = 170 rdev->dev_attr.tqm_alloc_reqs[i]; 171 } 172 173 static void bnxt_re_limit_vf_res(struct bnxt_qplib_ctx *qplib_ctx, u32 num_vf) 174 { 175 struct bnxt_qplib_vf_res *vf_res; 176 u32 mrws = 0; 177 u32 vf_pct; 178 u32 nvfs; 179 180 vf_res = &qplib_ctx->vf_res; 181 /* 182 * Reserve a set of resources for the PF. Divide the remaining 183 * resources among the VFs 184 */ 185 vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF; 186 nvfs = num_vf; 187 num_vf = 100 * num_vf; 188 vf_res->max_qp_per_vf = (qplib_ctx->qpc_count * vf_pct) / num_vf; 189 vf_res->max_srq_per_vf = (qplib_ctx->srqc_count * vf_pct) / num_vf; 190 vf_res->max_cq_per_vf = (qplib_ctx->cq_count * vf_pct) / num_vf; 191 /* 192 * The driver allows many more MRs than other resources. If the 193 * firmware does also, then reserve a fixed amount for the PF and 194 * divide the rest among VFs. VFs may use many MRs for NFS 195 * mounts, ISER, NVME applications, etc. If the firmware severely 196 * restricts the number of MRs, then let PF have half and divide 197 * the rest among VFs, as for the other resource types. 198 */ 199 if (qplib_ctx->mrw_count < BNXT_RE_MAX_MRW_COUNT_64K) { 200 mrws = qplib_ctx->mrw_count * vf_pct; 201 nvfs = num_vf; 202 } else { 203 mrws = qplib_ctx->mrw_count - BNXT_RE_RESVD_MR_FOR_PF; 204 } 205 vf_res->max_mrw_per_vf = (mrws / nvfs); 206 vf_res->max_gid_per_vf = BNXT_RE_MAX_GID_PER_VF; 207 } 208 209 static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev) 210 { 211 u32 num_vfs; 212 213 memset(&rdev->qplib_ctx.vf_res, 0, sizeof(struct bnxt_qplib_vf_res)); 214 bnxt_re_limit_pf_res(rdev); 215 216 num_vfs = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ? 217 BNXT_RE_GEN_P5_MAX_VF : rdev->num_vfs; 218 if (num_vfs) 219 bnxt_re_limit_vf_res(&rdev->qplib_ctx, num_vfs); 220 } 221 222 /* for handling bnxt_en callbacks later */ 223 static void bnxt_re_stop(void *p) 224 { 225 struct bnxt_re_dev *rdev = p; 226 struct bnxt *bp; 227 228 if (!rdev) 229 return; 230 ASSERT_RTNL(); 231 232 /* L2 driver invokes this callback during device error/crash or device 233 * reset. Current RoCE driver doesn't recover the device in case of 234 * error. Handle the error by dispatching fatal events to all qps 235 * ie. by calling bnxt_re_dev_stop and release the MSIx vectors as 236 * L2 driver want to modify the MSIx table. 237 */ 238 bp = netdev_priv(rdev->netdev); 239 240 ibdev_info(&rdev->ibdev, "Handle device stop call from L2 driver"); 241 /* Check the current device state from L2 structure and move the 242 * device to detached state if FW_FATAL_COND is set. 243 * This prevents more commands to HW during clean-up, 244 * in case the device is already in error. 245 */ 246 if (test_bit(BNXT_STATE_FW_FATAL_COND, &bp->state)) 247 set_bit(ERR_DEVICE_DETACHED, &rdev->rcfw.cmdq.flags); 248 249 bnxt_re_dev_stop(rdev); 250 bnxt_re_stop_irq(rdev); 251 /* Move the device states to detached and avoid sending any more 252 * commands to HW 253 */ 254 set_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags); 255 set_bit(ERR_DEVICE_DETACHED, &rdev->rcfw.cmdq.flags); 256 } 257 258 static void bnxt_re_start(void *p) 259 { 260 } 261 262 static void bnxt_re_sriov_config(void *p, int num_vfs) 263 { 264 struct bnxt_re_dev *rdev = p; 265 266 if (!rdev) 267 return; 268 269 if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags)) 270 return; 271 rdev->num_vfs = num_vfs; 272 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) { 273 bnxt_re_set_resource_limits(rdev); 274 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw, 275 &rdev->qplib_ctx); 276 } 277 } 278 279 static void bnxt_re_shutdown(void *p) 280 { 281 struct bnxt_re_dev *rdev = p; 282 283 if (!rdev) 284 return; 285 ASSERT_RTNL(); 286 /* Release the MSIx vectors before queuing unregister */ 287 bnxt_re_stop_irq(rdev); 288 ib_unregister_device_queued(&rdev->ibdev); 289 } 290 291 static void bnxt_re_stop_irq(void *handle) 292 { 293 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; 294 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; 295 struct bnxt_qplib_nq *nq; 296 int indx; 297 298 for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) { 299 nq = &rdev->nq[indx - 1]; 300 bnxt_qplib_nq_stop_irq(nq, false); 301 } 302 303 bnxt_qplib_rcfw_stop_irq(rcfw, false); 304 } 305 306 static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent) 307 { 308 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; 309 struct bnxt_msix_entry *msix_ent = rdev->msix_entries; 310 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; 311 struct bnxt_qplib_nq *nq; 312 int indx, rc; 313 314 if (!ent) { 315 /* Not setting the f/w timeout bit in rcfw. 316 * During the driver unload the first command 317 * to f/w will timeout and that will set the 318 * timeout bit. 319 */ 320 ibdev_err(&rdev->ibdev, "Failed to re-start IRQs\n"); 321 return; 322 } 323 324 /* Vectors may change after restart, so update with new vectors 325 * in device sctructure. 326 */ 327 for (indx = 0; indx < rdev->num_msix; indx++) 328 rdev->msix_entries[indx].vector = ent[indx].vector; 329 330 bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector, 331 false); 332 for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) { 333 nq = &rdev->nq[indx - 1]; 334 rc = bnxt_qplib_nq_start_irq(nq, indx - 1, 335 msix_ent[indx].vector, false); 336 if (rc) 337 ibdev_warn(&rdev->ibdev, "Failed to reinit NQ index %d\n", 338 indx - 1); 339 } 340 } 341 342 static struct bnxt_ulp_ops bnxt_re_ulp_ops = { 343 .ulp_async_notifier = NULL, 344 .ulp_stop = bnxt_re_stop, 345 .ulp_start = bnxt_re_start, 346 .ulp_sriov_config = bnxt_re_sriov_config, 347 .ulp_shutdown = bnxt_re_shutdown, 348 .ulp_irq_stop = bnxt_re_stop_irq, 349 .ulp_irq_restart = bnxt_re_start_irq 350 }; 351 352 /* RoCE -> Net driver */ 353 354 /* Driver registration routines used to let the networking driver (bnxt_en) 355 * to know that the RoCE driver is now installed 356 */ 357 static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev) 358 { 359 struct bnxt_en_dev *en_dev; 360 int rc; 361 362 if (!rdev) 363 return -EINVAL; 364 365 en_dev = rdev->en_dev; 366 367 rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev, 368 BNXT_ROCE_ULP); 369 return rc; 370 } 371 372 static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev) 373 { 374 struct bnxt_en_dev *en_dev; 375 int rc = 0; 376 377 if (!rdev) 378 return -EINVAL; 379 380 en_dev = rdev->en_dev; 381 382 rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP, 383 &bnxt_re_ulp_ops, rdev); 384 rdev->qplib_res.pdev = rdev->en_dev->pdev; 385 return rc; 386 } 387 388 static int bnxt_re_free_msix(struct bnxt_re_dev *rdev) 389 { 390 struct bnxt_en_dev *en_dev; 391 int rc; 392 393 if (!rdev) 394 return -EINVAL; 395 396 en_dev = rdev->en_dev; 397 398 399 rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP); 400 401 return rc; 402 } 403 404 static int bnxt_re_request_msix(struct bnxt_re_dev *rdev) 405 { 406 int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got; 407 struct bnxt_en_dev *en_dev; 408 409 if (!rdev) 410 return -EINVAL; 411 412 en_dev = rdev->en_dev; 413 414 num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus()); 415 416 num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP, 417 rdev->msix_entries, 418 num_msix_want); 419 if (num_msix_got < BNXT_RE_MIN_MSIX) { 420 rc = -EINVAL; 421 goto done; 422 } 423 if (num_msix_got != num_msix_want) { 424 ibdev_warn(&rdev->ibdev, 425 "Requested %d MSI-X vectors, got %d\n", 426 num_msix_want, num_msix_got); 427 } 428 rdev->num_msix = num_msix_got; 429 done: 430 return rc; 431 } 432 433 static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr, 434 u16 opcd, u16 crid, u16 trid) 435 { 436 hdr->req_type = cpu_to_le16(opcd); 437 hdr->cmpl_ring = cpu_to_le16(crid); 438 hdr->target_id = cpu_to_le16(trid); 439 } 440 441 static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg, 442 int msg_len, void *resp, int resp_max_len, 443 int timeout) 444 { 445 fw_msg->msg = msg; 446 fw_msg->msg_len = msg_len; 447 fw_msg->resp = resp; 448 fw_msg->resp_max_len = resp_max_len; 449 fw_msg->timeout = timeout; 450 } 451 452 static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, 453 u16 fw_ring_id, int type) 454 { 455 struct bnxt_en_dev *en_dev = rdev->en_dev; 456 struct hwrm_ring_free_input req = {0}; 457 struct hwrm_ring_free_output resp; 458 struct bnxt_fw_msg fw_msg; 459 int rc = -EINVAL; 460 461 if (!en_dev) 462 return rc; 463 464 if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags)) 465 return 0; 466 467 memset(&fw_msg, 0, sizeof(fw_msg)); 468 469 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1); 470 req.ring_type = type; 471 req.ring_id = cpu_to_le16(fw_ring_id); 472 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 473 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 474 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 475 if (rc) 476 ibdev_err(&rdev->ibdev, "Failed to free HW ring:%d :%#x", 477 req.ring_id, rc); 478 return rc; 479 } 480 481 static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, 482 struct bnxt_re_ring_attr *ring_attr, 483 u16 *fw_ring_id) 484 { 485 struct bnxt_en_dev *en_dev = rdev->en_dev; 486 struct hwrm_ring_alloc_input req = {0}; 487 struct hwrm_ring_alloc_output resp; 488 struct bnxt_fw_msg fw_msg; 489 int rc = -EINVAL; 490 491 if (!en_dev) 492 return rc; 493 494 memset(&fw_msg, 0, sizeof(fw_msg)); 495 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1); 496 req.enables = 0; 497 req.page_tbl_addr = cpu_to_le64(ring_attr->dma_arr[0]); 498 if (ring_attr->pages > 1) { 499 /* Page size is in log2 units */ 500 req.page_size = BNXT_PAGE_SHIFT; 501 req.page_tbl_depth = 1; 502 } 503 req.fbo = 0; 504 /* Association of ring index with doorbell index and MSIX number */ 505 req.logical_id = cpu_to_le16(ring_attr->lrid); 506 req.length = cpu_to_le32(ring_attr->depth + 1); 507 req.ring_type = ring_attr->type; 508 req.int_mode = ring_attr->mode; 509 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 510 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 511 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 512 if (!rc) 513 *fw_ring_id = le16_to_cpu(resp.ring_id); 514 515 return rc; 516 } 517 518 static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev, 519 u32 fw_stats_ctx_id) 520 { 521 struct bnxt_en_dev *en_dev = rdev->en_dev; 522 struct hwrm_stat_ctx_free_input req = {0}; 523 struct bnxt_fw_msg fw_msg; 524 int rc = -EINVAL; 525 526 if (!en_dev) 527 return rc; 528 529 if (test_bit(BNXT_RE_FLAG_ERR_DEVICE_DETACHED, &rdev->flags)) 530 return 0; 531 532 memset(&fw_msg, 0, sizeof(fw_msg)); 533 534 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1); 535 req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id); 536 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req, 537 sizeof(req), DFLT_HWRM_CMD_TIMEOUT); 538 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 539 if (rc) 540 ibdev_err(&rdev->ibdev, "Failed to free HW stats context %#x", 541 rc); 542 543 return rc; 544 } 545 546 static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev, 547 dma_addr_t dma_map, 548 u32 *fw_stats_ctx_id) 549 { 550 struct hwrm_stat_ctx_alloc_output resp = {0}; 551 struct hwrm_stat_ctx_alloc_input req = {0}; 552 struct bnxt_en_dev *en_dev = rdev->en_dev; 553 struct bnxt_fw_msg fw_msg; 554 int rc = -EINVAL; 555 556 *fw_stats_ctx_id = INVALID_STATS_CTX_ID; 557 558 if (!en_dev) 559 return rc; 560 561 memset(&fw_msg, 0, sizeof(fw_msg)); 562 563 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1); 564 req.update_period_ms = cpu_to_le32(1000); 565 req.stats_dma_addr = cpu_to_le64(dma_map); 566 req.stats_dma_length = cpu_to_le16(sizeof(struct ctx_hw_stats_ext)); 567 req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE; 568 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 569 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 570 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 571 if (!rc) 572 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id); 573 574 return rc; 575 } 576 577 /* Device */ 578 579 static bool is_bnxt_re_dev(struct net_device *netdev) 580 { 581 struct ethtool_drvinfo drvinfo; 582 583 if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) { 584 memset(&drvinfo, 0, sizeof(drvinfo)); 585 netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo); 586 587 if (strcmp(drvinfo.driver, "bnxt_en")) 588 return false; 589 return true; 590 } 591 return false; 592 } 593 594 static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev) 595 { 596 struct ib_device *ibdev = 597 ib_device_get_by_netdev(netdev, RDMA_DRIVER_BNXT_RE); 598 if (!ibdev) 599 return NULL; 600 601 return container_of(ibdev, struct bnxt_re_dev, ibdev); 602 } 603 604 static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev) 605 { 606 struct bnxt_en_dev *en_dev; 607 struct pci_dev *pdev; 608 609 en_dev = bnxt_ulp_probe(netdev); 610 if (IS_ERR(en_dev)) 611 return en_dev; 612 613 pdev = en_dev->pdev; 614 if (!pdev) 615 return ERR_PTR(-EINVAL); 616 617 if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) { 618 dev_info(&pdev->dev, 619 "%s: probe error: RoCE is not supported on this device", 620 ROCE_DRV_MODULE_NAME); 621 return ERR_PTR(-ENODEV); 622 } 623 624 dev_hold(netdev); 625 626 return en_dev; 627 } 628 629 static ssize_t hw_rev_show(struct device *device, struct device_attribute *attr, 630 char *buf) 631 { 632 struct bnxt_re_dev *rdev = 633 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev); 634 635 return sysfs_emit(buf, "0x%x\n", rdev->en_dev->pdev->vendor); 636 } 637 static DEVICE_ATTR_RO(hw_rev); 638 639 static ssize_t hca_type_show(struct device *device, 640 struct device_attribute *attr, char *buf) 641 { 642 struct bnxt_re_dev *rdev = 643 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev); 644 645 return sysfs_emit(buf, "%s\n", rdev->ibdev.node_desc); 646 } 647 static DEVICE_ATTR_RO(hca_type); 648 649 static struct attribute *bnxt_re_attributes[] = { 650 &dev_attr_hw_rev.attr, 651 &dev_attr_hca_type.attr, 652 NULL 653 }; 654 655 static const struct attribute_group bnxt_re_dev_attr_group = { 656 .attrs = bnxt_re_attributes, 657 }; 658 659 static const struct ib_device_ops bnxt_re_dev_ops = { 660 .owner = THIS_MODULE, 661 .driver_id = RDMA_DRIVER_BNXT_RE, 662 .uverbs_abi_ver = BNXT_RE_ABI_VERSION, 663 664 .add_gid = bnxt_re_add_gid, 665 .alloc_hw_stats = bnxt_re_ib_alloc_hw_stats, 666 .alloc_mr = bnxt_re_alloc_mr, 667 .alloc_pd = bnxt_re_alloc_pd, 668 .alloc_ucontext = bnxt_re_alloc_ucontext, 669 .create_ah = bnxt_re_create_ah, 670 .create_cq = bnxt_re_create_cq, 671 .create_qp = bnxt_re_create_qp, 672 .create_srq = bnxt_re_create_srq, 673 .create_user_ah = bnxt_re_create_ah, 674 .dealloc_driver = bnxt_re_dealloc_driver, 675 .dealloc_pd = bnxt_re_dealloc_pd, 676 .dealloc_ucontext = bnxt_re_dealloc_ucontext, 677 .del_gid = bnxt_re_del_gid, 678 .dereg_mr = bnxt_re_dereg_mr, 679 .destroy_ah = bnxt_re_destroy_ah, 680 .destroy_cq = bnxt_re_destroy_cq, 681 .destroy_qp = bnxt_re_destroy_qp, 682 .destroy_srq = bnxt_re_destroy_srq, 683 .get_dev_fw_str = bnxt_re_query_fw_str, 684 .get_dma_mr = bnxt_re_get_dma_mr, 685 .get_hw_stats = bnxt_re_ib_get_hw_stats, 686 .get_link_layer = bnxt_re_get_link_layer, 687 .get_port_immutable = bnxt_re_get_port_immutable, 688 .map_mr_sg = bnxt_re_map_mr_sg, 689 .mmap = bnxt_re_mmap, 690 .modify_ah = bnxt_re_modify_ah, 691 .modify_qp = bnxt_re_modify_qp, 692 .modify_srq = bnxt_re_modify_srq, 693 .poll_cq = bnxt_re_poll_cq, 694 .post_recv = bnxt_re_post_recv, 695 .post_send = bnxt_re_post_send, 696 .post_srq_recv = bnxt_re_post_srq_recv, 697 .query_ah = bnxt_re_query_ah, 698 .query_device = bnxt_re_query_device, 699 .query_pkey = bnxt_re_query_pkey, 700 .query_port = bnxt_re_query_port, 701 .query_qp = bnxt_re_query_qp, 702 .query_srq = bnxt_re_query_srq, 703 .reg_user_mr = bnxt_re_reg_user_mr, 704 .req_notify_cq = bnxt_re_req_notify_cq, 705 INIT_RDMA_OBJ_SIZE(ib_ah, bnxt_re_ah, ib_ah), 706 INIT_RDMA_OBJ_SIZE(ib_cq, bnxt_re_cq, ib_cq), 707 INIT_RDMA_OBJ_SIZE(ib_pd, bnxt_re_pd, ib_pd), 708 INIT_RDMA_OBJ_SIZE(ib_srq, bnxt_re_srq, ib_srq), 709 INIT_RDMA_OBJ_SIZE(ib_ucontext, bnxt_re_ucontext, ib_uctx), 710 }; 711 712 static int bnxt_re_register_ib(struct bnxt_re_dev *rdev) 713 { 714 struct ib_device *ibdev = &rdev->ibdev; 715 int ret; 716 717 /* ib device init */ 718 ibdev->node_type = RDMA_NODE_IB_CA; 719 strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA", 720 strlen(BNXT_RE_DESC) + 5); 721 ibdev->phys_port_cnt = 1; 722 723 bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid); 724 725 ibdev->num_comp_vectors = rdev->num_msix - 1; 726 ibdev->dev.parent = &rdev->en_dev->pdev->dev; 727 ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY; 728 729 rdma_set_device_sysfs_group(ibdev, &bnxt_re_dev_attr_group); 730 ib_set_device_ops(ibdev, &bnxt_re_dev_ops); 731 ret = ib_device_set_netdev(&rdev->ibdev, rdev->netdev, 1); 732 if (ret) 733 return ret; 734 735 dma_set_max_seg_size(&rdev->en_dev->pdev->dev, UINT_MAX); 736 return ib_register_device(ibdev, "bnxt_re%d", &rdev->en_dev->pdev->dev); 737 } 738 739 static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev) 740 { 741 dev_put(rdev->netdev); 742 rdev->netdev = NULL; 743 mutex_lock(&bnxt_re_dev_lock); 744 list_del_rcu(&rdev->list); 745 mutex_unlock(&bnxt_re_dev_lock); 746 747 synchronize_rcu(); 748 } 749 750 static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev, 751 struct bnxt_en_dev *en_dev) 752 { 753 struct bnxt_re_dev *rdev; 754 755 /* Allocate bnxt_re_dev instance here */ 756 rdev = ib_alloc_device(bnxt_re_dev, ibdev); 757 if (!rdev) { 758 ibdev_err(NULL, "%s: bnxt_re_dev allocation failure!", 759 ROCE_DRV_MODULE_NAME); 760 return NULL; 761 } 762 /* Default values */ 763 rdev->netdev = netdev; 764 dev_hold(rdev->netdev); 765 rdev->en_dev = en_dev; 766 rdev->id = rdev->en_dev->pdev->devfn; 767 INIT_LIST_HEAD(&rdev->qp_list); 768 mutex_init(&rdev->qp_lock); 769 atomic_set(&rdev->qp_count, 0); 770 atomic_set(&rdev->cq_count, 0); 771 atomic_set(&rdev->srq_count, 0); 772 atomic_set(&rdev->mr_count, 0); 773 atomic_set(&rdev->mw_count, 0); 774 rdev->cosq[0] = 0xFFFF; 775 rdev->cosq[1] = 0xFFFF; 776 777 mutex_lock(&bnxt_re_dev_lock); 778 list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list); 779 mutex_unlock(&bnxt_re_dev_lock); 780 return rdev; 781 } 782 783 static int bnxt_re_handle_unaffi_async_event(struct creq_func_event 784 *unaffi_async) 785 { 786 switch (unaffi_async->event) { 787 case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR: 788 break; 789 case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR: 790 break; 791 case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR: 792 break; 793 case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR: 794 break; 795 case CREQ_FUNC_EVENT_EVENT_CQ_ERROR: 796 break; 797 case CREQ_FUNC_EVENT_EVENT_TQM_ERROR: 798 break; 799 case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR: 800 break; 801 case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR: 802 break; 803 case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR: 804 break; 805 case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR: 806 break; 807 case CREQ_FUNC_EVENT_EVENT_TIM_ERROR: 808 break; 809 default: 810 return -EINVAL; 811 } 812 return 0; 813 } 814 815 static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event, 816 struct bnxt_re_qp *qp) 817 { 818 struct ib_event event; 819 unsigned int flags; 820 821 if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR && 822 rdma_is_kernel_res(&qp->ib_qp.res)) { 823 flags = bnxt_re_lock_cqs(qp); 824 bnxt_qplib_add_flush_qp(&qp->qplib_qp); 825 bnxt_re_unlock_cqs(qp, flags); 826 } 827 828 memset(&event, 0, sizeof(event)); 829 if (qp->qplib_qp.srq) { 830 event.device = &qp->rdev->ibdev; 831 event.element.qp = &qp->ib_qp; 832 event.event = IB_EVENT_QP_LAST_WQE_REACHED; 833 } 834 835 if (event.device && qp->ib_qp.event_handler) 836 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context); 837 838 return 0; 839 } 840 841 static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async, 842 void *obj) 843 { 844 int rc = 0; 845 u8 event; 846 847 if (!obj) 848 return rc; /* QP was already dead, still return success */ 849 850 event = affi_async->event; 851 if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) { 852 struct bnxt_qplib_qp *lib_qp = obj; 853 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp, 854 qplib_qp); 855 rc = bnxt_re_handle_qp_async_event(affi_async, qp); 856 } 857 return rc; 858 } 859 860 static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw, 861 void *aeqe, void *obj) 862 { 863 struct creq_qp_event *affi_async; 864 struct creq_func_event *unaffi_async; 865 u8 type; 866 int rc; 867 868 type = ((struct creq_base *)aeqe)->type; 869 if (type == CREQ_BASE_TYPE_FUNC_EVENT) { 870 unaffi_async = aeqe; 871 rc = bnxt_re_handle_unaffi_async_event(unaffi_async); 872 } else { 873 affi_async = aeqe; 874 rc = bnxt_re_handle_affi_async_event(affi_async, obj); 875 } 876 877 return rc; 878 } 879 880 static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq, 881 struct bnxt_qplib_srq *handle, u8 event) 882 { 883 struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq, 884 qplib_srq); 885 struct ib_event ib_event; 886 int rc = 0; 887 888 if (!srq) { 889 ibdev_err(NULL, "%s: SRQ is NULL, SRQN not handled", 890 ROCE_DRV_MODULE_NAME); 891 rc = -EINVAL; 892 goto done; 893 } 894 ib_event.device = &srq->rdev->ibdev; 895 ib_event.element.srq = &srq->ib_srq; 896 if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT) 897 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED; 898 else 899 ib_event.event = IB_EVENT_SRQ_ERR; 900 901 if (srq->ib_srq.event_handler) { 902 /* Lock event_handler? */ 903 (*srq->ib_srq.event_handler)(&ib_event, 904 srq->ib_srq.srq_context); 905 } 906 done: 907 return rc; 908 } 909 910 static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq, 911 struct bnxt_qplib_cq *handle) 912 { 913 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq, 914 qplib_cq); 915 916 if (!cq) { 917 ibdev_err(NULL, "%s: CQ is NULL, CQN not handled", 918 ROCE_DRV_MODULE_NAME); 919 return -EINVAL; 920 } 921 if (cq->ib_cq.comp_handler) { 922 /* Lock comp_handler? */ 923 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context); 924 } 925 926 return 0; 927 } 928 929 #define BNXT_RE_GEN_P5_PF_NQ_DB 0x10000 930 #define BNXT_RE_GEN_P5_VF_NQ_DB 0x4000 931 static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx) 932 { 933 return bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ? 934 (rdev->is_virtfn ? BNXT_RE_GEN_P5_VF_NQ_DB : 935 BNXT_RE_GEN_P5_PF_NQ_DB) : 936 rdev->msix_entries[indx].db_offset; 937 } 938 939 static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev) 940 { 941 int i; 942 943 for (i = 1; i < rdev->num_msix; i++) 944 bnxt_qplib_disable_nq(&rdev->nq[i - 1]); 945 946 if (rdev->qplib_res.rcfw) 947 bnxt_qplib_cleanup_res(&rdev->qplib_res); 948 } 949 950 static int bnxt_re_init_res(struct bnxt_re_dev *rdev) 951 { 952 int num_vec_enabled = 0; 953 int rc = 0, i; 954 u32 db_offt; 955 956 bnxt_qplib_init_res(&rdev->qplib_res); 957 958 for (i = 1; i < rdev->num_msix ; i++) { 959 db_offt = bnxt_re_get_nqdb_offset(rdev, i); 960 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1], 961 i - 1, rdev->msix_entries[i].vector, 962 db_offt, &bnxt_re_cqn_handler, 963 &bnxt_re_srqn_handler); 964 if (rc) { 965 ibdev_err(&rdev->ibdev, 966 "Failed to enable NQ with rc = 0x%x", rc); 967 goto fail; 968 } 969 num_vec_enabled++; 970 } 971 return 0; 972 fail: 973 for (i = num_vec_enabled; i >= 0; i--) 974 bnxt_qplib_disable_nq(&rdev->nq[i]); 975 return rc; 976 } 977 978 static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev) 979 { 980 u8 type; 981 int i; 982 983 for (i = 0; i < rdev->num_msix - 1; i++) { 984 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 985 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type); 986 bnxt_qplib_free_nq(&rdev->nq[i]); 987 rdev->nq[i].res = NULL; 988 } 989 } 990 991 static void bnxt_re_free_res(struct bnxt_re_dev *rdev) 992 { 993 bnxt_re_free_nq_res(rdev); 994 995 if (rdev->qplib_res.dpi_tbl.max) { 996 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 997 &rdev->qplib_res.dpi_tbl, 998 &rdev->dpi_privileged); 999 } 1000 if (rdev->qplib_res.rcfw) { 1001 bnxt_qplib_free_res(&rdev->qplib_res); 1002 rdev->qplib_res.rcfw = NULL; 1003 } 1004 } 1005 1006 static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev) 1007 { 1008 struct bnxt_re_ring_attr rattr = {}; 1009 int num_vec_created = 0; 1010 int rc = 0, i; 1011 u8 type; 1012 1013 /* Configure and allocate resources for qplib */ 1014 rdev->qplib_res.rcfw = &rdev->rcfw; 1015 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 1016 rdev->is_virtfn); 1017 if (rc) 1018 goto fail; 1019 1020 rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev, 1021 rdev->netdev, &rdev->dev_attr); 1022 if (rc) 1023 goto fail; 1024 1025 rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl, 1026 &rdev->dpi_privileged, 1027 rdev); 1028 if (rc) 1029 goto dealloc_res; 1030 1031 for (i = 0; i < rdev->num_msix - 1; i++) { 1032 struct bnxt_qplib_nq *nq; 1033 1034 nq = &rdev->nq[i]; 1035 nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT; 1036 rc = bnxt_qplib_alloc_nq(&rdev->qplib_res, &rdev->nq[i]); 1037 if (rc) { 1038 ibdev_err(&rdev->ibdev, "Alloc Failed NQ%d rc:%#x", 1039 i, rc); 1040 goto free_nq; 1041 } 1042 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1043 rattr.dma_arr = nq->hwq.pbl[PBL_LVL_0].pg_map_arr; 1044 rattr.pages = nq->hwq.pbl[rdev->nq[i].hwq.level].pg_count; 1045 rattr.type = type; 1046 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX; 1047 rattr.depth = BNXT_QPLIB_NQE_MAX_CNT - 1; 1048 rattr.lrid = rdev->msix_entries[i + 1].ring_idx; 1049 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &nq->ring_id); 1050 if (rc) { 1051 ibdev_err(&rdev->ibdev, 1052 "Failed to allocate NQ fw id with rc = 0x%x", 1053 rc); 1054 bnxt_qplib_free_nq(&rdev->nq[i]); 1055 goto free_nq; 1056 } 1057 num_vec_created++; 1058 } 1059 return 0; 1060 free_nq: 1061 for (i = num_vec_created - 1; i >= 0; i--) { 1062 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1063 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type); 1064 bnxt_qplib_free_nq(&rdev->nq[i]); 1065 } 1066 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 1067 &rdev->qplib_res.dpi_tbl, 1068 &rdev->dpi_privileged); 1069 dealloc_res: 1070 bnxt_qplib_free_res(&rdev->qplib_res); 1071 1072 fail: 1073 rdev->qplib_res.rcfw = NULL; 1074 return rc; 1075 } 1076 1077 static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp, 1078 u8 port_num, enum ib_event_type event) 1079 { 1080 struct ib_event ib_event; 1081 1082 ib_event.device = ibdev; 1083 if (qp) { 1084 ib_event.element.qp = qp; 1085 ib_event.event = event; 1086 if (qp->event_handler) 1087 qp->event_handler(&ib_event, qp->qp_context); 1088 1089 } else { 1090 ib_event.element.port_num = port_num; 1091 ib_event.event = event; 1092 ib_dispatch_event(&ib_event); 1093 } 1094 } 1095 1096 #define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02 1097 static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir, 1098 u64 *cid_map) 1099 { 1100 struct hwrm_queue_pri2cos_qcfg_input req = {0}; 1101 struct bnxt *bp = netdev_priv(rdev->netdev); 1102 struct hwrm_queue_pri2cos_qcfg_output resp; 1103 struct bnxt_en_dev *en_dev = rdev->en_dev; 1104 struct bnxt_fw_msg fw_msg; 1105 u32 flags = 0; 1106 u8 *qcfgmap, *tmp_map; 1107 int rc = 0, i; 1108 1109 if (!cid_map) 1110 return -EINVAL; 1111 1112 memset(&fw_msg, 0, sizeof(fw_msg)); 1113 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, 1114 HWRM_QUEUE_PRI2COS_QCFG, -1, -1); 1115 flags |= (dir & 0x01); 1116 flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN; 1117 req.flags = cpu_to_le32(flags); 1118 req.port_id = bp->pf.port_id; 1119 1120 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 1121 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 1122 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 1123 if (rc) 1124 return rc; 1125 1126 if (resp.queue_cfg_info) { 1127 ibdev_warn(&rdev->ibdev, 1128 "Asymmetric cos queue configuration detected"); 1129 ibdev_warn(&rdev->ibdev, 1130 " on device, QoS may not be fully functional\n"); 1131 } 1132 qcfgmap = &resp.pri0_cos_queue_id; 1133 tmp_map = (u8 *)cid_map; 1134 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) 1135 tmp_map[i] = qcfgmap[i]; 1136 1137 return rc; 1138 } 1139 1140 static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev, 1141 struct bnxt_re_qp *qp) 1142 { 1143 return (qp->ib_qp.qp_type == IB_QPT_GSI) || 1144 (qp == rdev->gsi_ctx.gsi_sqp); 1145 } 1146 1147 static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev) 1148 { 1149 int mask = IB_QP_STATE; 1150 struct ib_qp_attr qp_attr; 1151 struct bnxt_re_qp *qp; 1152 1153 qp_attr.qp_state = IB_QPS_ERR; 1154 mutex_lock(&rdev->qp_lock); 1155 list_for_each_entry(qp, &rdev->qp_list, list) { 1156 /* Modify the state of all QPs except QP1/Shadow QP */ 1157 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) { 1158 if (qp->qplib_qp.state != 1159 CMDQ_MODIFY_QP_NEW_STATE_RESET && 1160 qp->qplib_qp.state != 1161 CMDQ_MODIFY_QP_NEW_STATE_ERR) { 1162 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp, 1163 1, IB_EVENT_QP_FATAL); 1164 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask, 1165 NULL); 1166 } 1167 } 1168 } 1169 mutex_unlock(&rdev->qp_lock); 1170 } 1171 1172 static int bnxt_re_update_gid(struct bnxt_re_dev *rdev) 1173 { 1174 struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl; 1175 struct bnxt_qplib_gid gid; 1176 u16 gid_idx, index; 1177 int rc = 0; 1178 1179 if (!ib_device_try_get(&rdev->ibdev)) 1180 return 0; 1181 1182 if (!sgid_tbl) { 1183 ibdev_err(&rdev->ibdev, "QPLIB: SGID table not allocated"); 1184 rc = -EINVAL; 1185 goto out; 1186 } 1187 1188 for (index = 0; index < sgid_tbl->active; index++) { 1189 gid_idx = sgid_tbl->hw_id[index]; 1190 1191 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero, 1192 sizeof(bnxt_qplib_gid_zero))) 1193 continue; 1194 /* need to modify the VLAN enable setting of non VLAN GID only 1195 * as setting is done for VLAN GID while adding GID 1196 */ 1197 if (sgid_tbl->vlan[index]) 1198 continue; 1199 1200 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid)); 1201 1202 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx, 1203 rdev->qplib_res.netdev->dev_addr); 1204 } 1205 out: 1206 ib_device_put(&rdev->ibdev); 1207 return rc; 1208 } 1209 1210 static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev) 1211 { 1212 u32 prio_map = 0, tmp_map = 0; 1213 struct net_device *netdev; 1214 struct dcb_app app; 1215 1216 netdev = rdev->netdev; 1217 1218 memset(&app, 0, sizeof(app)); 1219 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE; 1220 app.protocol = ETH_P_IBOE; 1221 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1222 prio_map = tmp_map; 1223 1224 app.selector = IEEE_8021QAZ_APP_SEL_DGRAM; 1225 app.protocol = ROCE_V2_UDP_DPORT; 1226 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1227 prio_map |= tmp_map; 1228 1229 return prio_map; 1230 } 1231 1232 static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq) 1233 { 1234 u16 prio; 1235 u8 id; 1236 1237 for (prio = 0, id = 0; prio < 8; prio++) { 1238 if (prio_map & (1 << prio)) { 1239 cosq[id] = cid_map[prio]; 1240 id++; 1241 if (id == 2) /* Max 2 tcs supported */ 1242 break; 1243 } 1244 } 1245 } 1246 1247 static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev) 1248 { 1249 u8 prio_map = 0; 1250 u64 cid_map; 1251 int rc; 1252 1253 /* Get priority for roce */ 1254 prio_map = bnxt_re_get_priority_mask(rdev); 1255 1256 if (prio_map == rdev->cur_prio_map) 1257 return 0; 1258 rdev->cur_prio_map = prio_map; 1259 /* Get cosq id for this priority */ 1260 rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map); 1261 if (rc) { 1262 ibdev_warn(&rdev->ibdev, "no cos for p_mask %x\n", prio_map); 1263 return rc; 1264 } 1265 /* Parse CoS IDs for app priority */ 1266 bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq); 1267 1268 /* Config BONO. */ 1269 rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq); 1270 if (rc) { 1271 ibdev_warn(&rdev->ibdev, "no tc for cos{%x, %x}\n", 1272 rdev->cosq[0], rdev->cosq[1]); 1273 return rc; 1274 } 1275 1276 /* Actual priorities are not programmed as they are already 1277 * done by L2 driver; just enable or disable priority vlan tagging 1278 */ 1279 if ((prio_map == 0 && rdev->qplib_res.prio) || 1280 (prio_map != 0 && !rdev->qplib_res.prio)) { 1281 rdev->qplib_res.prio = prio_map ? true : false; 1282 1283 bnxt_re_update_gid(rdev); 1284 } 1285 1286 return 0; 1287 } 1288 1289 static void bnxt_re_query_hwrm_intf_version(struct bnxt_re_dev *rdev) 1290 { 1291 struct bnxt_en_dev *en_dev = rdev->en_dev; 1292 struct hwrm_ver_get_output resp = {0}; 1293 struct hwrm_ver_get_input req = {0}; 1294 struct bnxt_fw_msg fw_msg; 1295 int rc = 0; 1296 1297 memset(&fw_msg, 0, sizeof(fw_msg)); 1298 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, 1299 HWRM_VER_GET, -1, -1); 1300 req.hwrm_intf_maj = HWRM_VERSION_MAJOR; 1301 req.hwrm_intf_min = HWRM_VERSION_MINOR; 1302 req.hwrm_intf_upd = HWRM_VERSION_UPDATE; 1303 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 1304 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 1305 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 1306 if (rc) { 1307 ibdev_err(&rdev->ibdev, "Failed to query HW version, rc = 0x%x", 1308 rc); 1309 return; 1310 } 1311 rdev->qplib_ctx.hwrm_intf_ver = 1312 (u64)le16_to_cpu(resp.hwrm_intf_major) << 48 | 1313 (u64)le16_to_cpu(resp.hwrm_intf_minor) << 32 | 1314 (u64)le16_to_cpu(resp.hwrm_intf_build) << 16 | 1315 le16_to_cpu(resp.hwrm_intf_patch); 1316 } 1317 1318 static int bnxt_re_ib_init(struct bnxt_re_dev *rdev) 1319 { 1320 int rc = 0; 1321 u32 event; 1322 1323 /* Register ib dev */ 1324 rc = bnxt_re_register_ib(rdev); 1325 if (rc) { 1326 pr_err("Failed to register with IB: %#x\n", rc); 1327 return rc; 1328 } 1329 dev_info(rdev_to_dev(rdev), "Device registered successfully"); 1330 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1331 &rdev->active_width); 1332 set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags); 1333 1334 event = netif_running(rdev->netdev) && netif_carrier_ok(rdev->netdev) ? 1335 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 1336 1337 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, event); 1338 1339 return rc; 1340 } 1341 1342 static void bnxt_re_dev_uninit(struct bnxt_re_dev *rdev) 1343 { 1344 u8 type; 1345 int rc; 1346 1347 if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags)) 1348 cancel_delayed_work_sync(&rdev->worker); 1349 1350 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, 1351 &rdev->flags)) 1352 bnxt_re_cleanup_res(rdev); 1353 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags)) 1354 bnxt_re_free_res(rdev); 1355 1356 if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) { 1357 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw); 1358 if (rc) 1359 ibdev_warn(&rdev->ibdev, 1360 "Failed to deinitialize RCFW: %#x", rc); 1361 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id); 1362 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx); 1363 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1364 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1365 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type); 1366 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1367 } 1368 if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) { 1369 rc = bnxt_re_free_msix(rdev); 1370 if (rc) 1371 ibdev_warn(&rdev->ibdev, 1372 "Failed to free MSI-X vectors: %#x", rc); 1373 } 1374 1375 bnxt_re_destroy_chip_ctx(rdev); 1376 if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) { 1377 rc = bnxt_re_unregister_netdev(rdev); 1378 if (rc) 1379 ibdev_warn(&rdev->ibdev, 1380 "Failed to unregister with netdev: %#x", rc); 1381 } 1382 } 1383 1384 /* worker thread for polling periodic events. Now used for QoS programming*/ 1385 static void bnxt_re_worker(struct work_struct *work) 1386 { 1387 struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev, 1388 worker.work); 1389 1390 bnxt_re_setup_qos(rdev); 1391 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1392 } 1393 1394 static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 wqe_mode) 1395 { 1396 struct bnxt_qplib_creq_ctx *creq; 1397 struct bnxt_re_ring_attr rattr; 1398 u32 db_offt; 1399 int vid; 1400 u8 type; 1401 int rc; 1402 1403 /* Registered a new RoCE device instance to netdev */ 1404 memset(&rattr, 0, sizeof(rattr)); 1405 rc = bnxt_re_register_netdev(rdev); 1406 if (rc) { 1407 rtnl_unlock(); 1408 ibdev_err(&rdev->ibdev, 1409 "Failed to register with netedev: %#x\n", rc); 1410 return -EINVAL; 1411 } 1412 set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags); 1413 1414 rc = bnxt_re_setup_chip_ctx(rdev, wqe_mode); 1415 if (rc) { 1416 ibdev_err(&rdev->ibdev, "Failed to get chip context\n"); 1417 return -EINVAL; 1418 } 1419 1420 /* Check whether VF or PF */ 1421 bnxt_re_get_sriov_func_type(rdev); 1422 1423 rc = bnxt_re_request_msix(rdev); 1424 if (rc) { 1425 ibdev_err(&rdev->ibdev, 1426 "Failed to get MSI-X vectors: %#x\n", rc); 1427 rc = -EINVAL; 1428 goto fail; 1429 } 1430 set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags); 1431 1432 bnxt_re_query_hwrm_intf_version(rdev); 1433 1434 /* Establish RCFW Communication Channel to initialize the context 1435 * memory for the function and all child VFs 1436 */ 1437 rc = bnxt_qplib_alloc_rcfw_channel(&rdev->qplib_res, &rdev->rcfw, 1438 &rdev->qplib_ctx, 1439 BNXT_RE_MAX_QPC_COUNT); 1440 if (rc) { 1441 ibdev_err(&rdev->ibdev, 1442 "Failed to allocate RCFW Channel: %#x\n", rc); 1443 goto fail; 1444 } 1445 1446 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1447 creq = &rdev->rcfw.creq; 1448 rattr.dma_arr = creq->hwq.pbl[PBL_LVL_0].pg_map_arr; 1449 rattr.pages = creq->hwq.pbl[creq->hwq.level].pg_count; 1450 rattr.type = type; 1451 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX; 1452 rattr.depth = BNXT_QPLIB_CREQE_MAX_CNT - 1; 1453 rattr.lrid = rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx; 1454 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &creq->ring_id); 1455 if (rc) { 1456 ibdev_err(&rdev->ibdev, "Failed to allocate CREQ: %#x\n", rc); 1457 goto free_rcfw; 1458 } 1459 db_offt = bnxt_re_get_nqdb_offset(rdev, BNXT_RE_AEQ_IDX); 1460 vid = rdev->msix_entries[BNXT_RE_AEQ_IDX].vector; 1461 rc = bnxt_qplib_enable_rcfw_channel(&rdev->rcfw, 1462 vid, db_offt, rdev->is_virtfn, 1463 &bnxt_re_aeq_handler); 1464 if (rc) { 1465 ibdev_err(&rdev->ibdev, "Failed to enable RCFW channel: %#x\n", 1466 rc); 1467 goto free_ring; 1468 } 1469 1470 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 1471 rdev->is_virtfn); 1472 if (rc) 1473 goto disable_rcfw; 1474 1475 bnxt_re_set_resource_limits(rdev); 1476 1477 rc = bnxt_qplib_alloc_ctx(&rdev->qplib_res, &rdev->qplib_ctx, 0, 1478 bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)); 1479 if (rc) { 1480 ibdev_err(&rdev->ibdev, 1481 "Failed to allocate QPLIB context: %#x\n", rc); 1482 goto disable_rcfw; 1483 } 1484 rc = bnxt_re_net_stats_ctx_alloc(rdev, 1485 rdev->qplib_ctx.stats.dma_map, 1486 &rdev->qplib_ctx.stats.fw_id); 1487 if (rc) { 1488 ibdev_err(&rdev->ibdev, 1489 "Failed to allocate stats context: %#x\n", rc); 1490 goto free_ctx; 1491 } 1492 1493 rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx, 1494 rdev->is_virtfn); 1495 if (rc) { 1496 ibdev_err(&rdev->ibdev, 1497 "Failed to initialize RCFW: %#x\n", rc); 1498 goto free_sctx; 1499 } 1500 set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags); 1501 1502 /* Resources based on the 'new' device caps */ 1503 rc = bnxt_re_alloc_res(rdev); 1504 if (rc) { 1505 ibdev_err(&rdev->ibdev, 1506 "Failed to allocate resources: %#x\n", rc); 1507 goto fail; 1508 } 1509 set_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags); 1510 rc = bnxt_re_init_res(rdev); 1511 if (rc) { 1512 ibdev_err(&rdev->ibdev, 1513 "Failed to initialize resources: %#x\n", rc); 1514 goto fail; 1515 } 1516 1517 set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags); 1518 1519 if (!rdev->is_virtfn) { 1520 rc = bnxt_re_setup_qos(rdev); 1521 if (rc) 1522 ibdev_info(&rdev->ibdev, 1523 "RoCE priority not yet configured\n"); 1524 1525 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker); 1526 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags); 1527 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1528 } 1529 1530 return 0; 1531 free_sctx: 1532 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id); 1533 free_ctx: 1534 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx); 1535 disable_rcfw: 1536 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1537 free_ring: 1538 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1539 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type); 1540 free_rcfw: 1541 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1542 fail: 1543 bnxt_re_dev_uninit(rdev); 1544 1545 return rc; 1546 } 1547 1548 static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev) 1549 { 1550 struct net_device *netdev = rdev->netdev; 1551 1552 bnxt_re_dev_remove(rdev); 1553 1554 if (netdev) 1555 dev_put(netdev); 1556 } 1557 1558 static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev) 1559 { 1560 struct bnxt_en_dev *en_dev; 1561 int rc = 0; 1562 1563 if (!is_bnxt_re_dev(netdev)) 1564 return -ENODEV; 1565 1566 en_dev = bnxt_re_dev_probe(netdev); 1567 if (IS_ERR(en_dev)) { 1568 if (en_dev != ERR_PTR(-ENODEV)) 1569 ibdev_err(&(*rdev)->ibdev, "%s: Failed to probe\n", 1570 ROCE_DRV_MODULE_NAME); 1571 rc = PTR_ERR(en_dev); 1572 goto exit; 1573 } 1574 *rdev = bnxt_re_dev_add(netdev, en_dev); 1575 if (!*rdev) { 1576 rc = -ENOMEM; 1577 dev_put(netdev); 1578 goto exit; 1579 } 1580 exit: 1581 return rc; 1582 } 1583 1584 static void bnxt_re_remove_device(struct bnxt_re_dev *rdev) 1585 { 1586 bnxt_re_dev_uninit(rdev); 1587 pci_dev_put(rdev->en_dev->pdev); 1588 bnxt_re_dev_unreg(rdev); 1589 } 1590 1591 static int bnxt_re_add_device(struct bnxt_re_dev **rdev, 1592 struct net_device *netdev, u8 wqe_mode) 1593 { 1594 int rc; 1595 1596 rc = bnxt_re_dev_reg(rdev, netdev); 1597 if (rc == -ENODEV) 1598 return rc; 1599 if (rc) { 1600 pr_err("Failed to register with the device %s: %#x\n", 1601 netdev->name, rc); 1602 return rc; 1603 } 1604 1605 pci_dev_get((*rdev)->en_dev->pdev); 1606 rc = bnxt_re_dev_init(*rdev, wqe_mode); 1607 if (rc) { 1608 pci_dev_put((*rdev)->en_dev->pdev); 1609 bnxt_re_dev_unreg(*rdev); 1610 } 1611 1612 return rc; 1613 } 1614 1615 static void bnxt_re_dealloc_driver(struct ib_device *ib_dev) 1616 { 1617 struct bnxt_re_dev *rdev = 1618 container_of(ib_dev, struct bnxt_re_dev, ibdev); 1619 1620 dev_info(rdev_to_dev(rdev), "Unregistering Device"); 1621 1622 rtnl_lock(); 1623 bnxt_re_remove_device(rdev); 1624 rtnl_unlock(); 1625 } 1626 1627 /* Handle all deferred netevents tasks */ 1628 static void bnxt_re_task(struct work_struct *work) 1629 { 1630 struct bnxt_re_work *re_work; 1631 struct bnxt_re_dev *rdev; 1632 int rc = 0; 1633 1634 re_work = container_of(work, struct bnxt_re_work, work); 1635 rdev = re_work->rdev; 1636 1637 if (re_work->event == NETDEV_REGISTER) { 1638 rc = bnxt_re_ib_init(rdev); 1639 if (rc) { 1640 ibdev_err(&rdev->ibdev, 1641 "Failed to register with IB: %#x", rc); 1642 rtnl_lock(); 1643 bnxt_re_remove_device(rdev); 1644 rtnl_unlock(); 1645 goto exit; 1646 } 1647 goto exit; 1648 } 1649 1650 if (!ib_device_try_get(&rdev->ibdev)) 1651 goto exit; 1652 1653 switch (re_work->event) { 1654 case NETDEV_UP: 1655 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1656 IB_EVENT_PORT_ACTIVE); 1657 break; 1658 case NETDEV_DOWN: 1659 bnxt_re_dev_stop(rdev); 1660 break; 1661 case NETDEV_CHANGE: 1662 if (!netif_carrier_ok(rdev->netdev)) 1663 bnxt_re_dev_stop(rdev); 1664 else if (netif_carrier_ok(rdev->netdev)) 1665 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1666 IB_EVENT_PORT_ACTIVE); 1667 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1668 &rdev->active_width); 1669 break; 1670 default: 1671 break; 1672 } 1673 ib_device_put(&rdev->ibdev); 1674 exit: 1675 put_device(&rdev->ibdev.dev); 1676 kfree(re_work); 1677 } 1678 1679 /* 1680 * "Notifier chain callback can be invoked for the same chain from 1681 * different CPUs at the same time". 1682 * 1683 * For cases when the netdev is already present, our call to the 1684 * register_netdevice_notifier() will actually get the rtnl_lock() 1685 * before sending NETDEV_REGISTER and (if up) NETDEV_UP 1686 * events. 1687 * 1688 * But for cases when the netdev is not already present, the notifier 1689 * chain is subjected to be invoked from different CPUs simultaneously. 1690 * 1691 * This is protected by the netdev_mutex. 1692 */ 1693 static int bnxt_re_netdev_event(struct notifier_block *notifier, 1694 unsigned long event, void *ptr) 1695 { 1696 struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr); 1697 struct bnxt_re_work *re_work; 1698 struct bnxt_re_dev *rdev; 1699 int rc = 0; 1700 bool sch_work = false; 1701 bool release = true; 1702 1703 real_dev = rdma_vlan_dev_real_dev(netdev); 1704 if (!real_dev) 1705 real_dev = netdev; 1706 1707 rdev = bnxt_re_from_netdev(real_dev); 1708 if (!rdev && event != NETDEV_REGISTER) 1709 return NOTIFY_OK; 1710 1711 if (real_dev != netdev) 1712 goto exit; 1713 1714 switch (event) { 1715 case NETDEV_REGISTER: 1716 if (rdev) 1717 break; 1718 rc = bnxt_re_add_device(&rdev, real_dev, 1719 BNXT_QPLIB_WQE_MODE_STATIC); 1720 if (!rc) 1721 sch_work = true; 1722 release = false; 1723 break; 1724 1725 case NETDEV_UNREGISTER: 1726 ib_unregister_device_queued(&rdev->ibdev); 1727 break; 1728 1729 default: 1730 sch_work = true; 1731 break; 1732 } 1733 if (sch_work) { 1734 /* Allocate for the deferred task */ 1735 re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC); 1736 if (re_work) { 1737 get_device(&rdev->ibdev.dev); 1738 re_work->rdev = rdev; 1739 re_work->event = event; 1740 re_work->vlan_dev = (real_dev == netdev ? 1741 NULL : netdev); 1742 INIT_WORK(&re_work->work, bnxt_re_task); 1743 queue_work(bnxt_re_wq, &re_work->work); 1744 } 1745 } 1746 1747 exit: 1748 if (rdev && release) 1749 ib_device_put(&rdev->ibdev); 1750 return NOTIFY_DONE; 1751 } 1752 1753 static struct notifier_block bnxt_re_netdev_notifier = { 1754 .notifier_call = bnxt_re_netdev_event 1755 }; 1756 1757 static int __init bnxt_re_mod_init(void) 1758 { 1759 int rc = 0; 1760 1761 pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version); 1762 1763 bnxt_re_wq = create_singlethread_workqueue("bnxt_re"); 1764 if (!bnxt_re_wq) 1765 return -ENOMEM; 1766 1767 INIT_LIST_HEAD(&bnxt_re_dev_list); 1768 1769 rc = register_netdevice_notifier(&bnxt_re_netdev_notifier); 1770 if (rc) { 1771 pr_err("%s: Cannot register to netdevice_notifier", 1772 ROCE_DRV_MODULE_NAME); 1773 goto err_netdev; 1774 } 1775 return 0; 1776 1777 err_netdev: 1778 destroy_workqueue(bnxt_re_wq); 1779 1780 return rc; 1781 } 1782 1783 static void __exit bnxt_re_mod_exit(void) 1784 { 1785 struct bnxt_re_dev *rdev; 1786 1787 unregister_netdevice_notifier(&bnxt_re_netdev_notifier); 1788 if (bnxt_re_wq) 1789 destroy_workqueue(bnxt_re_wq); 1790 list_for_each_entry(rdev, &bnxt_re_dev_list, list) { 1791 /* VF device removal should be called before the removal 1792 * of PF device. Queue VFs unregister first, so that VFs 1793 * shall be removed before the PF during the call of 1794 * ib_unregister_driver. 1795 */ 1796 if (rdev->is_virtfn) 1797 ib_unregister_device(&rdev->ibdev); 1798 } 1799 ib_unregister_driver(RDMA_DRIVER_BNXT_RE); 1800 } 1801 1802 module_init(bnxt_re_mod_init); 1803 module_exit(bnxt_re_mod_exit); 1804