1 /* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Statistics 37 * 38 */ 39 40 #include <linux/interrupt.h> 41 #include <linux/types.h> 42 #include <linux/spinlock.h> 43 #include <linux/sched.h> 44 #include <linux/slab.h> 45 #include <linux/pci.h> 46 #include <linux/prefetch.h> 47 #include <linux/delay.h> 48 49 #include <rdma/ib_addr.h> 50 51 #include "bnxt_ulp.h" 52 #include "roce_hsi.h" 53 #include "qplib_res.h" 54 #include "qplib_sp.h" 55 #include "qplib_fp.h" 56 #include "qplib_rcfw.h" 57 #include "bnxt_re.h" 58 #include "hw_counters.h" 59 60 static const struct rdma_stat_desc bnxt_re_stat_descs[] = { 61 [BNXT_RE_ACTIVE_PD].name = "active_pds", 62 [BNXT_RE_ACTIVE_AH].name = "active_ahs", 63 [BNXT_RE_ACTIVE_QP].name = "active_qps", 64 [BNXT_RE_ACTIVE_SRQ].name = "active_srqs", 65 [BNXT_RE_ACTIVE_CQ].name = "active_cqs", 66 [BNXT_RE_ACTIVE_MR].name = "active_mrs", 67 [BNXT_RE_ACTIVE_MW].name = "active_mws", 68 [BNXT_RE_RX_PKTS].name = "rx_pkts", 69 [BNXT_RE_RX_BYTES].name = "rx_bytes", 70 [BNXT_RE_TX_PKTS].name = "tx_pkts", 71 [BNXT_RE_TX_BYTES].name = "tx_bytes", 72 [BNXT_RE_RECOVERABLE_ERRORS].name = "recoverable_errors", 73 [BNXT_RE_RX_ERRORS].name = "rx_roce_errors", 74 [BNXT_RE_RX_DISCARDS].name = "rx_roce_discards", 75 [BNXT_RE_TO_RETRANSMITS].name = "to_retransmits", 76 [BNXT_RE_SEQ_ERR_NAKS_RCVD].name = "seq_err_naks_rcvd", 77 [BNXT_RE_MAX_RETRY_EXCEEDED].name = "max_retry_exceeded", 78 [BNXT_RE_RNR_NAKS_RCVD].name = "rnr_naks_rcvd", 79 [BNXT_RE_MISSING_RESP].name = "missing_resp", 80 [BNXT_RE_UNRECOVERABLE_ERR].name = "unrecoverable_err", 81 [BNXT_RE_BAD_RESP_ERR].name = "bad_resp_err", 82 [BNXT_RE_LOCAL_QP_OP_ERR].name = "local_qp_op_err", 83 [BNXT_RE_LOCAL_PROTECTION_ERR].name = "local_protection_err", 84 [BNXT_RE_MEM_MGMT_OP_ERR].name = "mem_mgmt_op_err", 85 [BNXT_RE_REMOTE_INVALID_REQ_ERR].name = "remote_invalid_req_err", 86 [BNXT_RE_REMOTE_ACCESS_ERR].name = "remote_access_err", 87 [BNXT_RE_REMOTE_OP_ERR].name = "remote_op_err", 88 [BNXT_RE_DUP_REQ].name = "dup_req", 89 [BNXT_RE_RES_EXCEED_MAX].name = "res_exceed_max", 90 [BNXT_RE_RES_LENGTH_MISMATCH].name = "res_length_mismatch", 91 [BNXT_RE_RES_EXCEEDS_WQE].name = "res_exceeds_wqe", 92 [BNXT_RE_RES_OPCODE_ERR].name = "res_opcode_err", 93 [BNXT_RE_RES_RX_INVALID_RKEY].name = "res_rx_invalid_rkey", 94 [BNXT_RE_RES_RX_DOMAIN_ERR].name = "res_rx_domain_err", 95 [BNXT_RE_RES_RX_NO_PERM].name = "res_rx_no_perm", 96 [BNXT_RE_RES_RX_RANGE_ERR].name = "res_rx_range_err", 97 [BNXT_RE_RES_TX_INVALID_RKEY].name = "res_tx_invalid_rkey", 98 [BNXT_RE_RES_TX_DOMAIN_ERR].name = "res_tx_domain_err", 99 [BNXT_RE_RES_TX_NO_PERM].name = "res_tx_no_perm", 100 [BNXT_RE_RES_TX_RANGE_ERR].name = "res_tx_range_err", 101 [BNXT_RE_RES_IRRQ_OFLOW].name = "res_irrq_oflow", 102 [BNXT_RE_RES_UNSUP_OPCODE].name = "res_unsup_opcode", 103 [BNXT_RE_RES_UNALIGNED_ATOMIC].name = "res_unaligned_atomic", 104 [BNXT_RE_RES_REM_INV_ERR].name = "res_rem_inv_err", 105 [BNXT_RE_RES_MEM_ERROR].name = "res_mem_err", 106 [BNXT_RE_RES_SRQ_ERR].name = "res_srq_err", 107 [BNXT_RE_RES_CMP_ERR].name = "res_cmp_err", 108 [BNXT_RE_RES_INVALID_DUP_RKEY].name = "res_invalid_dup_rkey", 109 [BNXT_RE_RES_WQE_FORMAT_ERR].name = "res_wqe_format_err", 110 [BNXT_RE_RES_CQ_LOAD_ERR].name = "res_cq_load_err", 111 [BNXT_RE_RES_SRQ_LOAD_ERR].name = "res_srq_load_err", 112 [BNXT_RE_RES_TX_PCI_ERR].name = "res_tx_pci_err", 113 [BNXT_RE_RES_RX_PCI_ERR].name = "res_rx_pci_err", 114 [BNXT_RE_OUT_OF_SEQ_ERR].name = "oos_drop_count", 115 [BNXT_RE_TX_ATOMIC_REQ].name = "tx_atomic_req", 116 [BNXT_RE_TX_READ_REQ].name = "tx_read_req", 117 [BNXT_RE_TX_READ_RES].name = "tx_read_resp", 118 [BNXT_RE_TX_WRITE_REQ].name = "tx_write_req", 119 [BNXT_RE_TX_SEND_REQ].name = "tx_send_req", 120 [BNXT_RE_RX_ATOMIC_REQ].name = "rx_atomic_req", 121 [BNXT_RE_RX_READ_REQ].name = "rx_read_req", 122 [BNXT_RE_RX_READ_RESP].name = "rx_read_resp", 123 [BNXT_RE_RX_WRITE_REQ].name = "rx_write_req", 124 [BNXT_RE_RX_SEND_REQ].name = "rx_send_req", 125 [BNXT_RE_RX_ROCE_GOOD_PKTS].name = "rx_roce_good_pkts", 126 [BNXT_RE_RX_ROCE_GOOD_BYTES].name = "rx_roce_good_bytes", 127 [BNXT_RE_OOB].name = "rx_out_of_buffer" 128 }; 129 130 static void bnxt_re_copy_ext_stats(struct bnxt_re_dev *rdev, 131 struct rdma_hw_stats *stats, 132 struct bnxt_qplib_ext_stat *s) 133 { 134 stats->value[BNXT_RE_TX_ATOMIC_REQ] = s->tx_atomic_req; 135 stats->value[BNXT_RE_TX_READ_REQ] = s->tx_read_req; 136 stats->value[BNXT_RE_TX_READ_RES] = s->tx_read_res; 137 stats->value[BNXT_RE_TX_WRITE_REQ] = s->tx_write_req; 138 stats->value[BNXT_RE_TX_SEND_REQ] = s->tx_send_req; 139 stats->value[BNXT_RE_RX_ATOMIC_REQ] = s->rx_atomic_req; 140 stats->value[BNXT_RE_RX_READ_REQ] = s->rx_read_req; 141 stats->value[BNXT_RE_RX_READ_RESP] = s->rx_read_res; 142 stats->value[BNXT_RE_RX_WRITE_REQ] = s->rx_write_req; 143 stats->value[BNXT_RE_RX_SEND_REQ] = s->rx_send_req; 144 stats->value[BNXT_RE_RX_ROCE_GOOD_PKTS] = s->rx_roce_good_pkts; 145 stats->value[BNXT_RE_RX_ROCE_GOOD_BYTES] = s->rx_roce_good_bytes; 146 stats->value[BNXT_RE_OOB] = s->rx_out_of_buffer; 147 } 148 149 static int bnxt_re_get_ext_stat(struct bnxt_re_dev *rdev, 150 struct rdma_hw_stats *stats) 151 { 152 struct bnxt_qplib_ext_stat *estat = &rdev->stats.rstat.ext_stat; 153 u32 fid; 154 int rc; 155 156 fid = PCI_FUNC(rdev->en_dev->pdev->devfn); 157 rc = bnxt_qplib_qext_stat(&rdev->rcfw, fid, estat); 158 if (rc) 159 goto done; 160 bnxt_re_copy_ext_stats(rdev, stats, estat); 161 162 done: 163 return rc; 164 } 165 166 static void bnxt_re_copy_err_stats(struct bnxt_re_dev *rdev, 167 struct rdma_hw_stats *stats, 168 struct bnxt_qplib_roce_stats *err_s) 169 { 170 stats->value[BNXT_RE_TO_RETRANSMITS] = 171 err_s->to_retransmits; 172 stats->value[BNXT_RE_SEQ_ERR_NAKS_RCVD] = 173 err_s->seq_err_naks_rcvd; 174 stats->value[BNXT_RE_MAX_RETRY_EXCEEDED] = 175 err_s->max_retry_exceeded; 176 stats->value[BNXT_RE_RNR_NAKS_RCVD] = 177 err_s->rnr_naks_rcvd; 178 stats->value[BNXT_RE_MISSING_RESP] = 179 err_s->missing_resp; 180 stats->value[BNXT_RE_UNRECOVERABLE_ERR] = 181 err_s->unrecoverable_err; 182 stats->value[BNXT_RE_BAD_RESP_ERR] = 183 err_s->bad_resp_err; 184 stats->value[BNXT_RE_LOCAL_QP_OP_ERR] = 185 err_s->local_qp_op_err; 186 stats->value[BNXT_RE_LOCAL_PROTECTION_ERR] = 187 err_s->local_protection_err; 188 stats->value[BNXT_RE_MEM_MGMT_OP_ERR] = 189 err_s->mem_mgmt_op_err; 190 stats->value[BNXT_RE_REMOTE_INVALID_REQ_ERR] = 191 err_s->remote_invalid_req_err; 192 stats->value[BNXT_RE_REMOTE_ACCESS_ERR] = 193 err_s->remote_access_err; 194 stats->value[BNXT_RE_REMOTE_OP_ERR] = 195 err_s->remote_op_err; 196 stats->value[BNXT_RE_DUP_REQ] = 197 err_s->dup_req; 198 stats->value[BNXT_RE_RES_EXCEED_MAX] = 199 err_s->res_exceed_max; 200 stats->value[BNXT_RE_RES_LENGTH_MISMATCH] = 201 err_s->res_length_mismatch; 202 stats->value[BNXT_RE_RES_EXCEEDS_WQE] = 203 err_s->res_exceeds_wqe; 204 stats->value[BNXT_RE_RES_OPCODE_ERR] = 205 err_s->res_opcode_err; 206 stats->value[BNXT_RE_RES_RX_INVALID_RKEY] = 207 err_s->res_rx_invalid_rkey; 208 stats->value[BNXT_RE_RES_RX_DOMAIN_ERR] = 209 err_s->res_rx_domain_err; 210 stats->value[BNXT_RE_RES_RX_NO_PERM] = 211 err_s->res_rx_no_perm; 212 stats->value[BNXT_RE_RES_RX_RANGE_ERR] = 213 err_s->res_rx_range_err; 214 stats->value[BNXT_RE_RES_TX_INVALID_RKEY] = 215 err_s->res_tx_invalid_rkey; 216 stats->value[BNXT_RE_RES_TX_DOMAIN_ERR] = 217 err_s->res_tx_domain_err; 218 stats->value[BNXT_RE_RES_TX_NO_PERM] = 219 err_s->res_tx_no_perm; 220 stats->value[BNXT_RE_RES_TX_RANGE_ERR] = 221 err_s->res_tx_range_err; 222 stats->value[BNXT_RE_RES_IRRQ_OFLOW] = 223 err_s->res_irrq_oflow; 224 stats->value[BNXT_RE_RES_UNSUP_OPCODE] = 225 err_s->res_unsup_opcode; 226 stats->value[BNXT_RE_RES_UNALIGNED_ATOMIC] = 227 err_s->res_unaligned_atomic; 228 stats->value[BNXT_RE_RES_REM_INV_ERR] = 229 err_s->res_rem_inv_err; 230 stats->value[BNXT_RE_RES_MEM_ERROR] = 231 err_s->res_mem_error; 232 stats->value[BNXT_RE_RES_SRQ_ERR] = 233 err_s->res_srq_err; 234 stats->value[BNXT_RE_RES_CMP_ERR] = 235 err_s->res_cmp_err; 236 stats->value[BNXT_RE_RES_INVALID_DUP_RKEY] = 237 err_s->res_invalid_dup_rkey; 238 stats->value[BNXT_RE_RES_WQE_FORMAT_ERR] = 239 err_s->res_wqe_format_err; 240 stats->value[BNXT_RE_RES_CQ_LOAD_ERR] = 241 err_s->res_cq_load_err; 242 stats->value[BNXT_RE_RES_SRQ_LOAD_ERR] = 243 err_s->res_srq_load_err; 244 stats->value[BNXT_RE_RES_TX_PCI_ERR] = 245 err_s->res_tx_pci_err; 246 stats->value[BNXT_RE_RES_RX_PCI_ERR] = 247 err_s->res_rx_pci_err; 248 stats->value[BNXT_RE_OUT_OF_SEQ_ERR] = 249 err_s->res_oos_drop_count; 250 } 251 252 int bnxt_re_ib_get_hw_stats(struct ib_device *ibdev, 253 struct rdma_hw_stats *stats, 254 u32 port, int index) 255 { 256 struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev); 257 struct bnxt_re_res_cntrs *res_s = &rdev->stats.res; 258 struct bnxt_qplib_roce_stats *err_s = NULL; 259 struct ctx_hw_stats *hw_stats = NULL; 260 int rc = 0; 261 262 hw_stats = rdev->qplib_ctx.stats.dma; 263 if (!port || !stats) 264 return -EINVAL; 265 266 stats->value[BNXT_RE_ACTIVE_QP] = atomic_read(&res_s->qp_count); 267 stats->value[BNXT_RE_ACTIVE_SRQ] = atomic_read(&res_s->srq_count); 268 stats->value[BNXT_RE_ACTIVE_CQ] = atomic_read(&res_s->cq_count); 269 stats->value[BNXT_RE_ACTIVE_MR] = atomic_read(&res_s->mr_count); 270 stats->value[BNXT_RE_ACTIVE_MW] = atomic_read(&res_s->mw_count); 271 stats->value[BNXT_RE_ACTIVE_PD] = atomic_read(&res_s->pd_count); 272 stats->value[BNXT_RE_ACTIVE_AH] = atomic_read(&res_s->ah_count); 273 274 if (hw_stats) { 275 stats->value[BNXT_RE_RECOVERABLE_ERRORS] = 276 le64_to_cpu(hw_stats->tx_bcast_pkts); 277 stats->value[BNXT_RE_RX_ERRORS] = 278 le64_to_cpu(hw_stats->rx_error_pkts); 279 stats->value[BNXT_RE_RX_DISCARDS] = 280 le64_to_cpu(hw_stats->rx_discard_pkts); 281 stats->value[BNXT_RE_RX_PKTS] = 282 le64_to_cpu(hw_stats->rx_ucast_pkts); 283 stats->value[BNXT_RE_RX_BYTES] = 284 le64_to_cpu(hw_stats->rx_ucast_bytes); 285 stats->value[BNXT_RE_TX_PKTS] = 286 le64_to_cpu(hw_stats->tx_ucast_pkts); 287 stats->value[BNXT_RE_TX_BYTES] = 288 le64_to_cpu(hw_stats->tx_ucast_bytes); 289 } 290 err_s = &rdev->stats.rstat.errs; 291 if (test_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags)) { 292 rc = bnxt_qplib_get_roce_stats(&rdev->rcfw, err_s); 293 if (rc) { 294 clear_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, 295 &rdev->flags); 296 goto done; 297 } 298 if (_is_ext_stats_supported(rdev->dev_attr.dev_cap_flags) && 299 !rdev->is_virtfn) { 300 rc = bnxt_re_get_ext_stat(rdev, stats); 301 if (rc) { 302 clear_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, 303 &rdev->flags); 304 goto done; 305 } 306 } 307 bnxt_re_copy_err_stats(rdev, stats, err_s); 308 } 309 310 done: 311 return bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ? 312 BNXT_RE_NUM_EXT_COUNTERS : BNXT_RE_NUM_STD_COUNTERS; 313 } 314 315 struct rdma_hw_stats *bnxt_re_ib_alloc_hw_port_stats(struct ib_device *ibdev, 316 u32 port_num) 317 { 318 struct bnxt_re_dev *rdev = to_bnxt_re_dev(ibdev, ibdev); 319 int num_counters = 0; 320 321 if (bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) 322 num_counters = BNXT_RE_NUM_EXT_COUNTERS; 323 else 324 num_counters = BNXT_RE_NUM_STD_COUNTERS; 325 326 return rdma_alloc_hw_stats_struct(bnxt_re_stat_descs, num_counters, 327 RDMA_HW_STATS_DEFAULT_LIFESPAN); 328 } 329