1 /* 2 * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved. 3 * Copyright (c) 2004 Infinicon Corporation. All rights reserved. 4 * Copyright (c) 2004 Intel Corporation. All rights reserved. 5 * Copyright (c) 2004 Topspin Corporation. All rights reserved. 6 * Copyright (c) 2004 Voltaire Corporation. All rights reserved. 7 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved. 8 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved. 9 * 10 * This software is available to you under a choice of one of two 11 * licenses. You may choose to be licensed under the terms of the GNU 12 * General Public License (GPL) Version 2, available from the file 13 * COPYING in the main directory of this source tree, or the 14 * OpenIB.org BSD license below: 15 * 16 * Redistribution and use in source and binary forms, with or 17 * without modification, are permitted provided that the following 18 * conditions are met: 19 * 20 * - Redistributions of source code must retain the above 21 * copyright notice, this list of conditions and the following 22 * disclaimer. 23 * 24 * - Redistributions in binary form must reproduce the above 25 * copyright notice, this list of conditions and the following 26 * disclaimer in the documentation and/or other materials 27 * provided with the distribution. 28 * 29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 30 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 32 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 33 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 36 * SOFTWARE. 37 */ 38 39 #include <linux/errno.h> 40 #include <linux/err.h> 41 #include <linux/export.h> 42 #include <linux/string.h> 43 #include <linux/slab.h> 44 #include <linux/in.h> 45 #include <linux/in6.h> 46 #include <net/addrconf.h> 47 48 #include <rdma/ib_verbs.h> 49 #include <rdma/ib_cache.h> 50 #include <rdma/ib_addr.h> 51 #include <rdma/rw.h> 52 53 #include "core_priv.h" 54 55 static const char * const ib_events[] = { 56 [IB_EVENT_CQ_ERR] = "CQ error", 57 [IB_EVENT_QP_FATAL] = "QP fatal error", 58 [IB_EVENT_QP_REQ_ERR] = "QP request error", 59 [IB_EVENT_QP_ACCESS_ERR] = "QP access error", 60 [IB_EVENT_COMM_EST] = "communication established", 61 [IB_EVENT_SQ_DRAINED] = "send queue drained", 62 [IB_EVENT_PATH_MIG] = "path migration successful", 63 [IB_EVENT_PATH_MIG_ERR] = "path migration error", 64 [IB_EVENT_DEVICE_FATAL] = "device fatal error", 65 [IB_EVENT_PORT_ACTIVE] = "port active", 66 [IB_EVENT_PORT_ERR] = "port error", 67 [IB_EVENT_LID_CHANGE] = "LID change", 68 [IB_EVENT_PKEY_CHANGE] = "P_key change", 69 [IB_EVENT_SM_CHANGE] = "SM change", 70 [IB_EVENT_SRQ_ERR] = "SRQ error", 71 [IB_EVENT_SRQ_LIMIT_REACHED] = "SRQ limit reached", 72 [IB_EVENT_QP_LAST_WQE_REACHED] = "last WQE reached", 73 [IB_EVENT_CLIENT_REREGISTER] = "client reregister", 74 [IB_EVENT_GID_CHANGE] = "GID changed", 75 }; 76 77 const char *__attribute_const__ ib_event_msg(enum ib_event_type event) 78 { 79 size_t index = event; 80 81 return (index < ARRAY_SIZE(ib_events) && ib_events[index]) ? 82 ib_events[index] : "unrecognized event"; 83 } 84 EXPORT_SYMBOL(ib_event_msg); 85 86 static const char * const wc_statuses[] = { 87 [IB_WC_SUCCESS] = "success", 88 [IB_WC_LOC_LEN_ERR] = "local length error", 89 [IB_WC_LOC_QP_OP_ERR] = "local QP operation error", 90 [IB_WC_LOC_EEC_OP_ERR] = "local EE context operation error", 91 [IB_WC_LOC_PROT_ERR] = "local protection error", 92 [IB_WC_WR_FLUSH_ERR] = "WR flushed", 93 [IB_WC_MW_BIND_ERR] = "memory management operation error", 94 [IB_WC_BAD_RESP_ERR] = "bad response error", 95 [IB_WC_LOC_ACCESS_ERR] = "local access error", 96 [IB_WC_REM_INV_REQ_ERR] = "invalid request error", 97 [IB_WC_REM_ACCESS_ERR] = "remote access error", 98 [IB_WC_REM_OP_ERR] = "remote operation error", 99 [IB_WC_RETRY_EXC_ERR] = "transport retry counter exceeded", 100 [IB_WC_RNR_RETRY_EXC_ERR] = "RNR retry counter exceeded", 101 [IB_WC_LOC_RDD_VIOL_ERR] = "local RDD violation error", 102 [IB_WC_REM_INV_RD_REQ_ERR] = "remote invalid RD request", 103 [IB_WC_REM_ABORT_ERR] = "operation aborted", 104 [IB_WC_INV_EECN_ERR] = "invalid EE context number", 105 [IB_WC_INV_EEC_STATE_ERR] = "invalid EE context state", 106 [IB_WC_FATAL_ERR] = "fatal error", 107 [IB_WC_RESP_TIMEOUT_ERR] = "response timeout error", 108 [IB_WC_GENERAL_ERR] = "general error", 109 }; 110 111 const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status) 112 { 113 size_t index = status; 114 115 return (index < ARRAY_SIZE(wc_statuses) && wc_statuses[index]) ? 116 wc_statuses[index] : "unrecognized status"; 117 } 118 EXPORT_SYMBOL(ib_wc_status_msg); 119 120 __attribute_const__ int ib_rate_to_mult(enum ib_rate rate) 121 { 122 switch (rate) { 123 case IB_RATE_2_5_GBPS: return 1; 124 case IB_RATE_5_GBPS: return 2; 125 case IB_RATE_10_GBPS: return 4; 126 case IB_RATE_20_GBPS: return 8; 127 case IB_RATE_30_GBPS: return 12; 128 case IB_RATE_40_GBPS: return 16; 129 case IB_RATE_60_GBPS: return 24; 130 case IB_RATE_80_GBPS: return 32; 131 case IB_RATE_120_GBPS: return 48; 132 default: return -1; 133 } 134 } 135 EXPORT_SYMBOL(ib_rate_to_mult); 136 137 __attribute_const__ enum ib_rate mult_to_ib_rate(int mult) 138 { 139 switch (mult) { 140 case 1: return IB_RATE_2_5_GBPS; 141 case 2: return IB_RATE_5_GBPS; 142 case 4: return IB_RATE_10_GBPS; 143 case 8: return IB_RATE_20_GBPS; 144 case 12: return IB_RATE_30_GBPS; 145 case 16: return IB_RATE_40_GBPS; 146 case 24: return IB_RATE_60_GBPS; 147 case 32: return IB_RATE_80_GBPS; 148 case 48: return IB_RATE_120_GBPS; 149 default: return IB_RATE_PORT_CURRENT; 150 } 151 } 152 EXPORT_SYMBOL(mult_to_ib_rate); 153 154 __attribute_const__ int ib_rate_to_mbps(enum ib_rate rate) 155 { 156 switch (rate) { 157 case IB_RATE_2_5_GBPS: return 2500; 158 case IB_RATE_5_GBPS: return 5000; 159 case IB_RATE_10_GBPS: return 10000; 160 case IB_RATE_20_GBPS: return 20000; 161 case IB_RATE_30_GBPS: return 30000; 162 case IB_RATE_40_GBPS: return 40000; 163 case IB_RATE_60_GBPS: return 60000; 164 case IB_RATE_80_GBPS: return 80000; 165 case IB_RATE_120_GBPS: return 120000; 166 case IB_RATE_14_GBPS: return 14062; 167 case IB_RATE_56_GBPS: return 56250; 168 case IB_RATE_112_GBPS: return 112500; 169 case IB_RATE_168_GBPS: return 168750; 170 case IB_RATE_25_GBPS: return 25781; 171 case IB_RATE_100_GBPS: return 103125; 172 case IB_RATE_200_GBPS: return 206250; 173 case IB_RATE_300_GBPS: return 309375; 174 default: return -1; 175 } 176 } 177 EXPORT_SYMBOL(ib_rate_to_mbps); 178 179 __attribute_const__ enum rdma_transport_type 180 rdma_node_get_transport(enum rdma_node_type node_type) 181 { 182 switch (node_type) { 183 case RDMA_NODE_IB_CA: 184 case RDMA_NODE_IB_SWITCH: 185 case RDMA_NODE_IB_ROUTER: 186 return RDMA_TRANSPORT_IB; 187 case RDMA_NODE_RNIC: 188 return RDMA_TRANSPORT_IWARP; 189 case RDMA_NODE_USNIC: 190 return RDMA_TRANSPORT_USNIC; 191 case RDMA_NODE_USNIC_UDP: 192 return RDMA_TRANSPORT_USNIC_UDP; 193 default: 194 BUG(); 195 return 0; 196 } 197 } 198 EXPORT_SYMBOL(rdma_node_get_transport); 199 200 enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, u8 port_num) 201 { 202 if (device->get_link_layer) 203 return device->get_link_layer(device, port_num); 204 205 switch (rdma_node_get_transport(device->node_type)) { 206 case RDMA_TRANSPORT_IB: 207 return IB_LINK_LAYER_INFINIBAND; 208 case RDMA_TRANSPORT_IWARP: 209 case RDMA_TRANSPORT_USNIC: 210 case RDMA_TRANSPORT_USNIC_UDP: 211 return IB_LINK_LAYER_ETHERNET; 212 default: 213 return IB_LINK_LAYER_UNSPECIFIED; 214 } 215 } 216 EXPORT_SYMBOL(rdma_port_get_link_layer); 217 218 /* Protection domains */ 219 220 /** 221 * ib_alloc_pd - Allocates an unused protection domain. 222 * @device: The device on which to allocate the protection domain. 223 * 224 * A protection domain object provides an association between QPs, shared 225 * receive queues, address handles, memory regions, and memory windows. 226 * 227 * Every PD has a local_dma_lkey which can be used as the lkey value for local 228 * memory operations. 229 */ 230 struct ib_pd *__ib_alloc_pd(struct ib_device *device, unsigned int flags, 231 const char *caller) 232 { 233 struct ib_pd *pd; 234 int mr_access_flags = 0; 235 236 pd = device->alloc_pd(device, NULL, NULL); 237 if (IS_ERR(pd)) 238 return pd; 239 240 pd->device = device; 241 pd->uobject = NULL; 242 pd->__internal_mr = NULL; 243 atomic_set(&pd->usecnt, 0); 244 pd->flags = flags; 245 246 if (device->attrs.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY) 247 pd->local_dma_lkey = device->local_dma_lkey; 248 else 249 mr_access_flags |= IB_ACCESS_LOCAL_WRITE; 250 251 if (flags & IB_PD_UNSAFE_GLOBAL_RKEY) { 252 pr_warn("%s: enabling unsafe global rkey\n", caller); 253 mr_access_flags |= IB_ACCESS_REMOTE_READ | IB_ACCESS_REMOTE_WRITE; 254 } 255 256 if (mr_access_flags) { 257 struct ib_mr *mr; 258 259 mr = pd->device->get_dma_mr(pd, mr_access_flags); 260 if (IS_ERR(mr)) { 261 ib_dealloc_pd(pd); 262 return ERR_CAST(mr); 263 } 264 265 mr->device = pd->device; 266 mr->pd = pd; 267 mr->uobject = NULL; 268 mr->need_inval = false; 269 270 pd->__internal_mr = mr; 271 272 if (!(device->attrs.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY)) 273 pd->local_dma_lkey = pd->__internal_mr->lkey; 274 275 if (flags & IB_PD_UNSAFE_GLOBAL_RKEY) 276 pd->unsafe_global_rkey = pd->__internal_mr->rkey; 277 } 278 279 return pd; 280 } 281 EXPORT_SYMBOL(__ib_alloc_pd); 282 283 /** 284 * ib_dealloc_pd - Deallocates a protection domain. 285 * @pd: The protection domain to deallocate. 286 * 287 * It is an error to call this function while any resources in the pd still 288 * exist. The caller is responsible to synchronously destroy them and 289 * guarantee no new allocations will happen. 290 */ 291 void ib_dealloc_pd(struct ib_pd *pd) 292 { 293 int ret; 294 295 if (pd->__internal_mr) { 296 ret = pd->device->dereg_mr(pd->__internal_mr); 297 WARN_ON(ret); 298 pd->__internal_mr = NULL; 299 } 300 301 /* uverbs manipulates usecnt with proper locking, while the kabi 302 requires the caller to guarantee we can't race here. */ 303 WARN_ON(atomic_read(&pd->usecnt)); 304 305 /* Making delalloc_pd a void return is a WIP, no driver should return 306 an error here. */ 307 ret = pd->device->dealloc_pd(pd); 308 WARN_ONCE(ret, "Infiniband HW driver failed dealloc_pd"); 309 } 310 EXPORT_SYMBOL(ib_dealloc_pd); 311 312 /* Address handles */ 313 314 struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr) 315 { 316 struct ib_ah *ah; 317 318 ah = pd->device->create_ah(pd, ah_attr, NULL); 319 320 if (!IS_ERR(ah)) { 321 ah->device = pd->device; 322 ah->pd = pd; 323 ah->uobject = NULL; 324 atomic_inc(&pd->usecnt); 325 } 326 327 return ah; 328 } 329 EXPORT_SYMBOL(ib_create_ah); 330 331 int ib_get_rdma_header_version(const union rdma_network_hdr *hdr) 332 { 333 const struct iphdr *ip4h = (struct iphdr *)&hdr->roce4grh; 334 struct iphdr ip4h_checked; 335 const struct ipv6hdr *ip6h = (struct ipv6hdr *)&hdr->ibgrh; 336 337 /* If it's IPv6, the version must be 6, otherwise, the first 338 * 20 bytes (before the IPv4 header) are garbled. 339 */ 340 if (ip6h->version != 6) 341 return (ip4h->version == 4) ? 4 : 0; 342 /* version may be 6 or 4 because the first 20 bytes could be garbled */ 343 344 /* RoCE v2 requires no options, thus header length 345 * must be 5 words 346 */ 347 if (ip4h->ihl != 5) 348 return 6; 349 350 /* Verify checksum. 351 * We can't write on scattered buffers so we need to copy to 352 * temp buffer. 353 */ 354 memcpy(&ip4h_checked, ip4h, sizeof(ip4h_checked)); 355 ip4h_checked.check = 0; 356 ip4h_checked.check = ip_fast_csum((u8 *)&ip4h_checked, 5); 357 /* if IPv4 header checksum is OK, believe it */ 358 if (ip4h->check == ip4h_checked.check) 359 return 4; 360 return 6; 361 } 362 EXPORT_SYMBOL(ib_get_rdma_header_version); 363 364 static enum rdma_network_type ib_get_net_type_by_grh(struct ib_device *device, 365 u8 port_num, 366 const struct ib_grh *grh) 367 { 368 int grh_version; 369 370 if (rdma_protocol_ib(device, port_num)) 371 return RDMA_NETWORK_IB; 372 373 grh_version = ib_get_rdma_header_version((union rdma_network_hdr *)grh); 374 375 if (grh_version == 4) 376 return RDMA_NETWORK_IPV4; 377 378 if (grh->next_hdr == IPPROTO_UDP) 379 return RDMA_NETWORK_IPV6; 380 381 return RDMA_NETWORK_ROCE_V1; 382 } 383 384 struct find_gid_index_context { 385 u16 vlan_id; 386 enum ib_gid_type gid_type; 387 }; 388 389 static bool find_gid_index(const union ib_gid *gid, 390 const struct ib_gid_attr *gid_attr, 391 void *context) 392 { 393 struct find_gid_index_context *ctx = 394 (struct find_gid_index_context *)context; 395 396 if (ctx->gid_type != gid_attr->gid_type) 397 return false; 398 399 if ((!!(ctx->vlan_id != 0xffff) == !is_vlan_dev(gid_attr->ndev)) || 400 (is_vlan_dev(gid_attr->ndev) && 401 vlan_dev_vlan_id(gid_attr->ndev) != ctx->vlan_id)) 402 return false; 403 404 return true; 405 } 406 407 static int get_sgid_index_from_eth(struct ib_device *device, u8 port_num, 408 u16 vlan_id, const union ib_gid *sgid, 409 enum ib_gid_type gid_type, 410 u16 *gid_index) 411 { 412 struct find_gid_index_context context = {.vlan_id = vlan_id, 413 .gid_type = gid_type}; 414 415 return ib_find_gid_by_filter(device, sgid, port_num, find_gid_index, 416 &context, gid_index); 417 } 418 419 int ib_get_gids_from_rdma_hdr(const union rdma_network_hdr *hdr, 420 enum rdma_network_type net_type, 421 union ib_gid *sgid, union ib_gid *dgid) 422 { 423 struct sockaddr_in src_in; 424 struct sockaddr_in dst_in; 425 __be32 src_saddr, dst_saddr; 426 427 if (!sgid || !dgid) 428 return -EINVAL; 429 430 if (net_type == RDMA_NETWORK_IPV4) { 431 memcpy(&src_in.sin_addr.s_addr, 432 &hdr->roce4grh.saddr, 4); 433 memcpy(&dst_in.sin_addr.s_addr, 434 &hdr->roce4grh.daddr, 4); 435 src_saddr = src_in.sin_addr.s_addr; 436 dst_saddr = dst_in.sin_addr.s_addr; 437 ipv6_addr_set_v4mapped(src_saddr, 438 (struct in6_addr *)sgid); 439 ipv6_addr_set_v4mapped(dst_saddr, 440 (struct in6_addr *)dgid); 441 return 0; 442 } else if (net_type == RDMA_NETWORK_IPV6 || 443 net_type == RDMA_NETWORK_IB) { 444 *dgid = hdr->ibgrh.dgid; 445 *sgid = hdr->ibgrh.sgid; 446 return 0; 447 } else { 448 return -EINVAL; 449 } 450 } 451 EXPORT_SYMBOL(ib_get_gids_from_rdma_hdr); 452 453 int ib_init_ah_from_wc(struct ib_device *device, u8 port_num, 454 const struct ib_wc *wc, const struct ib_grh *grh, 455 struct ib_ah_attr *ah_attr) 456 { 457 u32 flow_class; 458 u16 gid_index; 459 int ret; 460 enum rdma_network_type net_type = RDMA_NETWORK_IB; 461 enum ib_gid_type gid_type = IB_GID_TYPE_IB; 462 int hoplimit = 0xff; 463 union ib_gid dgid; 464 union ib_gid sgid; 465 466 memset(ah_attr, 0, sizeof *ah_attr); 467 if (rdma_cap_eth_ah(device, port_num)) { 468 if (wc->wc_flags & IB_WC_WITH_NETWORK_HDR_TYPE) 469 net_type = wc->network_hdr_type; 470 else 471 net_type = ib_get_net_type_by_grh(device, port_num, grh); 472 gid_type = ib_network_to_gid_type(net_type); 473 } 474 ret = ib_get_gids_from_rdma_hdr((union rdma_network_hdr *)grh, net_type, 475 &sgid, &dgid); 476 if (ret) 477 return ret; 478 479 if (rdma_protocol_roce(device, port_num)) { 480 int if_index = 0; 481 u16 vlan_id = wc->wc_flags & IB_WC_WITH_VLAN ? 482 wc->vlan_id : 0xffff; 483 struct net_device *idev; 484 struct net_device *resolved_dev; 485 486 if (!(wc->wc_flags & IB_WC_GRH)) 487 return -EPROTOTYPE; 488 489 if (!device->get_netdev) 490 return -EOPNOTSUPP; 491 492 idev = device->get_netdev(device, port_num); 493 if (!idev) 494 return -ENODEV; 495 496 ret = rdma_addr_find_l2_eth_by_grh(&dgid, &sgid, 497 ah_attr->dmac, 498 wc->wc_flags & IB_WC_WITH_VLAN ? 499 NULL : &vlan_id, 500 &if_index, &hoplimit); 501 if (ret) { 502 dev_put(idev); 503 return ret; 504 } 505 506 resolved_dev = dev_get_by_index(&init_net, if_index); 507 if (resolved_dev->flags & IFF_LOOPBACK) { 508 dev_put(resolved_dev); 509 resolved_dev = idev; 510 dev_hold(resolved_dev); 511 } 512 rcu_read_lock(); 513 if (resolved_dev != idev && !rdma_is_upper_dev_rcu(idev, 514 resolved_dev)) 515 ret = -EHOSTUNREACH; 516 rcu_read_unlock(); 517 dev_put(idev); 518 dev_put(resolved_dev); 519 if (ret) 520 return ret; 521 522 ret = get_sgid_index_from_eth(device, port_num, vlan_id, 523 &dgid, gid_type, &gid_index); 524 if (ret) 525 return ret; 526 } 527 528 ah_attr->dlid = wc->slid; 529 ah_attr->sl = wc->sl; 530 ah_attr->src_path_bits = wc->dlid_path_bits; 531 ah_attr->port_num = port_num; 532 533 if (wc->wc_flags & IB_WC_GRH) { 534 ah_attr->ah_flags = IB_AH_GRH; 535 ah_attr->grh.dgid = sgid; 536 537 if (!rdma_cap_eth_ah(device, port_num)) { 538 if (dgid.global.interface_id != cpu_to_be64(IB_SA_WELL_KNOWN_GUID)) { 539 ret = ib_find_cached_gid_by_port(device, &dgid, 540 IB_GID_TYPE_IB, 541 port_num, NULL, 542 &gid_index); 543 if (ret) 544 return ret; 545 } else { 546 gid_index = 0; 547 } 548 } 549 550 ah_attr->grh.sgid_index = (u8) gid_index; 551 flow_class = be32_to_cpu(grh->version_tclass_flow); 552 ah_attr->grh.flow_label = flow_class & 0xFFFFF; 553 ah_attr->grh.hop_limit = hoplimit; 554 ah_attr->grh.traffic_class = (flow_class >> 20) & 0xFF; 555 } 556 return 0; 557 } 558 EXPORT_SYMBOL(ib_init_ah_from_wc); 559 560 struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc, 561 const struct ib_grh *grh, u8 port_num) 562 { 563 struct ib_ah_attr ah_attr; 564 int ret; 565 566 ret = ib_init_ah_from_wc(pd->device, port_num, wc, grh, &ah_attr); 567 if (ret) 568 return ERR_PTR(ret); 569 570 return ib_create_ah(pd, &ah_attr); 571 } 572 EXPORT_SYMBOL(ib_create_ah_from_wc); 573 574 int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr) 575 { 576 return ah->device->modify_ah ? 577 ah->device->modify_ah(ah, ah_attr) : 578 -ENOSYS; 579 } 580 EXPORT_SYMBOL(ib_modify_ah); 581 582 int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr) 583 { 584 return ah->device->query_ah ? 585 ah->device->query_ah(ah, ah_attr) : 586 -ENOSYS; 587 } 588 EXPORT_SYMBOL(ib_query_ah); 589 590 int ib_destroy_ah(struct ib_ah *ah) 591 { 592 struct ib_pd *pd; 593 int ret; 594 595 pd = ah->pd; 596 ret = ah->device->destroy_ah(ah); 597 if (!ret) 598 atomic_dec(&pd->usecnt); 599 600 return ret; 601 } 602 EXPORT_SYMBOL(ib_destroy_ah); 603 604 /* Shared receive queues */ 605 606 struct ib_srq *ib_create_srq(struct ib_pd *pd, 607 struct ib_srq_init_attr *srq_init_attr) 608 { 609 struct ib_srq *srq; 610 611 if (!pd->device->create_srq) 612 return ERR_PTR(-ENOSYS); 613 614 srq = pd->device->create_srq(pd, srq_init_attr, NULL); 615 616 if (!IS_ERR(srq)) { 617 srq->device = pd->device; 618 srq->pd = pd; 619 srq->uobject = NULL; 620 srq->event_handler = srq_init_attr->event_handler; 621 srq->srq_context = srq_init_attr->srq_context; 622 srq->srq_type = srq_init_attr->srq_type; 623 if (srq->srq_type == IB_SRQT_XRC) { 624 srq->ext.xrc.xrcd = srq_init_attr->ext.xrc.xrcd; 625 srq->ext.xrc.cq = srq_init_attr->ext.xrc.cq; 626 atomic_inc(&srq->ext.xrc.xrcd->usecnt); 627 atomic_inc(&srq->ext.xrc.cq->usecnt); 628 } 629 atomic_inc(&pd->usecnt); 630 atomic_set(&srq->usecnt, 0); 631 } 632 633 return srq; 634 } 635 EXPORT_SYMBOL(ib_create_srq); 636 637 int ib_modify_srq(struct ib_srq *srq, 638 struct ib_srq_attr *srq_attr, 639 enum ib_srq_attr_mask srq_attr_mask) 640 { 641 return srq->device->modify_srq ? 642 srq->device->modify_srq(srq, srq_attr, srq_attr_mask, NULL) : 643 -ENOSYS; 644 } 645 EXPORT_SYMBOL(ib_modify_srq); 646 647 int ib_query_srq(struct ib_srq *srq, 648 struct ib_srq_attr *srq_attr) 649 { 650 return srq->device->query_srq ? 651 srq->device->query_srq(srq, srq_attr) : -ENOSYS; 652 } 653 EXPORT_SYMBOL(ib_query_srq); 654 655 int ib_destroy_srq(struct ib_srq *srq) 656 { 657 struct ib_pd *pd; 658 enum ib_srq_type srq_type; 659 struct ib_xrcd *uninitialized_var(xrcd); 660 struct ib_cq *uninitialized_var(cq); 661 int ret; 662 663 if (atomic_read(&srq->usecnt)) 664 return -EBUSY; 665 666 pd = srq->pd; 667 srq_type = srq->srq_type; 668 if (srq_type == IB_SRQT_XRC) { 669 xrcd = srq->ext.xrc.xrcd; 670 cq = srq->ext.xrc.cq; 671 } 672 673 ret = srq->device->destroy_srq(srq); 674 if (!ret) { 675 atomic_dec(&pd->usecnt); 676 if (srq_type == IB_SRQT_XRC) { 677 atomic_dec(&xrcd->usecnt); 678 atomic_dec(&cq->usecnt); 679 } 680 } 681 682 return ret; 683 } 684 EXPORT_SYMBOL(ib_destroy_srq); 685 686 /* Queue pairs */ 687 688 static void __ib_shared_qp_event_handler(struct ib_event *event, void *context) 689 { 690 struct ib_qp *qp = context; 691 unsigned long flags; 692 693 spin_lock_irqsave(&qp->device->event_handler_lock, flags); 694 list_for_each_entry(event->element.qp, &qp->open_list, open_list) 695 if (event->element.qp->event_handler) 696 event->element.qp->event_handler(event, event->element.qp->qp_context); 697 spin_unlock_irqrestore(&qp->device->event_handler_lock, flags); 698 } 699 700 static void __ib_insert_xrcd_qp(struct ib_xrcd *xrcd, struct ib_qp *qp) 701 { 702 mutex_lock(&xrcd->tgt_qp_mutex); 703 list_add(&qp->xrcd_list, &xrcd->tgt_qp_list); 704 mutex_unlock(&xrcd->tgt_qp_mutex); 705 } 706 707 static struct ib_qp *__ib_open_qp(struct ib_qp *real_qp, 708 void (*event_handler)(struct ib_event *, void *), 709 void *qp_context) 710 { 711 struct ib_qp *qp; 712 unsigned long flags; 713 714 qp = kzalloc(sizeof *qp, GFP_KERNEL); 715 if (!qp) 716 return ERR_PTR(-ENOMEM); 717 718 qp->real_qp = real_qp; 719 atomic_inc(&real_qp->usecnt); 720 qp->device = real_qp->device; 721 qp->event_handler = event_handler; 722 qp->qp_context = qp_context; 723 qp->qp_num = real_qp->qp_num; 724 qp->qp_type = real_qp->qp_type; 725 726 spin_lock_irqsave(&real_qp->device->event_handler_lock, flags); 727 list_add(&qp->open_list, &real_qp->open_list); 728 spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags); 729 730 return qp; 731 } 732 733 struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd, 734 struct ib_qp_open_attr *qp_open_attr) 735 { 736 struct ib_qp *qp, *real_qp; 737 738 if (qp_open_attr->qp_type != IB_QPT_XRC_TGT) 739 return ERR_PTR(-EINVAL); 740 741 qp = ERR_PTR(-EINVAL); 742 mutex_lock(&xrcd->tgt_qp_mutex); 743 list_for_each_entry(real_qp, &xrcd->tgt_qp_list, xrcd_list) { 744 if (real_qp->qp_num == qp_open_attr->qp_num) { 745 qp = __ib_open_qp(real_qp, qp_open_attr->event_handler, 746 qp_open_attr->qp_context); 747 break; 748 } 749 } 750 mutex_unlock(&xrcd->tgt_qp_mutex); 751 return qp; 752 } 753 EXPORT_SYMBOL(ib_open_qp); 754 755 static struct ib_qp *ib_create_xrc_qp(struct ib_qp *qp, 756 struct ib_qp_init_attr *qp_init_attr) 757 { 758 struct ib_qp *real_qp = qp; 759 760 qp->event_handler = __ib_shared_qp_event_handler; 761 qp->qp_context = qp; 762 qp->pd = NULL; 763 qp->send_cq = qp->recv_cq = NULL; 764 qp->srq = NULL; 765 qp->xrcd = qp_init_attr->xrcd; 766 atomic_inc(&qp_init_attr->xrcd->usecnt); 767 INIT_LIST_HEAD(&qp->open_list); 768 769 qp = __ib_open_qp(real_qp, qp_init_attr->event_handler, 770 qp_init_attr->qp_context); 771 if (!IS_ERR(qp)) 772 __ib_insert_xrcd_qp(qp_init_attr->xrcd, real_qp); 773 else 774 real_qp->device->destroy_qp(real_qp); 775 return qp; 776 } 777 778 struct ib_qp *ib_create_qp(struct ib_pd *pd, 779 struct ib_qp_init_attr *qp_init_attr) 780 { 781 struct ib_device *device = pd ? pd->device : qp_init_attr->xrcd->device; 782 struct ib_qp *qp; 783 int ret; 784 785 if (qp_init_attr->rwq_ind_tbl && 786 (qp_init_attr->recv_cq || 787 qp_init_attr->srq || qp_init_attr->cap.max_recv_wr || 788 qp_init_attr->cap.max_recv_sge)) 789 return ERR_PTR(-EINVAL); 790 791 /* 792 * If the callers is using the RDMA API calculate the resources 793 * needed for the RDMA READ/WRITE operations. 794 * 795 * Note that these callers need to pass in a port number. 796 */ 797 if (qp_init_attr->cap.max_rdma_ctxs) 798 rdma_rw_init_qp(device, qp_init_attr); 799 800 qp = device->create_qp(pd, qp_init_attr, NULL); 801 if (IS_ERR(qp)) 802 return qp; 803 804 qp->device = device; 805 qp->real_qp = qp; 806 qp->uobject = NULL; 807 qp->qp_type = qp_init_attr->qp_type; 808 qp->rwq_ind_tbl = qp_init_attr->rwq_ind_tbl; 809 810 atomic_set(&qp->usecnt, 0); 811 qp->mrs_used = 0; 812 spin_lock_init(&qp->mr_lock); 813 INIT_LIST_HEAD(&qp->rdma_mrs); 814 INIT_LIST_HEAD(&qp->sig_mrs); 815 816 if (qp_init_attr->qp_type == IB_QPT_XRC_TGT) 817 return ib_create_xrc_qp(qp, qp_init_attr); 818 819 qp->event_handler = qp_init_attr->event_handler; 820 qp->qp_context = qp_init_attr->qp_context; 821 if (qp_init_attr->qp_type == IB_QPT_XRC_INI) { 822 qp->recv_cq = NULL; 823 qp->srq = NULL; 824 } else { 825 qp->recv_cq = qp_init_attr->recv_cq; 826 if (qp_init_attr->recv_cq) 827 atomic_inc(&qp_init_attr->recv_cq->usecnt); 828 qp->srq = qp_init_attr->srq; 829 if (qp->srq) 830 atomic_inc(&qp_init_attr->srq->usecnt); 831 } 832 833 qp->pd = pd; 834 qp->send_cq = qp_init_attr->send_cq; 835 qp->xrcd = NULL; 836 837 atomic_inc(&pd->usecnt); 838 if (qp_init_attr->send_cq) 839 atomic_inc(&qp_init_attr->send_cq->usecnt); 840 if (qp_init_attr->rwq_ind_tbl) 841 atomic_inc(&qp->rwq_ind_tbl->usecnt); 842 843 if (qp_init_attr->cap.max_rdma_ctxs) { 844 ret = rdma_rw_init_mrs(qp, qp_init_attr); 845 if (ret) { 846 pr_err("failed to init MR pool ret= %d\n", ret); 847 ib_destroy_qp(qp); 848 return ERR_PTR(ret); 849 } 850 } 851 852 /* 853 * Note: all hw drivers guarantee that max_send_sge is lower than 854 * the device RDMA WRITE SGE limit but not all hw drivers ensure that 855 * max_send_sge <= max_sge_rd. 856 */ 857 qp->max_write_sge = qp_init_attr->cap.max_send_sge; 858 qp->max_read_sge = min_t(u32, qp_init_attr->cap.max_send_sge, 859 device->attrs.max_sge_rd); 860 861 return qp; 862 } 863 EXPORT_SYMBOL(ib_create_qp); 864 865 static const struct { 866 int valid; 867 enum ib_qp_attr_mask req_param[IB_QPT_MAX]; 868 enum ib_qp_attr_mask opt_param[IB_QPT_MAX]; 869 } qp_state_table[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = { 870 [IB_QPS_RESET] = { 871 [IB_QPS_RESET] = { .valid = 1 }, 872 [IB_QPS_INIT] = { 873 .valid = 1, 874 .req_param = { 875 [IB_QPT_UD] = (IB_QP_PKEY_INDEX | 876 IB_QP_PORT | 877 IB_QP_QKEY), 878 [IB_QPT_RAW_PACKET] = IB_QP_PORT, 879 [IB_QPT_UC] = (IB_QP_PKEY_INDEX | 880 IB_QP_PORT | 881 IB_QP_ACCESS_FLAGS), 882 [IB_QPT_RC] = (IB_QP_PKEY_INDEX | 883 IB_QP_PORT | 884 IB_QP_ACCESS_FLAGS), 885 [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX | 886 IB_QP_PORT | 887 IB_QP_ACCESS_FLAGS), 888 [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX | 889 IB_QP_PORT | 890 IB_QP_ACCESS_FLAGS), 891 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX | 892 IB_QP_QKEY), 893 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX | 894 IB_QP_QKEY), 895 } 896 }, 897 }, 898 [IB_QPS_INIT] = { 899 [IB_QPS_RESET] = { .valid = 1 }, 900 [IB_QPS_ERR] = { .valid = 1 }, 901 [IB_QPS_INIT] = { 902 .valid = 1, 903 .opt_param = { 904 [IB_QPT_UD] = (IB_QP_PKEY_INDEX | 905 IB_QP_PORT | 906 IB_QP_QKEY), 907 [IB_QPT_UC] = (IB_QP_PKEY_INDEX | 908 IB_QP_PORT | 909 IB_QP_ACCESS_FLAGS), 910 [IB_QPT_RC] = (IB_QP_PKEY_INDEX | 911 IB_QP_PORT | 912 IB_QP_ACCESS_FLAGS), 913 [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX | 914 IB_QP_PORT | 915 IB_QP_ACCESS_FLAGS), 916 [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX | 917 IB_QP_PORT | 918 IB_QP_ACCESS_FLAGS), 919 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX | 920 IB_QP_QKEY), 921 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX | 922 IB_QP_QKEY), 923 } 924 }, 925 [IB_QPS_RTR] = { 926 .valid = 1, 927 .req_param = { 928 [IB_QPT_UC] = (IB_QP_AV | 929 IB_QP_PATH_MTU | 930 IB_QP_DEST_QPN | 931 IB_QP_RQ_PSN), 932 [IB_QPT_RC] = (IB_QP_AV | 933 IB_QP_PATH_MTU | 934 IB_QP_DEST_QPN | 935 IB_QP_RQ_PSN | 936 IB_QP_MAX_DEST_RD_ATOMIC | 937 IB_QP_MIN_RNR_TIMER), 938 [IB_QPT_XRC_INI] = (IB_QP_AV | 939 IB_QP_PATH_MTU | 940 IB_QP_DEST_QPN | 941 IB_QP_RQ_PSN), 942 [IB_QPT_XRC_TGT] = (IB_QP_AV | 943 IB_QP_PATH_MTU | 944 IB_QP_DEST_QPN | 945 IB_QP_RQ_PSN | 946 IB_QP_MAX_DEST_RD_ATOMIC | 947 IB_QP_MIN_RNR_TIMER), 948 }, 949 .opt_param = { 950 [IB_QPT_UD] = (IB_QP_PKEY_INDEX | 951 IB_QP_QKEY), 952 [IB_QPT_UC] = (IB_QP_ALT_PATH | 953 IB_QP_ACCESS_FLAGS | 954 IB_QP_PKEY_INDEX), 955 [IB_QPT_RC] = (IB_QP_ALT_PATH | 956 IB_QP_ACCESS_FLAGS | 957 IB_QP_PKEY_INDEX), 958 [IB_QPT_XRC_INI] = (IB_QP_ALT_PATH | 959 IB_QP_ACCESS_FLAGS | 960 IB_QP_PKEY_INDEX), 961 [IB_QPT_XRC_TGT] = (IB_QP_ALT_PATH | 962 IB_QP_ACCESS_FLAGS | 963 IB_QP_PKEY_INDEX), 964 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX | 965 IB_QP_QKEY), 966 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX | 967 IB_QP_QKEY), 968 }, 969 }, 970 }, 971 [IB_QPS_RTR] = { 972 [IB_QPS_RESET] = { .valid = 1 }, 973 [IB_QPS_ERR] = { .valid = 1 }, 974 [IB_QPS_RTS] = { 975 .valid = 1, 976 .req_param = { 977 [IB_QPT_UD] = IB_QP_SQ_PSN, 978 [IB_QPT_UC] = IB_QP_SQ_PSN, 979 [IB_QPT_RC] = (IB_QP_TIMEOUT | 980 IB_QP_RETRY_CNT | 981 IB_QP_RNR_RETRY | 982 IB_QP_SQ_PSN | 983 IB_QP_MAX_QP_RD_ATOMIC), 984 [IB_QPT_XRC_INI] = (IB_QP_TIMEOUT | 985 IB_QP_RETRY_CNT | 986 IB_QP_RNR_RETRY | 987 IB_QP_SQ_PSN | 988 IB_QP_MAX_QP_RD_ATOMIC), 989 [IB_QPT_XRC_TGT] = (IB_QP_TIMEOUT | 990 IB_QP_SQ_PSN), 991 [IB_QPT_SMI] = IB_QP_SQ_PSN, 992 [IB_QPT_GSI] = IB_QP_SQ_PSN, 993 }, 994 .opt_param = { 995 [IB_QPT_UD] = (IB_QP_CUR_STATE | 996 IB_QP_QKEY), 997 [IB_QPT_UC] = (IB_QP_CUR_STATE | 998 IB_QP_ALT_PATH | 999 IB_QP_ACCESS_FLAGS | 1000 IB_QP_PATH_MIG_STATE), 1001 [IB_QPT_RC] = (IB_QP_CUR_STATE | 1002 IB_QP_ALT_PATH | 1003 IB_QP_ACCESS_FLAGS | 1004 IB_QP_MIN_RNR_TIMER | 1005 IB_QP_PATH_MIG_STATE), 1006 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE | 1007 IB_QP_ALT_PATH | 1008 IB_QP_ACCESS_FLAGS | 1009 IB_QP_PATH_MIG_STATE), 1010 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE | 1011 IB_QP_ALT_PATH | 1012 IB_QP_ACCESS_FLAGS | 1013 IB_QP_MIN_RNR_TIMER | 1014 IB_QP_PATH_MIG_STATE), 1015 [IB_QPT_SMI] = (IB_QP_CUR_STATE | 1016 IB_QP_QKEY), 1017 [IB_QPT_GSI] = (IB_QP_CUR_STATE | 1018 IB_QP_QKEY), 1019 [IB_QPT_RAW_PACKET] = IB_QP_RATE_LIMIT, 1020 } 1021 } 1022 }, 1023 [IB_QPS_RTS] = { 1024 [IB_QPS_RESET] = { .valid = 1 }, 1025 [IB_QPS_ERR] = { .valid = 1 }, 1026 [IB_QPS_RTS] = { 1027 .valid = 1, 1028 .opt_param = { 1029 [IB_QPT_UD] = (IB_QP_CUR_STATE | 1030 IB_QP_QKEY), 1031 [IB_QPT_UC] = (IB_QP_CUR_STATE | 1032 IB_QP_ACCESS_FLAGS | 1033 IB_QP_ALT_PATH | 1034 IB_QP_PATH_MIG_STATE), 1035 [IB_QPT_RC] = (IB_QP_CUR_STATE | 1036 IB_QP_ACCESS_FLAGS | 1037 IB_QP_ALT_PATH | 1038 IB_QP_PATH_MIG_STATE | 1039 IB_QP_MIN_RNR_TIMER), 1040 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE | 1041 IB_QP_ACCESS_FLAGS | 1042 IB_QP_ALT_PATH | 1043 IB_QP_PATH_MIG_STATE), 1044 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE | 1045 IB_QP_ACCESS_FLAGS | 1046 IB_QP_ALT_PATH | 1047 IB_QP_PATH_MIG_STATE | 1048 IB_QP_MIN_RNR_TIMER), 1049 [IB_QPT_SMI] = (IB_QP_CUR_STATE | 1050 IB_QP_QKEY), 1051 [IB_QPT_GSI] = (IB_QP_CUR_STATE | 1052 IB_QP_QKEY), 1053 [IB_QPT_RAW_PACKET] = IB_QP_RATE_LIMIT, 1054 } 1055 }, 1056 [IB_QPS_SQD] = { 1057 .valid = 1, 1058 .opt_param = { 1059 [IB_QPT_UD] = IB_QP_EN_SQD_ASYNC_NOTIFY, 1060 [IB_QPT_UC] = IB_QP_EN_SQD_ASYNC_NOTIFY, 1061 [IB_QPT_RC] = IB_QP_EN_SQD_ASYNC_NOTIFY, 1062 [IB_QPT_XRC_INI] = IB_QP_EN_SQD_ASYNC_NOTIFY, 1063 [IB_QPT_XRC_TGT] = IB_QP_EN_SQD_ASYNC_NOTIFY, /* ??? */ 1064 [IB_QPT_SMI] = IB_QP_EN_SQD_ASYNC_NOTIFY, 1065 [IB_QPT_GSI] = IB_QP_EN_SQD_ASYNC_NOTIFY 1066 } 1067 }, 1068 }, 1069 [IB_QPS_SQD] = { 1070 [IB_QPS_RESET] = { .valid = 1 }, 1071 [IB_QPS_ERR] = { .valid = 1 }, 1072 [IB_QPS_RTS] = { 1073 .valid = 1, 1074 .opt_param = { 1075 [IB_QPT_UD] = (IB_QP_CUR_STATE | 1076 IB_QP_QKEY), 1077 [IB_QPT_UC] = (IB_QP_CUR_STATE | 1078 IB_QP_ALT_PATH | 1079 IB_QP_ACCESS_FLAGS | 1080 IB_QP_PATH_MIG_STATE), 1081 [IB_QPT_RC] = (IB_QP_CUR_STATE | 1082 IB_QP_ALT_PATH | 1083 IB_QP_ACCESS_FLAGS | 1084 IB_QP_MIN_RNR_TIMER | 1085 IB_QP_PATH_MIG_STATE), 1086 [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE | 1087 IB_QP_ALT_PATH | 1088 IB_QP_ACCESS_FLAGS | 1089 IB_QP_PATH_MIG_STATE), 1090 [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE | 1091 IB_QP_ALT_PATH | 1092 IB_QP_ACCESS_FLAGS | 1093 IB_QP_MIN_RNR_TIMER | 1094 IB_QP_PATH_MIG_STATE), 1095 [IB_QPT_SMI] = (IB_QP_CUR_STATE | 1096 IB_QP_QKEY), 1097 [IB_QPT_GSI] = (IB_QP_CUR_STATE | 1098 IB_QP_QKEY), 1099 } 1100 }, 1101 [IB_QPS_SQD] = { 1102 .valid = 1, 1103 .opt_param = { 1104 [IB_QPT_UD] = (IB_QP_PKEY_INDEX | 1105 IB_QP_QKEY), 1106 [IB_QPT_UC] = (IB_QP_AV | 1107 IB_QP_ALT_PATH | 1108 IB_QP_ACCESS_FLAGS | 1109 IB_QP_PKEY_INDEX | 1110 IB_QP_PATH_MIG_STATE), 1111 [IB_QPT_RC] = (IB_QP_PORT | 1112 IB_QP_AV | 1113 IB_QP_TIMEOUT | 1114 IB_QP_RETRY_CNT | 1115 IB_QP_RNR_RETRY | 1116 IB_QP_MAX_QP_RD_ATOMIC | 1117 IB_QP_MAX_DEST_RD_ATOMIC | 1118 IB_QP_ALT_PATH | 1119 IB_QP_ACCESS_FLAGS | 1120 IB_QP_PKEY_INDEX | 1121 IB_QP_MIN_RNR_TIMER | 1122 IB_QP_PATH_MIG_STATE), 1123 [IB_QPT_XRC_INI] = (IB_QP_PORT | 1124 IB_QP_AV | 1125 IB_QP_TIMEOUT | 1126 IB_QP_RETRY_CNT | 1127 IB_QP_RNR_RETRY | 1128 IB_QP_MAX_QP_RD_ATOMIC | 1129 IB_QP_ALT_PATH | 1130 IB_QP_ACCESS_FLAGS | 1131 IB_QP_PKEY_INDEX | 1132 IB_QP_PATH_MIG_STATE), 1133 [IB_QPT_XRC_TGT] = (IB_QP_PORT | 1134 IB_QP_AV | 1135 IB_QP_TIMEOUT | 1136 IB_QP_MAX_DEST_RD_ATOMIC | 1137 IB_QP_ALT_PATH | 1138 IB_QP_ACCESS_FLAGS | 1139 IB_QP_PKEY_INDEX | 1140 IB_QP_MIN_RNR_TIMER | 1141 IB_QP_PATH_MIG_STATE), 1142 [IB_QPT_SMI] = (IB_QP_PKEY_INDEX | 1143 IB_QP_QKEY), 1144 [IB_QPT_GSI] = (IB_QP_PKEY_INDEX | 1145 IB_QP_QKEY), 1146 } 1147 } 1148 }, 1149 [IB_QPS_SQE] = { 1150 [IB_QPS_RESET] = { .valid = 1 }, 1151 [IB_QPS_ERR] = { .valid = 1 }, 1152 [IB_QPS_RTS] = { 1153 .valid = 1, 1154 .opt_param = { 1155 [IB_QPT_UD] = (IB_QP_CUR_STATE | 1156 IB_QP_QKEY), 1157 [IB_QPT_UC] = (IB_QP_CUR_STATE | 1158 IB_QP_ACCESS_FLAGS), 1159 [IB_QPT_SMI] = (IB_QP_CUR_STATE | 1160 IB_QP_QKEY), 1161 [IB_QPT_GSI] = (IB_QP_CUR_STATE | 1162 IB_QP_QKEY), 1163 } 1164 } 1165 }, 1166 [IB_QPS_ERR] = { 1167 [IB_QPS_RESET] = { .valid = 1 }, 1168 [IB_QPS_ERR] = { .valid = 1 } 1169 } 1170 }; 1171 1172 int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state, 1173 enum ib_qp_type type, enum ib_qp_attr_mask mask, 1174 enum rdma_link_layer ll) 1175 { 1176 enum ib_qp_attr_mask req_param, opt_param; 1177 1178 if (cur_state < 0 || cur_state > IB_QPS_ERR || 1179 next_state < 0 || next_state > IB_QPS_ERR) 1180 return 0; 1181 1182 if (mask & IB_QP_CUR_STATE && 1183 cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS && 1184 cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE) 1185 return 0; 1186 1187 if (!qp_state_table[cur_state][next_state].valid) 1188 return 0; 1189 1190 req_param = qp_state_table[cur_state][next_state].req_param[type]; 1191 opt_param = qp_state_table[cur_state][next_state].opt_param[type]; 1192 1193 if ((mask & req_param) != req_param) 1194 return 0; 1195 1196 if (mask & ~(req_param | opt_param | IB_QP_STATE)) 1197 return 0; 1198 1199 return 1; 1200 } 1201 EXPORT_SYMBOL(ib_modify_qp_is_ok); 1202 1203 int ib_resolve_eth_dmac(struct ib_device *device, 1204 struct ib_ah_attr *ah_attr) 1205 { 1206 int ret = 0; 1207 1208 if (!rdma_is_port_valid(device, ah_attr->port_num)) 1209 return -EINVAL; 1210 1211 if (!rdma_cap_eth_ah(device, ah_attr->port_num)) 1212 return 0; 1213 1214 if (rdma_link_local_addr((struct in6_addr *)ah_attr->grh.dgid.raw)) { 1215 rdma_get_ll_mac((struct in6_addr *)ah_attr->grh.dgid.raw, 1216 ah_attr->dmac); 1217 } else { 1218 union ib_gid sgid; 1219 struct ib_gid_attr sgid_attr; 1220 int ifindex; 1221 int hop_limit; 1222 1223 ret = ib_query_gid(device, 1224 ah_attr->port_num, 1225 ah_attr->grh.sgid_index, 1226 &sgid, &sgid_attr); 1227 1228 if (ret || !sgid_attr.ndev) { 1229 if (!ret) 1230 ret = -ENXIO; 1231 goto out; 1232 } 1233 1234 ifindex = sgid_attr.ndev->ifindex; 1235 1236 ret = rdma_addr_find_l2_eth_by_grh(&sgid, 1237 &ah_attr->grh.dgid, 1238 ah_attr->dmac, 1239 NULL, &ifindex, &hop_limit); 1240 1241 dev_put(sgid_attr.ndev); 1242 1243 ah_attr->grh.hop_limit = hop_limit; 1244 } 1245 out: 1246 return ret; 1247 } 1248 EXPORT_SYMBOL(ib_resolve_eth_dmac); 1249 1250 int ib_modify_qp(struct ib_qp *qp, 1251 struct ib_qp_attr *qp_attr, 1252 int qp_attr_mask) 1253 { 1254 1255 if (qp_attr_mask & IB_QP_AV) { 1256 int ret; 1257 1258 ret = ib_resolve_eth_dmac(qp->device, &qp_attr->ah_attr); 1259 if (ret) 1260 return ret; 1261 } 1262 1263 return qp->device->modify_qp(qp->real_qp, qp_attr, qp_attr_mask, NULL); 1264 } 1265 EXPORT_SYMBOL(ib_modify_qp); 1266 1267 int ib_query_qp(struct ib_qp *qp, 1268 struct ib_qp_attr *qp_attr, 1269 int qp_attr_mask, 1270 struct ib_qp_init_attr *qp_init_attr) 1271 { 1272 return qp->device->query_qp ? 1273 qp->device->query_qp(qp->real_qp, qp_attr, qp_attr_mask, qp_init_attr) : 1274 -ENOSYS; 1275 } 1276 EXPORT_SYMBOL(ib_query_qp); 1277 1278 int ib_close_qp(struct ib_qp *qp) 1279 { 1280 struct ib_qp *real_qp; 1281 unsigned long flags; 1282 1283 real_qp = qp->real_qp; 1284 if (real_qp == qp) 1285 return -EINVAL; 1286 1287 spin_lock_irqsave(&real_qp->device->event_handler_lock, flags); 1288 list_del(&qp->open_list); 1289 spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags); 1290 1291 atomic_dec(&real_qp->usecnt); 1292 kfree(qp); 1293 1294 return 0; 1295 } 1296 EXPORT_SYMBOL(ib_close_qp); 1297 1298 static int __ib_destroy_shared_qp(struct ib_qp *qp) 1299 { 1300 struct ib_xrcd *xrcd; 1301 struct ib_qp *real_qp; 1302 int ret; 1303 1304 real_qp = qp->real_qp; 1305 xrcd = real_qp->xrcd; 1306 1307 mutex_lock(&xrcd->tgt_qp_mutex); 1308 ib_close_qp(qp); 1309 if (atomic_read(&real_qp->usecnt) == 0) 1310 list_del(&real_qp->xrcd_list); 1311 else 1312 real_qp = NULL; 1313 mutex_unlock(&xrcd->tgt_qp_mutex); 1314 1315 if (real_qp) { 1316 ret = ib_destroy_qp(real_qp); 1317 if (!ret) 1318 atomic_dec(&xrcd->usecnt); 1319 else 1320 __ib_insert_xrcd_qp(xrcd, real_qp); 1321 } 1322 1323 return 0; 1324 } 1325 1326 int ib_destroy_qp(struct ib_qp *qp) 1327 { 1328 struct ib_pd *pd; 1329 struct ib_cq *scq, *rcq; 1330 struct ib_srq *srq; 1331 struct ib_rwq_ind_table *ind_tbl; 1332 int ret; 1333 1334 WARN_ON_ONCE(qp->mrs_used > 0); 1335 1336 if (atomic_read(&qp->usecnt)) 1337 return -EBUSY; 1338 1339 if (qp->real_qp != qp) 1340 return __ib_destroy_shared_qp(qp); 1341 1342 pd = qp->pd; 1343 scq = qp->send_cq; 1344 rcq = qp->recv_cq; 1345 srq = qp->srq; 1346 ind_tbl = qp->rwq_ind_tbl; 1347 1348 if (!qp->uobject) 1349 rdma_rw_cleanup_mrs(qp); 1350 1351 ret = qp->device->destroy_qp(qp); 1352 if (!ret) { 1353 if (pd) 1354 atomic_dec(&pd->usecnt); 1355 if (scq) 1356 atomic_dec(&scq->usecnt); 1357 if (rcq) 1358 atomic_dec(&rcq->usecnt); 1359 if (srq) 1360 atomic_dec(&srq->usecnt); 1361 if (ind_tbl) 1362 atomic_dec(&ind_tbl->usecnt); 1363 } 1364 1365 return ret; 1366 } 1367 EXPORT_SYMBOL(ib_destroy_qp); 1368 1369 /* Completion queues */ 1370 1371 struct ib_cq *ib_create_cq(struct ib_device *device, 1372 ib_comp_handler comp_handler, 1373 void (*event_handler)(struct ib_event *, void *), 1374 void *cq_context, 1375 const struct ib_cq_init_attr *cq_attr) 1376 { 1377 struct ib_cq *cq; 1378 1379 cq = device->create_cq(device, cq_attr, NULL, NULL); 1380 1381 if (!IS_ERR(cq)) { 1382 cq->device = device; 1383 cq->uobject = NULL; 1384 cq->comp_handler = comp_handler; 1385 cq->event_handler = event_handler; 1386 cq->cq_context = cq_context; 1387 atomic_set(&cq->usecnt, 0); 1388 } 1389 1390 return cq; 1391 } 1392 EXPORT_SYMBOL(ib_create_cq); 1393 1394 int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period) 1395 { 1396 return cq->device->modify_cq ? 1397 cq->device->modify_cq(cq, cq_count, cq_period) : -ENOSYS; 1398 } 1399 EXPORT_SYMBOL(ib_modify_cq); 1400 1401 int ib_destroy_cq(struct ib_cq *cq) 1402 { 1403 if (atomic_read(&cq->usecnt)) 1404 return -EBUSY; 1405 1406 return cq->device->destroy_cq(cq); 1407 } 1408 EXPORT_SYMBOL(ib_destroy_cq); 1409 1410 int ib_resize_cq(struct ib_cq *cq, int cqe) 1411 { 1412 return cq->device->resize_cq ? 1413 cq->device->resize_cq(cq, cqe, NULL) : -ENOSYS; 1414 } 1415 EXPORT_SYMBOL(ib_resize_cq); 1416 1417 /* Memory regions */ 1418 1419 int ib_dereg_mr(struct ib_mr *mr) 1420 { 1421 struct ib_pd *pd = mr->pd; 1422 int ret; 1423 1424 ret = mr->device->dereg_mr(mr); 1425 if (!ret) 1426 atomic_dec(&pd->usecnt); 1427 1428 return ret; 1429 } 1430 EXPORT_SYMBOL(ib_dereg_mr); 1431 1432 /** 1433 * ib_alloc_mr() - Allocates a memory region 1434 * @pd: protection domain associated with the region 1435 * @mr_type: memory region type 1436 * @max_num_sg: maximum sg entries available for registration. 1437 * 1438 * Notes: 1439 * Memory registeration page/sg lists must not exceed max_num_sg. 1440 * For mr_type IB_MR_TYPE_MEM_REG, the total length cannot exceed 1441 * max_num_sg * used_page_size. 1442 * 1443 */ 1444 struct ib_mr *ib_alloc_mr(struct ib_pd *pd, 1445 enum ib_mr_type mr_type, 1446 u32 max_num_sg) 1447 { 1448 struct ib_mr *mr; 1449 1450 if (!pd->device->alloc_mr) 1451 return ERR_PTR(-ENOSYS); 1452 1453 mr = pd->device->alloc_mr(pd, mr_type, max_num_sg); 1454 if (!IS_ERR(mr)) { 1455 mr->device = pd->device; 1456 mr->pd = pd; 1457 mr->uobject = NULL; 1458 atomic_inc(&pd->usecnt); 1459 mr->need_inval = false; 1460 } 1461 1462 return mr; 1463 } 1464 EXPORT_SYMBOL(ib_alloc_mr); 1465 1466 /* "Fast" memory regions */ 1467 1468 struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd, 1469 int mr_access_flags, 1470 struct ib_fmr_attr *fmr_attr) 1471 { 1472 struct ib_fmr *fmr; 1473 1474 if (!pd->device->alloc_fmr) 1475 return ERR_PTR(-ENOSYS); 1476 1477 fmr = pd->device->alloc_fmr(pd, mr_access_flags, fmr_attr); 1478 if (!IS_ERR(fmr)) { 1479 fmr->device = pd->device; 1480 fmr->pd = pd; 1481 atomic_inc(&pd->usecnt); 1482 } 1483 1484 return fmr; 1485 } 1486 EXPORT_SYMBOL(ib_alloc_fmr); 1487 1488 int ib_unmap_fmr(struct list_head *fmr_list) 1489 { 1490 struct ib_fmr *fmr; 1491 1492 if (list_empty(fmr_list)) 1493 return 0; 1494 1495 fmr = list_entry(fmr_list->next, struct ib_fmr, list); 1496 return fmr->device->unmap_fmr(fmr_list); 1497 } 1498 EXPORT_SYMBOL(ib_unmap_fmr); 1499 1500 int ib_dealloc_fmr(struct ib_fmr *fmr) 1501 { 1502 struct ib_pd *pd; 1503 int ret; 1504 1505 pd = fmr->pd; 1506 ret = fmr->device->dealloc_fmr(fmr); 1507 if (!ret) 1508 atomic_dec(&pd->usecnt); 1509 1510 return ret; 1511 } 1512 EXPORT_SYMBOL(ib_dealloc_fmr); 1513 1514 /* Multicast groups */ 1515 1516 int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid) 1517 { 1518 int ret; 1519 1520 if (!qp->device->attach_mcast) 1521 return -ENOSYS; 1522 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD) 1523 return -EINVAL; 1524 1525 ret = qp->device->attach_mcast(qp, gid, lid); 1526 if (!ret) 1527 atomic_inc(&qp->usecnt); 1528 return ret; 1529 } 1530 EXPORT_SYMBOL(ib_attach_mcast); 1531 1532 int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid) 1533 { 1534 int ret; 1535 1536 if (!qp->device->detach_mcast) 1537 return -ENOSYS; 1538 if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD) 1539 return -EINVAL; 1540 1541 ret = qp->device->detach_mcast(qp, gid, lid); 1542 if (!ret) 1543 atomic_dec(&qp->usecnt); 1544 return ret; 1545 } 1546 EXPORT_SYMBOL(ib_detach_mcast); 1547 1548 struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device) 1549 { 1550 struct ib_xrcd *xrcd; 1551 1552 if (!device->alloc_xrcd) 1553 return ERR_PTR(-ENOSYS); 1554 1555 xrcd = device->alloc_xrcd(device, NULL, NULL); 1556 if (!IS_ERR(xrcd)) { 1557 xrcd->device = device; 1558 xrcd->inode = NULL; 1559 atomic_set(&xrcd->usecnt, 0); 1560 mutex_init(&xrcd->tgt_qp_mutex); 1561 INIT_LIST_HEAD(&xrcd->tgt_qp_list); 1562 } 1563 1564 return xrcd; 1565 } 1566 EXPORT_SYMBOL(ib_alloc_xrcd); 1567 1568 int ib_dealloc_xrcd(struct ib_xrcd *xrcd) 1569 { 1570 struct ib_qp *qp; 1571 int ret; 1572 1573 if (atomic_read(&xrcd->usecnt)) 1574 return -EBUSY; 1575 1576 while (!list_empty(&xrcd->tgt_qp_list)) { 1577 qp = list_entry(xrcd->tgt_qp_list.next, struct ib_qp, xrcd_list); 1578 ret = ib_destroy_qp(qp); 1579 if (ret) 1580 return ret; 1581 } 1582 1583 return xrcd->device->dealloc_xrcd(xrcd); 1584 } 1585 EXPORT_SYMBOL(ib_dealloc_xrcd); 1586 1587 /** 1588 * ib_create_wq - Creates a WQ associated with the specified protection 1589 * domain. 1590 * @pd: The protection domain associated with the WQ. 1591 * @wq_init_attr: A list of initial attributes required to create the 1592 * WQ. If WQ creation succeeds, then the attributes are updated to 1593 * the actual capabilities of the created WQ. 1594 * 1595 * wq_init_attr->max_wr and wq_init_attr->max_sge determine 1596 * the requested size of the WQ, and set to the actual values allocated 1597 * on return. 1598 * If ib_create_wq() succeeds, then max_wr and max_sge will always be 1599 * at least as large as the requested values. 1600 */ 1601 struct ib_wq *ib_create_wq(struct ib_pd *pd, 1602 struct ib_wq_init_attr *wq_attr) 1603 { 1604 struct ib_wq *wq; 1605 1606 if (!pd->device->create_wq) 1607 return ERR_PTR(-ENOSYS); 1608 1609 wq = pd->device->create_wq(pd, wq_attr, NULL); 1610 if (!IS_ERR(wq)) { 1611 wq->event_handler = wq_attr->event_handler; 1612 wq->wq_context = wq_attr->wq_context; 1613 wq->wq_type = wq_attr->wq_type; 1614 wq->cq = wq_attr->cq; 1615 wq->device = pd->device; 1616 wq->pd = pd; 1617 wq->uobject = NULL; 1618 atomic_inc(&pd->usecnt); 1619 atomic_inc(&wq_attr->cq->usecnt); 1620 atomic_set(&wq->usecnt, 0); 1621 } 1622 return wq; 1623 } 1624 EXPORT_SYMBOL(ib_create_wq); 1625 1626 /** 1627 * ib_destroy_wq - Destroys the specified WQ. 1628 * @wq: The WQ to destroy. 1629 */ 1630 int ib_destroy_wq(struct ib_wq *wq) 1631 { 1632 int err; 1633 struct ib_cq *cq = wq->cq; 1634 struct ib_pd *pd = wq->pd; 1635 1636 if (atomic_read(&wq->usecnt)) 1637 return -EBUSY; 1638 1639 err = wq->device->destroy_wq(wq); 1640 if (!err) { 1641 atomic_dec(&pd->usecnt); 1642 atomic_dec(&cq->usecnt); 1643 } 1644 return err; 1645 } 1646 EXPORT_SYMBOL(ib_destroy_wq); 1647 1648 /** 1649 * ib_modify_wq - Modifies the specified WQ. 1650 * @wq: The WQ to modify. 1651 * @wq_attr: On input, specifies the WQ attributes to modify. 1652 * @wq_attr_mask: A bit-mask used to specify which attributes of the WQ 1653 * are being modified. 1654 * On output, the current values of selected WQ attributes are returned. 1655 */ 1656 int ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, 1657 u32 wq_attr_mask) 1658 { 1659 int err; 1660 1661 if (!wq->device->modify_wq) 1662 return -ENOSYS; 1663 1664 err = wq->device->modify_wq(wq, wq_attr, wq_attr_mask, NULL); 1665 return err; 1666 } 1667 EXPORT_SYMBOL(ib_modify_wq); 1668 1669 /* 1670 * ib_create_rwq_ind_table - Creates a RQ Indirection Table. 1671 * @device: The device on which to create the rwq indirection table. 1672 * @ib_rwq_ind_table_init_attr: A list of initial attributes required to 1673 * create the Indirection Table. 1674 * 1675 * Note: The life time of ib_rwq_ind_table_init_attr->ind_tbl is not less 1676 * than the created ib_rwq_ind_table object and the caller is responsible 1677 * for its memory allocation/free. 1678 */ 1679 struct ib_rwq_ind_table *ib_create_rwq_ind_table(struct ib_device *device, 1680 struct ib_rwq_ind_table_init_attr *init_attr) 1681 { 1682 struct ib_rwq_ind_table *rwq_ind_table; 1683 int i; 1684 u32 table_size; 1685 1686 if (!device->create_rwq_ind_table) 1687 return ERR_PTR(-ENOSYS); 1688 1689 table_size = (1 << init_attr->log_ind_tbl_size); 1690 rwq_ind_table = device->create_rwq_ind_table(device, 1691 init_attr, NULL); 1692 if (IS_ERR(rwq_ind_table)) 1693 return rwq_ind_table; 1694 1695 rwq_ind_table->ind_tbl = init_attr->ind_tbl; 1696 rwq_ind_table->log_ind_tbl_size = init_attr->log_ind_tbl_size; 1697 rwq_ind_table->device = device; 1698 rwq_ind_table->uobject = NULL; 1699 atomic_set(&rwq_ind_table->usecnt, 0); 1700 1701 for (i = 0; i < table_size; i++) 1702 atomic_inc(&rwq_ind_table->ind_tbl[i]->usecnt); 1703 1704 return rwq_ind_table; 1705 } 1706 EXPORT_SYMBOL(ib_create_rwq_ind_table); 1707 1708 /* 1709 * ib_destroy_rwq_ind_table - Destroys the specified Indirection Table. 1710 * @wq_ind_table: The Indirection Table to destroy. 1711 */ 1712 int ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *rwq_ind_table) 1713 { 1714 int err, i; 1715 u32 table_size = (1 << rwq_ind_table->log_ind_tbl_size); 1716 struct ib_wq **ind_tbl = rwq_ind_table->ind_tbl; 1717 1718 if (atomic_read(&rwq_ind_table->usecnt)) 1719 return -EBUSY; 1720 1721 err = rwq_ind_table->device->destroy_rwq_ind_table(rwq_ind_table); 1722 if (!err) { 1723 for (i = 0; i < table_size; i++) 1724 atomic_dec(&ind_tbl[i]->usecnt); 1725 } 1726 1727 return err; 1728 } 1729 EXPORT_SYMBOL(ib_destroy_rwq_ind_table); 1730 1731 struct ib_flow *ib_create_flow(struct ib_qp *qp, 1732 struct ib_flow_attr *flow_attr, 1733 int domain) 1734 { 1735 struct ib_flow *flow_id; 1736 if (!qp->device->create_flow) 1737 return ERR_PTR(-ENOSYS); 1738 1739 flow_id = qp->device->create_flow(qp, flow_attr, domain); 1740 if (!IS_ERR(flow_id)) { 1741 atomic_inc(&qp->usecnt); 1742 flow_id->qp = qp; 1743 } 1744 return flow_id; 1745 } 1746 EXPORT_SYMBOL(ib_create_flow); 1747 1748 int ib_destroy_flow(struct ib_flow *flow_id) 1749 { 1750 int err; 1751 struct ib_qp *qp = flow_id->qp; 1752 1753 err = qp->device->destroy_flow(flow_id); 1754 if (!err) 1755 atomic_dec(&qp->usecnt); 1756 return err; 1757 } 1758 EXPORT_SYMBOL(ib_destroy_flow); 1759 1760 int ib_check_mr_status(struct ib_mr *mr, u32 check_mask, 1761 struct ib_mr_status *mr_status) 1762 { 1763 return mr->device->check_mr_status ? 1764 mr->device->check_mr_status(mr, check_mask, mr_status) : -ENOSYS; 1765 } 1766 EXPORT_SYMBOL(ib_check_mr_status); 1767 1768 int ib_set_vf_link_state(struct ib_device *device, int vf, u8 port, 1769 int state) 1770 { 1771 if (!device->set_vf_link_state) 1772 return -ENOSYS; 1773 1774 return device->set_vf_link_state(device, vf, port, state); 1775 } 1776 EXPORT_SYMBOL(ib_set_vf_link_state); 1777 1778 int ib_get_vf_config(struct ib_device *device, int vf, u8 port, 1779 struct ifla_vf_info *info) 1780 { 1781 if (!device->get_vf_config) 1782 return -ENOSYS; 1783 1784 return device->get_vf_config(device, vf, port, info); 1785 } 1786 EXPORT_SYMBOL(ib_get_vf_config); 1787 1788 int ib_get_vf_stats(struct ib_device *device, int vf, u8 port, 1789 struct ifla_vf_stats *stats) 1790 { 1791 if (!device->get_vf_stats) 1792 return -ENOSYS; 1793 1794 return device->get_vf_stats(device, vf, port, stats); 1795 } 1796 EXPORT_SYMBOL(ib_get_vf_stats); 1797 1798 int ib_set_vf_guid(struct ib_device *device, int vf, u8 port, u64 guid, 1799 int type) 1800 { 1801 if (!device->set_vf_guid) 1802 return -ENOSYS; 1803 1804 return device->set_vf_guid(device, vf, port, guid, type); 1805 } 1806 EXPORT_SYMBOL(ib_set_vf_guid); 1807 1808 /** 1809 * ib_map_mr_sg() - Map the largest prefix of a dma mapped SG list 1810 * and set it the memory region. 1811 * @mr: memory region 1812 * @sg: dma mapped scatterlist 1813 * @sg_nents: number of entries in sg 1814 * @sg_offset: offset in bytes into sg 1815 * @page_size: page vector desired page size 1816 * 1817 * Constraints: 1818 * - The first sg element is allowed to have an offset. 1819 * - Each sg element must either be aligned to page_size or virtually 1820 * contiguous to the previous element. In case an sg element has a 1821 * non-contiguous offset, the mapping prefix will not include it. 1822 * - The last sg element is allowed to have length less than page_size. 1823 * - If sg_nents total byte length exceeds the mr max_num_sge * page_size 1824 * then only max_num_sg entries will be mapped. 1825 * - If the MR was allocated with type IB_MR_TYPE_SG_GAPS, none of these 1826 * constraints holds and the page_size argument is ignored. 1827 * 1828 * Returns the number of sg elements that were mapped to the memory region. 1829 * 1830 * After this completes successfully, the memory region 1831 * is ready for registration. 1832 */ 1833 int ib_map_mr_sg(struct ib_mr *mr, struct scatterlist *sg, int sg_nents, 1834 unsigned int *sg_offset, unsigned int page_size) 1835 { 1836 if (unlikely(!mr->device->map_mr_sg)) 1837 return -ENOSYS; 1838 1839 mr->page_size = page_size; 1840 1841 return mr->device->map_mr_sg(mr, sg, sg_nents, sg_offset); 1842 } 1843 EXPORT_SYMBOL(ib_map_mr_sg); 1844 1845 /** 1846 * ib_sg_to_pages() - Convert the largest prefix of a sg list 1847 * to a page vector 1848 * @mr: memory region 1849 * @sgl: dma mapped scatterlist 1850 * @sg_nents: number of entries in sg 1851 * @sg_offset_p: IN: start offset in bytes into sg 1852 * OUT: offset in bytes for element n of the sg of the first 1853 * byte that has not been processed where n is the return 1854 * value of this function. 1855 * @set_page: driver page assignment function pointer 1856 * 1857 * Core service helper for drivers to convert the largest 1858 * prefix of given sg list to a page vector. The sg list 1859 * prefix converted is the prefix that meet the requirements 1860 * of ib_map_mr_sg. 1861 * 1862 * Returns the number of sg elements that were assigned to 1863 * a page vector. 1864 */ 1865 int ib_sg_to_pages(struct ib_mr *mr, struct scatterlist *sgl, int sg_nents, 1866 unsigned int *sg_offset_p, int (*set_page)(struct ib_mr *, u64)) 1867 { 1868 struct scatterlist *sg; 1869 u64 last_end_dma_addr = 0; 1870 unsigned int sg_offset = sg_offset_p ? *sg_offset_p : 0; 1871 unsigned int last_page_off = 0; 1872 u64 page_mask = ~((u64)mr->page_size - 1); 1873 int i, ret; 1874 1875 if (unlikely(sg_nents <= 0 || sg_offset > sg_dma_len(&sgl[0]))) 1876 return -EINVAL; 1877 1878 mr->iova = sg_dma_address(&sgl[0]) + sg_offset; 1879 mr->length = 0; 1880 1881 for_each_sg(sgl, sg, sg_nents, i) { 1882 u64 dma_addr = sg_dma_address(sg) + sg_offset; 1883 u64 prev_addr = dma_addr; 1884 unsigned int dma_len = sg_dma_len(sg) - sg_offset; 1885 u64 end_dma_addr = dma_addr + dma_len; 1886 u64 page_addr = dma_addr & page_mask; 1887 1888 /* 1889 * For the second and later elements, check whether either the 1890 * end of element i-1 or the start of element i is not aligned 1891 * on a page boundary. 1892 */ 1893 if (i && (last_page_off != 0 || page_addr != dma_addr)) { 1894 /* Stop mapping if there is a gap. */ 1895 if (last_end_dma_addr != dma_addr) 1896 break; 1897 1898 /* 1899 * Coalesce this element with the last. If it is small 1900 * enough just update mr->length. Otherwise start 1901 * mapping from the next page. 1902 */ 1903 goto next_page; 1904 } 1905 1906 do { 1907 ret = set_page(mr, page_addr); 1908 if (unlikely(ret < 0)) { 1909 sg_offset = prev_addr - sg_dma_address(sg); 1910 mr->length += prev_addr - dma_addr; 1911 if (sg_offset_p) 1912 *sg_offset_p = sg_offset; 1913 return i || sg_offset ? i : ret; 1914 } 1915 prev_addr = page_addr; 1916 next_page: 1917 page_addr += mr->page_size; 1918 } while (page_addr < end_dma_addr); 1919 1920 mr->length += dma_len; 1921 last_end_dma_addr = end_dma_addr; 1922 last_page_off = end_dma_addr & ~page_mask; 1923 1924 sg_offset = 0; 1925 } 1926 1927 if (sg_offset_p) 1928 *sg_offset_p = 0; 1929 return i; 1930 } 1931 EXPORT_SYMBOL(ib_sg_to_pages); 1932 1933 struct ib_drain_cqe { 1934 struct ib_cqe cqe; 1935 struct completion done; 1936 }; 1937 1938 static void ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc) 1939 { 1940 struct ib_drain_cqe *cqe = container_of(wc->wr_cqe, struct ib_drain_cqe, 1941 cqe); 1942 1943 complete(&cqe->done); 1944 } 1945 1946 /* 1947 * Post a WR and block until its completion is reaped for the SQ. 1948 */ 1949 static void __ib_drain_sq(struct ib_qp *qp) 1950 { 1951 struct ib_cq *cq = qp->send_cq; 1952 struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 1953 struct ib_drain_cqe sdrain; 1954 struct ib_send_wr swr = {}, *bad_swr; 1955 int ret; 1956 1957 swr.wr_cqe = &sdrain.cqe; 1958 sdrain.cqe.done = ib_drain_qp_done; 1959 init_completion(&sdrain.done); 1960 1961 ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 1962 if (ret) { 1963 WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 1964 return; 1965 } 1966 1967 ret = ib_post_send(qp, &swr, &bad_swr); 1968 if (ret) { 1969 WARN_ONCE(ret, "failed to drain send queue: %d\n", ret); 1970 return; 1971 } 1972 1973 if (cq->poll_ctx == IB_POLL_DIRECT) 1974 while (wait_for_completion_timeout(&sdrain.done, HZ / 10) <= 0) 1975 ib_process_cq_direct(cq, -1); 1976 else 1977 wait_for_completion(&sdrain.done); 1978 } 1979 1980 /* 1981 * Post a WR and block until its completion is reaped for the RQ. 1982 */ 1983 static void __ib_drain_rq(struct ib_qp *qp) 1984 { 1985 struct ib_cq *cq = qp->recv_cq; 1986 struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR }; 1987 struct ib_drain_cqe rdrain; 1988 struct ib_recv_wr rwr = {}, *bad_rwr; 1989 int ret; 1990 1991 rwr.wr_cqe = &rdrain.cqe; 1992 rdrain.cqe.done = ib_drain_qp_done; 1993 init_completion(&rdrain.done); 1994 1995 ret = ib_modify_qp(qp, &attr, IB_QP_STATE); 1996 if (ret) { 1997 WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 1998 return; 1999 } 2000 2001 ret = ib_post_recv(qp, &rwr, &bad_rwr); 2002 if (ret) { 2003 WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret); 2004 return; 2005 } 2006 2007 if (cq->poll_ctx == IB_POLL_DIRECT) 2008 while (wait_for_completion_timeout(&rdrain.done, HZ / 10) <= 0) 2009 ib_process_cq_direct(cq, -1); 2010 else 2011 wait_for_completion(&rdrain.done); 2012 } 2013 2014 /** 2015 * ib_drain_sq() - Block until all SQ CQEs have been consumed by the 2016 * application. 2017 * @qp: queue pair to drain 2018 * 2019 * If the device has a provider-specific drain function, then 2020 * call that. Otherwise call the generic drain function 2021 * __ib_drain_sq(). 2022 * 2023 * The caller must: 2024 * 2025 * ensure there is room in the CQ and SQ for the drain work request and 2026 * completion. 2027 * 2028 * allocate the CQ using ib_alloc_cq(). 2029 * 2030 * ensure that there are no other contexts that are posting WRs concurrently. 2031 * Otherwise the drain is not guaranteed. 2032 */ 2033 void ib_drain_sq(struct ib_qp *qp) 2034 { 2035 if (qp->device->drain_sq) 2036 qp->device->drain_sq(qp); 2037 else 2038 __ib_drain_sq(qp); 2039 } 2040 EXPORT_SYMBOL(ib_drain_sq); 2041 2042 /** 2043 * ib_drain_rq() - Block until all RQ CQEs have been consumed by the 2044 * application. 2045 * @qp: queue pair to drain 2046 * 2047 * If the device has a provider-specific drain function, then 2048 * call that. Otherwise call the generic drain function 2049 * __ib_drain_rq(). 2050 * 2051 * The caller must: 2052 * 2053 * ensure there is room in the CQ and RQ for the drain work request and 2054 * completion. 2055 * 2056 * allocate the CQ using ib_alloc_cq(). 2057 * 2058 * ensure that there are no other contexts that are posting WRs concurrently. 2059 * Otherwise the drain is not guaranteed. 2060 */ 2061 void ib_drain_rq(struct ib_qp *qp) 2062 { 2063 if (qp->device->drain_rq) 2064 qp->device->drain_rq(qp); 2065 else 2066 __ib_drain_rq(qp); 2067 } 2068 EXPORT_SYMBOL(ib_drain_rq); 2069 2070 /** 2071 * ib_drain_qp() - Block until all CQEs have been consumed by the 2072 * application on both the RQ and SQ. 2073 * @qp: queue pair to drain 2074 * 2075 * The caller must: 2076 * 2077 * ensure there is room in the CQ(s), SQ, and RQ for drain work requests 2078 * and completions. 2079 * 2080 * allocate the CQs using ib_alloc_cq(). 2081 * 2082 * ensure that there are no other contexts that are posting WRs concurrently. 2083 * Otherwise the drain is not guaranteed. 2084 */ 2085 void ib_drain_qp(struct ib_qp *qp) 2086 { 2087 ib_drain_sq(qp); 2088 if (!qp->srq) 2089 ib_drain_rq(qp); 2090 } 2091 EXPORT_SYMBOL(ib_drain_qp); 2092