xref: /openbmc/linux/drivers/infiniband/core/rw.c (revision c0a6cbb9)
1 /*
2  * Copyright (c) 2016 HGST, a Western Digital Company.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms and conditions of the GNU General Public License,
6  * version 2, as published by the Free Software Foundation.
7  *
8  * This program is distributed in the hope it will be useful, but WITHOUT
9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11  * more details.
12  */
13 #include <linux/moduleparam.h>
14 #include <linux/slab.h>
15 #include <linux/pci-p2pdma.h>
16 #include <rdma/mr_pool.h>
17 #include <rdma/rw.h>
18 
19 enum {
20 	RDMA_RW_SINGLE_WR,
21 	RDMA_RW_MULTI_WR,
22 	RDMA_RW_MR,
23 	RDMA_RW_SIG_MR,
24 };
25 
26 static bool rdma_rw_force_mr;
27 module_param_named(force_mr, rdma_rw_force_mr, bool, 0);
28 MODULE_PARM_DESC(force_mr, "Force usage of MRs for RDMA READ/WRITE operations");
29 
30 /*
31  * Check if the device might use memory registration.  This is currently only
32  * true for iWarp devices. In the future we can hopefully fine tune this based
33  * on HCA driver input.
34  */
35 static inline bool rdma_rw_can_use_mr(struct ib_device *dev, u8 port_num)
36 {
37 	if (rdma_protocol_iwarp(dev, port_num))
38 		return true;
39 	if (unlikely(rdma_rw_force_mr))
40 		return true;
41 	return false;
42 }
43 
44 /*
45  * Check if the device will use memory registration for this RW operation.
46  * We currently always use memory registrations for iWarp RDMA READs, and
47  * have a debug option to force usage of MRs.
48  *
49  * XXX: In the future we can hopefully fine tune this based on HCA driver
50  * input.
51  */
52 static inline bool rdma_rw_io_needs_mr(struct ib_device *dev, u8 port_num,
53 		enum dma_data_direction dir, int dma_nents)
54 {
55 	if (rdma_protocol_iwarp(dev, port_num) && dir == DMA_FROM_DEVICE)
56 		return true;
57 	if (unlikely(rdma_rw_force_mr))
58 		return true;
59 	return false;
60 }
61 
62 static inline u32 rdma_rw_fr_page_list_len(struct ib_device *dev)
63 {
64 	/* arbitrary limit to avoid allocating gigantic resources */
65 	return min_t(u32, dev->attrs.max_fast_reg_page_list_len, 256);
66 }
67 
68 /* Caller must have zero-initialized *reg. */
69 static int rdma_rw_init_one_mr(struct ib_qp *qp, u8 port_num,
70 		struct rdma_rw_reg_ctx *reg, struct scatterlist *sg,
71 		u32 sg_cnt, u32 offset)
72 {
73 	u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device);
74 	u32 nents = min(sg_cnt, pages_per_mr);
75 	int count = 0, ret;
76 
77 	reg->mr = ib_mr_pool_get(qp, &qp->rdma_mrs);
78 	if (!reg->mr)
79 		return -EAGAIN;
80 
81 	if (reg->mr->need_inval) {
82 		reg->inv_wr.opcode = IB_WR_LOCAL_INV;
83 		reg->inv_wr.ex.invalidate_rkey = reg->mr->lkey;
84 		reg->inv_wr.next = &reg->reg_wr.wr;
85 		count++;
86 	} else {
87 		reg->inv_wr.next = NULL;
88 	}
89 
90 	ret = ib_map_mr_sg(reg->mr, sg, nents, &offset, PAGE_SIZE);
91 	if (ret < 0 || ret < nents) {
92 		ib_mr_pool_put(qp, &qp->rdma_mrs, reg->mr);
93 		return -EINVAL;
94 	}
95 
96 	reg->reg_wr.wr.opcode = IB_WR_REG_MR;
97 	reg->reg_wr.mr = reg->mr;
98 	reg->reg_wr.access = IB_ACCESS_LOCAL_WRITE;
99 	if (rdma_protocol_iwarp(qp->device, port_num))
100 		reg->reg_wr.access |= IB_ACCESS_REMOTE_WRITE;
101 	count++;
102 
103 	reg->sge.addr = reg->mr->iova;
104 	reg->sge.length = reg->mr->length;
105 	return count;
106 }
107 
108 static int rdma_rw_init_mr_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
109 		u8 port_num, struct scatterlist *sg, u32 sg_cnt, u32 offset,
110 		u64 remote_addr, u32 rkey, enum dma_data_direction dir)
111 {
112 	struct rdma_rw_reg_ctx *prev = NULL;
113 	u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device);
114 	int i, j, ret = 0, count = 0;
115 
116 	ctx->nr_ops = (sg_cnt + pages_per_mr - 1) / pages_per_mr;
117 	ctx->reg = kcalloc(ctx->nr_ops, sizeof(*ctx->reg), GFP_KERNEL);
118 	if (!ctx->reg) {
119 		ret = -ENOMEM;
120 		goto out;
121 	}
122 
123 	for (i = 0; i < ctx->nr_ops; i++) {
124 		struct rdma_rw_reg_ctx *reg = &ctx->reg[i];
125 		u32 nents = min(sg_cnt, pages_per_mr);
126 
127 		ret = rdma_rw_init_one_mr(qp, port_num, reg, sg, sg_cnt,
128 				offset);
129 		if (ret < 0)
130 			goto out_free;
131 		count += ret;
132 
133 		if (prev) {
134 			if (reg->mr->need_inval)
135 				prev->wr.wr.next = &reg->inv_wr;
136 			else
137 				prev->wr.wr.next = &reg->reg_wr.wr;
138 		}
139 
140 		reg->reg_wr.wr.next = &reg->wr.wr;
141 
142 		reg->wr.wr.sg_list = &reg->sge;
143 		reg->wr.wr.num_sge = 1;
144 		reg->wr.remote_addr = remote_addr;
145 		reg->wr.rkey = rkey;
146 		if (dir == DMA_TO_DEVICE) {
147 			reg->wr.wr.opcode = IB_WR_RDMA_WRITE;
148 		} else if (!rdma_cap_read_inv(qp->device, port_num)) {
149 			reg->wr.wr.opcode = IB_WR_RDMA_READ;
150 		} else {
151 			reg->wr.wr.opcode = IB_WR_RDMA_READ_WITH_INV;
152 			reg->wr.wr.ex.invalidate_rkey = reg->mr->lkey;
153 		}
154 		count++;
155 
156 		remote_addr += reg->sge.length;
157 		sg_cnt -= nents;
158 		for (j = 0; j < nents; j++)
159 			sg = sg_next(sg);
160 		prev = reg;
161 		offset = 0;
162 	}
163 
164 	if (prev)
165 		prev->wr.wr.next = NULL;
166 
167 	ctx->type = RDMA_RW_MR;
168 	return count;
169 
170 out_free:
171 	while (--i >= 0)
172 		ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->reg[i].mr);
173 	kfree(ctx->reg);
174 out:
175 	return ret;
176 }
177 
178 static int rdma_rw_init_map_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
179 		struct scatterlist *sg, u32 sg_cnt, u32 offset,
180 		u64 remote_addr, u32 rkey, enum dma_data_direction dir)
181 {
182 	u32 max_sge = dir == DMA_TO_DEVICE ? qp->max_write_sge :
183 		      qp->max_read_sge;
184 	struct ib_sge *sge;
185 	u32 total_len = 0, i, j;
186 
187 	ctx->nr_ops = DIV_ROUND_UP(sg_cnt, max_sge);
188 
189 	ctx->map.sges = sge = kcalloc(sg_cnt, sizeof(*sge), GFP_KERNEL);
190 	if (!ctx->map.sges)
191 		goto out;
192 
193 	ctx->map.wrs = kcalloc(ctx->nr_ops, sizeof(*ctx->map.wrs), GFP_KERNEL);
194 	if (!ctx->map.wrs)
195 		goto out_free_sges;
196 
197 	for (i = 0; i < ctx->nr_ops; i++) {
198 		struct ib_rdma_wr *rdma_wr = &ctx->map.wrs[i];
199 		u32 nr_sge = min(sg_cnt, max_sge);
200 
201 		if (dir == DMA_TO_DEVICE)
202 			rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
203 		else
204 			rdma_wr->wr.opcode = IB_WR_RDMA_READ;
205 		rdma_wr->remote_addr = remote_addr + total_len;
206 		rdma_wr->rkey = rkey;
207 		rdma_wr->wr.num_sge = nr_sge;
208 		rdma_wr->wr.sg_list = sge;
209 
210 		for (j = 0; j < nr_sge; j++, sg = sg_next(sg)) {
211 			sge->addr = sg_dma_address(sg) + offset;
212 			sge->length = sg_dma_len(sg) - offset;
213 			sge->lkey = qp->pd->local_dma_lkey;
214 
215 			total_len += sge->length;
216 			sge++;
217 			sg_cnt--;
218 			offset = 0;
219 		}
220 
221 		rdma_wr->wr.next = i + 1 < ctx->nr_ops ?
222 			&ctx->map.wrs[i + 1].wr : NULL;
223 	}
224 
225 	ctx->type = RDMA_RW_MULTI_WR;
226 	return ctx->nr_ops;
227 
228 out_free_sges:
229 	kfree(ctx->map.sges);
230 out:
231 	return -ENOMEM;
232 }
233 
234 static int rdma_rw_init_single_wr(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
235 		struct scatterlist *sg, u32 offset, u64 remote_addr, u32 rkey,
236 		enum dma_data_direction dir)
237 {
238 	struct ib_rdma_wr *rdma_wr = &ctx->single.wr;
239 
240 	ctx->nr_ops = 1;
241 
242 	ctx->single.sge.lkey = qp->pd->local_dma_lkey;
243 	ctx->single.sge.addr = sg_dma_address(sg) + offset;
244 	ctx->single.sge.length = sg_dma_len(sg) - offset;
245 
246 	memset(rdma_wr, 0, sizeof(*rdma_wr));
247 	if (dir == DMA_TO_DEVICE)
248 		rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
249 	else
250 		rdma_wr->wr.opcode = IB_WR_RDMA_READ;
251 	rdma_wr->wr.sg_list = &ctx->single.sge;
252 	rdma_wr->wr.num_sge = 1;
253 	rdma_wr->remote_addr = remote_addr;
254 	rdma_wr->rkey = rkey;
255 
256 	ctx->type = RDMA_RW_SINGLE_WR;
257 	return 1;
258 }
259 
260 /**
261  * rdma_rw_ctx_init - initialize a RDMA READ/WRITE context
262  * @ctx:	context to initialize
263  * @qp:		queue pair to operate on
264  * @port_num:	port num to which the connection is bound
265  * @sg:		scatterlist to READ/WRITE from/to
266  * @sg_cnt:	number of entries in @sg
267  * @sg_offset:	current byte offset into @sg
268  * @remote_addr:remote address to read/write (relative to @rkey)
269  * @rkey:	remote key to operate on
270  * @dir:	%DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
271  *
272  * Returns the number of WQEs that will be needed on the workqueue if
273  * successful, or a negative error code.
274  */
275 int rdma_rw_ctx_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u8 port_num,
276 		struct scatterlist *sg, u32 sg_cnt, u32 sg_offset,
277 		u64 remote_addr, u32 rkey, enum dma_data_direction dir)
278 {
279 	struct ib_device *dev = qp->pd->device;
280 	int ret;
281 
282 	if (is_pci_p2pdma_page(sg_page(sg)))
283 		ret = pci_p2pdma_map_sg(dev->dma_device, sg, sg_cnt, dir);
284 	else
285 		ret = ib_dma_map_sg(dev, sg, sg_cnt, dir);
286 
287 	if (!ret)
288 		return -ENOMEM;
289 	sg_cnt = ret;
290 
291 	/*
292 	 * Skip to the S/G entry that sg_offset falls into:
293 	 */
294 	for (;;) {
295 		u32 len = sg_dma_len(sg);
296 
297 		if (sg_offset < len)
298 			break;
299 
300 		sg = sg_next(sg);
301 		sg_offset -= len;
302 		sg_cnt--;
303 	}
304 
305 	ret = -EIO;
306 	if (WARN_ON_ONCE(sg_cnt == 0))
307 		goto out_unmap_sg;
308 
309 	if (rdma_rw_io_needs_mr(qp->device, port_num, dir, sg_cnt)) {
310 		ret = rdma_rw_init_mr_wrs(ctx, qp, port_num, sg, sg_cnt,
311 				sg_offset, remote_addr, rkey, dir);
312 	} else if (sg_cnt > 1) {
313 		ret = rdma_rw_init_map_wrs(ctx, qp, sg, sg_cnt, sg_offset,
314 				remote_addr, rkey, dir);
315 	} else {
316 		ret = rdma_rw_init_single_wr(ctx, qp, sg, sg_offset,
317 				remote_addr, rkey, dir);
318 	}
319 
320 	if (ret < 0)
321 		goto out_unmap_sg;
322 	return ret;
323 
324 out_unmap_sg:
325 	ib_dma_unmap_sg(dev, sg, sg_cnt, dir);
326 	return ret;
327 }
328 EXPORT_SYMBOL(rdma_rw_ctx_init);
329 
330 /**
331  * rdma_rw_ctx_signature_init - initialize a RW context with signature offload
332  * @ctx:	context to initialize
333  * @qp:		queue pair to operate on
334  * @port_num:	port num to which the connection is bound
335  * @sg:		scatterlist to READ/WRITE from/to
336  * @sg_cnt:	number of entries in @sg
337  * @prot_sg:	scatterlist to READ/WRITE protection information from/to
338  * @prot_sg_cnt: number of entries in @prot_sg
339  * @sig_attrs:	signature offloading algorithms
340  * @remote_addr:remote address to read/write (relative to @rkey)
341  * @rkey:	remote key to operate on
342  * @dir:	%DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
343  *
344  * Returns the number of WQEs that will be needed on the workqueue if
345  * successful, or a negative error code.
346  */
347 int rdma_rw_ctx_signature_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
348 		u8 port_num, struct scatterlist *sg, u32 sg_cnt,
349 		struct scatterlist *prot_sg, u32 prot_sg_cnt,
350 		struct ib_sig_attrs *sig_attrs,
351 		u64 remote_addr, u32 rkey, enum dma_data_direction dir)
352 {
353 	struct ib_device *dev = qp->pd->device;
354 	u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device);
355 	struct ib_rdma_wr *rdma_wr;
356 	struct ib_send_wr *prev_wr = NULL;
357 	int count = 0, ret;
358 
359 	if (sg_cnt > pages_per_mr || prot_sg_cnt > pages_per_mr) {
360 		pr_err("SG count too large: sg_cnt=%d, prot_sg_cnt=%d, pages_per_mr=%d\n",
361 		       sg_cnt, prot_sg_cnt, pages_per_mr);
362 		return -EINVAL;
363 	}
364 
365 	ret = ib_dma_map_sg(dev, sg, sg_cnt, dir);
366 	if (!ret)
367 		return -ENOMEM;
368 	sg_cnt = ret;
369 
370 	ret = ib_dma_map_sg(dev, prot_sg, prot_sg_cnt, dir);
371 	if (!ret) {
372 		ret = -ENOMEM;
373 		goto out_unmap_sg;
374 	}
375 	prot_sg_cnt = ret;
376 
377 	ctx->type = RDMA_RW_SIG_MR;
378 	ctx->nr_ops = 1;
379 	ctx->sig = kcalloc(1, sizeof(*ctx->sig), GFP_KERNEL);
380 	if (!ctx->sig) {
381 		ret = -ENOMEM;
382 		goto out_unmap_prot_sg;
383 	}
384 
385 	ret = rdma_rw_init_one_mr(qp, port_num, &ctx->sig->data, sg, sg_cnt, 0);
386 	if (ret < 0)
387 		goto out_free_ctx;
388 	count += ret;
389 	prev_wr = &ctx->sig->data.reg_wr.wr;
390 
391 	ret = rdma_rw_init_one_mr(qp, port_num, &ctx->sig->prot,
392 				  prot_sg, prot_sg_cnt, 0);
393 	if (ret < 0)
394 		goto out_destroy_data_mr;
395 	count += ret;
396 
397 	if (ctx->sig->prot.inv_wr.next)
398 		prev_wr->next = &ctx->sig->prot.inv_wr;
399 	else
400 		prev_wr->next = &ctx->sig->prot.reg_wr.wr;
401 	prev_wr = &ctx->sig->prot.reg_wr.wr;
402 
403 	ctx->sig->sig_mr = ib_mr_pool_get(qp, &qp->sig_mrs);
404 	if (!ctx->sig->sig_mr) {
405 		ret = -EAGAIN;
406 		goto out_destroy_prot_mr;
407 	}
408 
409 	if (ctx->sig->sig_mr->need_inval) {
410 		memset(&ctx->sig->sig_inv_wr, 0, sizeof(ctx->sig->sig_inv_wr));
411 
412 		ctx->sig->sig_inv_wr.opcode = IB_WR_LOCAL_INV;
413 		ctx->sig->sig_inv_wr.ex.invalidate_rkey = ctx->sig->sig_mr->rkey;
414 
415 		prev_wr->next = &ctx->sig->sig_inv_wr;
416 		prev_wr = &ctx->sig->sig_inv_wr;
417 	}
418 
419 	ctx->sig->sig_wr.wr.opcode = IB_WR_REG_SIG_MR;
420 	ctx->sig->sig_wr.wr.wr_cqe = NULL;
421 	ctx->sig->sig_wr.wr.sg_list = &ctx->sig->data.sge;
422 	ctx->sig->sig_wr.wr.num_sge = 1;
423 	ctx->sig->sig_wr.access_flags = IB_ACCESS_LOCAL_WRITE;
424 	ctx->sig->sig_wr.sig_attrs = sig_attrs;
425 	ctx->sig->sig_wr.sig_mr = ctx->sig->sig_mr;
426 	if (prot_sg_cnt)
427 		ctx->sig->sig_wr.prot = &ctx->sig->prot.sge;
428 	prev_wr->next = &ctx->sig->sig_wr.wr;
429 	prev_wr = &ctx->sig->sig_wr.wr;
430 	count++;
431 
432 	ctx->sig->sig_sge.addr = 0;
433 	ctx->sig->sig_sge.length = ctx->sig->data.sge.length;
434 	if (sig_attrs->wire.sig_type != IB_SIG_TYPE_NONE)
435 		ctx->sig->sig_sge.length += ctx->sig->prot.sge.length;
436 
437 	rdma_wr = &ctx->sig->data.wr;
438 	rdma_wr->wr.sg_list = &ctx->sig->sig_sge;
439 	rdma_wr->wr.num_sge = 1;
440 	rdma_wr->remote_addr = remote_addr;
441 	rdma_wr->rkey = rkey;
442 	if (dir == DMA_TO_DEVICE)
443 		rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
444 	else
445 		rdma_wr->wr.opcode = IB_WR_RDMA_READ;
446 	prev_wr->next = &rdma_wr->wr;
447 	prev_wr = &rdma_wr->wr;
448 	count++;
449 
450 	return count;
451 
452 out_destroy_prot_mr:
453 	if (prot_sg_cnt)
454 		ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->sig->prot.mr);
455 out_destroy_data_mr:
456 	ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->sig->data.mr);
457 out_free_ctx:
458 	kfree(ctx->sig);
459 out_unmap_prot_sg:
460 	ib_dma_unmap_sg(dev, prot_sg, prot_sg_cnt, dir);
461 out_unmap_sg:
462 	ib_dma_unmap_sg(dev, sg, sg_cnt, dir);
463 	return ret;
464 }
465 EXPORT_SYMBOL(rdma_rw_ctx_signature_init);
466 
467 /*
468  * Now that we are going to post the WRs we can update the lkey and need_inval
469  * state on the MRs.  If we were doing this at init time, we would get double
470  * or missing invalidations if a context was initialized but not actually
471  * posted.
472  */
473 static void rdma_rw_update_lkey(struct rdma_rw_reg_ctx *reg, bool need_inval)
474 {
475 	reg->mr->need_inval = need_inval;
476 	ib_update_fast_reg_key(reg->mr, ib_inc_rkey(reg->mr->lkey));
477 	reg->reg_wr.key = reg->mr->lkey;
478 	reg->sge.lkey = reg->mr->lkey;
479 }
480 
481 /**
482  * rdma_rw_ctx_wrs - return chain of WRs for a RDMA READ or WRITE operation
483  * @ctx:	context to operate on
484  * @qp:		queue pair to operate on
485  * @port_num:	port num to which the connection is bound
486  * @cqe:	completion queue entry for the last WR
487  * @chain_wr:	WR to append to the posted chain
488  *
489  * Return the WR chain for the set of RDMA READ/WRITE operations described by
490  * @ctx, as well as any memory registration operations needed.  If @chain_wr
491  * is non-NULL the WR it points to will be appended to the chain of WRs posted.
492  * If @chain_wr is not set @cqe must be set so that the caller gets a
493  * completion notification.
494  */
495 struct ib_send_wr *rdma_rw_ctx_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
496 		u8 port_num, struct ib_cqe *cqe, struct ib_send_wr *chain_wr)
497 {
498 	struct ib_send_wr *first_wr, *last_wr;
499 	int i;
500 
501 	switch (ctx->type) {
502 	case RDMA_RW_SIG_MR:
503 		rdma_rw_update_lkey(&ctx->sig->data, true);
504 		if (ctx->sig->prot.mr)
505 			rdma_rw_update_lkey(&ctx->sig->prot, true);
506 
507 		ctx->sig->sig_mr->need_inval = true;
508 		ib_update_fast_reg_key(ctx->sig->sig_mr,
509 			ib_inc_rkey(ctx->sig->sig_mr->lkey));
510 		ctx->sig->sig_sge.lkey = ctx->sig->sig_mr->lkey;
511 
512 		if (ctx->sig->data.inv_wr.next)
513 			first_wr = &ctx->sig->data.inv_wr;
514 		else
515 			first_wr = &ctx->sig->data.reg_wr.wr;
516 		last_wr = &ctx->sig->data.wr.wr;
517 		break;
518 	case RDMA_RW_MR:
519 		for (i = 0; i < ctx->nr_ops; i++) {
520 			rdma_rw_update_lkey(&ctx->reg[i],
521 				ctx->reg[i].wr.wr.opcode !=
522 					IB_WR_RDMA_READ_WITH_INV);
523 		}
524 
525 		if (ctx->reg[0].inv_wr.next)
526 			first_wr = &ctx->reg[0].inv_wr;
527 		else
528 			first_wr = &ctx->reg[0].reg_wr.wr;
529 		last_wr = &ctx->reg[ctx->nr_ops - 1].wr.wr;
530 		break;
531 	case RDMA_RW_MULTI_WR:
532 		first_wr = &ctx->map.wrs[0].wr;
533 		last_wr = &ctx->map.wrs[ctx->nr_ops - 1].wr;
534 		break;
535 	case RDMA_RW_SINGLE_WR:
536 		first_wr = &ctx->single.wr.wr;
537 		last_wr = &ctx->single.wr.wr;
538 		break;
539 	default:
540 		BUG();
541 	}
542 
543 	if (chain_wr) {
544 		last_wr->next = chain_wr;
545 	} else {
546 		last_wr->wr_cqe = cqe;
547 		last_wr->send_flags |= IB_SEND_SIGNALED;
548 	}
549 
550 	return first_wr;
551 }
552 EXPORT_SYMBOL(rdma_rw_ctx_wrs);
553 
554 /**
555  * rdma_rw_ctx_post - post a RDMA READ or RDMA WRITE operation
556  * @ctx:	context to operate on
557  * @qp:		queue pair to operate on
558  * @port_num:	port num to which the connection is bound
559  * @cqe:	completion queue entry for the last WR
560  * @chain_wr:	WR to append to the posted chain
561  *
562  * Post the set of RDMA READ/WRITE operations described by @ctx, as well as
563  * any memory registration operations needed.  If @chain_wr is non-NULL the
564  * WR it points to will be appended to the chain of WRs posted.  If @chain_wr
565  * is not set @cqe must be set so that the caller gets a completion
566  * notification.
567  */
568 int rdma_rw_ctx_post(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u8 port_num,
569 		struct ib_cqe *cqe, struct ib_send_wr *chain_wr)
570 {
571 	struct ib_send_wr *first_wr;
572 
573 	first_wr = rdma_rw_ctx_wrs(ctx, qp, port_num, cqe, chain_wr);
574 	return ib_post_send(qp, first_wr, NULL);
575 }
576 EXPORT_SYMBOL(rdma_rw_ctx_post);
577 
578 /**
579  * rdma_rw_ctx_destroy - release all resources allocated by rdma_rw_ctx_init
580  * @ctx:	context to release
581  * @qp:		queue pair to operate on
582  * @port_num:	port num to which the connection is bound
583  * @sg:		scatterlist that was used for the READ/WRITE
584  * @sg_cnt:	number of entries in @sg
585  * @dir:	%DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
586  */
587 void rdma_rw_ctx_destroy(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u8 port_num,
588 		struct scatterlist *sg, u32 sg_cnt, enum dma_data_direction dir)
589 {
590 	int i;
591 
592 	switch (ctx->type) {
593 	case RDMA_RW_MR:
594 		for (i = 0; i < ctx->nr_ops; i++)
595 			ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->reg[i].mr);
596 		kfree(ctx->reg);
597 		break;
598 	case RDMA_RW_MULTI_WR:
599 		kfree(ctx->map.wrs);
600 		kfree(ctx->map.sges);
601 		break;
602 	case RDMA_RW_SINGLE_WR:
603 		break;
604 	default:
605 		BUG();
606 		break;
607 	}
608 
609 	/* P2PDMA contexts do not need to be unmapped */
610 	if (!is_pci_p2pdma_page(sg_page(sg)))
611 		ib_dma_unmap_sg(qp->pd->device, sg, sg_cnt, dir);
612 }
613 EXPORT_SYMBOL(rdma_rw_ctx_destroy);
614 
615 /**
616  * rdma_rw_ctx_destroy_signature - release all resources allocated by
617  *	rdma_rw_ctx_signature_init
618  * @ctx:	context to release
619  * @qp:		queue pair to operate on
620  * @port_num:	port num to which the connection is bound
621  * @sg:		scatterlist that was used for the READ/WRITE
622  * @sg_cnt:	number of entries in @sg
623  * @prot_sg:	scatterlist that was used for the READ/WRITE of the PI
624  * @prot_sg_cnt: number of entries in @prot_sg
625  * @dir:	%DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
626  */
627 void rdma_rw_ctx_destroy_signature(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
628 		u8 port_num, struct scatterlist *sg, u32 sg_cnt,
629 		struct scatterlist *prot_sg, u32 prot_sg_cnt,
630 		enum dma_data_direction dir)
631 {
632 	if (WARN_ON_ONCE(ctx->type != RDMA_RW_SIG_MR))
633 		return;
634 
635 	ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->sig->data.mr);
636 	ib_dma_unmap_sg(qp->pd->device, sg, sg_cnt, dir);
637 
638 	if (ctx->sig->prot.mr) {
639 		ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->sig->prot.mr);
640 		ib_dma_unmap_sg(qp->pd->device, prot_sg, prot_sg_cnt, dir);
641 	}
642 
643 	ib_mr_pool_put(qp, &qp->sig_mrs, ctx->sig->sig_mr);
644 	kfree(ctx->sig);
645 }
646 EXPORT_SYMBOL(rdma_rw_ctx_destroy_signature);
647 
648 /**
649  * rdma_rw_mr_factor - return number of MRs required for a payload
650  * @device:	device handling the connection
651  * @port_num:	port num to which the connection is bound
652  * @maxpages:	maximum payload pages per rdma_rw_ctx
653  *
654  * Returns the number of MRs the device requires to move @maxpayload
655  * bytes. The returned value is used during transport creation to
656  * compute max_rdma_ctxts and the size of the transport's Send and
657  * Send Completion Queues.
658  */
659 unsigned int rdma_rw_mr_factor(struct ib_device *device, u8 port_num,
660 			       unsigned int maxpages)
661 {
662 	unsigned int mr_pages;
663 
664 	if (rdma_rw_can_use_mr(device, port_num))
665 		mr_pages = rdma_rw_fr_page_list_len(device);
666 	else
667 		mr_pages = device->attrs.max_sge_rd;
668 	return DIV_ROUND_UP(maxpages, mr_pages);
669 }
670 EXPORT_SYMBOL(rdma_rw_mr_factor);
671 
672 void rdma_rw_init_qp(struct ib_device *dev, struct ib_qp_init_attr *attr)
673 {
674 	u32 factor;
675 
676 	WARN_ON_ONCE(attr->port_num == 0);
677 
678 	/*
679 	 * Each context needs at least one RDMA READ or WRITE WR.
680 	 *
681 	 * For some hardware we might need more, eventually we should ask the
682 	 * HCA driver for a multiplier here.
683 	 */
684 	factor = 1;
685 
686 	/*
687 	 * If the devices needs MRs to perform RDMA READ or WRITE operations,
688 	 * we'll need two additional MRs for the registrations and the
689 	 * invalidation.
690 	 */
691 	if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN)
692 		factor += 6;	/* (inv + reg) * (data + prot + sig) */
693 	else if (rdma_rw_can_use_mr(dev, attr->port_num))
694 		factor += 2;	/* inv + reg */
695 
696 	attr->cap.max_send_wr += factor * attr->cap.max_rdma_ctxs;
697 
698 	/*
699 	 * But maybe we were just too high in the sky and the device doesn't
700 	 * even support all we need, and we'll have to live with what we get..
701 	 */
702 	attr->cap.max_send_wr =
703 		min_t(u32, attr->cap.max_send_wr, dev->attrs.max_qp_wr);
704 }
705 
706 int rdma_rw_init_mrs(struct ib_qp *qp, struct ib_qp_init_attr *attr)
707 {
708 	struct ib_device *dev = qp->pd->device;
709 	u32 nr_mrs = 0, nr_sig_mrs = 0;
710 	int ret = 0;
711 
712 	if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN) {
713 		nr_sig_mrs = attr->cap.max_rdma_ctxs;
714 		nr_mrs = attr->cap.max_rdma_ctxs * 2;
715 	} else if (rdma_rw_can_use_mr(dev, attr->port_num)) {
716 		nr_mrs = attr->cap.max_rdma_ctxs;
717 	}
718 
719 	if (nr_mrs) {
720 		ret = ib_mr_pool_init(qp, &qp->rdma_mrs, nr_mrs,
721 				IB_MR_TYPE_MEM_REG,
722 				rdma_rw_fr_page_list_len(dev), 0);
723 		if (ret) {
724 			pr_err("%s: failed to allocated %d MRs\n",
725 				__func__, nr_mrs);
726 			return ret;
727 		}
728 	}
729 
730 	if (nr_sig_mrs) {
731 		ret = ib_mr_pool_init(qp, &qp->sig_mrs, nr_sig_mrs,
732 				IB_MR_TYPE_SIGNATURE, 2, 0);
733 		if (ret) {
734 			pr_err("%s: failed to allocated %d SIG MRs\n",
735 				__func__, nr_sig_mrs);
736 			goto out_free_rdma_mrs;
737 		}
738 	}
739 
740 	return 0;
741 
742 out_free_rdma_mrs:
743 	ib_mr_pool_destroy(qp, &qp->rdma_mrs);
744 	return ret;
745 }
746 
747 void rdma_rw_cleanup_mrs(struct ib_qp *qp)
748 {
749 	ib_mr_pool_destroy(qp, &qp->sig_mrs);
750 	ib_mr_pool_destroy(qp, &qp->rdma_mrs);
751 }
752