1a060b562SChristoph Hellwig /* 2a060b562SChristoph Hellwig * Copyright (c) 2016 HGST, a Western Digital Company. 3a060b562SChristoph Hellwig * 4a060b562SChristoph Hellwig * This program is free software; you can redistribute it and/or modify it 5a060b562SChristoph Hellwig * under the terms and conditions of the GNU General Public License, 6a060b562SChristoph Hellwig * version 2, as published by the Free Software Foundation. 7a060b562SChristoph Hellwig * 8a060b562SChristoph Hellwig * This program is distributed in the hope it will be useful, but WITHOUT 9a060b562SChristoph Hellwig * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10a060b562SChristoph Hellwig * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11a060b562SChristoph Hellwig * more details. 12a060b562SChristoph Hellwig */ 13a060b562SChristoph Hellwig #include <linux/moduleparam.h> 14a060b562SChristoph Hellwig #include <linux/slab.h> 1550b7d220SLogan Gunthorpe #include <linux/pci-p2pdma.h> 16a060b562SChristoph Hellwig #include <rdma/mr_pool.h> 17a060b562SChristoph Hellwig #include <rdma/rw.h> 18a060b562SChristoph Hellwig 19a060b562SChristoph Hellwig enum { 20a060b562SChristoph Hellwig RDMA_RW_SINGLE_WR, 21a060b562SChristoph Hellwig RDMA_RW_MULTI_WR, 22a060b562SChristoph Hellwig RDMA_RW_MR, 230e353e34SChristoph Hellwig RDMA_RW_SIG_MR, 24a060b562SChristoph Hellwig }; 25a060b562SChristoph Hellwig 26a060b562SChristoph Hellwig static bool rdma_rw_force_mr; 27a060b562SChristoph Hellwig module_param_named(force_mr, rdma_rw_force_mr, bool, 0); 28a060b562SChristoph Hellwig MODULE_PARM_DESC(force_mr, "Force usage of MRs for RDMA READ/WRITE operations"); 29a060b562SChristoph Hellwig 30a060b562SChristoph Hellwig /* 31a060b562SChristoph Hellwig * Check if the device might use memory registration. This is currently only 32a060b562SChristoph Hellwig * true for iWarp devices. In the future we can hopefully fine tune this based 33a060b562SChristoph Hellwig * on HCA driver input. 34a060b562SChristoph Hellwig */ 35a060b562SChristoph Hellwig static inline bool rdma_rw_can_use_mr(struct ib_device *dev, u8 port_num) 36a060b562SChristoph Hellwig { 37a060b562SChristoph Hellwig if (rdma_protocol_iwarp(dev, port_num)) 38a060b562SChristoph Hellwig return true; 39a060b562SChristoph Hellwig if (unlikely(rdma_rw_force_mr)) 40a060b562SChristoph Hellwig return true; 41a060b562SChristoph Hellwig return false; 42a060b562SChristoph Hellwig } 43a060b562SChristoph Hellwig 44a060b562SChristoph Hellwig /* 45a060b562SChristoph Hellwig * Check if the device will use memory registration for this RW operation. 46a060b562SChristoph Hellwig * We currently always use memory registrations for iWarp RDMA READs, and 47a060b562SChristoph Hellwig * have a debug option to force usage of MRs. 48a060b562SChristoph Hellwig * 49a060b562SChristoph Hellwig * XXX: In the future we can hopefully fine tune this based on HCA driver 50a060b562SChristoph Hellwig * input. 51a060b562SChristoph Hellwig */ 52a060b562SChristoph Hellwig static inline bool rdma_rw_io_needs_mr(struct ib_device *dev, u8 port_num, 53a060b562SChristoph Hellwig enum dma_data_direction dir, int dma_nents) 54a060b562SChristoph Hellwig { 55a060b562SChristoph Hellwig if (rdma_protocol_iwarp(dev, port_num) && dir == DMA_FROM_DEVICE) 56a060b562SChristoph Hellwig return true; 57a060b562SChristoph Hellwig if (unlikely(rdma_rw_force_mr)) 58a060b562SChristoph Hellwig return true; 59a060b562SChristoph Hellwig return false; 60a060b562SChristoph Hellwig } 61a060b562SChristoph Hellwig 62e9a53e73SIsrael Rukshin static inline u32 rdma_rw_fr_page_list_len(struct ib_device *dev, 63e9a53e73SIsrael Rukshin bool pi_support) 64a060b562SChristoph Hellwig { 65e9a53e73SIsrael Rukshin u32 max_pages; 66e9a53e73SIsrael Rukshin 67e9a53e73SIsrael Rukshin if (pi_support) 68e9a53e73SIsrael Rukshin max_pages = dev->attrs.max_pi_fast_reg_page_list_len; 69e9a53e73SIsrael Rukshin else 70e9a53e73SIsrael Rukshin max_pages = dev->attrs.max_fast_reg_page_list_len; 71e9a53e73SIsrael Rukshin 72a060b562SChristoph Hellwig /* arbitrary limit to avoid allocating gigantic resources */ 73e9a53e73SIsrael Rukshin return min_t(u32, max_pages, 256); 74a060b562SChristoph Hellwig } 75a060b562SChristoph Hellwig 766cb2d5b1SIsrael Rukshin static inline int rdma_rw_inv_key(struct rdma_rw_reg_ctx *reg) 776cb2d5b1SIsrael Rukshin { 786cb2d5b1SIsrael Rukshin int count = 0; 796cb2d5b1SIsrael Rukshin 806cb2d5b1SIsrael Rukshin if (reg->mr->need_inval) { 816cb2d5b1SIsrael Rukshin reg->inv_wr.opcode = IB_WR_LOCAL_INV; 826cb2d5b1SIsrael Rukshin reg->inv_wr.ex.invalidate_rkey = reg->mr->lkey; 836cb2d5b1SIsrael Rukshin reg->inv_wr.next = ®->reg_wr.wr; 846cb2d5b1SIsrael Rukshin count++; 856cb2d5b1SIsrael Rukshin } else { 866cb2d5b1SIsrael Rukshin reg->inv_wr.next = NULL; 876cb2d5b1SIsrael Rukshin } 886cb2d5b1SIsrael Rukshin 896cb2d5b1SIsrael Rukshin return count; 906cb2d5b1SIsrael Rukshin } 916cb2d5b1SIsrael Rukshin 92eaa74ec7SBart Van Assche /* Caller must have zero-initialized *reg. */ 93a060b562SChristoph Hellwig static int rdma_rw_init_one_mr(struct ib_qp *qp, u8 port_num, 94a060b562SChristoph Hellwig struct rdma_rw_reg_ctx *reg, struct scatterlist *sg, 95a060b562SChristoph Hellwig u32 sg_cnt, u32 offset) 96a060b562SChristoph Hellwig { 97e9a53e73SIsrael Rukshin u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device, 98e9a53e73SIsrael Rukshin qp->integrity_en); 99a060b562SChristoph Hellwig u32 nents = min(sg_cnt, pages_per_mr); 100a060b562SChristoph Hellwig int count = 0, ret; 101a060b562SChristoph Hellwig 102a060b562SChristoph Hellwig reg->mr = ib_mr_pool_get(qp, &qp->rdma_mrs); 103a060b562SChristoph Hellwig if (!reg->mr) 104a060b562SChristoph Hellwig return -EAGAIN; 105a060b562SChristoph Hellwig 1066cb2d5b1SIsrael Rukshin count += rdma_rw_inv_key(reg); 107a060b562SChristoph Hellwig 1089aa8b321SBart Van Assche ret = ib_map_mr_sg(reg->mr, sg, nents, &offset, PAGE_SIZE); 109c2d7c8ffSDan Carpenter if (ret < 0 || ret < nents) { 110a060b562SChristoph Hellwig ib_mr_pool_put(qp, &qp->rdma_mrs, reg->mr); 111a060b562SChristoph Hellwig return -EINVAL; 112a060b562SChristoph Hellwig } 113a060b562SChristoph Hellwig 114a060b562SChristoph Hellwig reg->reg_wr.wr.opcode = IB_WR_REG_MR; 115a060b562SChristoph Hellwig reg->reg_wr.mr = reg->mr; 116a060b562SChristoph Hellwig reg->reg_wr.access = IB_ACCESS_LOCAL_WRITE; 117a060b562SChristoph Hellwig if (rdma_protocol_iwarp(qp->device, port_num)) 118a060b562SChristoph Hellwig reg->reg_wr.access |= IB_ACCESS_REMOTE_WRITE; 119a060b562SChristoph Hellwig count++; 120a060b562SChristoph Hellwig 121a060b562SChristoph Hellwig reg->sge.addr = reg->mr->iova; 122a060b562SChristoph Hellwig reg->sge.length = reg->mr->length; 123a060b562SChristoph Hellwig return count; 124a060b562SChristoph Hellwig } 125a060b562SChristoph Hellwig 126a060b562SChristoph Hellwig static int rdma_rw_init_mr_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp, 127a060b562SChristoph Hellwig u8 port_num, struct scatterlist *sg, u32 sg_cnt, u32 offset, 128a060b562SChristoph Hellwig u64 remote_addr, u32 rkey, enum dma_data_direction dir) 129a060b562SChristoph Hellwig { 130eaa74ec7SBart Van Assche struct rdma_rw_reg_ctx *prev = NULL; 131e9a53e73SIsrael Rukshin u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device, 132e9a53e73SIsrael Rukshin qp->integrity_en); 133a060b562SChristoph Hellwig int i, j, ret = 0, count = 0; 134a060b562SChristoph Hellwig 135a060b562SChristoph Hellwig ctx->nr_ops = (sg_cnt + pages_per_mr - 1) / pages_per_mr; 136a060b562SChristoph Hellwig ctx->reg = kcalloc(ctx->nr_ops, sizeof(*ctx->reg), GFP_KERNEL); 137a060b562SChristoph Hellwig if (!ctx->reg) { 138a060b562SChristoph Hellwig ret = -ENOMEM; 139a060b562SChristoph Hellwig goto out; 140a060b562SChristoph Hellwig } 141a060b562SChristoph Hellwig 142a060b562SChristoph Hellwig for (i = 0; i < ctx->nr_ops; i++) { 143a060b562SChristoph Hellwig struct rdma_rw_reg_ctx *reg = &ctx->reg[i]; 144a060b562SChristoph Hellwig u32 nents = min(sg_cnt, pages_per_mr); 145a060b562SChristoph Hellwig 146a060b562SChristoph Hellwig ret = rdma_rw_init_one_mr(qp, port_num, reg, sg, sg_cnt, 147a060b562SChristoph Hellwig offset); 148a060b562SChristoph Hellwig if (ret < 0) 149a060b562SChristoph Hellwig goto out_free; 150a060b562SChristoph Hellwig count += ret; 151a060b562SChristoph Hellwig 152a060b562SChristoph Hellwig if (prev) { 153a060b562SChristoph Hellwig if (reg->mr->need_inval) 154a060b562SChristoph Hellwig prev->wr.wr.next = ®->inv_wr; 155a060b562SChristoph Hellwig else 156a060b562SChristoph Hellwig prev->wr.wr.next = ®->reg_wr.wr; 157a060b562SChristoph Hellwig } 158a060b562SChristoph Hellwig 159a060b562SChristoph Hellwig reg->reg_wr.wr.next = ®->wr.wr; 160a060b562SChristoph Hellwig 161a060b562SChristoph Hellwig reg->wr.wr.sg_list = ®->sge; 162a060b562SChristoph Hellwig reg->wr.wr.num_sge = 1; 163a060b562SChristoph Hellwig reg->wr.remote_addr = remote_addr; 164a060b562SChristoph Hellwig reg->wr.rkey = rkey; 165a060b562SChristoph Hellwig if (dir == DMA_TO_DEVICE) { 166a060b562SChristoph Hellwig reg->wr.wr.opcode = IB_WR_RDMA_WRITE; 167a060b562SChristoph Hellwig } else if (!rdma_cap_read_inv(qp->device, port_num)) { 168a060b562SChristoph Hellwig reg->wr.wr.opcode = IB_WR_RDMA_READ; 169a060b562SChristoph Hellwig } else { 170a060b562SChristoph Hellwig reg->wr.wr.opcode = IB_WR_RDMA_READ_WITH_INV; 171a060b562SChristoph Hellwig reg->wr.wr.ex.invalidate_rkey = reg->mr->lkey; 172a060b562SChristoph Hellwig } 173a060b562SChristoph Hellwig count++; 174a060b562SChristoph Hellwig 175a060b562SChristoph Hellwig remote_addr += reg->sge.length; 176a060b562SChristoph Hellwig sg_cnt -= nents; 177a060b562SChristoph Hellwig for (j = 0; j < nents; j++) 178a060b562SChristoph Hellwig sg = sg_next(sg); 179eaa74ec7SBart Van Assche prev = reg; 180a060b562SChristoph Hellwig offset = 0; 181a060b562SChristoph Hellwig } 182a060b562SChristoph Hellwig 183eaa74ec7SBart Van Assche if (prev) 184eaa74ec7SBart Van Assche prev->wr.wr.next = NULL; 185eaa74ec7SBart Van Assche 186a060b562SChristoph Hellwig ctx->type = RDMA_RW_MR; 187a060b562SChristoph Hellwig return count; 188a060b562SChristoph Hellwig 189a060b562SChristoph Hellwig out_free: 190a060b562SChristoph Hellwig while (--i >= 0) 191a060b562SChristoph Hellwig ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->reg[i].mr); 192a060b562SChristoph Hellwig kfree(ctx->reg); 193a060b562SChristoph Hellwig out: 194a060b562SChristoph Hellwig return ret; 195a060b562SChristoph Hellwig } 196a060b562SChristoph Hellwig 197a060b562SChristoph Hellwig static int rdma_rw_init_map_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp, 198a060b562SChristoph Hellwig struct scatterlist *sg, u32 sg_cnt, u32 offset, 199a060b562SChristoph Hellwig u64 remote_addr, u32 rkey, enum dma_data_direction dir) 200a060b562SChristoph Hellwig { 201632bc3f6SBart Van Assche u32 max_sge = dir == DMA_TO_DEVICE ? qp->max_write_sge : 202632bc3f6SBart Van Assche qp->max_read_sge; 203a060b562SChristoph Hellwig struct ib_sge *sge; 204a060b562SChristoph Hellwig u32 total_len = 0, i, j; 205a060b562SChristoph Hellwig 206a060b562SChristoph Hellwig ctx->nr_ops = DIV_ROUND_UP(sg_cnt, max_sge); 207a060b562SChristoph Hellwig 208a060b562SChristoph Hellwig ctx->map.sges = sge = kcalloc(sg_cnt, sizeof(*sge), GFP_KERNEL); 209a060b562SChristoph Hellwig if (!ctx->map.sges) 210a060b562SChristoph Hellwig goto out; 211a060b562SChristoph Hellwig 212a060b562SChristoph Hellwig ctx->map.wrs = kcalloc(ctx->nr_ops, sizeof(*ctx->map.wrs), GFP_KERNEL); 213a060b562SChristoph Hellwig if (!ctx->map.wrs) 214a060b562SChristoph Hellwig goto out_free_sges; 215a060b562SChristoph Hellwig 216a060b562SChristoph Hellwig for (i = 0; i < ctx->nr_ops; i++) { 217a060b562SChristoph Hellwig struct ib_rdma_wr *rdma_wr = &ctx->map.wrs[i]; 218a060b562SChristoph Hellwig u32 nr_sge = min(sg_cnt, max_sge); 219a060b562SChristoph Hellwig 220a060b562SChristoph Hellwig if (dir == DMA_TO_DEVICE) 221a060b562SChristoph Hellwig rdma_wr->wr.opcode = IB_WR_RDMA_WRITE; 222a060b562SChristoph Hellwig else 223a060b562SChristoph Hellwig rdma_wr->wr.opcode = IB_WR_RDMA_READ; 224a060b562SChristoph Hellwig rdma_wr->remote_addr = remote_addr + total_len; 225a060b562SChristoph Hellwig rdma_wr->rkey = rkey; 226eaa74ec7SBart Van Assche rdma_wr->wr.num_sge = nr_sge; 227a060b562SChristoph Hellwig rdma_wr->wr.sg_list = sge; 228a060b562SChristoph Hellwig 229a060b562SChristoph Hellwig for (j = 0; j < nr_sge; j++, sg = sg_next(sg)) { 230a163afc8SBart Van Assche sge->addr = sg_dma_address(sg) + offset; 231a163afc8SBart Van Assche sge->length = sg_dma_len(sg) - offset; 232a060b562SChristoph Hellwig sge->lkey = qp->pd->local_dma_lkey; 233a060b562SChristoph Hellwig 234a060b562SChristoph Hellwig total_len += sge->length; 235a060b562SChristoph Hellwig sge++; 236a060b562SChristoph Hellwig sg_cnt--; 237a060b562SChristoph Hellwig offset = 0; 238a060b562SChristoph Hellwig } 239a060b562SChristoph Hellwig 240eaa74ec7SBart Van Assche rdma_wr->wr.next = i + 1 < ctx->nr_ops ? 241eaa74ec7SBart Van Assche &ctx->map.wrs[i + 1].wr : NULL; 242a060b562SChristoph Hellwig } 243a060b562SChristoph Hellwig 244a060b562SChristoph Hellwig ctx->type = RDMA_RW_MULTI_WR; 245a060b562SChristoph Hellwig return ctx->nr_ops; 246a060b562SChristoph Hellwig 247a060b562SChristoph Hellwig out_free_sges: 248a060b562SChristoph Hellwig kfree(ctx->map.sges); 249a060b562SChristoph Hellwig out: 250a060b562SChristoph Hellwig return -ENOMEM; 251a060b562SChristoph Hellwig } 252a060b562SChristoph Hellwig 253a060b562SChristoph Hellwig static int rdma_rw_init_single_wr(struct rdma_rw_ctx *ctx, struct ib_qp *qp, 254a060b562SChristoph Hellwig struct scatterlist *sg, u32 offset, u64 remote_addr, u32 rkey, 255a060b562SChristoph Hellwig enum dma_data_direction dir) 256a060b562SChristoph Hellwig { 257a060b562SChristoph Hellwig struct ib_rdma_wr *rdma_wr = &ctx->single.wr; 258a060b562SChristoph Hellwig 259a060b562SChristoph Hellwig ctx->nr_ops = 1; 260a060b562SChristoph Hellwig 261a060b562SChristoph Hellwig ctx->single.sge.lkey = qp->pd->local_dma_lkey; 262a163afc8SBart Van Assche ctx->single.sge.addr = sg_dma_address(sg) + offset; 263a163afc8SBart Van Assche ctx->single.sge.length = sg_dma_len(sg) - offset; 264a060b562SChristoph Hellwig 265a060b562SChristoph Hellwig memset(rdma_wr, 0, sizeof(*rdma_wr)); 266a060b562SChristoph Hellwig if (dir == DMA_TO_DEVICE) 267a060b562SChristoph Hellwig rdma_wr->wr.opcode = IB_WR_RDMA_WRITE; 268a060b562SChristoph Hellwig else 269a060b562SChristoph Hellwig rdma_wr->wr.opcode = IB_WR_RDMA_READ; 270a060b562SChristoph Hellwig rdma_wr->wr.sg_list = &ctx->single.sge; 271a060b562SChristoph Hellwig rdma_wr->wr.num_sge = 1; 272a060b562SChristoph Hellwig rdma_wr->remote_addr = remote_addr; 273a060b562SChristoph Hellwig rdma_wr->rkey = rkey; 274a060b562SChristoph Hellwig 275a060b562SChristoph Hellwig ctx->type = RDMA_RW_SINGLE_WR; 276a060b562SChristoph Hellwig return 1; 277a060b562SChristoph Hellwig } 278a060b562SChristoph Hellwig 279a060b562SChristoph Hellwig /** 280a060b562SChristoph Hellwig * rdma_rw_ctx_init - initialize a RDMA READ/WRITE context 281a060b562SChristoph Hellwig * @ctx: context to initialize 282a060b562SChristoph Hellwig * @qp: queue pair to operate on 283a060b562SChristoph Hellwig * @port_num: port num to which the connection is bound 284a060b562SChristoph Hellwig * @sg: scatterlist to READ/WRITE from/to 285a060b562SChristoph Hellwig * @sg_cnt: number of entries in @sg 286a060b562SChristoph Hellwig * @sg_offset: current byte offset into @sg 287a060b562SChristoph Hellwig * @remote_addr:remote address to read/write (relative to @rkey) 288a060b562SChristoph Hellwig * @rkey: remote key to operate on 289a060b562SChristoph Hellwig * @dir: %DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ 290a060b562SChristoph Hellwig * 291a060b562SChristoph Hellwig * Returns the number of WQEs that will be needed on the workqueue if 292a060b562SChristoph Hellwig * successful, or a negative error code. 293a060b562SChristoph Hellwig */ 294a060b562SChristoph Hellwig int rdma_rw_ctx_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u8 port_num, 295a060b562SChristoph Hellwig struct scatterlist *sg, u32 sg_cnt, u32 sg_offset, 296a060b562SChristoph Hellwig u64 remote_addr, u32 rkey, enum dma_data_direction dir) 297a060b562SChristoph Hellwig { 298a060b562SChristoph Hellwig struct ib_device *dev = qp->pd->device; 299a060b562SChristoph Hellwig int ret; 300a060b562SChristoph Hellwig 30150b7d220SLogan Gunthorpe if (is_pci_p2pdma_page(sg_page(sg))) 30250b7d220SLogan Gunthorpe ret = pci_p2pdma_map_sg(dev->dma_device, sg, sg_cnt, dir); 30350b7d220SLogan Gunthorpe else 304a060b562SChristoph Hellwig ret = ib_dma_map_sg(dev, sg, sg_cnt, dir); 30550b7d220SLogan Gunthorpe 306a060b562SChristoph Hellwig if (!ret) 307a060b562SChristoph Hellwig return -ENOMEM; 308a060b562SChristoph Hellwig sg_cnt = ret; 309a060b562SChristoph Hellwig 310a060b562SChristoph Hellwig /* 311a060b562SChristoph Hellwig * Skip to the S/G entry that sg_offset falls into: 312a060b562SChristoph Hellwig */ 313a060b562SChristoph Hellwig for (;;) { 314a163afc8SBart Van Assche u32 len = sg_dma_len(sg); 315a060b562SChristoph Hellwig 316a060b562SChristoph Hellwig if (sg_offset < len) 317a060b562SChristoph Hellwig break; 318a060b562SChristoph Hellwig 319a060b562SChristoph Hellwig sg = sg_next(sg); 320a060b562SChristoph Hellwig sg_offset -= len; 321a060b562SChristoph Hellwig sg_cnt--; 322a060b562SChristoph Hellwig } 323a060b562SChristoph Hellwig 324a060b562SChristoph Hellwig ret = -EIO; 325a060b562SChristoph Hellwig if (WARN_ON_ONCE(sg_cnt == 0)) 326a060b562SChristoph Hellwig goto out_unmap_sg; 327a060b562SChristoph Hellwig 328a060b562SChristoph Hellwig if (rdma_rw_io_needs_mr(qp->device, port_num, dir, sg_cnt)) { 329a060b562SChristoph Hellwig ret = rdma_rw_init_mr_wrs(ctx, qp, port_num, sg, sg_cnt, 330a060b562SChristoph Hellwig sg_offset, remote_addr, rkey, dir); 331a060b562SChristoph Hellwig } else if (sg_cnt > 1) { 332a060b562SChristoph Hellwig ret = rdma_rw_init_map_wrs(ctx, qp, sg, sg_cnt, sg_offset, 333a060b562SChristoph Hellwig remote_addr, rkey, dir); 334a060b562SChristoph Hellwig } else { 335a060b562SChristoph Hellwig ret = rdma_rw_init_single_wr(ctx, qp, sg, sg_offset, 336a060b562SChristoph Hellwig remote_addr, rkey, dir); 337a060b562SChristoph Hellwig } 338a060b562SChristoph Hellwig 339a060b562SChristoph Hellwig if (ret < 0) 340a060b562SChristoph Hellwig goto out_unmap_sg; 341a060b562SChristoph Hellwig return ret; 342a060b562SChristoph Hellwig 343a060b562SChristoph Hellwig out_unmap_sg: 344a060b562SChristoph Hellwig ib_dma_unmap_sg(dev, sg, sg_cnt, dir); 345a060b562SChristoph Hellwig return ret; 346a060b562SChristoph Hellwig } 347a060b562SChristoph Hellwig EXPORT_SYMBOL(rdma_rw_ctx_init); 348a060b562SChristoph Hellwig 3490e353e34SChristoph Hellwig /** 350222c7b1fSBart Van Assche * rdma_rw_ctx_signature_init - initialize a RW context with signature offload 3510e353e34SChristoph Hellwig * @ctx: context to initialize 3520e353e34SChristoph Hellwig * @qp: queue pair to operate on 3530e353e34SChristoph Hellwig * @port_num: port num to which the connection is bound 3540e353e34SChristoph Hellwig * @sg: scatterlist to READ/WRITE from/to 3550e353e34SChristoph Hellwig * @sg_cnt: number of entries in @sg 3560e353e34SChristoph Hellwig * @prot_sg: scatterlist to READ/WRITE protection information from/to 3570e353e34SChristoph Hellwig * @prot_sg_cnt: number of entries in @prot_sg 3580e353e34SChristoph Hellwig * @sig_attrs: signature offloading algorithms 3590e353e34SChristoph Hellwig * @remote_addr:remote address to read/write (relative to @rkey) 3600e353e34SChristoph Hellwig * @rkey: remote key to operate on 3610e353e34SChristoph Hellwig * @dir: %DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ 3620e353e34SChristoph Hellwig * 3630e353e34SChristoph Hellwig * Returns the number of WQEs that will be needed on the workqueue if 3640e353e34SChristoph Hellwig * successful, or a negative error code. 3650e353e34SChristoph Hellwig */ 3660e353e34SChristoph Hellwig int rdma_rw_ctx_signature_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp, 3670e353e34SChristoph Hellwig u8 port_num, struct scatterlist *sg, u32 sg_cnt, 3680e353e34SChristoph Hellwig struct scatterlist *prot_sg, u32 prot_sg_cnt, 3690e353e34SChristoph Hellwig struct ib_sig_attrs *sig_attrs, 3700e353e34SChristoph Hellwig u64 remote_addr, u32 rkey, enum dma_data_direction dir) 3710e353e34SChristoph Hellwig { 3720e353e34SChristoph Hellwig struct ib_device *dev = qp->pd->device; 373e9a53e73SIsrael Rukshin u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device, 374e9a53e73SIsrael Rukshin qp->integrity_en); 3750e353e34SChristoph Hellwig struct ib_rdma_wr *rdma_wr; 3760e353e34SChristoph Hellwig int count = 0, ret; 3770e353e34SChristoph Hellwig 3780e353e34SChristoph Hellwig if (sg_cnt > pages_per_mr || prot_sg_cnt > pages_per_mr) { 37953bfbf9bSMax Gurtovoy pr_err("SG count too large: sg_cnt=%d, prot_sg_cnt=%d, pages_per_mr=%d\n", 38053bfbf9bSMax Gurtovoy sg_cnt, prot_sg_cnt, pages_per_mr); 3810e353e34SChristoph Hellwig return -EINVAL; 3820e353e34SChristoph Hellwig } 3830e353e34SChristoph Hellwig 3840e353e34SChristoph Hellwig ret = ib_dma_map_sg(dev, sg, sg_cnt, dir); 3850e353e34SChristoph Hellwig if (!ret) 3860e353e34SChristoph Hellwig return -ENOMEM; 3870e353e34SChristoph Hellwig sg_cnt = ret; 3880e353e34SChristoph Hellwig 389e9a53e73SIsrael Rukshin if (prot_sg_cnt) { 3900e353e34SChristoph Hellwig ret = ib_dma_map_sg(dev, prot_sg, prot_sg_cnt, dir); 3910e353e34SChristoph Hellwig if (!ret) { 3920e353e34SChristoph Hellwig ret = -ENOMEM; 3930e353e34SChristoph Hellwig goto out_unmap_sg; 3940e353e34SChristoph Hellwig } 3950e353e34SChristoph Hellwig prot_sg_cnt = ret; 396e9a53e73SIsrael Rukshin } 3970e353e34SChristoph Hellwig 3980e353e34SChristoph Hellwig ctx->type = RDMA_RW_SIG_MR; 3990e353e34SChristoph Hellwig ctx->nr_ops = 1; 400e9a53e73SIsrael Rukshin ctx->reg = kcalloc(1, sizeof(*ctx->reg), GFP_KERNEL); 401e9a53e73SIsrael Rukshin if (!ctx->reg) { 4020e353e34SChristoph Hellwig ret = -ENOMEM; 4030e353e34SChristoph Hellwig goto out_unmap_prot_sg; 4040e353e34SChristoph Hellwig } 4050e353e34SChristoph Hellwig 406e9a53e73SIsrael Rukshin ctx->reg->mr = ib_mr_pool_get(qp, &qp->sig_mrs); 407e9a53e73SIsrael Rukshin if (!ctx->reg->mr) { 4080e353e34SChristoph Hellwig ret = -EAGAIN; 409e9a53e73SIsrael Rukshin goto out_free_ctx; 4100e353e34SChristoph Hellwig } 4110e353e34SChristoph Hellwig 412e9a53e73SIsrael Rukshin count += rdma_rw_inv_key(ctx->reg); 4130e353e34SChristoph Hellwig 414e9a53e73SIsrael Rukshin memcpy(ctx->reg->mr->sig_attrs, sig_attrs, sizeof(struct ib_sig_attrs)); 4150e353e34SChristoph Hellwig 416e9a53e73SIsrael Rukshin ret = ib_map_mr_sg_pi(ctx->reg->mr, sg, sg_cnt, NULL, prot_sg, 417e9a53e73SIsrael Rukshin prot_sg_cnt, NULL, SZ_4K); 418e9a53e73SIsrael Rukshin if (unlikely(ret)) { 419e9a53e73SIsrael Rukshin pr_err("failed to map PI sg (%d)\n", sg_cnt + prot_sg_cnt); 420e9a53e73SIsrael Rukshin goto out_destroy_sig_mr; 4210e353e34SChristoph Hellwig } 4220e353e34SChristoph Hellwig 423e9a53e73SIsrael Rukshin ctx->reg->reg_wr.wr.opcode = IB_WR_REG_MR_INTEGRITY; 424e9a53e73SIsrael Rukshin ctx->reg->reg_wr.wr.wr_cqe = NULL; 425e9a53e73SIsrael Rukshin ctx->reg->reg_wr.wr.num_sge = 0; 426e9a53e73SIsrael Rukshin ctx->reg->reg_wr.wr.send_flags = 0; 427e9a53e73SIsrael Rukshin ctx->reg->reg_wr.access = IB_ACCESS_LOCAL_WRITE; 428e9a53e73SIsrael Rukshin if (rdma_protocol_iwarp(qp->device, port_num)) 429e9a53e73SIsrael Rukshin ctx->reg->reg_wr.access |= IB_ACCESS_REMOTE_WRITE; 430e9a53e73SIsrael Rukshin ctx->reg->reg_wr.mr = ctx->reg->mr; 431e9a53e73SIsrael Rukshin ctx->reg->reg_wr.key = ctx->reg->mr->lkey; 4320e353e34SChristoph Hellwig count++; 4330e353e34SChristoph Hellwig 434e9a53e73SIsrael Rukshin ctx->reg->sge.addr = ctx->reg->mr->iova; 435e9a53e73SIsrael Rukshin ctx->reg->sge.length = ctx->reg->mr->length; 436e9a53e73SIsrael Rukshin if (sig_attrs->wire.sig_type == IB_SIG_TYPE_NONE) 437e9a53e73SIsrael Rukshin ctx->reg->sge.length -= ctx->reg->mr->sig_attrs->meta_length; 4380e353e34SChristoph Hellwig 439e9a53e73SIsrael Rukshin rdma_wr = &ctx->reg->wr; 440e9a53e73SIsrael Rukshin rdma_wr->wr.sg_list = &ctx->reg->sge; 4410e353e34SChristoph Hellwig rdma_wr->wr.num_sge = 1; 4420e353e34SChristoph Hellwig rdma_wr->remote_addr = remote_addr; 4430e353e34SChristoph Hellwig rdma_wr->rkey = rkey; 4440e353e34SChristoph Hellwig if (dir == DMA_TO_DEVICE) 4450e353e34SChristoph Hellwig rdma_wr->wr.opcode = IB_WR_RDMA_WRITE; 4460e353e34SChristoph Hellwig else 4470e353e34SChristoph Hellwig rdma_wr->wr.opcode = IB_WR_RDMA_READ; 448e9a53e73SIsrael Rukshin ctx->reg->reg_wr.wr.next = &rdma_wr->wr; 4490e353e34SChristoph Hellwig count++; 4500e353e34SChristoph Hellwig 4510e353e34SChristoph Hellwig return count; 4520e353e34SChristoph Hellwig 453e9a53e73SIsrael Rukshin out_destroy_sig_mr: 454e9a53e73SIsrael Rukshin ib_mr_pool_put(qp, &qp->sig_mrs, ctx->reg->mr); 4550e353e34SChristoph Hellwig out_free_ctx: 456e9a53e73SIsrael Rukshin kfree(ctx->reg); 4570e353e34SChristoph Hellwig out_unmap_prot_sg: 458e9a53e73SIsrael Rukshin if (prot_sg_cnt) 4590e353e34SChristoph Hellwig ib_dma_unmap_sg(dev, prot_sg, prot_sg_cnt, dir); 4600e353e34SChristoph Hellwig out_unmap_sg: 4610e353e34SChristoph Hellwig ib_dma_unmap_sg(dev, sg, sg_cnt, dir); 4620e353e34SChristoph Hellwig return ret; 4630e353e34SChristoph Hellwig } 4640e353e34SChristoph Hellwig EXPORT_SYMBOL(rdma_rw_ctx_signature_init); 4650e353e34SChristoph Hellwig 466a060b562SChristoph Hellwig /* 467a060b562SChristoph Hellwig * Now that we are going to post the WRs we can update the lkey and need_inval 468a060b562SChristoph Hellwig * state on the MRs. If we were doing this at init time, we would get double 469a060b562SChristoph Hellwig * or missing invalidations if a context was initialized but not actually 470a060b562SChristoph Hellwig * posted. 471a060b562SChristoph Hellwig */ 472a060b562SChristoph Hellwig static void rdma_rw_update_lkey(struct rdma_rw_reg_ctx *reg, bool need_inval) 473a060b562SChristoph Hellwig { 474a060b562SChristoph Hellwig reg->mr->need_inval = need_inval; 475a060b562SChristoph Hellwig ib_update_fast_reg_key(reg->mr, ib_inc_rkey(reg->mr->lkey)); 476a060b562SChristoph Hellwig reg->reg_wr.key = reg->mr->lkey; 477a060b562SChristoph Hellwig reg->sge.lkey = reg->mr->lkey; 478a060b562SChristoph Hellwig } 479a060b562SChristoph Hellwig 480a060b562SChristoph Hellwig /** 481a060b562SChristoph Hellwig * rdma_rw_ctx_wrs - return chain of WRs for a RDMA READ or WRITE operation 482a060b562SChristoph Hellwig * @ctx: context to operate on 483a060b562SChristoph Hellwig * @qp: queue pair to operate on 484a060b562SChristoph Hellwig * @port_num: port num to which the connection is bound 485a060b562SChristoph Hellwig * @cqe: completion queue entry for the last WR 486a060b562SChristoph Hellwig * @chain_wr: WR to append to the posted chain 487a060b562SChristoph Hellwig * 488a060b562SChristoph Hellwig * Return the WR chain for the set of RDMA READ/WRITE operations described by 489a060b562SChristoph Hellwig * @ctx, as well as any memory registration operations needed. If @chain_wr 490a060b562SChristoph Hellwig * is non-NULL the WR it points to will be appended to the chain of WRs posted. 491a060b562SChristoph Hellwig * If @chain_wr is not set @cqe must be set so that the caller gets a 492a060b562SChristoph Hellwig * completion notification. 493a060b562SChristoph Hellwig */ 494a060b562SChristoph Hellwig struct ib_send_wr *rdma_rw_ctx_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp, 495a060b562SChristoph Hellwig u8 port_num, struct ib_cqe *cqe, struct ib_send_wr *chain_wr) 496a060b562SChristoph Hellwig { 497a060b562SChristoph Hellwig struct ib_send_wr *first_wr, *last_wr; 498a060b562SChristoph Hellwig int i; 499a060b562SChristoph Hellwig 500a060b562SChristoph Hellwig switch (ctx->type) { 5010e353e34SChristoph Hellwig case RDMA_RW_SIG_MR: 502a060b562SChristoph Hellwig case RDMA_RW_MR: 503e9a53e73SIsrael Rukshin /* fallthrough */ 504a060b562SChristoph Hellwig for (i = 0; i < ctx->nr_ops; i++) { 505a060b562SChristoph Hellwig rdma_rw_update_lkey(&ctx->reg[i], 506a060b562SChristoph Hellwig ctx->reg[i].wr.wr.opcode != 507a060b562SChristoph Hellwig IB_WR_RDMA_READ_WITH_INV); 508a060b562SChristoph Hellwig } 509a060b562SChristoph Hellwig 510a060b562SChristoph Hellwig if (ctx->reg[0].inv_wr.next) 511a060b562SChristoph Hellwig first_wr = &ctx->reg[0].inv_wr; 512a060b562SChristoph Hellwig else 513a060b562SChristoph Hellwig first_wr = &ctx->reg[0].reg_wr.wr; 514a060b562SChristoph Hellwig last_wr = &ctx->reg[ctx->nr_ops - 1].wr.wr; 515a060b562SChristoph Hellwig break; 516a060b562SChristoph Hellwig case RDMA_RW_MULTI_WR: 517a060b562SChristoph Hellwig first_wr = &ctx->map.wrs[0].wr; 518a060b562SChristoph Hellwig last_wr = &ctx->map.wrs[ctx->nr_ops - 1].wr; 519a060b562SChristoph Hellwig break; 520a060b562SChristoph Hellwig case RDMA_RW_SINGLE_WR: 521a060b562SChristoph Hellwig first_wr = &ctx->single.wr.wr; 522a060b562SChristoph Hellwig last_wr = &ctx->single.wr.wr; 523a060b562SChristoph Hellwig break; 524a060b562SChristoph Hellwig default: 525a060b562SChristoph Hellwig BUG(); 526a060b562SChristoph Hellwig } 527a060b562SChristoph Hellwig 528a060b562SChristoph Hellwig if (chain_wr) { 529a060b562SChristoph Hellwig last_wr->next = chain_wr; 530a060b562SChristoph Hellwig } else { 531a060b562SChristoph Hellwig last_wr->wr_cqe = cqe; 532a060b562SChristoph Hellwig last_wr->send_flags |= IB_SEND_SIGNALED; 533a060b562SChristoph Hellwig } 534a060b562SChristoph Hellwig 535a060b562SChristoph Hellwig return first_wr; 536a060b562SChristoph Hellwig } 537a060b562SChristoph Hellwig EXPORT_SYMBOL(rdma_rw_ctx_wrs); 538a060b562SChristoph Hellwig 539a060b562SChristoph Hellwig /** 540a060b562SChristoph Hellwig * rdma_rw_ctx_post - post a RDMA READ or RDMA WRITE operation 541a060b562SChristoph Hellwig * @ctx: context to operate on 542a060b562SChristoph Hellwig * @qp: queue pair to operate on 543a060b562SChristoph Hellwig * @port_num: port num to which the connection is bound 544a060b562SChristoph Hellwig * @cqe: completion queue entry for the last WR 545a060b562SChristoph Hellwig * @chain_wr: WR to append to the posted chain 546a060b562SChristoph Hellwig * 547a060b562SChristoph Hellwig * Post the set of RDMA READ/WRITE operations described by @ctx, as well as 548a060b562SChristoph Hellwig * any memory registration operations needed. If @chain_wr is non-NULL the 549a060b562SChristoph Hellwig * WR it points to will be appended to the chain of WRs posted. If @chain_wr 550a060b562SChristoph Hellwig * is not set @cqe must be set so that the caller gets a completion 551a060b562SChristoph Hellwig * notification. 552a060b562SChristoph Hellwig */ 553a060b562SChristoph Hellwig int rdma_rw_ctx_post(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u8 port_num, 554a060b562SChristoph Hellwig struct ib_cqe *cqe, struct ib_send_wr *chain_wr) 555a060b562SChristoph Hellwig { 5561fec77bfSBart Van Assche struct ib_send_wr *first_wr; 557a060b562SChristoph Hellwig 558a060b562SChristoph Hellwig first_wr = rdma_rw_ctx_wrs(ctx, qp, port_num, cqe, chain_wr); 5591fec77bfSBart Van Assche return ib_post_send(qp, first_wr, NULL); 560a060b562SChristoph Hellwig } 561a060b562SChristoph Hellwig EXPORT_SYMBOL(rdma_rw_ctx_post); 562a060b562SChristoph Hellwig 563a060b562SChristoph Hellwig /** 564a060b562SChristoph Hellwig * rdma_rw_ctx_destroy - release all resources allocated by rdma_rw_ctx_init 565a060b562SChristoph Hellwig * @ctx: context to release 566a060b562SChristoph Hellwig * @qp: queue pair to operate on 567a060b562SChristoph Hellwig * @port_num: port num to which the connection is bound 568a060b562SChristoph Hellwig * @sg: scatterlist that was used for the READ/WRITE 569a060b562SChristoph Hellwig * @sg_cnt: number of entries in @sg 570a060b562SChristoph Hellwig * @dir: %DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ 571a060b562SChristoph Hellwig */ 572a060b562SChristoph Hellwig void rdma_rw_ctx_destroy(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u8 port_num, 573a060b562SChristoph Hellwig struct scatterlist *sg, u32 sg_cnt, enum dma_data_direction dir) 574a060b562SChristoph Hellwig { 575a060b562SChristoph Hellwig int i; 576a060b562SChristoph Hellwig 577a060b562SChristoph Hellwig switch (ctx->type) { 578a060b562SChristoph Hellwig case RDMA_RW_MR: 579a060b562SChristoph Hellwig for (i = 0; i < ctx->nr_ops; i++) 580a060b562SChristoph Hellwig ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->reg[i].mr); 581a060b562SChristoph Hellwig kfree(ctx->reg); 582a060b562SChristoph Hellwig break; 583a060b562SChristoph Hellwig case RDMA_RW_MULTI_WR: 584a060b562SChristoph Hellwig kfree(ctx->map.wrs); 585a060b562SChristoph Hellwig kfree(ctx->map.sges); 586a060b562SChristoph Hellwig break; 587a060b562SChristoph Hellwig case RDMA_RW_SINGLE_WR: 588a060b562SChristoph Hellwig break; 589a060b562SChristoph Hellwig default: 590a060b562SChristoph Hellwig BUG(); 591a060b562SChristoph Hellwig break; 592a060b562SChristoph Hellwig } 593a060b562SChristoph Hellwig 59450b7d220SLogan Gunthorpe /* P2PDMA contexts do not need to be unmapped */ 59550b7d220SLogan Gunthorpe if (!is_pci_p2pdma_page(sg_page(sg))) 596a060b562SChristoph Hellwig ib_dma_unmap_sg(qp->pd->device, sg, sg_cnt, dir); 597a060b562SChristoph Hellwig } 598a060b562SChristoph Hellwig EXPORT_SYMBOL(rdma_rw_ctx_destroy); 599a060b562SChristoph Hellwig 6000e353e34SChristoph Hellwig /** 6010e353e34SChristoph Hellwig * rdma_rw_ctx_destroy_signature - release all resources allocated by 6022d465a16SIsrael Rukshin * rdma_rw_ctx_signature_init 6030e353e34SChristoph Hellwig * @ctx: context to release 6040e353e34SChristoph Hellwig * @qp: queue pair to operate on 6050e353e34SChristoph Hellwig * @port_num: port num to which the connection is bound 6060e353e34SChristoph Hellwig * @sg: scatterlist that was used for the READ/WRITE 6070e353e34SChristoph Hellwig * @sg_cnt: number of entries in @sg 6080e353e34SChristoph Hellwig * @prot_sg: scatterlist that was used for the READ/WRITE of the PI 6090e353e34SChristoph Hellwig * @prot_sg_cnt: number of entries in @prot_sg 6100e353e34SChristoph Hellwig * @dir: %DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ 6110e353e34SChristoph Hellwig */ 6120e353e34SChristoph Hellwig void rdma_rw_ctx_destroy_signature(struct rdma_rw_ctx *ctx, struct ib_qp *qp, 6130e353e34SChristoph Hellwig u8 port_num, struct scatterlist *sg, u32 sg_cnt, 6140e353e34SChristoph Hellwig struct scatterlist *prot_sg, u32 prot_sg_cnt, 6150e353e34SChristoph Hellwig enum dma_data_direction dir) 6160e353e34SChristoph Hellwig { 6170e353e34SChristoph Hellwig if (WARN_ON_ONCE(ctx->type != RDMA_RW_SIG_MR)) 6180e353e34SChristoph Hellwig return; 6190e353e34SChristoph Hellwig 620e9a53e73SIsrael Rukshin ib_mr_pool_put(qp, &qp->sig_mrs, ctx->reg->mr); 621e9a53e73SIsrael Rukshin kfree(ctx->reg); 622e9a53e73SIsrael Rukshin 6230e353e34SChristoph Hellwig ib_dma_unmap_sg(qp->pd->device, sg, sg_cnt, dir); 624e9a53e73SIsrael Rukshin if (prot_sg_cnt) 6250e353e34SChristoph Hellwig ib_dma_unmap_sg(qp->pd->device, prot_sg, prot_sg_cnt, dir); 6260e353e34SChristoph Hellwig } 6270e353e34SChristoph Hellwig EXPORT_SYMBOL(rdma_rw_ctx_destroy_signature); 6280e353e34SChristoph Hellwig 62900628182SChuck Lever /** 63000628182SChuck Lever * rdma_rw_mr_factor - return number of MRs required for a payload 63100628182SChuck Lever * @device: device handling the connection 63200628182SChuck Lever * @port_num: port num to which the connection is bound 63300628182SChuck Lever * @maxpages: maximum payload pages per rdma_rw_ctx 63400628182SChuck Lever * 63500628182SChuck Lever * Returns the number of MRs the device requires to move @maxpayload 63600628182SChuck Lever * bytes. The returned value is used during transport creation to 63700628182SChuck Lever * compute max_rdma_ctxts and the size of the transport's Send and 63800628182SChuck Lever * Send Completion Queues. 63900628182SChuck Lever */ 64000628182SChuck Lever unsigned int rdma_rw_mr_factor(struct ib_device *device, u8 port_num, 64100628182SChuck Lever unsigned int maxpages) 64200628182SChuck Lever { 64300628182SChuck Lever unsigned int mr_pages; 64400628182SChuck Lever 64500628182SChuck Lever if (rdma_rw_can_use_mr(device, port_num)) 646e9a53e73SIsrael Rukshin mr_pages = rdma_rw_fr_page_list_len(device, false); 64700628182SChuck Lever else 64800628182SChuck Lever mr_pages = device->attrs.max_sge_rd; 64900628182SChuck Lever return DIV_ROUND_UP(maxpages, mr_pages); 65000628182SChuck Lever } 65100628182SChuck Lever EXPORT_SYMBOL(rdma_rw_mr_factor); 65200628182SChuck Lever 653a060b562SChristoph Hellwig void rdma_rw_init_qp(struct ib_device *dev, struct ib_qp_init_attr *attr) 654a060b562SChristoph Hellwig { 655a060b562SChristoph Hellwig u32 factor; 656a060b562SChristoph Hellwig 657a060b562SChristoph Hellwig WARN_ON_ONCE(attr->port_num == 0); 658a060b562SChristoph Hellwig 659a060b562SChristoph Hellwig /* 660a060b562SChristoph Hellwig * Each context needs at least one RDMA READ or WRITE WR. 661a060b562SChristoph Hellwig * 662a060b562SChristoph Hellwig * For some hardware we might need more, eventually we should ask the 663a060b562SChristoph Hellwig * HCA driver for a multiplier here. 664a060b562SChristoph Hellwig */ 665a060b562SChristoph Hellwig factor = 1; 666a060b562SChristoph Hellwig 667a060b562SChristoph Hellwig /* 668a060b562SChristoph Hellwig * If the devices needs MRs to perform RDMA READ or WRITE operations, 669a060b562SChristoph Hellwig * we'll need two additional MRs for the registrations and the 670a060b562SChristoph Hellwig * invalidation. 671a060b562SChristoph Hellwig */ 672e9a53e73SIsrael Rukshin if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN || 673e9a53e73SIsrael Rukshin rdma_rw_can_use_mr(dev, attr->port_num)) 674a060b562SChristoph Hellwig factor += 2; /* inv + reg */ 675a060b562SChristoph Hellwig 676a060b562SChristoph Hellwig attr->cap.max_send_wr += factor * attr->cap.max_rdma_ctxs; 677a060b562SChristoph Hellwig 678a060b562SChristoph Hellwig /* 679a060b562SChristoph Hellwig * But maybe we were just too high in the sky and the device doesn't 680a060b562SChristoph Hellwig * even support all we need, and we'll have to live with what we get.. 681a060b562SChristoph Hellwig */ 682a060b562SChristoph Hellwig attr->cap.max_send_wr = 683a060b562SChristoph Hellwig min_t(u32, attr->cap.max_send_wr, dev->attrs.max_qp_wr); 684a060b562SChristoph Hellwig } 685a060b562SChristoph Hellwig 686a060b562SChristoph Hellwig int rdma_rw_init_mrs(struct ib_qp *qp, struct ib_qp_init_attr *attr) 687a060b562SChristoph Hellwig { 688a060b562SChristoph Hellwig struct ib_device *dev = qp->pd->device; 689e9a53e73SIsrael Rukshin u32 nr_mrs = 0, nr_sig_mrs = 0, max_num_sg = 0; 690a060b562SChristoph Hellwig int ret = 0; 691a060b562SChristoph Hellwig 692c0a6cbb9SIsrael Rukshin if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN) { 6930e353e34SChristoph Hellwig nr_sig_mrs = attr->cap.max_rdma_ctxs; 694e9a53e73SIsrael Rukshin nr_mrs = attr->cap.max_rdma_ctxs; 695e9a53e73SIsrael Rukshin max_num_sg = rdma_rw_fr_page_list_len(dev, true); 6960e353e34SChristoph Hellwig } else if (rdma_rw_can_use_mr(dev, attr->port_num)) { 6970e353e34SChristoph Hellwig nr_mrs = attr->cap.max_rdma_ctxs; 698e9a53e73SIsrael Rukshin max_num_sg = rdma_rw_fr_page_list_len(dev, false); 699a060b562SChristoph Hellwig } 700a060b562SChristoph Hellwig 7010e353e34SChristoph Hellwig if (nr_mrs) { 7020e353e34SChristoph Hellwig ret = ib_mr_pool_init(qp, &qp->rdma_mrs, nr_mrs, 7030e353e34SChristoph Hellwig IB_MR_TYPE_MEM_REG, 704e9a53e73SIsrael Rukshin max_num_sg, 0); 7050e353e34SChristoph Hellwig if (ret) { 7060e353e34SChristoph Hellwig pr_err("%s: failed to allocated %d MRs\n", 7070e353e34SChristoph Hellwig __func__, nr_mrs); 7080e353e34SChristoph Hellwig return ret; 7090e353e34SChristoph Hellwig } 7100e353e34SChristoph Hellwig } 7110e353e34SChristoph Hellwig 7120e353e34SChristoph Hellwig if (nr_sig_mrs) { 7130e353e34SChristoph Hellwig ret = ib_mr_pool_init(qp, &qp->sig_mrs, nr_sig_mrs, 714e9a53e73SIsrael Rukshin IB_MR_TYPE_INTEGRITY, max_num_sg, max_num_sg); 7150e353e34SChristoph Hellwig if (ret) { 7160e353e34SChristoph Hellwig pr_err("%s: failed to allocated %d SIG MRs\n", 717f73e4076SIsrael Rukshin __func__, nr_sig_mrs); 7180e353e34SChristoph Hellwig goto out_free_rdma_mrs; 7190e353e34SChristoph Hellwig } 7200e353e34SChristoph Hellwig } 7210e353e34SChristoph Hellwig 7220e353e34SChristoph Hellwig return 0; 7230e353e34SChristoph Hellwig 7240e353e34SChristoph Hellwig out_free_rdma_mrs: 7250e353e34SChristoph Hellwig ib_mr_pool_destroy(qp, &qp->rdma_mrs); 726a060b562SChristoph Hellwig return ret; 727a060b562SChristoph Hellwig } 728a060b562SChristoph Hellwig 729a060b562SChristoph Hellwig void rdma_rw_cleanup_mrs(struct ib_qp *qp) 730a060b562SChristoph Hellwig { 7310e353e34SChristoph Hellwig ib_mr_pool_destroy(qp, &qp->sig_mrs); 732a060b562SChristoph Hellwig ib_mr_pool_destroy(qp, &qp->rdma_mrs); 733a060b562SChristoph Hellwig } 734