xref: /openbmc/linux/drivers/infiniband/core/rw.c (revision 1fb7f897)
12025cf9eSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2a060b562SChristoph Hellwig /*
3a060b562SChristoph Hellwig  * Copyright (c) 2016 HGST, a Western Digital Company.
4a060b562SChristoph Hellwig  */
5a060b562SChristoph Hellwig #include <linux/moduleparam.h>
6a060b562SChristoph Hellwig #include <linux/slab.h>
750b7d220SLogan Gunthorpe #include <linux/pci-p2pdma.h>
8a060b562SChristoph Hellwig #include <rdma/mr_pool.h>
9a060b562SChristoph Hellwig #include <rdma/rw.h>
10a060b562SChristoph Hellwig 
11a060b562SChristoph Hellwig enum {
12a060b562SChristoph Hellwig 	RDMA_RW_SINGLE_WR,
13a060b562SChristoph Hellwig 	RDMA_RW_MULTI_WR,
14a060b562SChristoph Hellwig 	RDMA_RW_MR,
150e353e34SChristoph Hellwig 	RDMA_RW_SIG_MR,
16a060b562SChristoph Hellwig };
17a060b562SChristoph Hellwig 
18a060b562SChristoph Hellwig static bool rdma_rw_force_mr;
19a060b562SChristoph Hellwig module_param_named(force_mr, rdma_rw_force_mr, bool, 0);
20a060b562SChristoph Hellwig MODULE_PARM_DESC(force_mr, "Force usage of MRs for RDMA READ/WRITE operations");
21a060b562SChristoph Hellwig 
22a060b562SChristoph Hellwig /*
2300bd1439SYamin Friedman  * Report whether memory registration should be used. Memory registration must
2400bd1439SYamin Friedman  * be used for iWarp devices because of iWARP-specific limitations. Memory
2500bd1439SYamin Friedman  * registration is also enabled if registering memory might yield better
2600bd1439SYamin Friedman  * performance than using multiple SGE entries, see rdma_rw_io_needs_mr()
27a060b562SChristoph Hellwig  */
28*1fb7f897SMark Bloch static inline bool rdma_rw_can_use_mr(struct ib_device *dev, u32 port_num)
29a060b562SChristoph Hellwig {
30a060b562SChristoph Hellwig 	if (rdma_protocol_iwarp(dev, port_num))
31a060b562SChristoph Hellwig 		return true;
3200bd1439SYamin Friedman 	if (dev->attrs.max_sgl_rd)
3300bd1439SYamin Friedman 		return true;
34a060b562SChristoph Hellwig 	if (unlikely(rdma_rw_force_mr))
35a060b562SChristoph Hellwig 		return true;
36a060b562SChristoph Hellwig 	return false;
37a060b562SChristoph Hellwig }
38a060b562SChristoph Hellwig 
39a060b562SChristoph Hellwig /*
40a060b562SChristoph Hellwig  * Check if the device will use memory registration for this RW operation.
4100bd1439SYamin Friedman  * For RDMA READs we must use MRs on iWarp and can optionally use them as an
4200bd1439SYamin Friedman  * optimization otherwise.  Additionally we have a debug option to force usage
4300bd1439SYamin Friedman  * of MRs to help testing this code path.
44a060b562SChristoph Hellwig  */
45*1fb7f897SMark Bloch static inline bool rdma_rw_io_needs_mr(struct ib_device *dev, u32 port_num,
46a060b562SChristoph Hellwig 		enum dma_data_direction dir, int dma_nents)
47a060b562SChristoph Hellwig {
4800bd1439SYamin Friedman 	if (dir == DMA_FROM_DEVICE) {
4900bd1439SYamin Friedman 		if (rdma_protocol_iwarp(dev, port_num))
50a060b562SChristoph Hellwig 			return true;
5100bd1439SYamin Friedman 		if (dev->attrs.max_sgl_rd && dma_nents > dev->attrs.max_sgl_rd)
5200bd1439SYamin Friedman 			return true;
5300bd1439SYamin Friedman 	}
54a060b562SChristoph Hellwig 	if (unlikely(rdma_rw_force_mr))
55a060b562SChristoph Hellwig 		return true;
56a060b562SChristoph Hellwig 	return false;
57a060b562SChristoph Hellwig }
58a060b562SChristoph Hellwig 
59e9a53e73SIsrael Rukshin static inline u32 rdma_rw_fr_page_list_len(struct ib_device *dev,
60e9a53e73SIsrael Rukshin 					   bool pi_support)
61a060b562SChristoph Hellwig {
62e9a53e73SIsrael Rukshin 	u32 max_pages;
63e9a53e73SIsrael Rukshin 
64e9a53e73SIsrael Rukshin 	if (pi_support)
65e9a53e73SIsrael Rukshin 		max_pages = dev->attrs.max_pi_fast_reg_page_list_len;
66e9a53e73SIsrael Rukshin 	else
67e9a53e73SIsrael Rukshin 		max_pages = dev->attrs.max_fast_reg_page_list_len;
68e9a53e73SIsrael Rukshin 
69a060b562SChristoph Hellwig 	/* arbitrary limit to avoid allocating gigantic resources */
70e9a53e73SIsrael Rukshin 	return min_t(u32, max_pages, 256);
71a060b562SChristoph Hellwig }
72a060b562SChristoph Hellwig 
736cb2d5b1SIsrael Rukshin static inline int rdma_rw_inv_key(struct rdma_rw_reg_ctx *reg)
746cb2d5b1SIsrael Rukshin {
756cb2d5b1SIsrael Rukshin 	int count = 0;
766cb2d5b1SIsrael Rukshin 
776cb2d5b1SIsrael Rukshin 	if (reg->mr->need_inval) {
786cb2d5b1SIsrael Rukshin 		reg->inv_wr.opcode = IB_WR_LOCAL_INV;
796cb2d5b1SIsrael Rukshin 		reg->inv_wr.ex.invalidate_rkey = reg->mr->lkey;
806cb2d5b1SIsrael Rukshin 		reg->inv_wr.next = &reg->reg_wr.wr;
816cb2d5b1SIsrael Rukshin 		count++;
826cb2d5b1SIsrael Rukshin 	} else {
836cb2d5b1SIsrael Rukshin 		reg->inv_wr.next = NULL;
846cb2d5b1SIsrael Rukshin 	}
856cb2d5b1SIsrael Rukshin 
866cb2d5b1SIsrael Rukshin 	return count;
876cb2d5b1SIsrael Rukshin }
886cb2d5b1SIsrael Rukshin 
89eaa74ec7SBart Van Assche /* Caller must have zero-initialized *reg. */
90*1fb7f897SMark Bloch static int rdma_rw_init_one_mr(struct ib_qp *qp, u32 port_num,
91a060b562SChristoph Hellwig 		struct rdma_rw_reg_ctx *reg, struct scatterlist *sg,
92a060b562SChristoph Hellwig 		u32 sg_cnt, u32 offset)
93a060b562SChristoph Hellwig {
94e9a53e73SIsrael Rukshin 	u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device,
95e9a53e73SIsrael Rukshin 						    qp->integrity_en);
96a060b562SChristoph Hellwig 	u32 nents = min(sg_cnt, pages_per_mr);
97a060b562SChristoph Hellwig 	int count = 0, ret;
98a060b562SChristoph Hellwig 
99a060b562SChristoph Hellwig 	reg->mr = ib_mr_pool_get(qp, &qp->rdma_mrs);
100a060b562SChristoph Hellwig 	if (!reg->mr)
101a060b562SChristoph Hellwig 		return -EAGAIN;
102a060b562SChristoph Hellwig 
1036cb2d5b1SIsrael Rukshin 	count += rdma_rw_inv_key(reg);
104a060b562SChristoph Hellwig 
1059aa8b321SBart Van Assche 	ret = ib_map_mr_sg(reg->mr, sg, nents, &offset, PAGE_SIZE);
106c2d7c8ffSDan Carpenter 	if (ret < 0 || ret < nents) {
107a060b562SChristoph Hellwig 		ib_mr_pool_put(qp, &qp->rdma_mrs, reg->mr);
108a060b562SChristoph Hellwig 		return -EINVAL;
109a060b562SChristoph Hellwig 	}
110a060b562SChristoph Hellwig 
111a060b562SChristoph Hellwig 	reg->reg_wr.wr.opcode = IB_WR_REG_MR;
112a060b562SChristoph Hellwig 	reg->reg_wr.mr = reg->mr;
113a060b562SChristoph Hellwig 	reg->reg_wr.access = IB_ACCESS_LOCAL_WRITE;
114a060b562SChristoph Hellwig 	if (rdma_protocol_iwarp(qp->device, port_num))
115a060b562SChristoph Hellwig 		reg->reg_wr.access |= IB_ACCESS_REMOTE_WRITE;
116a060b562SChristoph Hellwig 	count++;
117a060b562SChristoph Hellwig 
118a060b562SChristoph Hellwig 	reg->sge.addr = reg->mr->iova;
119a060b562SChristoph Hellwig 	reg->sge.length = reg->mr->length;
120a060b562SChristoph Hellwig 	return count;
121a060b562SChristoph Hellwig }
122a060b562SChristoph Hellwig 
123a060b562SChristoph Hellwig static int rdma_rw_init_mr_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
124*1fb7f897SMark Bloch 		u32 port_num, struct scatterlist *sg, u32 sg_cnt, u32 offset,
125a060b562SChristoph Hellwig 		u64 remote_addr, u32 rkey, enum dma_data_direction dir)
126a060b562SChristoph Hellwig {
127eaa74ec7SBart Van Assche 	struct rdma_rw_reg_ctx *prev = NULL;
128e9a53e73SIsrael Rukshin 	u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device,
129e9a53e73SIsrael Rukshin 						    qp->integrity_en);
130a060b562SChristoph Hellwig 	int i, j, ret = 0, count = 0;
131a060b562SChristoph Hellwig 
13295a776e8SMax Gurtovoy 	ctx->nr_ops = DIV_ROUND_UP(sg_cnt, pages_per_mr);
133a060b562SChristoph Hellwig 	ctx->reg = kcalloc(ctx->nr_ops, sizeof(*ctx->reg), GFP_KERNEL);
134a060b562SChristoph Hellwig 	if (!ctx->reg) {
135a060b562SChristoph Hellwig 		ret = -ENOMEM;
136a060b562SChristoph Hellwig 		goto out;
137a060b562SChristoph Hellwig 	}
138a060b562SChristoph Hellwig 
139a060b562SChristoph Hellwig 	for (i = 0; i < ctx->nr_ops; i++) {
140a060b562SChristoph Hellwig 		struct rdma_rw_reg_ctx *reg = &ctx->reg[i];
141a060b562SChristoph Hellwig 		u32 nents = min(sg_cnt, pages_per_mr);
142a060b562SChristoph Hellwig 
143a060b562SChristoph Hellwig 		ret = rdma_rw_init_one_mr(qp, port_num, reg, sg, sg_cnt,
144a060b562SChristoph Hellwig 				offset);
145a060b562SChristoph Hellwig 		if (ret < 0)
146a060b562SChristoph Hellwig 			goto out_free;
147a060b562SChristoph Hellwig 		count += ret;
148a060b562SChristoph Hellwig 
149a060b562SChristoph Hellwig 		if (prev) {
150a060b562SChristoph Hellwig 			if (reg->mr->need_inval)
151a060b562SChristoph Hellwig 				prev->wr.wr.next = &reg->inv_wr;
152a060b562SChristoph Hellwig 			else
153a060b562SChristoph Hellwig 				prev->wr.wr.next = &reg->reg_wr.wr;
154a060b562SChristoph Hellwig 		}
155a060b562SChristoph Hellwig 
156a060b562SChristoph Hellwig 		reg->reg_wr.wr.next = &reg->wr.wr;
157a060b562SChristoph Hellwig 
158a060b562SChristoph Hellwig 		reg->wr.wr.sg_list = &reg->sge;
159a060b562SChristoph Hellwig 		reg->wr.wr.num_sge = 1;
160a060b562SChristoph Hellwig 		reg->wr.remote_addr = remote_addr;
161a060b562SChristoph Hellwig 		reg->wr.rkey = rkey;
162a060b562SChristoph Hellwig 		if (dir == DMA_TO_DEVICE) {
163a060b562SChristoph Hellwig 			reg->wr.wr.opcode = IB_WR_RDMA_WRITE;
164a060b562SChristoph Hellwig 		} else if (!rdma_cap_read_inv(qp->device, port_num)) {
165a060b562SChristoph Hellwig 			reg->wr.wr.opcode = IB_WR_RDMA_READ;
166a060b562SChristoph Hellwig 		} else {
167a060b562SChristoph Hellwig 			reg->wr.wr.opcode = IB_WR_RDMA_READ_WITH_INV;
168a060b562SChristoph Hellwig 			reg->wr.wr.ex.invalidate_rkey = reg->mr->lkey;
169a060b562SChristoph Hellwig 		}
170a060b562SChristoph Hellwig 		count++;
171a060b562SChristoph Hellwig 
172a060b562SChristoph Hellwig 		remote_addr += reg->sge.length;
173a060b562SChristoph Hellwig 		sg_cnt -= nents;
174a060b562SChristoph Hellwig 		for (j = 0; j < nents; j++)
175a060b562SChristoph Hellwig 			sg = sg_next(sg);
176eaa74ec7SBart Van Assche 		prev = reg;
177a060b562SChristoph Hellwig 		offset = 0;
178a060b562SChristoph Hellwig 	}
179a060b562SChristoph Hellwig 
180eaa74ec7SBart Van Assche 	if (prev)
181eaa74ec7SBart Van Assche 		prev->wr.wr.next = NULL;
182eaa74ec7SBart Van Assche 
183a060b562SChristoph Hellwig 	ctx->type = RDMA_RW_MR;
184a060b562SChristoph Hellwig 	return count;
185a060b562SChristoph Hellwig 
186a060b562SChristoph Hellwig out_free:
187a060b562SChristoph Hellwig 	while (--i >= 0)
188a060b562SChristoph Hellwig 		ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->reg[i].mr);
189a060b562SChristoph Hellwig 	kfree(ctx->reg);
190a060b562SChristoph Hellwig out:
191a060b562SChristoph Hellwig 	return ret;
192a060b562SChristoph Hellwig }
193a060b562SChristoph Hellwig 
194a060b562SChristoph Hellwig static int rdma_rw_init_map_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
195a060b562SChristoph Hellwig 		struct scatterlist *sg, u32 sg_cnt, u32 offset,
196a060b562SChristoph Hellwig 		u64 remote_addr, u32 rkey, enum dma_data_direction dir)
197a060b562SChristoph Hellwig {
198632bc3f6SBart Van Assche 	u32 max_sge = dir == DMA_TO_DEVICE ? qp->max_write_sge :
199632bc3f6SBart Van Assche 		      qp->max_read_sge;
200a060b562SChristoph Hellwig 	struct ib_sge *sge;
201a060b562SChristoph Hellwig 	u32 total_len = 0, i, j;
202a060b562SChristoph Hellwig 
203a060b562SChristoph Hellwig 	ctx->nr_ops = DIV_ROUND_UP(sg_cnt, max_sge);
204a060b562SChristoph Hellwig 
205a060b562SChristoph Hellwig 	ctx->map.sges = sge = kcalloc(sg_cnt, sizeof(*sge), GFP_KERNEL);
206a060b562SChristoph Hellwig 	if (!ctx->map.sges)
207a060b562SChristoph Hellwig 		goto out;
208a060b562SChristoph Hellwig 
209a060b562SChristoph Hellwig 	ctx->map.wrs = kcalloc(ctx->nr_ops, sizeof(*ctx->map.wrs), GFP_KERNEL);
210a060b562SChristoph Hellwig 	if (!ctx->map.wrs)
211a060b562SChristoph Hellwig 		goto out_free_sges;
212a060b562SChristoph Hellwig 
213a060b562SChristoph Hellwig 	for (i = 0; i < ctx->nr_ops; i++) {
214a060b562SChristoph Hellwig 		struct ib_rdma_wr *rdma_wr = &ctx->map.wrs[i];
215a060b562SChristoph Hellwig 		u32 nr_sge = min(sg_cnt, max_sge);
216a060b562SChristoph Hellwig 
217a060b562SChristoph Hellwig 		if (dir == DMA_TO_DEVICE)
218a060b562SChristoph Hellwig 			rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
219a060b562SChristoph Hellwig 		else
220a060b562SChristoph Hellwig 			rdma_wr->wr.opcode = IB_WR_RDMA_READ;
221a060b562SChristoph Hellwig 		rdma_wr->remote_addr = remote_addr + total_len;
222a060b562SChristoph Hellwig 		rdma_wr->rkey = rkey;
223eaa74ec7SBart Van Assche 		rdma_wr->wr.num_sge = nr_sge;
224a060b562SChristoph Hellwig 		rdma_wr->wr.sg_list = sge;
225a060b562SChristoph Hellwig 
226a060b562SChristoph Hellwig 		for (j = 0; j < nr_sge; j++, sg = sg_next(sg)) {
227a163afc8SBart Van Assche 			sge->addr = sg_dma_address(sg) + offset;
228a163afc8SBart Van Assche 			sge->length = sg_dma_len(sg) - offset;
229a060b562SChristoph Hellwig 			sge->lkey = qp->pd->local_dma_lkey;
230a060b562SChristoph Hellwig 
231a060b562SChristoph Hellwig 			total_len += sge->length;
232a060b562SChristoph Hellwig 			sge++;
233a060b562SChristoph Hellwig 			sg_cnt--;
234a060b562SChristoph Hellwig 			offset = 0;
235a060b562SChristoph Hellwig 		}
236a060b562SChristoph Hellwig 
237eaa74ec7SBart Van Assche 		rdma_wr->wr.next = i + 1 < ctx->nr_ops ?
238eaa74ec7SBart Van Assche 			&ctx->map.wrs[i + 1].wr : NULL;
239a060b562SChristoph Hellwig 	}
240a060b562SChristoph Hellwig 
241a060b562SChristoph Hellwig 	ctx->type = RDMA_RW_MULTI_WR;
242a060b562SChristoph Hellwig 	return ctx->nr_ops;
243a060b562SChristoph Hellwig 
244a060b562SChristoph Hellwig out_free_sges:
245a060b562SChristoph Hellwig 	kfree(ctx->map.sges);
246a060b562SChristoph Hellwig out:
247a060b562SChristoph Hellwig 	return -ENOMEM;
248a060b562SChristoph Hellwig }
249a060b562SChristoph Hellwig 
250a060b562SChristoph Hellwig static int rdma_rw_init_single_wr(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
251a060b562SChristoph Hellwig 		struct scatterlist *sg, u32 offset, u64 remote_addr, u32 rkey,
252a060b562SChristoph Hellwig 		enum dma_data_direction dir)
253a060b562SChristoph Hellwig {
254a060b562SChristoph Hellwig 	struct ib_rdma_wr *rdma_wr = &ctx->single.wr;
255a060b562SChristoph Hellwig 
256a060b562SChristoph Hellwig 	ctx->nr_ops = 1;
257a060b562SChristoph Hellwig 
258a060b562SChristoph Hellwig 	ctx->single.sge.lkey = qp->pd->local_dma_lkey;
259a163afc8SBart Van Assche 	ctx->single.sge.addr = sg_dma_address(sg) + offset;
260a163afc8SBart Van Assche 	ctx->single.sge.length = sg_dma_len(sg) - offset;
261a060b562SChristoph Hellwig 
262a060b562SChristoph Hellwig 	memset(rdma_wr, 0, sizeof(*rdma_wr));
263a060b562SChristoph Hellwig 	if (dir == DMA_TO_DEVICE)
264a060b562SChristoph Hellwig 		rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
265a060b562SChristoph Hellwig 	else
266a060b562SChristoph Hellwig 		rdma_wr->wr.opcode = IB_WR_RDMA_READ;
267a060b562SChristoph Hellwig 	rdma_wr->wr.sg_list = &ctx->single.sge;
268a060b562SChristoph Hellwig 	rdma_wr->wr.num_sge = 1;
269a060b562SChristoph Hellwig 	rdma_wr->remote_addr = remote_addr;
270a060b562SChristoph Hellwig 	rdma_wr->rkey = rkey;
271a060b562SChristoph Hellwig 
272a060b562SChristoph Hellwig 	ctx->type = RDMA_RW_SINGLE_WR;
273a060b562SChristoph Hellwig 	return 1;
274a060b562SChristoph Hellwig }
275a060b562SChristoph Hellwig 
2766affca14SMax Gurtovoy static void rdma_rw_unmap_sg(struct ib_device *dev, struct scatterlist *sg,
2776affca14SMax Gurtovoy 			     u32 sg_cnt, enum dma_data_direction dir)
2786affca14SMax Gurtovoy {
2796affca14SMax Gurtovoy 	if (is_pci_p2pdma_page(sg_page(sg)))
2806affca14SMax Gurtovoy 		pci_p2pdma_unmap_sg(dev->dma_device, sg, sg_cnt, dir);
2816affca14SMax Gurtovoy 	else
2826affca14SMax Gurtovoy 		ib_dma_unmap_sg(dev, sg, sg_cnt, dir);
2836affca14SMax Gurtovoy }
2846affca14SMax Gurtovoy 
2856affca14SMax Gurtovoy static int rdma_rw_map_sg(struct ib_device *dev, struct scatterlist *sg,
2866affca14SMax Gurtovoy 			  u32 sg_cnt, enum dma_data_direction dir)
2876affca14SMax Gurtovoy {
2885a7a9e03SChristoph Hellwig 	if (is_pci_p2pdma_page(sg_page(sg))) {
2895a7a9e03SChristoph Hellwig 		if (WARN_ON_ONCE(ib_uses_virt_dma(dev)))
2905a7a9e03SChristoph Hellwig 			return 0;
2916affca14SMax Gurtovoy 		return pci_p2pdma_map_sg(dev->dma_device, sg, sg_cnt, dir);
2925a7a9e03SChristoph Hellwig 	}
2936affca14SMax Gurtovoy 	return ib_dma_map_sg(dev, sg, sg_cnt, dir);
2946affca14SMax Gurtovoy }
2956affca14SMax Gurtovoy 
296a060b562SChristoph Hellwig /**
297a060b562SChristoph Hellwig  * rdma_rw_ctx_init - initialize a RDMA READ/WRITE context
298a060b562SChristoph Hellwig  * @ctx:	context to initialize
299a060b562SChristoph Hellwig  * @qp:		queue pair to operate on
300a060b562SChristoph Hellwig  * @port_num:	port num to which the connection is bound
301a060b562SChristoph Hellwig  * @sg:		scatterlist to READ/WRITE from/to
302a060b562SChristoph Hellwig  * @sg_cnt:	number of entries in @sg
303a060b562SChristoph Hellwig  * @sg_offset:	current byte offset into @sg
304a060b562SChristoph Hellwig  * @remote_addr:remote address to read/write (relative to @rkey)
305a060b562SChristoph Hellwig  * @rkey:	remote key to operate on
306a060b562SChristoph Hellwig  * @dir:	%DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
307a060b562SChristoph Hellwig  *
308a060b562SChristoph Hellwig  * Returns the number of WQEs that will be needed on the workqueue if
309a060b562SChristoph Hellwig  * successful, or a negative error code.
310a060b562SChristoph Hellwig  */
311*1fb7f897SMark Bloch int rdma_rw_ctx_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u32 port_num,
312a060b562SChristoph Hellwig 		struct scatterlist *sg, u32 sg_cnt, u32 sg_offset,
313a060b562SChristoph Hellwig 		u64 remote_addr, u32 rkey, enum dma_data_direction dir)
314a060b562SChristoph Hellwig {
315a060b562SChristoph Hellwig 	struct ib_device *dev = qp->pd->device;
316a060b562SChristoph Hellwig 	int ret;
317a060b562SChristoph Hellwig 
3186affca14SMax Gurtovoy 	ret = rdma_rw_map_sg(dev, sg, sg_cnt, dir);
319a060b562SChristoph Hellwig 	if (!ret)
320a060b562SChristoph Hellwig 		return -ENOMEM;
321a060b562SChristoph Hellwig 	sg_cnt = ret;
322a060b562SChristoph Hellwig 
323a060b562SChristoph Hellwig 	/*
324a060b562SChristoph Hellwig 	 * Skip to the S/G entry that sg_offset falls into:
325a060b562SChristoph Hellwig 	 */
326a060b562SChristoph Hellwig 	for (;;) {
327a163afc8SBart Van Assche 		u32 len = sg_dma_len(sg);
328a060b562SChristoph Hellwig 
329a060b562SChristoph Hellwig 		if (sg_offset < len)
330a060b562SChristoph Hellwig 			break;
331a060b562SChristoph Hellwig 
332a060b562SChristoph Hellwig 		sg = sg_next(sg);
333a060b562SChristoph Hellwig 		sg_offset -= len;
334a060b562SChristoph Hellwig 		sg_cnt--;
335a060b562SChristoph Hellwig 	}
336a060b562SChristoph Hellwig 
337a060b562SChristoph Hellwig 	ret = -EIO;
338a060b562SChristoph Hellwig 	if (WARN_ON_ONCE(sg_cnt == 0))
339a060b562SChristoph Hellwig 		goto out_unmap_sg;
340a060b562SChristoph Hellwig 
341a060b562SChristoph Hellwig 	if (rdma_rw_io_needs_mr(qp->device, port_num, dir, sg_cnt)) {
342a060b562SChristoph Hellwig 		ret = rdma_rw_init_mr_wrs(ctx, qp, port_num, sg, sg_cnt,
343a060b562SChristoph Hellwig 				sg_offset, remote_addr, rkey, dir);
344a060b562SChristoph Hellwig 	} else if (sg_cnt > 1) {
345a060b562SChristoph Hellwig 		ret = rdma_rw_init_map_wrs(ctx, qp, sg, sg_cnt, sg_offset,
346a060b562SChristoph Hellwig 				remote_addr, rkey, dir);
347a060b562SChristoph Hellwig 	} else {
348a060b562SChristoph Hellwig 		ret = rdma_rw_init_single_wr(ctx, qp, sg, sg_offset,
349a060b562SChristoph Hellwig 				remote_addr, rkey, dir);
350a060b562SChristoph Hellwig 	}
351a060b562SChristoph Hellwig 
352a060b562SChristoph Hellwig 	if (ret < 0)
353a060b562SChristoph Hellwig 		goto out_unmap_sg;
354a060b562SChristoph Hellwig 	return ret;
355a060b562SChristoph Hellwig 
356a060b562SChristoph Hellwig out_unmap_sg:
3576affca14SMax Gurtovoy 	rdma_rw_unmap_sg(dev, sg, sg_cnt, dir);
358a060b562SChristoph Hellwig 	return ret;
359a060b562SChristoph Hellwig }
360a060b562SChristoph Hellwig EXPORT_SYMBOL(rdma_rw_ctx_init);
361a060b562SChristoph Hellwig 
3620e353e34SChristoph Hellwig /**
363222c7b1fSBart Van Assche  * rdma_rw_ctx_signature_init - initialize a RW context with signature offload
3640e353e34SChristoph Hellwig  * @ctx:	context to initialize
3650e353e34SChristoph Hellwig  * @qp:		queue pair to operate on
3660e353e34SChristoph Hellwig  * @port_num:	port num to which the connection is bound
3670e353e34SChristoph Hellwig  * @sg:		scatterlist to READ/WRITE from/to
3680e353e34SChristoph Hellwig  * @sg_cnt:	number of entries in @sg
3690e353e34SChristoph Hellwig  * @prot_sg:	scatterlist to READ/WRITE protection information from/to
3700e353e34SChristoph Hellwig  * @prot_sg_cnt: number of entries in @prot_sg
3710e353e34SChristoph Hellwig  * @sig_attrs:	signature offloading algorithms
3720e353e34SChristoph Hellwig  * @remote_addr:remote address to read/write (relative to @rkey)
3730e353e34SChristoph Hellwig  * @rkey:	remote key to operate on
3740e353e34SChristoph Hellwig  * @dir:	%DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
3750e353e34SChristoph Hellwig  *
3760e353e34SChristoph Hellwig  * Returns the number of WQEs that will be needed on the workqueue if
3770e353e34SChristoph Hellwig  * successful, or a negative error code.
3780e353e34SChristoph Hellwig  */
3790e353e34SChristoph Hellwig int rdma_rw_ctx_signature_init(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
380*1fb7f897SMark Bloch 		u32 port_num, struct scatterlist *sg, u32 sg_cnt,
3810e353e34SChristoph Hellwig 		struct scatterlist *prot_sg, u32 prot_sg_cnt,
3820e353e34SChristoph Hellwig 		struct ib_sig_attrs *sig_attrs,
3830e353e34SChristoph Hellwig 		u64 remote_addr, u32 rkey, enum dma_data_direction dir)
3840e353e34SChristoph Hellwig {
3850e353e34SChristoph Hellwig 	struct ib_device *dev = qp->pd->device;
386e9a53e73SIsrael Rukshin 	u32 pages_per_mr = rdma_rw_fr_page_list_len(qp->pd->device,
387e9a53e73SIsrael Rukshin 						    qp->integrity_en);
3880e353e34SChristoph Hellwig 	struct ib_rdma_wr *rdma_wr;
3890e353e34SChristoph Hellwig 	int count = 0, ret;
3900e353e34SChristoph Hellwig 
3910e353e34SChristoph Hellwig 	if (sg_cnt > pages_per_mr || prot_sg_cnt > pages_per_mr) {
39253bfbf9bSMax Gurtovoy 		pr_err("SG count too large: sg_cnt=%d, prot_sg_cnt=%d, pages_per_mr=%d\n",
39353bfbf9bSMax Gurtovoy 		       sg_cnt, prot_sg_cnt, pages_per_mr);
3940e353e34SChristoph Hellwig 		return -EINVAL;
3950e353e34SChristoph Hellwig 	}
3960e353e34SChristoph Hellwig 
39767982414SMax Gurtovoy 	ret = rdma_rw_map_sg(dev, sg, sg_cnt, dir);
3980e353e34SChristoph Hellwig 	if (!ret)
3990e353e34SChristoph Hellwig 		return -ENOMEM;
4000e353e34SChristoph Hellwig 	sg_cnt = ret;
4010e353e34SChristoph Hellwig 
402e9a53e73SIsrael Rukshin 	if (prot_sg_cnt) {
40367982414SMax Gurtovoy 		ret = rdma_rw_map_sg(dev, prot_sg, prot_sg_cnt, dir);
4040e353e34SChristoph Hellwig 		if (!ret) {
4050e353e34SChristoph Hellwig 			ret = -ENOMEM;
4060e353e34SChristoph Hellwig 			goto out_unmap_sg;
4070e353e34SChristoph Hellwig 		}
4080e353e34SChristoph Hellwig 		prot_sg_cnt = ret;
409e9a53e73SIsrael Rukshin 	}
4100e353e34SChristoph Hellwig 
4110e353e34SChristoph Hellwig 	ctx->type = RDMA_RW_SIG_MR;
4120e353e34SChristoph Hellwig 	ctx->nr_ops = 1;
413aaf1226bSZheng Yongjun 	ctx->reg = kzalloc(sizeof(*ctx->reg), GFP_KERNEL);
414e9a53e73SIsrael Rukshin 	if (!ctx->reg) {
4150e353e34SChristoph Hellwig 		ret = -ENOMEM;
4160e353e34SChristoph Hellwig 		goto out_unmap_prot_sg;
4170e353e34SChristoph Hellwig 	}
4180e353e34SChristoph Hellwig 
419e9a53e73SIsrael Rukshin 	ctx->reg->mr = ib_mr_pool_get(qp, &qp->sig_mrs);
420e9a53e73SIsrael Rukshin 	if (!ctx->reg->mr) {
4210e353e34SChristoph Hellwig 		ret = -EAGAIN;
422e9a53e73SIsrael Rukshin 		goto out_free_ctx;
4230e353e34SChristoph Hellwig 	}
4240e353e34SChristoph Hellwig 
425e9a53e73SIsrael Rukshin 	count += rdma_rw_inv_key(ctx->reg);
4260e353e34SChristoph Hellwig 
427e9a53e73SIsrael Rukshin 	memcpy(ctx->reg->mr->sig_attrs, sig_attrs, sizeof(struct ib_sig_attrs));
4280e353e34SChristoph Hellwig 
429e9a53e73SIsrael Rukshin 	ret = ib_map_mr_sg_pi(ctx->reg->mr, sg, sg_cnt, NULL, prot_sg,
430e9a53e73SIsrael Rukshin 			      prot_sg_cnt, NULL, SZ_4K);
431e9a53e73SIsrael Rukshin 	if (unlikely(ret)) {
432e9a53e73SIsrael Rukshin 		pr_err("failed to map PI sg (%d)\n", sg_cnt + prot_sg_cnt);
433e9a53e73SIsrael Rukshin 		goto out_destroy_sig_mr;
4340e353e34SChristoph Hellwig 	}
4350e353e34SChristoph Hellwig 
436e9a53e73SIsrael Rukshin 	ctx->reg->reg_wr.wr.opcode = IB_WR_REG_MR_INTEGRITY;
437e9a53e73SIsrael Rukshin 	ctx->reg->reg_wr.wr.wr_cqe = NULL;
438e9a53e73SIsrael Rukshin 	ctx->reg->reg_wr.wr.num_sge = 0;
439e9a53e73SIsrael Rukshin 	ctx->reg->reg_wr.wr.send_flags = 0;
440e9a53e73SIsrael Rukshin 	ctx->reg->reg_wr.access = IB_ACCESS_LOCAL_WRITE;
441e9a53e73SIsrael Rukshin 	if (rdma_protocol_iwarp(qp->device, port_num))
442e9a53e73SIsrael Rukshin 		ctx->reg->reg_wr.access |= IB_ACCESS_REMOTE_WRITE;
443e9a53e73SIsrael Rukshin 	ctx->reg->reg_wr.mr = ctx->reg->mr;
444e9a53e73SIsrael Rukshin 	ctx->reg->reg_wr.key = ctx->reg->mr->lkey;
4450e353e34SChristoph Hellwig 	count++;
4460e353e34SChristoph Hellwig 
447e9a53e73SIsrael Rukshin 	ctx->reg->sge.addr = ctx->reg->mr->iova;
448e9a53e73SIsrael Rukshin 	ctx->reg->sge.length = ctx->reg->mr->length;
449e9a53e73SIsrael Rukshin 	if (sig_attrs->wire.sig_type == IB_SIG_TYPE_NONE)
450e9a53e73SIsrael Rukshin 		ctx->reg->sge.length -= ctx->reg->mr->sig_attrs->meta_length;
4510e353e34SChristoph Hellwig 
452e9a53e73SIsrael Rukshin 	rdma_wr = &ctx->reg->wr;
453e9a53e73SIsrael Rukshin 	rdma_wr->wr.sg_list = &ctx->reg->sge;
4540e353e34SChristoph Hellwig 	rdma_wr->wr.num_sge = 1;
4550e353e34SChristoph Hellwig 	rdma_wr->remote_addr = remote_addr;
4560e353e34SChristoph Hellwig 	rdma_wr->rkey = rkey;
4570e353e34SChristoph Hellwig 	if (dir == DMA_TO_DEVICE)
4580e353e34SChristoph Hellwig 		rdma_wr->wr.opcode = IB_WR_RDMA_WRITE;
4590e353e34SChristoph Hellwig 	else
4600e353e34SChristoph Hellwig 		rdma_wr->wr.opcode = IB_WR_RDMA_READ;
461e9a53e73SIsrael Rukshin 	ctx->reg->reg_wr.wr.next = &rdma_wr->wr;
4620e353e34SChristoph Hellwig 	count++;
4630e353e34SChristoph Hellwig 
4640e353e34SChristoph Hellwig 	return count;
4650e353e34SChristoph Hellwig 
466e9a53e73SIsrael Rukshin out_destroy_sig_mr:
467e9a53e73SIsrael Rukshin 	ib_mr_pool_put(qp, &qp->sig_mrs, ctx->reg->mr);
4680e353e34SChristoph Hellwig out_free_ctx:
469e9a53e73SIsrael Rukshin 	kfree(ctx->reg);
4700e353e34SChristoph Hellwig out_unmap_prot_sg:
471e9a53e73SIsrael Rukshin 	if (prot_sg_cnt)
47267982414SMax Gurtovoy 		rdma_rw_unmap_sg(dev, prot_sg, prot_sg_cnt, dir);
4730e353e34SChristoph Hellwig out_unmap_sg:
47467982414SMax Gurtovoy 	rdma_rw_unmap_sg(dev, sg, sg_cnt, dir);
4750e353e34SChristoph Hellwig 	return ret;
4760e353e34SChristoph Hellwig }
4770e353e34SChristoph Hellwig EXPORT_SYMBOL(rdma_rw_ctx_signature_init);
4780e353e34SChristoph Hellwig 
479a060b562SChristoph Hellwig /*
480a060b562SChristoph Hellwig  * Now that we are going to post the WRs we can update the lkey and need_inval
481a060b562SChristoph Hellwig  * state on the MRs.  If we were doing this at init time, we would get double
482a060b562SChristoph Hellwig  * or missing invalidations if a context was initialized but not actually
483a060b562SChristoph Hellwig  * posted.
484a060b562SChristoph Hellwig  */
485a060b562SChristoph Hellwig static void rdma_rw_update_lkey(struct rdma_rw_reg_ctx *reg, bool need_inval)
486a060b562SChristoph Hellwig {
487a060b562SChristoph Hellwig 	reg->mr->need_inval = need_inval;
488a060b562SChristoph Hellwig 	ib_update_fast_reg_key(reg->mr, ib_inc_rkey(reg->mr->lkey));
489a060b562SChristoph Hellwig 	reg->reg_wr.key = reg->mr->lkey;
490a060b562SChristoph Hellwig 	reg->sge.lkey = reg->mr->lkey;
491a060b562SChristoph Hellwig }
492a060b562SChristoph Hellwig 
493a060b562SChristoph Hellwig /**
494a060b562SChristoph Hellwig  * rdma_rw_ctx_wrs - return chain of WRs for a RDMA READ or WRITE operation
495a060b562SChristoph Hellwig  * @ctx:	context to operate on
496a060b562SChristoph Hellwig  * @qp:		queue pair to operate on
497a060b562SChristoph Hellwig  * @port_num:	port num to which the connection is bound
498a060b562SChristoph Hellwig  * @cqe:	completion queue entry for the last WR
499a060b562SChristoph Hellwig  * @chain_wr:	WR to append to the posted chain
500a060b562SChristoph Hellwig  *
501a060b562SChristoph Hellwig  * Return the WR chain for the set of RDMA READ/WRITE operations described by
502a060b562SChristoph Hellwig  * @ctx, as well as any memory registration operations needed.  If @chain_wr
503a060b562SChristoph Hellwig  * is non-NULL the WR it points to will be appended to the chain of WRs posted.
504a060b562SChristoph Hellwig  * If @chain_wr is not set @cqe must be set so that the caller gets a
505a060b562SChristoph Hellwig  * completion notification.
506a060b562SChristoph Hellwig  */
507a060b562SChristoph Hellwig struct ib_send_wr *rdma_rw_ctx_wrs(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
508*1fb7f897SMark Bloch 		u32 port_num, struct ib_cqe *cqe, struct ib_send_wr *chain_wr)
509a060b562SChristoph Hellwig {
510a060b562SChristoph Hellwig 	struct ib_send_wr *first_wr, *last_wr;
511a060b562SChristoph Hellwig 	int i;
512a060b562SChristoph Hellwig 
513a060b562SChristoph Hellwig 	switch (ctx->type) {
5140e353e34SChristoph Hellwig 	case RDMA_RW_SIG_MR:
515a060b562SChristoph Hellwig 	case RDMA_RW_MR:
516a060b562SChristoph Hellwig 		for (i = 0; i < ctx->nr_ops; i++) {
517a060b562SChristoph Hellwig 			rdma_rw_update_lkey(&ctx->reg[i],
518a060b562SChristoph Hellwig 				ctx->reg[i].wr.wr.opcode !=
519a060b562SChristoph Hellwig 					IB_WR_RDMA_READ_WITH_INV);
520a060b562SChristoph Hellwig 		}
521a060b562SChristoph Hellwig 
522a060b562SChristoph Hellwig 		if (ctx->reg[0].inv_wr.next)
523a060b562SChristoph Hellwig 			first_wr = &ctx->reg[0].inv_wr;
524a060b562SChristoph Hellwig 		else
525a060b562SChristoph Hellwig 			first_wr = &ctx->reg[0].reg_wr.wr;
526a060b562SChristoph Hellwig 		last_wr = &ctx->reg[ctx->nr_ops - 1].wr.wr;
527a060b562SChristoph Hellwig 		break;
528a060b562SChristoph Hellwig 	case RDMA_RW_MULTI_WR:
529a060b562SChristoph Hellwig 		first_wr = &ctx->map.wrs[0].wr;
530a060b562SChristoph Hellwig 		last_wr = &ctx->map.wrs[ctx->nr_ops - 1].wr;
531a060b562SChristoph Hellwig 		break;
532a060b562SChristoph Hellwig 	case RDMA_RW_SINGLE_WR:
533a060b562SChristoph Hellwig 		first_wr = &ctx->single.wr.wr;
534a060b562SChristoph Hellwig 		last_wr = &ctx->single.wr.wr;
535a060b562SChristoph Hellwig 		break;
536a060b562SChristoph Hellwig 	default:
537a060b562SChristoph Hellwig 		BUG();
538a060b562SChristoph Hellwig 	}
539a060b562SChristoph Hellwig 
540a060b562SChristoph Hellwig 	if (chain_wr) {
541a060b562SChristoph Hellwig 		last_wr->next = chain_wr;
542a060b562SChristoph Hellwig 	} else {
543a060b562SChristoph Hellwig 		last_wr->wr_cqe = cqe;
544a060b562SChristoph Hellwig 		last_wr->send_flags |= IB_SEND_SIGNALED;
545a060b562SChristoph Hellwig 	}
546a060b562SChristoph Hellwig 
547a060b562SChristoph Hellwig 	return first_wr;
548a060b562SChristoph Hellwig }
549a060b562SChristoph Hellwig EXPORT_SYMBOL(rdma_rw_ctx_wrs);
550a060b562SChristoph Hellwig 
551a060b562SChristoph Hellwig /**
552a060b562SChristoph Hellwig  * rdma_rw_ctx_post - post a RDMA READ or RDMA WRITE operation
553a060b562SChristoph Hellwig  * @ctx:	context to operate on
554a060b562SChristoph Hellwig  * @qp:		queue pair to operate on
555a060b562SChristoph Hellwig  * @port_num:	port num to which the connection is bound
556a060b562SChristoph Hellwig  * @cqe:	completion queue entry for the last WR
557a060b562SChristoph Hellwig  * @chain_wr:	WR to append to the posted chain
558a060b562SChristoph Hellwig  *
559a060b562SChristoph Hellwig  * Post the set of RDMA READ/WRITE operations described by @ctx, as well as
560a060b562SChristoph Hellwig  * any memory registration operations needed.  If @chain_wr is non-NULL the
561a060b562SChristoph Hellwig  * WR it points to will be appended to the chain of WRs posted.  If @chain_wr
562a060b562SChristoph Hellwig  * is not set @cqe must be set so that the caller gets a completion
563a060b562SChristoph Hellwig  * notification.
564a060b562SChristoph Hellwig  */
565*1fb7f897SMark Bloch int rdma_rw_ctx_post(struct rdma_rw_ctx *ctx, struct ib_qp *qp, u32 port_num,
566a060b562SChristoph Hellwig 		struct ib_cqe *cqe, struct ib_send_wr *chain_wr)
567a060b562SChristoph Hellwig {
5681fec77bfSBart Van Assche 	struct ib_send_wr *first_wr;
569a060b562SChristoph Hellwig 
570a060b562SChristoph Hellwig 	first_wr = rdma_rw_ctx_wrs(ctx, qp, port_num, cqe, chain_wr);
5711fec77bfSBart Van Assche 	return ib_post_send(qp, first_wr, NULL);
572a060b562SChristoph Hellwig }
573a060b562SChristoph Hellwig EXPORT_SYMBOL(rdma_rw_ctx_post);
574a060b562SChristoph Hellwig 
575a060b562SChristoph Hellwig /**
576a060b562SChristoph Hellwig  * rdma_rw_ctx_destroy - release all resources allocated by rdma_rw_ctx_init
577a060b562SChristoph Hellwig  * @ctx:	context to release
578a060b562SChristoph Hellwig  * @qp:		queue pair to operate on
579a060b562SChristoph Hellwig  * @port_num:	port num to which the connection is bound
580a060b562SChristoph Hellwig  * @sg:		scatterlist that was used for the READ/WRITE
581a060b562SChristoph Hellwig  * @sg_cnt:	number of entries in @sg
582a060b562SChristoph Hellwig  * @dir:	%DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
583a060b562SChristoph Hellwig  */
584*1fb7f897SMark Bloch void rdma_rw_ctx_destroy(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
585*1fb7f897SMark Bloch 			 u32 port_num, struct scatterlist *sg, u32 sg_cnt,
586*1fb7f897SMark Bloch 			 enum dma_data_direction dir)
587a060b562SChristoph Hellwig {
588a060b562SChristoph Hellwig 	int i;
589a060b562SChristoph Hellwig 
590a060b562SChristoph Hellwig 	switch (ctx->type) {
591a060b562SChristoph Hellwig 	case RDMA_RW_MR:
592a060b562SChristoph Hellwig 		for (i = 0; i < ctx->nr_ops; i++)
593a060b562SChristoph Hellwig 			ib_mr_pool_put(qp, &qp->rdma_mrs, ctx->reg[i].mr);
594a060b562SChristoph Hellwig 		kfree(ctx->reg);
595a060b562SChristoph Hellwig 		break;
596a060b562SChristoph Hellwig 	case RDMA_RW_MULTI_WR:
597a060b562SChristoph Hellwig 		kfree(ctx->map.wrs);
598a060b562SChristoph Hellwig 		kfree(ctx->map.sges);
599a060b562SChristoph Hellwig 		break;
600a060b562SChristoph Hellwig 	case RDMA_RW_SINGLE_WR:
601a060b562SChristoph Hellwig 		break;
602a060b562SChristoph Hellwig 	default:
603a060b562SChristoph Hellwig 		BUG();
604a060b562SChristoph Hellwig 		break;
605a060b562SChristoph Hellwig 	}
606a060b562SChristoph Hellwig 
6076affca14SMax Gurtovoy 	rdma_rw_unmap_sg(qp->pd->device, sg, sg_cnt, dir);
608a060b562SChristoph Hellwig }
609a060b562SChristoph Hellwig EXPORT_SYMBOL(rdma_rw_ctx_destroy);
610a060b562SChristoph Hellwig 
6110e353e34SChristoph Hellwig /**
6120e353e34SChristoph Hellwig  * rdma_rw_ctx_destroy_signature - release all resources allocated by
6132d465a16SIsrael Rukshin  *	rdma_rw_ctx_signature_init
6140e353e34SChristoph Hellwig  * @ctx:	context to release
6150e353e34SChristoph Hellwig  * @qp:		queue pair to operate on
6160e353e34SChristoph Hellwig  * @port_num:	port num to which the connection is bound
6170e353e34SChristoph Hellwig  * @sg:		scatterlist that was used for the READ/WRITE
6180e353e34SChristoph Hellwig  * @sg_cnt:	number of entries in @sg
6190e353e34SChristoph Hellwig  * @prot_sg:	scatterlist that was used for the READ/WRITE of the PI
6200e353e34SChristoph Hellwig  * @prot_sg_cnt: number of entries in @prot_sg
6210e353e34SChristoph Hellwig  * @dir:	%DMA_TO_DEVICE for RDMA WRITE, %DMA_FROM_DEVICE for RDMA READ
6220e353e34SChristoph Hellwig  */
6230e353e34SChristoph Hellwig void rdma_rw_ctx_destroy_signature(struct rdma_rw_ctx *ctx, struct ib_qp *qp,
624*1fb7f897SMark Bloch 		u32 port_num, struct scatterlist *sg, u32 sg_cnt,
6250e353e34SChristoph Hellwig 		struct scatterlist *prot_sg, u32 prot_sg_cnt,
6260e353e34SChristoph Hellwig 		enum dma_data_direction dir)
6270e353e34SChristoph Hellwig {
6280e353e34SChristoph Hellwig 	if (WARN_ON_ONCE(ctx->type != RDMA_RW_SIG_MR))
6290e353e34SChristoph Hellwig 		return;
6300e353e34SChristoph Hellwig 
631e9a53e73SIsrael Rukshin 	ib_mr_pool_put(qp, &qp->sig_mrs, ctx->reg->mr);
632e9a53e73SIsrael Rukshin 	kfree(ctx->reg);
633e9a53e73SIsrael Rukshin 
634e9a53e73SIsrael Rukshin 	if (prot_sg_cnt)
63567982414SMax Gurtovoy 		rdma_rw_unmap_sg(qp->pd->device, prot_sg, prot_sg_cnt, dir);
63667982414SMax Gurtovoy 	rdma_rw_unmap_sg(qp->pd->device, sg, sg_cnt, dir);
6370e353e34SChristoph Hellwig }
6380e353e34SChristoph Hellwig EXPORT_SYMBOL(rdma_rw_ctx_destroy_signature);
6390e353e34SChristoph Hellwig 
64000628182SChuck Lever /**
64100628182SChuck Lever  * rdma_rw_mr_factor - return number of MRs required for a payload
64200628182SChuck Lever  * @device:	device handling the connection
64300628182SChuck Lever  * @port_num:	port num to which the connection is bound
64400628182SChuck Lever  * @maxpages:	maximum payload pages per rdma_rw_ctx
64500628182SChuck Lever  *
64600628182SChuck Lever  * Returns the number of MRs the device requires to move @maxpayload
64700628182SChuck Lever  * bytes. The returned value is used during transport creation to
64800628182SChuck Lever  * compute max_rdma_ctxts and the size of the transport's Send and
64900628182SChuck Lever  * Send Completion Queues.
65000628182SChuck Lever  */
651*1fb7f897SMark Bloch unsigned int rdma_rw_mr_factor(struct ib_device *device, u32 port_num,
65200628182SChuck Lever 			       unsigned int maxpages)
65300628182SChuck Lever {
65400628182SChuck Lever 	unsigned int mr_pages;
65500628182SChuck Lever 
65600628182SChuck Lever 	if (rdma_rw_can_use_mr(device, port_num))
657e9a53e73SIsrael Rukshin 		mr_pages = rdma_rw_fr_page_list_len(device, false);
65800628182SChuck Lever 	else
65900628182SChuck Lever 		mr_pages = device->attrs.max_sge_rd;
66000628182SChuck Lever 	return DIV_ROUND_UP(maxpages, mr_pages);
66100628182SChuck Lever }
66200628182SChuck Lever EXPORT_SYMBOL(rdma_rw_mr_factor);
66300628182SChuck Lever 
664a060b562SChristoph Hellwig void rdma_rw_init_qp(struct ib_device *dev, struct ib_qp_init_attr *attr)
665a060b562SChristoph Hellwig {
666a060b562SChristoph Hellwig 	u32 factor;
667a060b562SChristoph Hellwig 
668a060b562SChristoph Hellwig 	WARN_ON_ONCE(attr->port_num == 0);
669a060b562SChristoph Hellwig 
670a060b562SChristoph Hellwig 	/*
671a060b562SChristoph Hellwig 	 * Each context needs at least one RDMA READ or WRITE WR.
672a060b562SChristoph Hellwig 	 *
673a060b562SChristoph Hellwig 	 * For some hardware we might need more, eventually we should ask the
674a060b562SChristoph Hellwig 	 * HCA driver for a multiplier here.
675a060b562SChristoph Hellwig 	 */
676a060b562SChristoph Hellwig 	factor = 1;
677a060b562SChristoph Hellwig 
678a060b562SChristoph Hellwig 	/*
679a060b562SChristoph Hellwig 	 * If the devices needs MRs to perform RDMA READ or WRITE operations,
680a060b562SChristoph Hellwig 	 * we'll need two additional MRs for the registrations and the
681a060b562SChristoph Hellwig 	 * invalidation.
682a060b562SChristoph Hellwig 	 */
683e9a53e73SIsrael Rukshin 	if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN ||
684e9a53e73SIsrael Rukshin 	    rdma_rw_can_use_mr(dev, attr->port_num))
685a060b562SChristoph Hellwig 		factor += 2;	/* inv + reg */
686a060b562SChristoph Hellwig 
687a060b562SChristoph Hellwig 	attr->cap.max_send_wr += factor * attr->cap.max_rdma_ctxs;
688a060b562SChristoph Hellwig 
689a060b562SChristoph Hellwig 	/*
690a060b562SChristoph Hellwig 	 * But maybe we were just too high in the sky and the device doesn't
691a060b562SChristoph Hellwig 	 * even support all we need, and we'll have to live with what we get..
692a060b562SChristoph Hellwig 	 */
693a060b562SChristoph Hellwig 	attr->cap.max_send_wr =
694a060b562SChristoph Hellwig 		min_t(u32, attr->cap.max_send_wr, dev->attrs.max_qp_wr);
695a060b562SChristoph Hellwig }
696a060b562SChristoph Hellwig 
697a060b562SChristoph Hellwig int rdma_rw_init_mrs(struct ib_qp *qp, struct ib_qp_init_attr *attr)
698a060b562SChristoph Hellwig {
699a060b562SChristoph Hellwig 	struct ib_device *dev = qp->pd->device;
700e9a53e73SIsrael Rukshin 	u32 nr_mrs = 0, nr_sig_mrs = 0, max_num_sg = 0;
701a060b562SChristoph Hellwig 	int ret = 0;
702a060b562SChristoph Hellwig 
703c0a6cbb9SIsrael Rukshin 	if (attr->create_flags & IB_QP_CREATE_INTEGRITY_EN) {
7040e353e34SChristoph Hellwig 		nr_sig_mrs = attr->cap.max_rdma_ctxs;
705e9a53e73SIsrael Rukshin 		nr_mrs = attr->cap.max_rdma_ctxs;
706e9a53e73SIsrael Rukshin 		max_num_sg = rdma_rw_fr_page_list_len(dev, true);
7070e353e34SChristoph Hellwig 	} else if (rdma_rw_can_use_mr(dev, attr->port_num)) {
7080e353e34SChristoph Hellwig 		nr_mrs = attr->cap.max_rdma_ctxs;
709e9a53e73SIsrael Rukshin 		max_num_sg = rdma_rw_fr_page_list_len(dev, false);
710a060b562SChristoph Hellwig 	}
711a060b562SChristoph Hellwig 
7120e353e34SChristoph Hellwig 	if (nr_mrs) {
7130e353e34SChristoph Hellwig 		ret = ib_mr_pool_init(qp, &qp->rdma_mrs, nr_mrs,
7140e353e34SChristoph Hellwig 				IB_MR_TYPE_MEM_REG,
715e9a53e73SIsrael Rukshin 				max_num_sg, 0);
7160e353e34SChristoph Hellwig 		if (ret) {
7170e353e34SChristoph Hellwig 			pr_err("%s: failed to allocated %d MRs\n",
7180e353e34SChristoph Hellwig 				__func__, nr_mrs);
7190e353e34SChristoph Hellwig 			return ret;
7200e353e34SChristoph Hellwig 		}
7210e353e34SChristoph Hellwig 	}
7220e353e34SChristoph Hellwig 
7230e353e34SChristoph Hellwig 	if (nr_sig_mrs) {
7240e353e34SChristoph Hellwig 		ret = ib_mr_pool_init(qp, &qp->sig_mrs, nr_sig_mrs,
725e9a53e73SIsrael Rukshin 				IB_MR_TYPE_INTEGRITY, max_num_sg, max_num_sg);
7260e353e34SChristoph Hellwig 		if (ret) {
7270e353e34SChristoph Hellwig 			pr_err("%s: failed to allocated %d SIG MRs\n",
728f73e4076SIsrael Rukshin 				__func__, nr_sig_mrs);
7290e353e34SChristoph Hellwig 			goto out_free_rdma_mrs;
7300e353e34SChristoph Hellwig 		}
7310e353e34SChristoph Hellwig 	}
7320e353e34SChristoph Hellwig 
7330e353e34SChristoph Hellwig 	return 0;
7340e353e34SChristoph Hellwig 
7350e353e34SChristoph Hellwig out_free_rdma_mrs:
7360e353e34SChristoph Hellwig 	ib_mr_pool_destroy(qp, &qp->rdma_mrs);
737a060b562SChristoph Hellwig 	return ret;
738a060b562SChristoph Hellwig }
739a060b562SChristoph Hellwig 
740a060b562SChristoph Hellwig void rdma_rw_cleanup_mrs(struct ib_qp *qp)
741a060b562SChristoph Hellwig {
7420e353e34SChristoph Hellwig 	ib_mr_pool_destroy(qp, &qp->sig_mrs);
743a060b562SChristoph Hellwig 	ib_mr_pool_destroy(qp, &qp->rdma_mrs);
744a060b562SChristoph Hellwig }
745