xref: /openbmc/linux/drivers/iio/proximity/sx9310.c (revision 249592bf)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright 2018 Google LLC.
4  *
5  * Driver for Semtech's SX9310/SX9311 capacitive proximity/button solution.
6  * Based on SX9500 driver and Semtech driver using the input framework
7  * <https://my.syncplicity.com/share/teouwsim8niiaud/
8  *          linux-driver-SX9310_NoSmartHSensing>.
9  * Reworked in April 2019 by Evan Green <evgreen@chromium.org>
10  * and in January 2020 by Daniel Campello <campello@chromium.org>.
11  */
12 
13 #include <linux/acpi.h>
14 #include <linux/bitfield.h>
15 #include <linux/delay.h>
16 #include <linux/i2c.h>
17 #include <linux/irq.h>
18 #include <linux/kernel.h>
19 #include <linux/log2.h>
20 #include <linux/mod_devicetable.h>
21 #include <linux/module.h>
22 #include <linux/pm.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/slab.h>
26 
27 #include <linux/iio/buffer.h>
28 #include <linux/iio/events.h>
29 #include <linux/iio/iio.h>
30 #include <linux/iio/sysfs.h>
31 #include <linux/iio/trigger.h>
32 #include <linux/iio/triggered_buffer.h>
33 #include <linux/iio/trigger_consumer.h>
34 
35 /* Register definitions. */
36 #define SX9310_REG_IRQ_SRC				0x00
37 #define SX9310_REG_STAT0				0x01
38 #define SX9310_REG_STAT1				0x02
39 #define SX9310_REG_STAT1_COMPSTAT_MASK			GENMASK(3, 0)
40 #define SX9310_REG_IRQ_MSK				0x03
41 #define   SX9310_CONVDONE_IRQ				BIT(3)
42 #define   SX9310_FAR_IRQ				BIT(5)
43 #define   SX9310_CLOSE_IRQ				BIT(6)
44 #define SX9310_REG_IRQ_FUNC				0x04
45 
46 #define SX9310_REG_PROX_CTRL0				0x10
47 #define   SX9310_REG_PROX_CTRL0_SENSOREN_MASK		GENMASK(3, 0)
48 #define   SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK		GENMASK(7, 4)
49 #define   SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS		0x01
50 #define SX9310_REG_PROX_CTRL1				0x11
51 #define SX9310_REG_PROX_CTRL2				0x12
52 #define   SX9310_REG_PROX_CTRL2_COMBMODE_MASK		GENMASK(7, 6)
53 #define   SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1_CS2_CS3 (0x03 << 6)
54 #define   SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2	(0x02 << 6)
55 #define   SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1	(0x01 << 6)
56 #define   SX9310_REG_PROX_CTRL2_COMBMODE_CS3		(0x00 << 6)
57 #define   SX9310_REG_PROX_CTRL2_SHIELDEN_MASK		GENMASK(3, 2)
58 #define   SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC	(0x01 << 2)
59 #define   SX9310_REG_PROX_CTRL2_SHIELDEN_GROUND		(0x02 << 2)
60 #define SX9310_REG_PROX_CTRL3				0x13
61 #define   SX9310_REG_PROX_CTRL3_GAIN0_MASK		GENMASK(3, 2)
62 #define   SX9310_REG_PROX_CTRL3_GAIN0_X8		(0x03 << 2)
63 #define   SX9310_REG_PROX_CTRL3_GAIN12_MASK		GENMASK(1, 0)
64 #define   SX9310_REG_PROX_CTRL3_GAIN12_X4		0x02
65 #define SX9310_REG_PROX_CTRL4				0x14
66 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_MASK		GENMASK(2, 0)
67 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST	0x07
68 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_FINE	0x06
69 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_FINE		0x05
70 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM	0x04
71 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM_COARSE 0x03
72 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_COARSE	0x02
73 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_COARSE	0x01
74 #define   SX9310_REG_PROX_CTRL4_RESOLUTION_COARSEST	0x00
75 #define SX9310_REG_PROX_CTRL5				0x15
76 #define   SX9310_REG_PROX_CTRL5_RANGE_SMALL		(0x03 << 6)
77 #define   SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK	GENMASK(3, 2)
78 #define   SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1		(0x01 << 2)
79 #define   SX9310_REG_PROX_CTRL5_RAWFILT_MASK		GENMASK(1, 0)
80 #define   SX9310_REG_PROX_CTRL5_RAWFILT_SHIFT		0
81 #define   SX9310_REG_PROX_CTRL5_RAWFILT_1P25		0x02
82 #define SX9310_REG_PROX_CTRL6				0x16
83 #define   SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT	0x20
84 #define SX9310_REG_PROX_CTRL7				0x17
85 #define   SX9310_REG_PROX_CTRL7_AVGNEGFILT_2		(0x01 << 3)
86 #define   SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK		GENMASK(2, 0)
87 #define   SX9310_REG_PROX_CTRL7_AVGPOSFILT_SHIFT	0
88 #define   SX9310_REG_PROX_CTRL7_AVGPOSFILT_512		0x05
89 #define SX9310_REG_PROX_CTRL8				0x18
90 #define   SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK		GENMASK(7, 3)
91 #define SX9310_REG_PROX_CTRL9				0x19
92 #define   SX9310_REG_PROX_CTRL8_9_PTHRESH_28		(0x08 << 3)
93 #define   SX9310_REG_PROX_CTRL8_9_PTHRESH_96		(0x11 << 3)
94 #define   SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900	0x03
95 #define   SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500	0x05
96 #define SX9310_REG_PROX_CTRL10				0x1a
97 #define   SX9310_REG_PROX_CTRL10_HYST_MASK		GENMASK(5, 4)
98 #define   SX9310_REG_PROX_CTRL10_HYST_6PCT		(0x01 << 4)
99 #define   SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK	GENMASK(3, 2)
100 #define   SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK	GENMASK(1, 0)
101 #define   SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2		0x01
102 #define SX9310_REG_PROX_CTRL11				0x1b
103 #define SX9310_REG_PROX_CTRL12				0x1c
104 #define SX9310_REG_PROX_CTRL13				0x1d
105 #define SX9310_REG_PROX_CTRL14				0x1e
106 #define SX9310_REG_PROX_CTRL15				0x1f
107 #define SX9310_REG_PROX_CTRL16				0x20
108 #define SX9310_REG_PROX_CTRL17				0x21
109 #define SX9310_REG_PROX_CTRL18				0x22
110 #define SX9310_REG_PROX_CTRL19				0x23
111 #define SX9310_REG_SAR_CTRL0				0x2a
112 #define   SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES		(0x02 << 5)
113 #define   SX9310_REG_SAR_CTRL0_SARHYST_8		(0x02 << 3)
114 #define SX9310_REG_SAR_CTRL1				0x2b
115 /* Each increment of the slope register is 0.0078125. */
116 #define   SX9310_REG_SAR_CTRL1_SLOPE(_hnslope)		(_hnslope / 78125)
117 #define SX9310_REG_SAR_CTRL2				0x2c
118 #define   SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT	0x3c
119 
120 #define SX9310_REG_SENSOR_SEL				0x30
121 #define SX9310_REG_USE_MSB				0x31
122 #define SX9310_REG_USE_LSB				0x32
123 #define SX9310_REG_AVG_MSB				0x33
124 #define SX9310_REG_AVG_LSB				0x34
125 #define SX9310_REG_DIFF_MSB				0x35
126 #define SX9310_REG_DIFF_LSB				0x36
127 #define SX9310_REG_OFFSET_MSB				0x37
128 #define SX9310_REG_OFFSET_LSB				0x38
129 #define SX9310_REG_SAR_MSB				0x39
130 #define SX9310_REG_SAR_LSB				0x3a
131 #define SX9310_REG_I2C_ADDR				0x40
132 #define SX9310_REG_PAUSE				0x41
133 #define SX9310_REG_WHOAMI				0x42
134 #define   SX9310_WHOAMI_VALUE				0x01
135 #define   SX9311_WHOAMI_VALUE				0x02
136 #define SX9310_REG_RESET				0x7f
137 #define   SX9310_SOFT_RESET				0xde
138 
139 
140 /* 4 hardware channels, as defined in STAT0: COMB, CS2, CS1 and CS0. */
141 #define SX9310_NUM_CHANNELS				4
142 static_assert(SX9310_NUM_CHANNELS < BITS_PER_LONG);
143 
144 struct sx9310_data {
145 	/* Serialize access to registers and channel configuration */
146 	struct mutex mutex;
147 	struct i2c_client *client;
148 	struct iio_trigger *trig;
149 	struct regmap *regmap;
150 	struct regulator_bulk_data supplies[2];
151 	/*
152 	 * Last reading of the proximity status for each channel.
153 	 * We only send an event to user space when this changes.
154 	 */
155 	unsigned long chan_prox_stat;
156 	bool trigger_enabled;
157 	/* Ensure correct alignment of timestamp when present. */
158 	struct {
159 		__be16 channels[SX9310_NUM_CHANNELS];
160 		s64 ts __aligned(8);
161 	} buffer;
162 	/* Remember enabled channels and sample rate during suspend. */
163 	unsigned int suspend_ctrl0;
164 	struct completion completion;
165 	unsigned long chan_read;
166 	unsigned long chan_event;
167 	unsigned int whoami;
168 };
169 
170 static const struct iio_event_spec sx9310_events[] = {
171 	{
172 		.type = IIO_EV_TYPE_THRESH,
173 		.dir = IIO_EV_DIR_RISING,
174 		.mask_shared_by_all = BIT(IIO_EV_INFO_PERIOD),
175 	},
176 	{
177 		.type = IIO_EV_TYPE_THRESH,
178 		.dir = IIO_EV_DIR_FALLING,
179 		.mask_shared_by_all = BIT(IIO_EV_INFO_PERIOD),
180 	},
181 	{
182 		.type = IIO_EV_TYPE_THRESH,
183 		.dir = IIO_EV_DIR_EITHER,
184 		.mask_separate = BIT(IIO_EV_INFO_ENABLE) |
185 				 BIT(IIO_EV_INFO_HYSTERESIS) |
186 				 BIT(IIO_EV_INFO_VALUE),
187 	},
188 };
189 
190 #define SX9310_NAMED_CHANNEL(idx, name)					 \
191 	{								 \
192 		.type = IIO_PROXIMITY,					 \
193 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |		 \
194 				      BIT(IIO_CHAN_INFO_HARDWAREGAIN),   \
195 		.info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
196 		.info_mask_separate_available =				 \
197 			BIT(IIO_CHAN_INFO_HARDWAREGAIN),		 \
198 		.indexed = 1,						 \
199 		.channel = idx,						 \
200 		.extend_name = name,					 \
201 		.address = SX9310_REG_DIFF_MSB,				 \
202 		.event_spec = sx9310_events,				 \
203 		.num_event_specs = ARRAY_SIZE(sx9310_events),		 \
204 		.scan_index = idx,					 \
205 		.scan_type = {						 \
206 			.sign = 's',					 \
207 			.realbits = 12,					 \
208 			.storagebits = 16,				 \
209 			.endianness = IIO_BE,				 \
210 		},							 \
211 	}
212 #define SX9310_CHANNEL(idx) SX9310_NAMED_CHANNEL(idx, NULL)
213 
214 static const struct iio_chan_spec sx9310_channels[] = {
215 	SX9310_CHANNEL(0),			/* CS0 */
216 	SX9310_CHANNEL(1),			/* CS1 */
217 	SX9310_CHANNEL(2),			/* CS2 */
218 	SX9310_NAMED_CHANNEL(3, "comb"),	/* COMB */
219 
220 	IIO_CHAN_SOFT_TIMESTAMP(4),
221 };
222 
223 /*
224  * Each entry contains the integer part (val) and the fractional part, in micro
225  * seconds. It conforms to the IIO output IIO_VAL_INT_PLUS_MICRO.
226  */
227 static const struct {
228 	int val;
229 	int val2;
230 } sx9310_samp_freq_table[] = {
231 	{ 500, 0 }, /* 0000: Min (no idle time) */
232 	{ 66, 666666 }, /* 0001: 15 ms */
233 	{ 33, 333333 }, /* 0010: 30 ms (Typ.) */
234 	{ 22, 222222 }, /* 0011: 45 ms */
235 	{ 16, 666666 }, /* 0100: 60 ms */
236 	{ 11, 111111 }, /* 0101: 90 ms */
237 	{ 8, 333333 }, /* 0110: 120 ms */
238 	{ 5, 0 }, /* 0111: 200 ms */
239 	{ 2, 500000 }, /* 1000: 400 ms */
240 	{ 1, 666666 }, /* 1001: 600 ms */
241 	{ 1, 250000 }, /* 1010: 800 ms */
242 	{ 1, 0 }, /* 1011: 1 s */
243 	{ 0, 500000 }, /* 1100: 2 s */
244 	{ 0, 333333 }, /* 1101: 3 s */
245 	{ 0, 250000 }, /* 1110: 4 s */
246 	{ 0, 200000 }, /* 1111: 5 s */
247 };
248 static const unsigned int sx9310_scan_period_table[] = {
249 	2,   15,  30,  45,   60,   90,	 120,  200,
250 	400, 600, 800, 1000, 2000, 3000, 4000, 5000,
251 };
252 
253 static ssize_t sx9310_show_samp_freq_avail(struct device *dev,
254 					   struct device_attribute *attr,
255 					   char *buf)
256 {
257 	size_t len = 0;
258 	int i;
259 
260 	for (i = 0; i < ARRAY_SIZE(sx9310_samp_freq_table); i++)
261 		len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%d ",
262 				 sx9310_samp_freq_table[i].val,
263 				 sx9310_samp_freq_table[i].val2);
264 	buf[len - 1] = '\n';
265 	return len;
266 }
267 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(sx9310_show_samp_freq_avail);
268 
269 static const struct regmap_range sx9310_writable_reg_ranges[] = {
270 	regmap_reg_range(SX9310_REG_IRQ_MSK, SX9310_REG_IRQ_FUNC),
271 	regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19),
272 	regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2),
273 	regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SENSOR_SEL),
274 	regmap_reg_range(SX9310_REG_OFFSET_MSB, SX9310_REG_OFFSET_LSB),
275 	regmap_reg_range(SX9310_REG_PAUSE, SX9310_REG_PAUSE),
276 	regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),
277 };
278 
279 static const struct regmap_access_table sx9310_writeable_regs = {
280 	.yes_ranges = sx9310_writable_reg_ranges,
281 	.n_yes_ranges = ARRAY_SIZE(sx9310_writable_reg_ranges),
282 };
283 
284 static const struct regmap_range sx9310_readable_reg_ranges[] = {
285 	regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_IRQ_FUNC),
286 	regmap_reg_range(SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL19),
287 	regmap_reg_range(SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL2),
288 	regmap_reg_range(SX9310_REG_SENSOR_SEL, SX9310_REG_SAR_LSB),
289 	regmap_reg_range(SX9310_REG_I2C_ADDR, SX9310_REG_WHOAMI),
290 	regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),
291 };
292 
293 static const struct regmap_access_table sx9310_readable_regs = {
294 	.yes_ranges = sx9310_readable_reg_ranges,
295 	.n_yes_ranges = ARRAY_SIZE(sx9310_readable_reg_ranges),
296 };
297 
298 static const struct regmap_range sx9310_volatile_reg_ranges[] = {
299 	regmap_reg_range(SX9310_REG_IRQ_SRC, SX9310_REG_STAT1),
300 	regmap_reg_range(SX9310_REG_USE_MSB, SX9310_REG_DIFF_LSB),
301 	regmap_reg_range(SX9310_REG_SAR_MSB, SX9310_REG_SAR_LSB),
302 	regmap_reg_range(SX9310_REG_RESET, SX9310_REG_RESET),
303 };
304 
305 static const struct regmap_access_table sx9310_volatile_regs = {
306 	.yes_ranges = sx9310_volatile_reg_ranges,
307 	.n_yes_ranges = ARRAY_SIZE(sx9310_volatile_reg_ranges),
308 };
309 
310 static const struct regmap_config sx9310_regmap_config = {
311 	.reg_bits = 8,
312 	.val_bits = 8,
313 
314 	.max_register = SX9310_REG_RESET,
315 	.cache_type = REGCACHE_RBTREE,
316 
317 	.wr_table = &sx9310_writeable_regs,
318 	.rd_table = &sx9310_readable_regs,
319 	.volatile_table = &sx9310_volatile_regs,
320 };
321 
322 static int sx9310_update_chan_en(struct sx9310_data *data,
323 				 unsigned long chan_read,
324 				 unsigned long chan_event)
325 {
326 	int ret;
327 	unsigned long channels = chan_read | chan_event;
328 
329 	if ((data->chan_read | data->chan_event) != channels) {
330 		ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL0,
331 					 SX9310_REG_PROX_CTRL0_SENSOREN_MASK,
332 					 channels);
333 		if (ret)
334 			return ret;
335 	}
336 	data->chan_read = chan_read;
337 	data->chan_event = chan_event;
338 	return 0;
339 }
340 
341 static int sx9310_get_read_channel(struct sx9310_data *data, int channel)
342 {
343 	return sx9310_update_chan_en(data, data->chan_read | BIT(channel),
344 				     data->chan_event);
345 }
346 
347 static int sx9310_put_read_channel(struct sx9310_data *data, int channel)
348 {
349 	return sx9310_update_chan_en(data, data->chan_read & ~BIT(channel),
350 				     data->chan_event);
351 }
352 
353 static int sx9310_get_event_channel(struct sx9310_data *data, int channel)
354 {
355 	return sx9310_update_chan_en(data, data->chan_read,
356 				     data->chan_event | BIT(channel));
357 }
358 
359 static int sx9310_put_event_channel(struct sx9310_data *data, int channel)
360 {
361 	return sx9310_update_chan_en(data, data->chan_read,
362 				     data->chan_event & ~BIT(channel));
363 }
364 
365 static int sx9310_enable_irq(struct sx9310_data *data, unsigned int irq)
366 {
367 	if (!data->client->irq)
368 		return 0;
369 	return regmap_update_bits(data->regmap, SX9310_REG_IRQ_MSK, irq, irq);
370 }
371 
372 static int sx9310_disable_irq(struct sx9310_data *data, unsigned int irq)
373 {
374 	if (!data->client->irq)
375 		return 0;
376 	return regmap_update_bits(data->regmap, SX9310_REG_IRQ_MSK, irq, 0);
377 }
378 
379 static int sx9310_read_prox_data(struct sx9310_data *data,
380 				 const struct iio_chan_spec *chan, __be16 *val)
381 {
382 	int ret;
383 
384 	ret = regmap_write(data->regmap, SX9310_REG_SENSOR_SEL, chan->channel);
385 	if (ret)
386 		return ret;
387 
388 	return regmap_bulk_read(data->regmap, chan->address, val, sizeof(*val));
389 }
390 
391 /*
392  * If we have no interrupt support, we have to wait for a scan period
393  * after enabling a channel to get a result.
394  */
395 static int sx9310_wait_for_sample(struct sx9310_data *data)
396 {
397 	int ret;
398 	unsigned int val;
399 
400 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &val);
401 	if (ret)
402 		return ret;
403 
404 	val = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, val);
405 
406 	msleep(sx9310_scan_period_table[val]);
407 
408 	return 0;
409 }
410 
411 static int sx9310_read_proximity(struct sx9310_data *data,
412 				 const struct iio_chan_spec *chan, int *val)
413 {
414 	int ret;
415 	__be16 rawval;
416 
417 	mutex_lock(&data->mutex);
418 
419 	ret = sx9310_get_read_channel(data, chan->channel);
420 	if (ret)
421 		goto out;
422 
423 	ret = sx9310_enable_irq(data, SX9310_CONVDONE_IRQ);
424 	if (ret)
425 		goto out_put_channel;
426 
427 	mutex_unlock(&data->mutex);
428 
429 	if (data->client->irq) {
430 		ret = wait_for_completion_interruptible(&data->completion);
431 		reinit_completion(&data->completion);
432 	} else {
433 		ret = sx9310_wait_for_sample(data);
434 	}
435 
436 	mutex_lock(&data->mutex);
437 
438 	if (ret)
439 		goto out_disable_irq;
440 
441 	ret = sx9310_read_prox_data(data, chan, &rawval);
442 	if (ret)
443 		goto out_disable_irq;
444 
445 	*val = sign_extend32(be16_to_cpu(rawval),
446 			     chan->address == SX9310_REG_DIFF_MSB ? 11 : 15);
447 
448 	ret = sx9310_disable_irq(data, SX9310_CONVDONE_IRQ);
449 	if (ret)
450 		goto out_put_channel;
451 
452 	ret = sx9310_put_read_channel(data, chan->channel);
453 	if (ret)
454 		goto out;
455 
456 	mutex_unlock(&data->mutex);
457 
458 	return IIO_VAL_INT;
459 
460 out_disable_irq:
461 	sx9310_disable_irq(data, SX9310_CONVDONE_IRQ);
462 out_put_channel:
463 	sx9310_put_read_channel(data, chan->channel);
464 out:
465 	mutex_unlock(&data->mutex);
466 
467 	return ret;
468 }
469 
470 static int sx9310_read_gain(struct sx9310_data *data,
471 			    const struct iio_chan_spec *chan, int *val)
472 {
473 	unsigned int regval, gain;
474 	int ret;
475 
476 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL3, &regval);
477 	if (ret)
478 		return ret;
479 
480 	switch (chan->channel) {
481 	case 0:
482 	case 3:
483 		gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN0_MASK, regval);
484 		break;
485 	case 1:
486 	case 2:
487 		gain = FIELD_GET(SX9310_REG_PROX_CTRL3_GAIN12_MASK, regval);
488 		break;
489 	default:
490 		return -EINVAL;
491 	}
492 
493 	*val = 1 << gain;
494 
495 	return IIO_VAL_INT;
496 }
497 
498 static int sx9310_read_samp_freq(struct sx9310_data *data, int *val, int *val2)
499 {
500 	unsigned int regval;
501 	int ret;
502 
503 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &regval);
504 	if (ret)
505 		return ret;
506 
507 	regval = FIELD_GET(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, regval);
508 	*val = sx9310_samp_freq_table[regval].val;
509 	*val2 = sx9310_samp_freq_table[regval].val2;
510 
511 	return IIO_VAL_INT_PLUS_MICRO;
512 }
513 
514 static int sx9310_read_raw(struct iio_dev *indio_dev,
515 			   const struct iio_chan_spec *chan, int *val,
516 			   int *val2, long mask)
517 {
518 	struct sx9310_data *data = iio_priv(indio_dev);
519 	int ret;
520 
521 	if (chan->type != IIO_PROXIMITY)
522 		return -EINVAL;
523 
524 	switch (mask) {
525 	case IIO_CHAN_INFO_RAW:
526 		ret = iio_device_claim_direct_mode(indio_dev);
527 		if (ret)
528 			return ret;
529 
530 		ret = sx9310_read_proximity(data, chan, val);
531 		iio_device_release_direct_mode(indio_dev);
532 		return ret;
533 	case IIO_CHAN_INFO_HARDWAREGAIN:
534 		ret = iio_device_claim_direct_mode(indio_dev);
535 		if (ret)
536 			return ret;
537 
538 		ret = sx9310_read_gain(data, chan, val);
539 		iio_device_release_direct_mode(indio_dev);
540 		return ret;
541 	case IIO_CHAN_INFO_SAMP_FREQ:
542 		return sx9310_read_samp_freq(data, val, val2);
543 	default:
544 		return -EINVAL;
545 	}
546 }
547 
548 static const int sx9310_gain_vals[] = { 1, 2, 4, 8 };
549 
550 static int sx9310_read_avail(struct iio_dev *indio_dev,
551 			     struct iio_chan_spec const *chan,
552 			     const int **vals, int *type, int *length,
553 			     long mask)
554 {
555 	if (chan->type != IIO_PROXIMITY)
556 		return -EINVAL;
557 
558 	switch (mask) {
559 	case IIO_CHAN_INFO_HARDWAREGAIN:
560 		*type = IIO_VAL_INT;
561 		*length = ARRAY_SIZE(sx9310_gain_vals);
562 		*vals = sx9310_gain_vals;
563 		return IIO_AVAIL_LIST;
564 	}
565 
566 	return -EINVAL;
567 }
568 
569 static const unsigned int sx9310_pthresh_codes[] = {
570 	2, 4, 6, 8, 12, 16, 20, 24, 28, 32, 40, 48, 56, 64, 72, 80, 88, 96, 112,
571 	128, 144, 160, 192, 224, 256, 320, 384, 512, 640, 768, 1024, 1536
572 };
573 
574 static int sx9310_get_thresh_reg(unsigned int channel)
575 {
576 	switch (channel) {
577 	case 0:
578 	case 3:
579 		return SX9310_REG_PROX_CTRL8;
580 	case 1:
581 	case 2:
582 		return SX9310_REG_PROX_CTRL9;
583 	}
584 
585 	return -EINVAL;
586 }
587 
588 static int sx9310_read_thresh(struct sx9310_data *data,
589 			      const struct iio_chan_spec *chan, int *val)
590 {
591 	unsigned int reg;
592 	unsigned int regval;
593 	int ret;
594 
595 	reg = ret = sx9310_get_thresh_reg(chan->channel);
596 	if (ret < 0)
597 		return ret;
598 
599 	ret = regmap_read(data->regmap, reg, &regval);
600 	if (ret)
601 		return ret;
602 
603 	regval = FIELD_GET(SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval);
604 	if (regval >= ARRAY_SIZE(sx9310_pthresh_codes))
605 		return -EINVAL;
606 
607 	*val = sx9310_pthresh_codes[regval];
608 	return IIO_VAL_INT;
609 }
610 
611 static int sx9310_read_hysteresis(struct sx9310_data *data,
612 				  const struct iio_chan_spec *chan, int *val)
613 {
614 	unsigned int regval, pthresh;
615 	int ret;
616 
617 	ret = sx9310_read_thresh(data, chan, &pthresh);
618 	if (ret < 0)
619 		return ret;
620 
621 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, &regval);
622 	if (ret)
623 		return ret;
624 
625 	regval = FIELD_GET(SX9310_REG_PROX_CTRL10_HYST_MASK, regval);
626 	if (!regval)
627 		regval = 5;
628 
629 	/* regval is at most 5 */
630 	*val = pthresh >> (5 - regval);
631 
632 	return IIO_VAL_INT;
633 }
634 
635 static int sx9310_read_far_debounce(struct sx9310_data *data, int *val)
636 {
637 	unsigned int regval;
638 	int ret;
639 
640 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, &regval);
641 	if (ret)
642 		return ret;
643 
644 	regval = FIELD_GET(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, regval);
645 	if (regval)
646 		*val = 1 << regval;
647 	else
648 		*val = 0;
649 
650 	return IIO_VAL_INT;
651 }
652 
653 static int sx9310_read_close_debounce(struct sx9310_data *data, int *val)
654 {
655 	unsigned int regval;
656 	int ret;
657 
658 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL10, &regval);
659 	if (ret)
660 		return ret;
661 
662 	regval = FIELD_GET(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, regval);
663 	if (regval)
664 		*val = 1 << regval;
665 	else
666 		*val = 0;
667 
668 	return IIO_VAL_INT;
669 }
670 
671 static int sx9310_read_event_val(struct iio_dev *indio_dev,
672 				 const struct iio_chan_spec *chan,
673 				 enum iio_event_type type,
674 				 enum iio_event_direction dir,
675 				 enum iio_event_info info, int *val, int *val2)
676 {
677 	struct sx9310_data *data = iio_priv(indio_dev);
678 
679 	if (chan->type != IIO_PROXIMITY)
680 		return -EINVAL;
681 
682 	switch (info) {
683 	case IIO_EV_INFO_VALUE:
684 		return sx9310_read_thresh(data, chan, val);
685 	case IIO_EV_INFO_PERIOD:
686 		switch (dir) {
687 		case IIO_EV_DIR_RISING:
688 			return sx9310_read_far_debounce(data, val);
689 		case IIO_EV_DIR_FALLING:
690 			return sx9310_read_close_debounce(data, val);
691 		default:
692 			return -EINVAL;
693 		}
694 	case IIO_EV_INFO_HYSTERESIS:
695 		return sx9310_read_hysteresis(data, chan, val);
696 	default:
697 		return -EINVAL;
698 	}
699 }
700 
701 static int sx9310_write_thresh(struct sx9310_data *data,
702 			       const struct iio_chan_spec *chan, int val)
703 {
704 	unsigned int reg;
705 	unsigned int regval;
706 	int ret, i;
707 
708 	reg = ret = sx9310_get_thresh_reg(chan->channel);
709 	if (ret < 0)
710 		return ret;
711 
712 	for (i = 0; i < ARRAY_SIZE(sx9310_pthresh_codes); i++) {
713 		if (sx9310_pthresh_codes[i] == val) {
714 			regval = i;
715 			break;
716 		}
717 	}
718 
719 	if (i == ARRAY_SIZE(sx9310_pthresh_codes))
720 		return -EINVAL;
721 
722 	regval = FIELD_PREP(SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval);
723 	mutex_lock(&data->mutex);
724 	ret = regmap_update_bits(data->regmap, reg,
725 				 SX9310_REG_PROX_CTRL8_9_PTHRESH_MASK, regval);
726 	mutex_unlock(&data->mutex);
727 
728 	return ret;
729 }
730 
731 static int sx9310_write_hysteresis(struct sx9310_data *data,
732 				   const struct iio_chan_spec *chan, int _val)
733 {
734 	unsigned int hyst, val = _val;
735 	int ret, pthresh;
736 
737 	ret = sx9310_read_thresh(data, chan, &pthresh);
738 	if (ret < 0)
739 		return ret;
740 
741 	if (val == 0)
742 		hyst = 0;
743 	else if (val == pthresh >> 2)
744 		hyst = 3;
745 	else if (val == pthresh >> 3)
746 		hyst = 2;
747 	else if (val == pthresh >> 4)
748 		hyst = 1;
749 	else
750 		return -EINVAL;
751 
752 	hyst = FIELD_PREP(SX9310_REG_PROX_CTRL10_HYST_MASK, hyst);
753 	mutex_lock(&data->mutex);
754 	ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10,
755 				 SX9310_REG_PROX_CTRL10_HYST_MASK, hyst);
756 	mutex_unlock(&data->mutex);
757 
758 	return ret;
759 }
760 
761 static int sx9310_write_far_debounce(struct sx9310_data *data, int val)
762 {
763 	int ret;
764 	unsigned int regval;
765 
766 	if (val > 0)
767 		val = ilog2(val);
768 	if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val))
769 		return -EINVAL;
770 
771 	regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK, val);
772 
773 	mutex_lock(&data->mutex);
774 	ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10,
775 				 SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_MASK,
776 				 regval);
777 	mutex_unlock(&data->mutex);
778 
779 	return ret;
780 }
781 
782 static int sx9310_write_close_debounce(struct sx9310_data *data, int val)
783 {
784 	int ret;
785 	unsigned int regval;
786 
787 	if (val > 0)
788 		val = ilog2(val);
789 	if (!FIELD_FIT(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val))
790 		return -EINVAL;
791 
792 	regval = FIELD_PREP(SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK, val);
793 
794 	mutex_lock(&data->mutex);
795 	ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL10,
796 				 SX9310_REG_PROX_CTRL10_CLOSE_DEBOUNCE_MASK,
797 				 regval);
798 	mutex_unlock(&data->mutex);
799 
800 	return ret;
801 }
802 
803 static int sx9310_write_event_val(struct iio_dev *indio_dev,
804 				  const struct iio_chan_spec *chan,
805 				  enum iio_event_type type,
806 				  enum iio_event_direction dir,
807 				  enum iio_event_info info, int val, int val2)
808 {
809 	struct sx9310_data *data = iio_priv(indio_dev);
810 
811 	if (chan->type != IIO_PROXIMITY)
812 		return -EINVAL;
813 
814 	switch (info) {
815 	case IIO_EV_INFO_VALUE:
816 		return sx9310_write_thresh(data, chan, val);
817 	case IIO_EV_INFO_PERIOD:
818 		switch (dir) {
819 		case IIO_EV_DIR_RISING:
820 			return sx9310_write_far_debounce(data, val);
821 		case IIO_EV_DIR_FALLING:
822 			return sx9310_write_close_debounce(data, val);
823 		default:
824 			return -EINVAL;
825 		}
826 	case IIO_EV_INFO_HYSTERESIS:
827 		return sx9310_write_hysteresis(data, chan, val);
828 	default:
829 		return -EINVAL;
830 	}
831 }
832 
833 static int sx9310_set_samp_freq(struct sx9310_data *data, int val, int val2)
834 {
835 	int i, ret;
836 
837 	for (i = 0; i < ARRAY_SIZE(sx9310_samp_freq_table); i++)
838 		if (val == sx9310_samp_freq_table[i].val &&
839 		    val2 == sx9310_samp_freq_table[i].val2)
840 			break;
841 
842 	if (i == ARRAY_SIZE(sx9310_samp_freq_table))
843 		return -EINVAL;
844 
845 	mutex_lock(&data->mutex);
846 
847 	ret = regmap_update_bits(
848 		data->regmap, SX9310_REG_PROX_CTRL0,
849 		SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK,
850 		FIELD_PREP(SX9310_REG_PROX_CTRL0_SCANPERIOD_MASK, i));
851 
852 	mutex_unlock(&data->mutex);
853 
854 	return ret;
855 }
856 
857 static int sx9310_write_gain(struct sx9310_data *data,
858 			    const struct iio_chan_spec *chan, int val)
859 {
860 	unsigned int gain, mask;
861 	int ret;
862 
863 	gain = ilog2(val);
864 
865 	switch (chan->channel) {
866 	case 0:
867 	case 3:
868 		mask = SX9310_REG_PROX_CTRL3_GAIN0_MASK;
869 		gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN0_MASK, gain);
870 		break;
871 	case 1:
872 	case 2:
873 		mask = SX9310_REG_PROX_CTRL3_GAIN12_MASK;
874 		gain = FIELD_PREP(SX9310_REG_PROX_CTRL3_GAIN12_MASK, gain);
875 		break;
876 	default:
877 		return -EINVAL;
878 	}
879 
880 	mutex_lock(&data->mutex);
881 	ret = regmap_update_bits(data->regmap, SX9310_REG_PROX_CTRL3, mask,
882 				 gain);
883 	mutex_unlock(&data->mutex);
884 
885 	return ret;
886 }
887 
888 static int sx9310_write_raw(struct iio_dev *indio_dev,
889 			    const struct iio_chan_spec *chan, int val, int val2,
890 			    long mask)
891 {
892 	struct sx9310_data *data = iio_priv(indio_dev);
893 
894 	if (chan->type != IIO_PROXIMITY)
895 		return -EINVAL;
896 
897 	switch (mask) {
898 	case IIO_CHAN_INFO_SAMP_FREQ:
899 		return sx9310_set_samp_freq(data, val, val2);
900 	case IIO_CHAN_INFO_HARDWAREGAIN:
901 		return sx9310_write_gain(data, chan, val);
902 	}
903 
904 	return -EINVAL;
905 }
906 
907 static irqreturn_t sx9310_irq_handler(int irq, void *private)
908 {
909 	struct iio_dev *indio_dev = private;
910 	struct sx9310_data *data = iio_priv(indio_dev);
911 
912 	if (data->trigger_enabled)
913 		iio_trigger_poll(data->trig);
914 
915 	/*
916 	 * Even if no event is enabled, we need to wake the thread to clear the
917 	 * interrupt state by reading SX9310_REG_IRQ_SRC.
918 	 * It is not possible to do that here because regmap_read takes a mutex.
919 	 */
920 	return IRQ_WAKE_THREAD;
921 }
922 
923 static void sx9310_push_events(struct iio_dev *indio_dev)
924 {
925 	int ret;
926 	unsigned int val, chan;
927 	struct sx9310_data *data = iio_priv(indio_dev);
928 	s64 timestamp = iio_get_time_ns(indio_dev);
929 	unsigned long prox_changed;
930 
931 	/* Read proximity state on all channels */
932 	ret = regmap_read(data->regmap, SX9310_REG_STAT0, &val);
933 	if (ret) {
934 		dev_err(&data->client->dev, "i2c transfer error in irq\n");
935 		return;
936 	}
937 
938 	/*
939 	 * Only iterate over channels with changes on proximity status that have
940 	 * events enabled.
941 	 */
942 	prox_changed = (data->chan_prox_stat ^ val) & data->chan_event;
943 
944 	for_each_set_bit(chan, &prox_changed, SX9310_NUM_CHANNELS) {
945 		int dir;
946 		u64 ev;
947 
948 		dir = (val & BIT(chan)) ? IIO_EV_DIR_FALLING : IIO_EV_DIR_RISING;
949 		ev = IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, chan,
950 					  IIO_EV_TYPE_THRESH, dir);
951 
952 		iio_push_event(indio_dev, ev, timestamp);
953 	}
954 	data->chan_prox_stat = val;
955 }
956 
957 static irqreturn_t sx9310_irq_thread_handler(int irq, void *private)
958 {
959 	struct iio_dev *indio_dev = private;
960 	struct sx9310_data *data = iio_priv(indio_dev);
961 	int ret;
962 	unsigned int val;
963 
964 	mutex_lock(&data->mutex);
965 
966 	ret = regmap_read(data->regmap, SX9310_REG_IRQ_SRC, &val);
967 	if (ret) {
968 		dev_err(&data->client->dev, "i2c transfer error in irq\n");
969 		goto out;
970 	}
971 
972 	if (val & (SX9310_FAR_IRQ | SX9310_CLOSE_IRQ))
973 		sx9310_push_events(indio_dev);
974 
975 	if (val & SX9310_CONVDONE_IRQ)
976 		complete(&data->completion);
977 
978 out:
979 	mutex_unlock(&data->mutex);
980 
981 	return IRQ_HANDLED;
982 }
983 
984 static int sx9310_read_event_config(struct iio_dev *indio_dev,
985 				    const struct iio_chan_spec *chan,
986 				    enum iio_event_type type,
987 				    enum iio_event_direction dir)
988 {
989 	struct sx9310_data *data = iio_priv(indio_dev);
990 
991 	return !!(data->chan_event & BIT(chan->channel));
992 }
993 
994 static int sx9310_write_event_config(struct iio_dev *indio_dev,
995 				     const struct iio_chan_spec *chan,
996 				     enum iio_event_type type,
997 				     enum iio_event_direction dir, int state)
998 {
999 	struct sx9310_data *data = iio_priv(indio_dev);
1000 	unsigned int eventirq = SX9310_FAR_IRQ | SX9310_CLOSE_IRQ;
1001 	int ret;
1002 
1003 	/* If the state hasn't changed, there's nothing to do. */
1004 	if (!!(data->chan_event & BIT(chan->channel)) == state)
1005 		return 0;
1006 
1007 	mutex_lock(&data->mutex);
1008 	if (state) {
1009 		ret = sx9310_get_event_channel(data, chan->channel);
1010 		if (ret)
1011 			goto out_unlock;
1012 		if (!(data->chan_event & ~BIT(chan->channel))) {
1013 			ret = sx9310_enable_irq(data, eventirq);
1014 			if (ret)
1015 				sx9310_put_event_channel(data, chan->channel);
1016 		}
1017 	} else {
1018 		ret = sx9310_put_event_channel(data, chan->channel);
1019 		if (ret)
1020 			goto out_unlock;
1021 		if (!data->chan_event) {
1022 			ret = sx9310_disable_irq(data, eventirq);
1023 			if (ret)
1024 				sx9310_get_event_channel(data, chan->channel);
1025 		}
1026 	}
1027 
1028 out_unlock:
1029 	mutex_unlock(&data->mutex);
1030 	return ret;
1031 }
1032 
1033 static struct attribute *sx9310_attributes[] = {
1034 	&iio_dev_attr_sampling_frequency_available.dev_attr.attr,
1035 	NULL
1036 };
1037 
1038 static const struct attribute_group sx9310_attribute_group = {
1039 	.attrs = sx9310_attributes,
1040 };
1041 
1042 static const struct iio_info sx9310_info = {
1043 	.attrs = &sx9310_attribute_group,
1044 	.read_raw = sx9310_read_raw,
1045 	.read_avail = sx9310_read_avail,
1046 	.read_event_value = sx9310_read_event_val,
1047 	.write_event_value = sx9310_write_event_val,
1048 	.write_raw = sx9310_write_raw,
1049 	.read_event_config = sx9310_read_event_config,
1050 	.write_event_config = sx9310_write_event_config,
1051 };
1052 
1053 static int sx9310_set_trigger_state(struct iio_trigger *trig, bool state)
1054 {
1055 	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
1056 	struct sx9310_data *data = iio_priv(indio_dev);
1057 	int ret = 0;
1058 
1059 	mutex_lock(&data->mutex);
1060 
1061 	if (state)
1062 		ret = sx9310_enable_irq(data, SX9310_CONVDONE_IRQ);
1063 	else if (!data->chan_read)
1064 		ret = sx9310_disable_irq(data, SX9310_CONVDONE_IRQ);
1065 	if (ret)
1066 		goto out;
1067 
1068 	data->trigger_enabled = state;
1069 
1070 out:
1071 	mutex_unlock(&data->mutex);
1072 
1073 	return ret;
1074 }
1075 
1076 static const struct iio_trigger_ops sx9310_trigger_ops = {
1077 	.set_trigger_state = sx9310_set_trigger_state,
1078 };
1079 
1080 static irqreturn_t sx9310_trigger_handler(int irq, void *private)
1081 {
1082 	struct iio_poll_func *pf = private;
1083 	struct iio_dev *indio_dev = pf->indio_dev;
1084 	struct sx9310_data *data = iio_priv(indio_dev);
1085 	__be16 val;
1086 	int bit, ret, i = 0;
1087 
1088 	mutex_lock(&data->mutex);
1089 
1090 	for_each_set_bit(bit, indio_dev->active_scan_mask,
1091 			 indio_dev->masklength) {
1092 		ret = sx9310_read_prox_data(data, &indio_dev->channels[bit],
1093 					    &val);
1094 		if (ret)
1095 			goto out;
1096 
1097 		data->buffer.channels[i++] = val;
1098 	}
1099 
1100 	iio_push_to_buffers_with_timestamp(indio_dev, &data->buffer,
1101 					   pf->timestamp);
1102 
1103 out:
1104 	mutex_unlock(&data->mutex);
1105 
1106 	iio_trigger_notify_done(indio_dev->trig);
1107 
1108 	return IRQ_HANDLED;
1109 }
1110 
1111 static int sx9310_buffer_preenable(struct iio_dev *indio_dev)
1112 {
1113 	struct sx9310_data *data = iio_priv(indio_dev);
1114 	unsigned long channels = 0;
1115 	int bit, ret;
1116 
1117 	mutex_lock(&data->mutex);
1118 	for_each_set_bit(bit, indio_dev->active_scan_mask,
1119 			 indio_dev->masklength)
1120 		__set_bit(indio_dev->channels[bit].channel, &channels);
1121 
1122 	ret = sx9310_update_chan_en(data, channels, data->chan_event);
1123 	mutex_unlock(&data->mutex);
1124 	return ret;
1125 }
1126 
1127 static int sx9310_buffer_postdisable(struct iio_dev *indio_dev)
1128 {
1129 	struct sx9310_data *data = iio_priv(indio_dev);
1130 	int ret;
1131 
1132 	mutex_lock(&data->mutex);
1133 	ret = sx9310_update_chan_en(data, 0, data->chan_event);
1134 	mutex_unlock(&data->mutex);
1135 	return ret;
1136 }
1137 
1138 static const struct iio_buffer_setup_ops sx9310_buffer_setup_ops = {
1139 	.preenable = sx9310_buffer_preenable,
1140 	.postdisable = sx9310_buffer_postdisable,
1141 };
1142 
1143 struct sx9310_reg_default {
1144 	u8 reg;
1145 	u8 def;
1146 };
1147 
1148 static const struct sx9310_reg_default sx9310_default_regs[] = {
1149 	{ SX9310_REG_IRQ_MSK, 0x00 },
1150 	{ SX9310_REG_IRQ_FUNC, 0x00 },
1151 	/*
1152 	 * The lower 4 bits should not be set as it enable sensors measurements.
1153 	 * Turning the detection on before the configuration values are set to
1154 	 * good values can cause the device to return erroneous readings.
1155 	 */
1156 	{ SX9310_REG_PROX_CTRL0, SX9310_REG_PROX_CTRL0_SCANPERIOD_15MS },
1157 	{ SX9310_REG_PROX_CTRL1, 0x00 },
1158 	{ SX9310_REG_PROX_CTRL2, SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2 |
1159 				 SX9310_REG_PROX_CTRL2_SHIELDEN_DYNAMIC },
1160 	{ SX9310_REG_PROX_CTRL3, SX9310_REG_PROX_CTRL3_GAIN0_X8 |
1161 				 SX9310_REG_PROX_CTRL3_GAIN12_X4 },
1162 	{ SX9310_REG_PROX_CTRL4, SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST },
1163 	{ SX9310_REG_PROX_CTRL5, SX9310_REG_PROX_CTRL5_RANGE_SMALL |
1164 				 SX9310_REG_PROX_CTRL5_STARTUPSENS_CS1 |
1165 				 SX9310_REG_PROX_CTRL5_RAWFILT_1P25 },
1166 	{ SX9310_REG_PROX_CTRL6, SX9310_REG_PROX_CTRL6_AVGTHRESH_DEFAULT },
1167 	{ SX9310_REG_PROX_CTRL7, SX9310_REG_PROX_CTRL7_AVGNEGFILT_2 |
1168 				 SX9310_REG_PROX_CTRL7_AVGPOSFILT_512 },
1169 	{ SX9310_REG_PROX_CTRL8, SX9310_REG_PROX_CTRL8_9_PTHRESH_96 |
1170 				 SX9310_REG_PROX_CTRL8_9_BODYTHRESH_1500 },
1171 	{ SX9310_REG_PROX_CTRL9, SX9310_REG_PROX_CTRL8_9_PTHRESH_28 |
1172 				 SX9310_REG_PROX_CTRL8_9_BODYTHRESH_900 },
1173 	{ SX9310_REG_PROX_CTRL10, SX9310_REG_PROX_CTRL10_HYST_6PCT |
1174 				  SX9310_REG_PROX_CTRL10_FAR_DEBOUNCE_2 },
1175 	{ SX9310_REG_PROX_CTRL11, 0x00 },
1176 	{ SX9310_REG_PROX_CTRL12, 0x00 },
1177 	{ SX9310_REG_PROX_CTRL13, 0x00 },
1178 	{ SX9310_REG_PROX_CTRL14, 0x00 },
1179 	{ SX9310_REG_PROX_CTRL15, 0x00 },
1180 	{ SX9310_REG_PROX_CTRL16, 0x00 },
1181 	{ SX9310_REG_PROX_CTRL17, 0x00 },
1182 	{ SX9310_REG_PROX_CTRL18, 0x00 },
1183 	{ SX9310_REG_PROX_CTRL19, 0x00 },
1184 	{ SX9310_REG_SAR_CTRL0, SX9310_REG_SAR_CTRL0_SARDEB_4_SAMPLES |
1185 				SX9310_REG_SAR_CTRL0_SARHYST_8 },
1186 	{ SX9310_REG_SAR_CTRL1, SX9310_REG_SAR_CTRL1_SLOPE(10781250) },
1187 	{ SX9310_REG_SAR_CTRL2, SX9310_REG_SAR_CTRL2_SAROFFSET_DEFAULT },
1188 };
1189 
1190 /* Activate all channels and perform an initial compensation. */
1191 static int sx9310_init_compensation(struct iio_dev *indio_dev)
1192 {
1193 	struct sx9310_data *data = iio_priv(indio_dev);
1194 	int ret;
1195 	unsigned int val;
1196 	unsigned int ctrl0;
1197 
1198 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0, &ctrl0);
1199 	if (ret)
1200 		return ret;
1201 
1202 	/* run the compensation phase on all channels */
1203 	ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0,
1204 			   ctrl0 | SX9310_REG_PROX_CTRL0_SENSOREN_MASK);
1205 	if (ret)
1206 		return ret;
1207 
1208 	ret = regmap_read_poll_timeout(data->regmap, SX9310_REG_STAT1, val,
1209 				       !(val & SX9310_REG_STAT1_COMPSTAT_MASK),
1210 				       20000, 2000000);
1211 	if (ret) {
1212 		if (ret == -ETIMEDOUT)
1213 			dev_err(&data->client->dev,
1214 				"initial compensation timed out: 0x%02x\n",
1215 				val);
1216 		return ret;
1217 	}
1218 
1219 	regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0);
1220 	return ret;
1221 }
1222 
1223 static const struct sx9310_reg_default *
1224 sx9310_get_default_reg(struct sx9310_data *data, int idx,
1225 		       struct sx9310_reg_default *reg_def)
1226 {
1227 	const struct device_node *np = data->client->dev.of_node;
1228 	u32 combined[SX9310_NUM_CHANNELS];
1229 	u32 start = 0, raw = 0, pos = 0;
1230 	unsigned long comb_mask = 0;
1231 	int ret, i, count;
1232 	const char *res;
1233 
1234 	memcpy(reg_def, &sx9310_default_regs[idx], sizeof(*reg_def));
1235 	if (!np)
1236 		return reg_def;
1237 
1238 	switch (reg_def->reg) {
1239 	case SX9310_REG_PROX_CTRL2:
1240 		if (of_property_read_bool(np, "semtech,cs0-ground")) {
1241 			reg_def->def &= ~SX9310_REG_PROX_CTRL2_SHIELDEN_MASK;
1242 			reg_def->def |= SX9310_REG_PROX_CTRL2_SHIELDEN_GROUND;
1243 		}
1244 
1245 		count = of_property_count_elems_of_size(np, "semtech,combined-sensors",
1246 							sizeof(u32));
1247 		if (count > 0 && count <= ARRAY_SIZE(combined)) {
1248 			ret = of_property_read_u32_array(np, "semtech,combined-sensors",
1249 							 combined, count);
1250 			if (ret)
1251 				break;
1252 		} else {
1253 			/*
1254 			 * Either the property does not exist in the DT or the
1255 			 * number of entries is incorrect.
1256 			 */
1257 			break;
1258 		}
1259 		for (i = 0; i < count; i++) {
1260 			if (combined[i] >= SX9310_NUM_CHANNELS) {
1261 				/* Invalid sensor (invalid DT). */
1262 				break;
1263 			}
1264 			comb_mask |= BIT(combined[i]);
1265 		}
1266 		if (i < count)
1267 			break;
1268 
1269 		reg_def->def &= ~SX9310_REG_PROX_CTRL2_COMBMODE_MASK;
1270 		if (comb_mask == (BIT(3) | BIT(2) | BIT(1) | BIT(0)))
1271 			reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1_CS2_CS3;
1272 		else if (comb_mask == (BIT(1) | BIT(2)))
1273 			reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS1_CS2;
1274 		else if (comb_mask == (BIT(0) | BIT(1)))
1275 			reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS0_CS1;
1276 		else if (comb_mask == BIT(3))
1277 			reg_def->def |= SX9310_REG_PROX_CTRL2_COMBMODE_CS3;
1278 
1279 		break;
1280 	case SX9310_REG_PROX_CTRL4:
1281 		ret = of_property_read_string(np, "semtech,resolution", &res);
1282 		if (ret)
1283 			break;
1284 
1285 		reg_def->def &= ~SX9310_REG_PROX_CTRL4_RESOLUTION_MASK;
1286 		if (!strcmp(res, "coarsest"))
1287 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_COARSEST;
1288 		else if (!strcmp(res, "very-coarse"))
1289 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_COARSE;
1290 		else if (!strcmp(res, "coarse"))
1291 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_COARSE;
1292 		else if (!strcmp(res, "medium-coarse"))
1293 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM_COARSE;
1294 		else if (!strcmp(res, "medium"))
1295 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_MEDIUM;
1296 		else if (!strcmp(res, "fine"))
1297 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_FINE;
1298 		else if (!strcmp(res, "very-fine"))
1299 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_VERY_FINE;
1300 		else if (!strcmp(res, "finest"))
1301 			reg_def->def |= SX9310_REG_PROX_CTRL4_RESOLUTION_FINEST;
1302 
1303 		break;
1304 	case SX9310_REG_PROX_CTRL5:
1305 		ret = of_property_read_u32(np, "semtech,startup-sensor", &start);
1306 		if (ret) {
1307 			start = FIELD_GET(SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK,
1308 					  reg_def->def);
1309 		}
1310 
1311 		reg_def->def &= ~SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK;
1312 		reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_STARTUPSENS_MASK,
1313 					   start);
1314 
1315 		ret = of_property_read_u32(np, "semtech,proxraw-strength", &raw);
1316 		if (ret) {
1317 			raw = FIELD_GET(SX9310_REG_PROX_CTRL5_RAWFILT_MASK,
1318 					reg_def->def);
1319 		} else {
1320 			raw = ilog2(raw);
1321 		}
1322 
1323 		reg_def->def &= ~SX9310_REG_PROX_CTRL5_RAWFILT_MASK;
1324 		reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL5_RAWFILT_MASK,
1325 					   raw);
1326 		break;
1327 	case SX9310_REG_PROX_CTRL7:
1328 		ret = of_property_read_u32(np, "semtech,avg-pos-strength", &pos);
1329 		if (ret)
1330 			break;
1331 
1332 		/* Powers of 2, except for a gap between 16 and 64 */
1333 		pos = clamp(ilog2(pos), 3, 11) - (pos >= 32 ? 4 : 3);
1334 		reg_def->def &= ~SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK;
1335 		reg_def->def |= FIELD_PREP(SX9310_REG_PROX_CTRL7_AVGPOSFILT_MASK,
1336 					   pos);
1337 		break;
1338 	}
1339 
1340 	return reg_def;
1341 }
1342 
1343 static int sx9310_init_device(struct iio_dev *indio_dev)
1344 {
1345 	struct sx9310_data *data = iio_priv(indio_dev);
1346 	struct sx9310_reg_default tmp;
1347 	const struct sx9310_reg_default *initval;
1348 	int ret;
1349 	unsigned int i, val;
1350 
1351 	ret = regmap_write(data->regmap, SX9310_REG_RESET, SX9310_SOFT_RESET);
1352 	if (ret)
1353 		return ret;
1354 
1355 	usleep_range(1000, 2000); /* power-up time is ~1ms. */
1356 
1357 	/* Clear reset interrupt state by reading SX9310_REG_IRQ_SRC. */
1358 	ret = regmap_read(data->regmap, SX9310_REG_IRQ_SRC, &val);
1359 	if (ret)
1360 		return ret;
1361 
1362 	/* Program some sane defaults. */
1363 	for (i = 0; i < ARRAY_SIZE(sx9310_default_regs); i++) {
1364 		initval = sx9310_get_default_reg(data, i, &tmp);
1365 		ret = regmap_write(data->regmap, initval->reg, initval->def);
1366 		if (ret)
1367 			return ret;
1368 	}
1369 
1370 	return sx9310_init_compensation(indio_dev);
1371 }
1372 
1373 static int sx9310_set_indio_dev_name(struct device *dev,
1374 				     struct iio_dev *indio_dev,
1375 				     unsigned int whoami)
1376 {
1377 	unsigned int long ddata;
1378 
1379 	ddata = (uintptr_t)device_get_match_data(dev);
1380 	if (ddata != whoami) {
1381 		dev_err(dev, "WHOAMI does not match device data: %u\n", whoami);
1382 		return -ENODEV;
1383 	}
1384 
1385 	switch (whoami) {
1386 	case SX9310_WHOAMI_VALUE:
1387 		indio_dev->name = "sx9310";
1388 		break;
1389 	case SX9311_WHOAMI_VALUE:
1390 		indio_dev->name = "sx9311";
1391 		break;
1392 	default:
1393 		dev_err(dev, "unexpected WHOAMI response: %u\n", whoami);
1394 		return -ENODEV;
1395 	}
1396 
1397 	return 0;
1398 }
1399 
1400 static void sx9310_regulator_disable(void *_data)
1401 {
1402 	struct sx9310_data *data = _data;
1403 
1404 	regulator_bulk_disable(ARRAY_SIZE(data->supplies), data->supplies);
1405 }
1406 
1407 static int sx9310_probe(struct i2c_client *client)
1408 {
1409 	int ret;
1410 	struct device *dev = &client->dev;
1411 	struct iio_dev *indio_dev;
1412 	struct sx9310_data *data;
1413 
1414 	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
1415 	if (!indio_dev)
1416 		return -ENOMEM;
1417 
1418 	data = iio_priv(indio_dev);
1419 	data->client = client;
1420 	data->supplies[0].supply = "vdd";
1421 	data->supplies[1].supply = "svdd";
1422 	mutex_init(&data->mutex);
1423 	init_completion(&data->completion);
1424 
1425 	data->regmap = devm_regmap_init_i2c(client, &sx9310_regmap_config);
1426 	if (IS_ERR(data->regmap))
1427 		return PTR_ERR(data->regmap);
1428 
1429 	ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(data->supplies),
1430 				      data->supplies);
1431 	if (ret)
1432 		return ret;
1433 
1434 	ret = regulator_bulk_enable(ARRAY_SIZE(data->supplies), data->supplies);
1435 	if (ret)
1436 		return ret;
1437 	/* Must wait for Tpor time after initial power up */
1438 	usleep_range(1000, 1100);
1439 
1440 	ret = devm_add_action_or_reset(dev, sx9310_regulator_disable, data);
1441 	if (ret)
1442 		return ret;
1443 
1444 	ret = regmap_read(data->regmap, SX9310_REG_WHOAMI, &data->whoami);
1445 	if (ret) {
1446 		dev_err(dev, "error in reading WHOAMI register: %d", ret);
1447 		return ret;
1448 	}
1449 
1450 	ret = sx9310_set_indio_dev_name(dev, indio_dev, data->whoami);
1451 	if (ret)
1452 		return ret;
1453 
1454 	ACPI_COMPANION_SET(&indio_dev->dev, ACPI_COMPANION(dev));
1455 	indio_dev->channels = sx9310_channels;
1456 	indio_dev->num_channels = ARRAY_SIZE(sx9310_channels);
1457 	indio_dev->info = &sx9310_info;
1458 	indio_dev->modes = INDIO_DIRECT_MODE;
1459 	i2c_set_clientdata(client, indio_dev);
1460 
1461 	ret = sx9310_init_device(indio_dev);
1462 	if (ret)
1463 		return ret;
1464 
1465 	if (client->irq) {
1466 		ret = devm_request_threaded_irq(dev, client->irq,
1467 						sx9310_irq_handler,
1468 						sx9310_irq_thread_handler,
1469 						IRQF_ONESHOT,
1470 						"sx9310_event", indio_dev);
1471 		if (ret)
1472 			return ret;
1473 
1474 		data->trig = devm_iio_trigger_alloc(dev, "%s-dev%d",
1475 						    indio_dev->name,
1476 						    indio_dev->id);
1477 		if (!data->trig)
1478 			return -ENOMEM;
1479 
1480 		data->trig->ops = &sx9310_trigger_ops;
1481 		iio_trigger_set_drvdata(data->trig, indio_dev);
1482 
1483 		ret = devm_iio_trigger_register(dev, data->trig);
1484 		if (ret)
1485 			return ret;
1486 	}
1487 
1488 	ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
1489 					      iio_pollfunc_store_time,
1490 					      sx9310_trigger_handler,
1491 					      &sx9310_buffer_setup_ops);
1492 	if (ret)
1493 		return ret;
1494 
1495 	return devm_iio_device_register(dev, indio_dev);
1496 }
1497 
1498 static int __maybe_unused sx9310_suspend(struct device *dev)
1499 {
1500 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1501 	struct sx9310_data *data = iio_priv(indio_dev);
1502 	u8 ctrl0;
1503 	int ret;
1504 
1505 	disable_irq_nosync(data->client->irq);
1506 
1507 	mutex_lock(&data->mutex);
1508 	ret = regmap_read(data->regmap, SX9310_REG_PROX_CTRL0,
1509 			  &data->suspend_ctrl0);
1510 	if (ret)
1511 		goto out;
1512 
1513 	ctrl0 = data->suspend_ctrl0 & ~SX9310_REG_PROX_CTRL0_SENSOREN_MASK;
1514 	ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0, ctrl0);
1515 	if (ret)
1516 		goto out;
1517 
1518 	ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 0);
1519 
1520 out:
1521 	mutex_unlock(&data->mutex);
1522 	return ret;
1523 }
1524 
1525 static int __maybe_unused sx9310_resume(struct device *dev)
1526 {
1527 	struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1528 	struct sx9310_data *data = iio_priv(indio_dev);
1529 	int ret;
1530 
1531 	mutex_lock(&data->mutex);
1532 	ret = regmap_write(data->regmap, SX9310_REG_PAUSE, 1);
1533 	if (ret)
1534 		goto out;
1535 
1536 	ret = regmap_write(data->regmap, SX9310_REG_PROX_CTRL0,
1537 			   data->suspend_ctrl0);
1538 
1539 out:
1540 	mutex_unlock(&data->mutex);
1541 	if (ret)
1542 		return ret;
1543 
1544 	enable_irq(data->client->irq);
1545 	return 0;
1546 }
1547 
1548 static const struct dev_pm_ops sx9310_pm_ops = {
1549 	SET_SYSTEM_SLEEP_PM_OPS(sx9310_suspend, sx9310_resume)
1550 };
1551 
1552 static const struct acpi_device_id sx9310_acpi_match[] = {
1553 	{ "STH9310", SX9310_WHOAMI_VALUE },
1554 	{ "STH9311", SX9311_WHOAMI_VALUE },
1555 	{}
1556 };
1557 MODULE_DEVICE_TABLE(acpi, sx9310_acpi_match);
1558 
1559 static const struct of_device_id sx9310_of_match[] = {
1560 	{ .compatible = "semtech,sx9310", (void *)SX9310_WHOAMI_VALUE },
1561 	{ .compatible = "semtech,sx9311", (void *)SX9311_WHOAMI_VALUE },
1562 	{}
1563 };
1564 MODULE_DEVICE_TABLE(of, sx9310_of_match);
1565 
1566 static const struct i2c_device_id sx9310_id[] = {
1567 	{ "sx9310", SX9310_WHOAMI_VALUE },
1568 	{ "sx9311", SX9311_WHOAMI_VALUE },
1569 	{}
1570 };
1571 MODULE_DEVICE_TABLE(i2c, sx9310_id);
1572 
1573 static struct i2c_driver sx9310_driver = {
1574 	.driver = {
1575 		.name	= "sx9310",
1576 		.acpi_match_table = sx9310_acpi_match,
1577 		.of_match_table = sx9310_of_match,
1578 		.pm = &sx9310_pm_ops,
1579 
1580 		/*
1581 		 * Lots of i2c transfers in probe + over 200 ms waiting in
1582 		 * sx9310_init_compensation() mean a slow probe; prefer async
1583 		 * so we don't delay boot if we're builtin to the kernel.
1584 		 */
1585 		.probe_type = PROBE_PREFER_ASYNCHRONOUS,
1586 	},
1587 	.probe_new	= sx9310_probe,
1588 	.id_table	= sx9310_id,
1589 };
1590 module_i2c_driver(sx9310_driver);
1591 
1592 MODULE_AUTHOR("Gwendal Grignou <gwendal@chromium.org>");
1593 MODULE_AUTHOR("Daniel Campello <campello@chromium.org>");
1594 MODULE_DESCRIPTION("Driver for Semtech SX9310/SX9311 proximity sensor");
1595 MODULE_LICENSE("GPL v2");
1596