1 /** 2 * opt3001.c - Texas Instruments OPT3001 Light Sensor 3 * 4 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com 5 * 6 * Author: Andreas Dannenberg <dannenberg@ti.com> 7 * Based on previous work from: Felipe Balbi <balbi@ti.com> 8 * 9 * This program is free software: you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License version 2 of the License 11 * as published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but WITHOUT 14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 16 * more details. 17 */ 18 19 #include <linux/bitops.h> 20 #include <linux/delay.h> 21 #include <linux/device.h> 22 #include <linux/i2c.h> 23 #include <linux/interrupt.h> 24 #include <linux/irq.h> 25 #include <linux/kernel.h> 26 #include <linux/module.h> 27 #include <linux/mutex.h> 28 #include <linux/slab.h> 29 #include <linux/types.h> 30 31 #include <linux/iio/events.h> 32 #include <linux/iio/iio.h> 33 #include <linux/iio/sysfs.h> 34 35 #define OPT3001_RESULT 0x00 36 #define OPT3001_CONFIGURATION 0x01 37 #define OPT3001_LOW_LIMIT 0x02 38 #define OPT3001_HIGH_LIMIT 0x03 39 #define OPT3001_MANUFACTURER_ID 0x7e 40 #define OPT3001_DEVICE_ID 0x7f 41 42 #define OPT3001_CONFIGURATION_RN_MASK (0xf << 12) 43 #define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12) 44 45 #define OPT3001_CONFIGURATION_CT BIT(11) 46 47 #define OPT3001_CONFIGURATION_M_MASK (3 << 9) 48 #define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9) 49 #define OPT3001_CONFIGURATION_M_SINGLE (1 << 9) 50 #define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */ 51 52 #define OPT3001_CONFIGURATION_OVF BIT(8) 53 #define OPT3001_CONFIGURATION_CRF BIT(7) 54 #define OPT3001_CONFIGURATION_FH BIT(6) 55 #define OPT3001_CONFIGURATION_FL BIT(5) 56 #define OPT3001_CONFIGURATION_L BIT(4) 57 #define OPT3001_CONFIGURATION_POL BIT(3) 58 #define OPT3001_CONFIGURATION_ME BIT(2) 59 60 #define OPT3001_CONFIGURATION_FC_MASK (3 << 0) 61 62 /* The end-of-conversion enable is located in the low-limit register */ 63 #define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000 64 65 #define OPT3001_REG_EXPONENT(n) ((n) >> 12) 66 #define OPT3001_REG_MANTISSA(n) ((n) & 0xfff) 67 68 #define OPT3001_INT_TIME_LONG 800000 69 #define OPT3001_INT_TIME_SHORT 100000 70 71 /* 72 * Time to wait for conversion result to be ready. The device datasheet 73 * worst-case max value is 880ms. Add some slack to be on the safe side. 74 */ 75 #define OPT3001_RESULT_READY_TIMEOUT msecs_to_jiffies(1000) 76 77 struct opt3001 { 78 struct i2c_client *client; 79 struct device *dev; 80 81 struct mutex lock; 82 u16 ok_to_ignore_lock:1; 83 u16 result_ready:1; 84 wait_queue_head_t result_ready_queue; 85 u16 result; 86 87 u32 int_time; 88 u32 mode; 89 90 u16 high_thresh_mantissa; 91 u16 low_thresh_mantissa; 92 93 u8 high_thresh_exp; 94 u8 low_thresh_exp; 95 }; 96 97 struct opt3001_scale { 98 int val; 99 int val2; 100 }; 101 102 static const struct opt3001_scale opt3001_scales[] = { 103 { 104 .val = 40, 105 .val2 = 950000, 106 }, 107 { 108 .val = 81, 109 .val2 = 900000, 110 }, 111 { 112 .val = 163, 113 .val2 = 800000, 114 }, 115 { 116 .val = 327, 117 .val2 = 600000, 118 }, 119 { 120 .val = 655, 121 .val2 = 200000, 122 }, 123 { 124 .val = 1310, 125 .val2 = 400000, 126 }, 127 { 128 .val = 2620, 129 .val2 = 800000, 130 }, 131 { 132 .val = 5241, 133 .val2 = 600000, 134 }, 135 { 136 .val = 10483, 137 .val2 = 200000, 138 }, 139 { 140 .val = 20966, 141 .val2 = 400000, 142 }, 143 { 144 .val = 83865, 145 .val2 = 600000, 146 }, 147 }; 148 149 static int opt3001_find_scale(const struct opt3001 *opt, int val, 150 int val2, u8 *exponent) 151 { 152 int i; 153 154 for (i = 0; i < ARRAY_SIZE(opt3001_scales); i++) { 155 const struct opt3001_scale *scale = &opt3001_scales[i]; 156 157 /* 158 * Combine the integer and micro parts for comparison 159 * purposes. Use milli lux precision to avoid 32-bit integer 160 * overflows. 161 */ 162 if ((val * 1000 + val2 / 1000) <= 163 (scale->val * 1000 + scale->val2 / 1000)) { 164 *exponent = i; 165 return 0; 166 } 167 } 168 169 return -EINVAL; 170 } 171 172 static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent, 173 u16 mantissa, int *val, int *val2) 174 { 175 int lux; 176 177 lux = 10 * (mantissa << exponent); 178 *val = lux / 1000; 179 *val2 = (lux - (*val * 1000)) * 1000; 180 } 181 182 static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode) 183 { 184 *reg &= ~OPT3001_CONFIGURATION_M_MASK; 185 *reg |= mode; 186 opt->mode = mode; 187 } 188 189 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8"); 190 191 static struct attribute *opt3001_attributes[] = { 192 &iio_const_attr_integration_time_available.dev_attr.attr, 193 NULL 194 }; 195 196 static const struct attribute_group opt3001_attribute_group = { 197 .attrs = opt3001_attributes, 198 }; 199 200 static const struct iio_event_spec opt3001_event_spec[] = { 201 { 202 .type = IIO_EV_TYPE_THRESH, 203 .dir = IIO_EV_DIR_RISING, 204 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 205 BIT(IIO_EV_INFO_ENABLE), 206 }, 207 { 208 .type = IIO_EV_TYPE_THRESH, 209 .dir = IIO_EV_DIR_FALLING, 210 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 211 BIT(IIO_EV_INFO_ENABLE), 212 }, 213 }; 214 215 static const struct iio_chan_spec opt3001_channels[] = { 216 { 217 .type = IIO_LIGHT, 218 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | 219 BIT(IIO_CHAN_INFO_INT_TIME), 220 .event_spec = opt3001_event_spec, 221 .num_event_specs = ARRAY_SIZE(opt3001_event_spec), 222 }, 223 IIO_CHAN_SOFT_TIMESTAMP(1), 224 }; 225 226 static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2) 227 { 228 int ret; 229 u16 mantissa; 230 u16 reg; 231 u8 exponent; 232 u16 value; 233 234 /* 235 * Enable the end-of-conversion interrupt mechanism. Note that doing 236 * so will overwrite the low-level limit value however we will restore 237 * this value later on. 238 */ 239 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_LOW_LIMIT, 240 OPT3001_LOW_LIMIT_EOC_ENABLE); 241 if (ret < 0) { 242 dev_err(opt->dev, "failed to write register %02x\n", 243 OPT3001_LOW_LIMIT); 244 return ret; 245 } 246 247 /* Reset data-ready indicator flag (will be set in the IRQ routine) */ 248 opt->result_ready = false; 249 250 /* Allow IRQ to access the device despite lock being set */ 251 opt->ok_to_ignore_lock = true; 252 253 /* Configure for single-conversion mode and start a new conversion */ 254 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 255 if (ret < 0) { 256 dev_err(opt->dev, "failed to read register %02x\n", 257 OPT3001_CONFIGURATION); 258 goto err; 259 } 260 261 reg = ret; 262 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SINGLE); 263 264 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 265 reg); 266 if (ret < 0) { 267 dev_err(opt->dev, "failed to write register %02x\n", 268 OPT3001_CONFIGURATION); 269 goto err; 270 } 271 272 /* Wait for the IRQ to indicate the conversion is complete */ 273 ret = wait_event_timeout(opt->result_ready_queue, opt->result_ready, 274 OPT3001_RESULT_READY_TIMEOUT); 275 276 err: 277 /* Disallow IRQ to access the device while lock is active */ 278 opt->ok_to_ignore_lock = false; 279 280 if (ret == 0) 281 return -ETIMEDOUT; 282 else if (ret < 0) 283 return ret; 284 285 /* 286 * Disable the end-of-conversion interrupt mechanism by restoring the 287 * low-level limit value (clearing OPT3001_LOW_LIMIT_EOC_ENABLE). Note 288 * that selectively clearing those enable bits would affect the actual 289 * limit value due to bit-overlap and therefore can't be done. 290 */ 291 value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa; 292 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_LOW_LIMIT, 293 value); 294 if (ret < 0) { 295 dev_err(opt->dev, "failed to write register %02x\n", 296 OPT3001_LOW_LIMIT); 297 return ret; 298 } 299 300 exponent = OPT3001_REG_EXPONENT(opt->result); 301 mantissa = OPT3001_REG_MANTISSA(opt->result); 302 303 opt3001_to_iio_ret(opt, exponent, mantissa, val, val2); 304 305 return IIO_VAL_INT_PLUS_MICRO; 306 } 307 308 static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2) 309 { 310 *val = 0; 311 *val2 = opt->int_time; 312 313 return IIO_VAL_INT_PLUS_MICRO; 314 } 315 316 static int opt3001_set_int_time(struct opt3001 *opt, int time) 317 { 318 int ret; 319 u16 reg; 320 321 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 322 if (ret < 0) { 323 dev_err(opt->dev, "failed to read register %02x\n", 324 OPT3001_CONFIGURATION); 325 return ret; 326 } 327 328 reg = ret; 329 330 switch (time) { 331 case OPT3001_INT_TIME_SHORT: 332 reg &= ~OPT3001_CONFIGURATION_CT; 333 opt->int_time = OPT3001_INT_TIME_SHORT; 334 break; 335 case OPT3001_INT_TIME_LONG: 336 reg |= OPT3001_CONFIGURATION_CT; 337 opt->int_time = OPT3001_INT_TIME_LONG; 338 break; 339 default: 340 return -EINVAL; 341 } 342 343 return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 344 reg); 345 } 346 347 static int opt3001_read_raw(struct iio_dev *iio, 348 struct iio_chan_spec const *chan, int *val, int *val2, 349 long mask) 350 { 351 struct opt3001 *opt = iio_priv(iio); 352 int ret; 353 354 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 355 return -EBUSY; 356 357 if (chan->type != IIO_LIGHT) 358 return -EINVAL; 359 360 mutex_lock(&opt->lock); 361 362 switch (mask) { 363 case IIO_CHAN_INFO_PROCESSED: 364 ret = opt3001_get_lux(opt, val, val2); 365 break; 366 case IIO_CHAN_INFO_INT_TIME: 367 ret = opt3001_get_int_time(opt, val, val2); 368 break; 369 default: 370 ret = -EINVAL; 371 } 372 373 mutex_unlock(&opt->lock); 374 375 return ret; 376 } 377 378 static int opt3001_write_raw(struct iio_dev *iio, 379 struct iio_chan_spec const *chan, int val, int val2, 380 long mask) 381 { 382 struct opt3001 *opt = iio_priv(iio); 383 int ret; 384 385 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 386 return -EBUSY; 387 388 if (chan->type != IIO_LIGHT) 389 return -EINVAL; 390 391 if (mask != IIO_CHAN_INFO_INT_TIME) 392 return -EINVAL; 393 394 if (val != 0) 395 return -EINVAL; 396 397 mutex_lock(&opt->lock); 398 ret = opt3001_set_int_time(opt, val2); 399 mutex_unlock(&opt->lock); 400 401 return ret; 402 } 403 404 static int opt3001_read_event_value(struct iio_dev *iio, 405 const struct iio_chan_spec *chan, enum iio_event_type type, 406 enum iio_event_direction dir, enum iio_event_info info, 407 int *val, int *val2) 408 { 409 struct opt3001 *opt = iio_priv(iio); 410 int ret = IIO_VAL_INT_PLUS_MICRO; 411 412 mutex_lock(&opt->lock); 413 414 switch (dir) { 415 case IIO_EV_DIR_RISING: 416 opt3001_to_iio_ret(opt, opt->high_thresh_exp, 417 opt->high_thresh_mantissa, val, val2); 418 break; 419 case IIO_EV_DIR_FALLING: 420 opt3001_to_iio_ret(opt, opt->low_thresh_exp, 421 opt->low_thresh_mantissa, val, val2); 422 break; 423 default: 424 ret = -EINVAL; 425 } 426 427 mutex_unlock(&opt->lock); 428 429 return ret; 430 } 431 432 static int opt3001_write_event_value(struct iio_dev *iio, 433 const struct iio_chan_spec *chan, enum iio_event_type type, 434 enum iio_event_direction dir, enum iio_event_info info, 435 int val, int val2) 436 { 437 struct opt3001 *opt = iio_priv(iio); 438 int ret; 439 440 u16 mantissa; 441 u16 value; 442 u16 reg; 443 444 u8 exponent; 445 446 if (val < 0) 447 return -EINVAL; 448 449 mutex_lock(&opt->lock); 450 451 ret = opt3001_find_scale(opt, val, val2, &exponent); 452 if (ret < 0) { 453 dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2); 454 goto err; 455 } 456 457 mantissa = (((val * 1000) + (val2 / 1000)) / 10) >> exponent; 458 value = (exponent << 12) | mantissa; 459 460 switch (dir) { 461 case IIO_EV_DIR_RISING: 462 reg = OPT3001_HIGH_LIMIT; 463 opt->high_thresh_mantissa = mantissa; 464 opt->high_thresh_exp = exponent; 465 break; 466 case IIO_EV_DIR_FALLING: 467 reg = OPT3001_LOW_LIMIT; 468 opt->low_thresh_mantissa = mantissa; 469 opt->low_thresh_exp = exponent; 470 break; 471 default: 472 ret = -EINVAL; 473 goto err; 474 } 475 476 ret = i2c_smbus_write_word_swapped(opt->client, reg, value); 477 if (ret < 0) { 478 dev_err(opt->dev, "failed to write register %02x\n", reg); 479 goto err; 480 } 481 482 err: 483 mutex_unlock(&opt->lock); 484 485 return ret; 486 } 487 488 static int opt3001_read_event_config(struct iio_dev *iio, 489 const struct iio_chan_spec *chan, enum iio_event_type type, 490 enum iio_event_direction dir) 491 { 492 struct opt3001 *opt = iio_priv(iio); 493 494 return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS; 495 } 496 497 static int opt3001_write_event_config(struct iio_dev *iio, 498 const struct iio_chan_spec *chan, enum iio_event_type type, 499 enum iio_event_direction dir, int state) 500 { 501 struct opt3001 *opt = iio_priv(iio); 502 int ret; 503 u16 mode; 504 u16 reg; 505 506 if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 507 return 0; 508 509 if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN) 510 return 0; 511 512 mutex_lock(&opt->lock); 513 514 mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS 515 : OPT3001_CONFIGURATION_M_SHUTDOWN; 516 517 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 518 if (ret < 0) { 519 dev_err(opt->dev, "failed to read register %02x\n", 520 OPT3001_CONFIGURATION); 521 goto err; 522 } 523 524 reg = ret; 525 opt3001_set_mode(opt, ®, mode); 526 527 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 528 reg); 529 if (ret < 0) { 530 dev_err(opt->dev, "failed to write register %02x\n", 531 OPT3001_CONFIGURATION); 532 goto err; 533 } 534 535 err: 536 mutex_unlock(&opt->lock); 537 538 return ret; 539 } 540 541 static const struct iio_info opt3001_info = { 542 .driver_module = THIS_MODULE, 543 .attrs = &opt3001_attribute_group, 544 .read_raw = opt3001_read_raw, 545 .write_raw = opt3001_write_raw, 546 .read_event_value = opt3001_read_event_value, 547 .write_event_value = opt3001_write_event_value, 548 .read_event_config = opt3001_read_event_config, 549 .write_event_config = opt3001_write_event_config, 550 }; 551 552 static int opt3001_read_id(struct opt3001 *opt) 553 { 554 char manufacturer[2]; 555 u16 device_id; 556 int ret; 557 558 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID); 559 if (ret < 0) { 560 dev_err(opt->dev, "failed to read register %02x\n", 561 OPT3001_MANUFACTURER_ID); 562 return ret; 563 } 564 565 manufacturer[0] = ret >> 8; 566 manufacturer[1] = ret & 0xff; 567 568 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID); 569 if (ret < 0) { 570 dev_err(opt->dev, "failed to read register %02x\n", 571 OPT3001_DEVICE_ID); 572 return ret; 573 } 574 575 device_id = ret; 576 577 dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0], 578 manufacturer[1], device_id); 579 580 return 0; 581 } 582 583 static int opt3001_configure(struct opt3001 *opt) 584 { 585 int ret; 586 u16 reg; 587 588 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 589 if (ret < 0) { 590 dev_err(opt->dev, "failed to read register %02x\n", 591 OPT3001_CONFIGURATION); 592 return ret; 593 } 594 595 reg = ret; 596 597 /* Enable automatic full-scale setting mode */ 598 reg &= ~OPT3001_CONFIGURATION_RN_MASK; 599 reg |= OPT3001_CONFIGURATION_RN_AUTO; 600 601 /* Reflect status of the device's integration time setting */ 602 if (reg & OPT3001_CONFIGURATION_CT) 603 opt->int_time = OPT3001_INT_TIME_LONG; 604 else 605 opt->int_time = OPT3001_INT_TIME_SHORT; 606 607 /* Ensure device is in shutdown initially */ 608 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN); 609 610 /* Configure for latched window-style comparison operation */ 611 reg |= OPT3001_CONFIGURATION_L; 612 reg &= ~OPT3001_CONFIGURATION_POL; 613 reg &= ~OPT3001_CONFIGURATION_ME; 614 reg &= ~OPT3001_CONFIGURATION_FC_MASK; 615 616 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 617 reg); 618 if (ret < 0) { 619 dev_err(opt->dev, "failed to write register %02x\n", 620 OPT3001_CONFIGURATION); 621 return ret; 622 } 623 624 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT); 625 if (ret < 0) { 626 dev_err(opt->dev, "failed to read register %02x\n", 627 OPT3001_LOW_LIMIT); 628 return ret; 629 } 630 631 opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 632 opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret); 633 634 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT); 635 if (ret < 0) { 636 dev_err(opt->dev, "failed to read register %02x\n", 637 OPT3001_HIGH_LIMIT); 638 return ret; 639 } 640 641 opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 642 opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret); 643 644 return 0; 645 } 646 647 static irqreturn_t opt3001_irq(int irq, void *_iio) 648 { 649 struct iio_dev *iio = _iio; 650 struct opt3001 *opt = iio_priv(iio); 651 int ret; 652 653 if (!opt->ok_to_ignore_lock) 654 mutex_lock(&opt->lock); 655 656 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 657 if (ret < 0) { 658 dev_err(opt->dev, "failed to read register %02x\n", 659 OPT3001_CONFIGURATION); 660 goto out; 661 } 662 663 if ((ret & OPT3001_CONFIGURATION_M_MASK) == 664 OPT3001_CONFIGURATION_M_CONTINUOUS) { 665 if (ret & OPT3001_CONFIGURATION_FH) 666 iio_push_event(iio, 667 IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0, 668 IIO_EV_TYPE_THRESH, 669 IIO_EV_DIR_RISING), 670 iio_get_time_ns()); 671 if (ret & OPT3001_CONFIGURATION_FL) 672 iio_push_event(iio, 673 IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0, 674 IIO_EV_TYPE_THRESH, 675 IIO_EV_DIR_FALLING), 676 iio_get_time_ns()); 677 } else if (ret & OPT3001_CONFIGURATION_CRF) { 678 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT); 679 if (ret < 0) { 680 dev_err(opt->dev, "failed to read register %02x\n", 681 OPT3001_RESULT); 682 goto out; 683 } 684 opt->result = ret; 685 opt->result_ready = true; 686 wake_up(&opt->result_ready_queue); 687 } 688 689 out: 690 if (!opt->ok_to_ignore_lock) 691 mutex_unlock(&opt->lock); 692 693 return IRQ_HANDLED; 694 } 695 696 static int opt3001_probe(struct i2c_client *client, 697 const struct i2c_device_id *id) 698 { 699 struct device *dev = &client->dev; 700 701 struct iio_dev *iio; 702 struct opt3001 *opt; 703 int irq = client->irq; 704 int ret; 705 706 iio = devm_iio_device_alloc(dev, sizeof(*opt)); 707 if (!iio) 708 return -ENOMEM; 709 710 opt = iio_priv(iio); 711 opt->client = client; 712 opt->dev = dev; 713 714 mutex_init(&opt->lock); 715 init_waitqueue_head(&opt->result_ready_queue); 716 i2c_set_clientdata(client, iio); 717 718 ret = opt3001_read_id(opt); 719 if (ret) 720 return ret; 721 722 ret = opt3001_configure(opt); 723 if (ret) 724 return ret; 725 726 iio->name = client->name; 727 iio->channels = opt3001_channels; 728 iio->num_channels = ARRAY_SIZE(opt3001_channels); 729 iio->dev.parent = dev; 730 iio->modes = INDIO_DIRECT_MODE; 731 iio->info = &opt3001_info; 732 733 ret = devm_iio_device_register(dev, iio); 734 if (ret) { 735 dev_err(dev, "failed to register IIO device\n"); 736 return ret; 737 } 738 739 ret = request_threaded_irq(irq, NULL, opt3001_irq, 740 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 741 "opt3001", iio); 742 if (ret) { 743 dev_err(dev, "failed to request IRQ #%d\n", irq); 744 return ret; 745 } 746 747 return 0; 748 } 749 750 static int opt3001_remove(struct i2c_client *client) 751 { 752 struct iio_dev *iio = i2c_get_clientdata(client); 753 struct opt3001 *opt = iio_priv(iio); 754 int ret; 755 u16 reg; 756 757 free_irq(client->irq, iio); 758 759 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 760 if (ret < 0) { 761 dev_err(opt->dev, "failed to read register %02x\n", 762 OPT3001_CONFIGURATION); 763 return ret; 764 } 765 766 reg = ret; 767 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN); 768 769 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 770 reg); 771 if (ret < 0) { 772 dev_err(opt->dev, "failed to write register %02x\n", 773 OPT3001_CONFIGURATION); 774 return ret; 775 } 776 777 return 0; 778 } 779 780 static const struct i2c_device_id opt3001_id[] = { 781 { "opt3001", 0 }, 782 { } /* Terminating Entry */ 783 }; 784 MODULE_DEVICE_TABLE(i2c, opt3001_id); 785 786 static const struct of_device_id opt3001_of_match[] = { 787 { .compatible = "ti,opt3001" }, 788 { } 789 }; 790 791 static struct i2c_driver opt3001_driver = { 792 .probe = opt3001_probe, 793 .remove = opt3001_remove, 794 .id_table = opt3001_id, 795 796 .driver = { 797 .name = "opt3001", 798 .of_match_table = of_match_ptr(opt3001_of_match), 799 }, 800 }; 801 802 module_i2c_driver(opt3001_driver); 803 804 MODULE_LICENSE("GPL v2"); 805 MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>"); 806 MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver"); 807