1 // SPDX-License-Identifier: GPL-2.0-only 2 /** 3 * opt3001.c - Texas Instruments OPT3001 Light Sensor 4 * 5 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com 6 * 7 * Author: Andreas Dannenberg <dannenberg@ti.com> 8 * Based on previous work from: Felipe Balbi <balbi@ti.com> 9 */ 10 11 #include <linux/bitops.h> 12 #include <linux/delay.h> 13 #include <linux/device.h> 14 #include <linux/i2c.h> 15 #include <linux/interrupt.h> 16 #include <linux/irq.h> 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/mutex.h> 20 #include <linux/slab.h> 21 #include <linux/types.h> 22 23 #include <linux/iio/events.h> 24 #include <linux/iio/iio.h> 25 #include <linux/iio/sysfs.h> 26 27 #define OPT3001_RESULT 0x00 28 #define OPT3001_CONFIGURATION 0x01 29 #define OPT3001_LOW_LIMIT 0x02 30 #define OPT3001_HIGH_LIMIT 0x03 31 #define OPT3001_MANUFACTURER_ID 0x7e 32 #define OPT3001_DEVICE_ID 0x7f 33 34 #define OPT3001_CONFIGURATION_RN_MASK (0xf << 12) 35 #define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12) 36 37 #define OPT3001_CONFIGURATION_CT BIT(11) 38 39 #define OPT3001_CONFIGURATION_M_MASK (3 << 9) 40 #define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9) 41 #define OPT3001_CONFIGURATION_M_SINGLE (1 << 9) 42 #define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */ 43 44 #define OPT3001_CONFIGURATION_OVF BIT(8) 45 #define OPT3001_CONFIGURATION_CRF BIT(7) 46 #define OPT3001_CONFIGURATION_FH BIT(6) 47 #define OPT3001_CONFIGURATION_FL BIT(5) 48 #define OPT3001_CONFIGURATION_L BIT(4) 49 #define OPT3001_CONFIGURATION_POL BIT(3) 50 #define OPT3001_CONFIGURATION_ME BIT(2) 51 52 #define OPT3001_CONFIGURATION_FC_MASK (3 << 0) 53 54 /* The end-of-conversion enable is located in the low-limit register */ 55 #define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000 56 57 #define OPT3001_REG_EXPONENT(n) ((n) >> 12) 58 #define OPT3001_REG_MANTISSA(n) ((n) & 0xfff) 59 60 #define OPT3001_INT_TIME_LONG 800000 61 #define OPT3001_INT_TIME_SHORT 100000 62 63 /* 64 * Time to wait for conversion result to be ready. The device datasheet 65 * sect. 6.5 states results are ready after total integration time plus 3ms. 66 * This results in worst-case max values of 113ms or 883ms, respectively. 67 * Add some slack to be on the safe side. 68 */ 69 #define OPT3001_RESULT_READY_SHORT 150 70 #define OPT3001_RESULT_READY_LONG 1000 71 72 struct opt3001 { 73 struct i2c_client *client; 74 struct device *dev; 75 76 struct mutex lock; 77 bool ok_to_ignore_lock; 78 bool result_ready; 79 wait_queue_head_t result_ready_queue; 80 u16 result; 81 82 u32 int_time; 83 u32 mode; 84 85 u16 high_thresh_mantissa; 86 u16 low_thresh_mantissa; 87 88 u8 high_thresh_exp; 89 u8 low_thresh_exp; 90 91 bool use_irq; 92 }; 93 94 struct opt3001_scale { 95 int val; 96 int val2; 97 }; 98 99 static const struct opt3001_scale opt3001_scales[] = { 100 { 101 .val = 40, 102 .val2 = 950000, 103 }, 104 { 105 .val = 81, 106 .val2 = 900000, 107 }, 108 { 109 .val = 163, 110 .val2 = 800000, 111 }, 112 { 113 .val = 327, 114 .val2 = 600000, 115 }, 116 { 117 .val = 655, 118 .val2 = 200000, 119 }, 120 { 121 .val = 1310, 122 .val2 = 400000, 123 }, 124 { 125 .val = 2620, 126 .val2 = 800000, 127 }, 128 { 129 .val = 5241, 130 .val2 = 600000, 131 }, 132 { 133 .val = 10483, 134 .val2 = 200000, 135 }, 136 { 137 .val = 20966, 138 .val2 = 400000, 139 }, 140 { 141 .val = 83865, 142 .val2 = 600000, 143 }, 144 }; 145 146 static int opt3001_find_scale(const struct opt3001 *opt, int val, 147 int val2, u8 *exponent) 148 { 149 int i; 150 151 for (i = 0; i < ARRAY_SIZE(opt3001_scales); i++) { 152 const struct opt3001_scale *scale = &opt3001_scales[i]; 153 154 /* 155 * Combine the integer and micro parts for comparison 156 * purposes. Use milli lux precision to avoid 32-bit integer 157 * overflows. 158 */ 159 if ((val * 1000 + val2 / 1000) <= 160 (scale->val * 1000 + scale->val2 / 1000)) { 161 *exponent = i; 162 return 0; 163 } 164 } 165 166 return -EINVAL; 167 } 168 169 static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent, 170 u16 mantissa, int *val, int *val2) 171 { 172 int lux; 173 174 lux = 10 * (mantissa << exponent); 175 *val = lux / 1000; 176 *val2 = (lux - (*val * 1000)) * 1000; 177 } 178 179 static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode) 180 { 181 *reg &= ~OPT3001_CONFIGURATION_M_MASK; 182 *reg |= mode; 183 opt->mode = mode; 184 } 185 186 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8"); 187 188 static struct attribute *opt3001_attributes[] = { 189 &iio_const_attr_integration_time_available.dev_attr.attr, 190 NULL 191 }; 192 193 static const struct attribute_group opt3001_attribute_group = { 194 .attrs = opt3001_attributes, 195 }; 196 197 static const struct iio_event_spec opt3001_event_spec[] = { 198 { 199 .type = IIO_EV_TYPE_THRESH, 200 .dir = IIO_EV_DIR_RISING, 201 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 202 BIT(IIO_EV_INFO_ENABLE), 203 }, 204 { 205 .type = IIO_EV_TYPE_THRESH, 206 .dir = IIO_EV_DIR_FALLING, 207 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 208 BIT(IIO_EV_INFO_ENABLE), 209 }, 210 }; 211 212 static const struct iio_chan_spec opt3001_channels[] = { 213 { 214 .type = IIO_LIGHT, 215 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | 216 BIT(IIO_CHAN_INFO_INT_TIME), 217 .event_spec = opt3001_event_spec, 218 .num_event_specs = ARRAY_SIZE(opt3001_event_spec), 219 }, 220 IIO_CHAN_SOFT_TIMESTAMP(1), 221 }; 222 223 static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2) 224 { 225 int ret; 226 u16 mantissa; 227 u16 reg; 228 u8 exponent; 229 u16 value; 230 long timeout; 231 232 if (opt->use_irq) { 233 /* 234 * Enable the end-of-conversion interrupt mechanism. Note that 235 * doing so will overwrite the low-level limit value however we 236 * will restore this value later on. 237 */ 238 ret = i2c_smbus_write_word_swapped(opt->client, 239 OPT3001_LOW_LIMIT, 240 OPT3001_LOW_LIMIT_EOC_ENABLE); 241 if (ret < 0) { 242 dev_err(opt->dev, "failed to write register %02x\n", 243 OPT3001_LOW_LIMIT); 244 return ret; 245 } 246 247 /* Allow IRQ to access the device despite lock being set */ 248 opt->ok_to_ignore_lock = true; 249 } 250 251 /* Reset data-ready indicator flag */ 252 opt->result_ready = false; 253 254 /* Configure for single-conversion mode and start a new conversion */ 255 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 256 if (ret < 0) { 257 dev_err(opt->dev, "failed to read register %02x\n", 258 OPT3001_CONFIGURATION); 259 goto err; 260 } 261 262 reg = ret; 263 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SINGLE); 264 265 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 266 reg); 267 if (ret < 0) { 268 dev_err(opt->dev, "failed to write register %02x\n", 269 OPT3001_CONFIGURATION); 270 goto err; 271 } 272 273 if (opt->use_irq) { 274 /* Wait for the IRQ to indicate the conversion is complete */ 275 ret = wait_event_timeout(opt->result_ready_queue, 276 opt->result_ready, 277 msecs_to_jiffies(OPT3001_RESULT_READY_LONG)); 278 } else { 279 /* Sleep for result ready time */ 280 timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ? 281 OPT3001_RESULT_READY_SHORT : OPT3001_RESULT_READY_LONG; 282 msleep(timeout); 283 284 /* Check result ready flag */ 285 ret = i2c_smbus_read_word_swapped(opt->client, 286 OPT3001_CONFIGURATION); 287 if (ret < 0) { 288 dev_err(opt->dev, "failed to read register %02x\n", 289 OPT3001_CONFIGURATION); 290 goto err; 291 } 292 293 if (!(ret & OPT3001_CONFIGURATION_CRF)) { 294 ret = -ETIMEDOUT; 295 goto err; 296 } 297 298 /* Obtain value */ 299 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT); 300 if (ret < 0) { 301 dev_err(opt->dev, "failed to read register %02x\n", 302 OPT3001_RESULT); 303 goto err; 304 } 305 opt->result = ret; 306 opt->result_ready = true; 307 } 308 309 err: 310 if (opt->use_irq) 311 /* Disallow IRQ to access the device while lock is active */ 312 opt->ok_to_ignore_lock = false; 313 314 if (ret == 0) 315 return -ETIMEDOUT; 316 else if (ret < 0) 317 return ret; 318 319 if (opt->use_irq) { 320 /* 321 * Disable the end-of-conversion interrupt mechanism by 322 * restoring the low-level limit value (clearing 323 * OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing 324 * those enable bits would affect the actual limit value due to 325 * bit-overlap and therefore can't be done. 326 */ 327 value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa; 328 ret = i2c_smbus_write_word_swapped(opt->client, 329 OPT3001_LOW_LIMIT, 330 value); 331 if (ret < 0) { 332 dev_err(opt->dev, "failed to write register %02x\n", 333 OPT3001_LOW_LIMIT); 334 return ret; 335 } 336 } 337 338 exponent = OPT3001_REG_EXPONENT(opt->result); 339 mantissa = OPT3001_REG_MANTISSA(opt->result); 340 341 opt3001_to_iio_ret(opt, exponent, mantissa, val, val2); 342 343 return IIO_VAL_INT_PLUS_MICRO; 344 } 345 346 static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2) 347 { 348 *val = 0; 349 *val2 = opt->int_time; 350 351 return IIO_VAL_INT_PLUS_MICRO; 352 } 353 354 static int opt3001_set_int_time(struct opt3001 *opt, int time) 355 { 356 int ret; 357 u16 reg; 358 359 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 360 if (ret < 0) { 361 dev_err(opt->dev, "failed to read register %02x\n", 362 OPT3001_CONFIGURATION); 363 return ret; 364 } 365 366 reg = ret; 367 368 switch (time) { 369 case OPT3001_INT_TIME_SHORT: 370 reg &= ~OPT3001_CONFIGURATION_CT; 371 opt->int_time = OPT3001_INT_TIME_SHORT; 372 break; 373 case OPT3001_INT_TIME_LONG: 374 reg |= OPT3001_CONFIGURATION_CT; 375 opt->int_time = OPT3001_INT_TIME_LONG; 376 break; 377 default: 378 return -EINVAL; 379 } 380 381 return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 382 reg); 383 } 384 385 static int opt3001_read_raw(struct iio_dev *iio, 386 struct iio_chan_spec const *chan, int *val, int *val2, 387 long mask) 388 { 389 struct opt3001 *opt = iio_priv(iio); 390 int ret; 391 392 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 393 return -EBUSY; 394 395 if (chan->type != IIO_LIGHT) 396 return -EINVAL; 397 398 mutex_lock(&opt->lock); 399 400 switch (mask) { 401 case IIO_CHAN_INFO_PROCESSED: 402 ret = opt3001_get_lux(opt, val, val2); 403 break; 404 case IIO_CHAN_INFO_INT_TIME: 405 ret = opt3001_get_int_time(opt, val, val2); 406 break; 407 default: 408 ret = -EINVAL; 409 } 410 411 mutex_unlock(&opt->lock); 412 413 return ret; 414 } 415 416 static int opt3001_write_raw(struct iio_dev *iio, 417 struct iio_chan_spec const *chan, int val, int val2, 418 long mask) 419 { 420 struct opt3001 *opt = iio_priv(iio); 421 int ret; 422 423 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 424 return -EBUSY; 425 426 if (chan->type != IIO_LIGHT) 427 return -EINVAL; 428 429 if (mask != IIO_CHAN_INFO_INT_TIME) 430 return -EINVAL; 431 432 if (val != 0) 433 return -EINVAL; 434 435 mutex_lock(&opt->lock); 436 ret = opt3001_set_int_time(opt, val2); 437 mutex_unlock(&opt->lock); 438 439 return ret; 440 } 441 442 static int opt3001_read_event_value(struct iio_dev *iio, 443 const struct iio_chan_spec *chan, enum iio_event_type type, 444 enum iio_event_direction dir, enum iio_event_info info, 445 int *val, int *val2) 446 { 447 struct opt3001 *opt = iio_priv(iio); 448 int ret = IIO_VAL_INT_PLUS_MICRO; 449 450 mutex_lock(&opt->lock); 451 452 switch (dir) { 453 case IIO_EV_DIR_RISING: 454 opt3001_to_iio_ret(opt, opt->high_thresh_exp, 455 opt->high_thresh_mantissa, val, val2); 456 break; 457 case IIO_EV_DIR_FALLING: 458 opt3001_to_iio_ret(opt, opt->low_thresh_exp, 459 opt->low_thresh_mantissa, val, val2); 460 break; 461 default: 462 ret = -EINVAL; 463 } 464 465 mutex_unlock(&opt->lock); 466 467 return ret; 468 } 469 470 static int opt3001_write_event_value(struct iio_dev *iio, 471 const struct iio_chan_spec *chan, enum iio_event_type type, 472 enum iio_event_direction dir, enum iio_event_info info, 473 int val, int val2) 474 { 475 struct opt3001 *opt = iio_priv(iio); 476 int ret; 477 478 u16 mantissa; 479 u16 value; 480 u16 reg; 481 482 u8 exponent; 483 484 if (val < 0) 485 return -EINVAL; 486 487 mutex_lock(&opt->lock); 488 489 ret = opt3001_find_scale(opt, val, val2, &exponent); 490 if (ret < 0) { 491 dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2); 492 goto err; 493 } 494 495 mantissa = (((val * 1000) + (val2 / 1000)) / 10) >> exponent; 496 value = (exponent << 12) | mantissa; 497 498 switch (dir) { 499 case IIO_EV_DIR_RISING: 500 reg = OPT3001_HIGH_LIMIT; 501 opt->high_thresh_mantissa = mantissa; 502 opt->high_thresh_exp = exponent; 503 break; 504 case IIO_EV_DIR_FALLING: 505 reg = OPT3001_LOW_LIMIT; 506 opt->low_thresh_mantissa = mantissa; 507 opt->low_thresh_exp = exponent; 508 break; 509 default: 510 ret = -EINVAL; 511 goto err; 512 } 513 514 ret = i2c_smbus_write_word_swapped(opt->client, reg, value); 515 if (ret < 0) { 516 dev_err(opt->dev, "failed to write register %02x\n", reg); 517 goto err; 518 } 519 520 err: 521 mutex_unlock(&opt->lock); 522 523 return ret; 524 } 525 526 static int opt3001_read_event_config(struct iio_dev *iio, 527 const struct iio_chan_spec *chan, enum iio_event_type type, 528 enum iio_event_direction dir) 529 { 530 struct opt3001 *opt = iio_priv(iio); 531 532 return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS; 533 } 534 535 static int opt3001_write_event_config(struct iio_dev *iio, 536 const struct iio_chan_spec *chan, enum iio_event_type type, 537 enum iio_event_direction dir, int state) 538 { 539 struct opt3001 *opt = iio_priv(iio); 540 int ret; 541 u16 mode; 542 u16 reg; 543 544 if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 545 return 0; 546 547 if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN) 548 return 0; 549 550 mutex_lock(&opt->lock); 551 552 mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS 553 : OPT3001_CONFIGURATION_M_SHUTDOWN; 554 555 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 556 if (ret < 0) { 557 dev_err(opt->dev, "failed to read register %02x\n", 558 OPT3001_CONFIGURATION); 559 goto err; 560 } 561 562 reg = ret; 563 opt3001_set_mode(opt, ®, mode); 564 565 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 566 reg); 567 if (ret < 0) { 568 dev_err(opt->dev, "failed to write register %02x\n", 569 OPT3001_CONFIGURATION); 570 goto err; 571 } 572 573 err: 574 mutex_unlock(&opt->lock); 575 576 return ret; 577 } 578 579 static const struct iio_info opt3001_info = { 580 .attrs = &opt3001_attribute_group, 581 .read_raw = opt3001_read_raw, 582 .write_raw = opt3001_write_raw, 583 .read_event_value = opt3001_read_event_value, 584 .write_event_value = opt3001_write_event_value, 585 .read_event_config = opt3001_read_event_config, 586 .write_event_config = opt3001_write_event_config, 587 }; 588 589 static int opt3001_read_id(struct opt3001 *opt) 590 { 591 char manufacturer[2]; 592 u16 device_id; 593 int ret; 594 595 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID); 596 if (ret < 0) { 597 dev_err(opt->dev, "failed to read register %02x\n", 598 OPT3001_MANUFACTURER_ID); 599 return ret; 600 } 601 602 manufacturer[0] = ret >> 8; 603 manufacturer[1] = ret & 0xff; 604 605 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID); 606 if (ret < 0) { 607 dev_err(opt->dev, "failed to read register %02x\n", 608 OPT3001_DEVICE_ID); 609 return ret; 610 } 611 612 device_id = ret; 613 614 dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0], 615 manufacturer[1], device_id); 616 617 return 0; 618 } 619 620 static int opt3001_configure(struct opt3001 *opt) 621 { 622 int ret; 623 u16 reg; 624 625 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 626 if (ret < 0) { 627 dev_err(opt->dev, "failed to read register %02x\n", 628 OPT3001_CONFIGURATION); 629 return ret; 630 } 631 632 reg = ret; 633 634 /* Enable automatic full-scale setting mode */ 635 reg &= ~OPT3001_CONFIGURATION_RN_MASK; 636 reg |= OPT3001_CONFIGURATION_RN_AUTO; 637 638 /* Reflect status of the device's integration time setting */ 639 if (reg & OPT3001_CONFIGURATION_CT) 640 opt->int_time = OPT3001_INT_TIME_LONG; 641 else 642 opt->int_time = OPT3001_INT_TIME_SHORT; 643 644 /* Ensure device is in shutdown initially */ 645 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN); 646 647 /* Configure for latched window-style comparison operation */ 648 reg |= OPT3001_CONFIGURATION_L; 649 reg &= ~OPT3001_CONFIGURATION_POL; 650 reg &= ~OPT3001_CONFIGURATION_ME; 651 reg &= ~OPT3001_CONFIGURATION_FC_MASK; 652 653 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 654 reg); 655 if (ret < 0) { 656 dev_err(opt->dev, "failed to write register %02x\n", 657 OPT3001_CONFIGURATION); 658 return ret; 659 } 660 661 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT); 662 if (ret < 0) { 663 dev_err(opt->dev, "failed to read register %02x\n", 664 OPT3001_LOW_LIMIT); 665 return ret; 666 } 667 668 opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 669 opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret); 670 671 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT); 672 if (ret < 0) { 673 dev_err(opt->dev, "failed to read register %02x\n", 674 OPT3001_HIGH_LIMIT); 675 return ret; 676 } 677 678 opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 679 opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret); 680 681 return 0; 682 } 683 684 static irqreturn_t opt3001_irq(int irq, void *_iio) 685 { 686 struct iio_dev *iio = _iio; 687 struct opt3001 *opt = iio_priv(iio); 688 int ret; 689 bool wake_result_ready_queue = false; 690 691 if (!opt->ok_to_ignore_lock) 692 mutex_lock(&opt->lock); 693 694 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 695 if (ret < 0) { 696 dev_err(opt->dev, "failed to read register %02x\n", 697 OPT3001_CONFIGURATION); 698 goto out; 699 } 700 701 if ((ret & OPT3001_CONFIGURATION_M_MASK) == 702 OPT3001_CONFIGURATION_M_CONTINUOUS) { 703 if (ret & OPT3001_CONFIGURATION_FH) 704 iio_push_event(iio, 705 IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0, 706 IIO_EV_TYPE_THRESH, 707 IIO_EV_DIR_RISING), 708 iio_get_time_ns(iio)); 709 if (ret & OPT3001_CONFIGURATION_FL) 710 iio_push_event(iio, 711 IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0, 712 IIO_EV_TYPE_THRESH, 713 IIO_EV_DIR_FALLING), 714 iio_get_time_ns(iio)); 715 } else if (ret & OPT3001_CONFIGURATION_CRF) { 716 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT); 717 if (ret < 0) { 718 dev_err(opt->dev, "failed to read register %02x\n", 719 OPT3001_RESULT); 720 goto out; 721 } 722 opt->result = ret; 723 opt->result_ready = true; 724 wake_result_ready_queue = true; 725 } 726 727 out: 728 if (!opt->ok_to_ignore_lock) 729 mutex_unlock(&opt->lock); 730 731 if (wake_result_ready_queue) 732 wake_up(&opt->result_ready_queue); 733 734 return IRQ_HANDLED; 735 } 736 737 static int opt3001_probe(struct i2c_client *client, 738 const struct i2c_device_id *id) 739 { 740 struct device *dev = &client->dev; 741 742 struct iio_dev *iio; 743 struct opt3001 *opt; 744 int irq = client->irq; 745 int ret; 746 747 iio = devm_iio_device_alloc(dev, sizeof(*opt)); 748 if (!iio) 749 return -ENOMEM; 750 751 opt = iio_priv(iio); 752 opt->client = client; 753 opt->dev = dev; 754 755 mutex_init(&opt->lock); 756 init_waitqueue_head(&opt->result_ready_queue); 757 i2c_set_clientdata(client, iio); 758 759 ret = opt3001_read_id(opt); 760 if (ret) 761 return ret; 762 763 ret = opt3001_configure(opt); 764 if (ret) 765 return ret; 766 767 iio->name = client->name; 768 iio->channels = opt3001_channels; 769 iio->num_channels = ARRAY_SIZE(opt3001_channels); 770 iio->dev.parent = dev; 771 iio->modes = INDIO_DIRECT_MODE; 772 iio->info = &opt3001_info; 773 774 ret = devm_iio_device_register(dev, iio); 775 if (ret) { 776 dev_err(dev, "failed to register IIO device\n"); 777 return ret; 778 } 779 780 /* Make use of INT pin only if valid IRQ no. is given */ 781 if (irq > 0) { 782 ret = request_threaded_irq(irq, NULL, opt3001_irq, 783 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 784 "opt3001", iio); 785 if (ret) { 786 dev_err(dev, "failed to request IRQ #%d\n", irq); 787 return ret; 788 } 789 opt->use_irq = true; 790 } else { 791 dev_dbg(opt->dev, "enabling interrupt-less operation\n"); 792 } 793 794 return 0; 795 } 796 797 static int opt3001_remove(struct i2c_client *client) 798 { 799 struct iio_dev *iio = i2c_get_clientdata(client); 800 struct opt3001 *opt = iio_priv(iio); 801 int ret; 802 u16 reg; 803 804 if (opt->use_irq) 805 free_irq(client->irq, iio); 806 807 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 808 if (ret < 0) { 809 dev_err(opt->dev, "failed to read register %02x\n", 810 OPT3001_CONFIGURATION); 811 return ret; 812 } 813 814 reg = ret; 815 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN); 816 817 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 818 reg); 819 if (ret < 0) { 820 dev_err(opt->dev, "failed to write register %02x\n", 821 OPT3001_CONFIGURATION); 822 return ret; 823 } 824 825 return 0; 826 } 827 828 static const struct i2c_device_id opt3001_id[] = { 829 { "opt3001", 0 }, 830 { } /* Terminating Entry */ 831 }; 832 MODULE_DEVICE_TABLE(i2c, opt3001_id); 833 834 static const struct of_device_id opt3001_of_match[] = { 835 { .compatible = "ti,opt3001" }, 836 { } 837 }; 838 MODULE_DEVICE_TABLE(of, opt3001_of_match); 839 840 static struct i2c_driver opt3001_driver = { 841 .probe = opt3001_probe, 842 .remove = opt3001_remove, 843 .id_table = opt3001_id, 844 845 .driver = { 846 .name = "opt3001", 847 .of_match_table = of_match_ptr(opt3001_of_match), 848 }, 849 }; 850 851 module_i2c_driver(opt3001_driver); 852 853 MODULE_LICENSE("GPL v2"); 854 MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>"); 855 MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver"); 856