1 /** 2 * opt3001.c - Texas Instruments OPT3001 Light Sensor 3 * 4 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com 5 * 6 * Author: Andreas Dannenberg <dannenberg@ti.com> 7 * Based on previous work from: Felipe Balbi <balbi@ti.com> 8 * 9 * This program is free software: you can redistribute it and/or modify it 10 * under the terms of the GNU General Public License version 2 of the License 11 * as published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but WITHOUT 14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 16 * more details. 17 */ 18 19 #include <linux/bitops.h> 20 #include <linux/delay.h> 21 #include <linux/device.h> 22 #include <linux/i2c.h> 23 #include <linux/interrupt.h> 24 #include <linux/irq.h> 25 #include <linux/kernel.h> 26 #include <linux/module.h> 27 #include <linux/mutex.h> 28 #include <linux/slab.h> 29 #include <linux/types.h> 30 31 #include <linux/iio/events.h> 32 #include <linux/iio/iio.h> 33 #include <linux/iio/sysfs.h> 34 35 #define OPT3001_RESULT 0x00 36 #define OPT3001_CONFIGURATION 0x01 37 #define OPT3001_LOW_LIMIT 0x02 38 #define OPT3001_HIGH_LIMIT 0x03 39 #define OPT3001_MANUFACTURER_ID 0x7e 40 #define OPT3001_DEVICE_ID 0x7f 41 42 #define OPT3001_CONFIGURATION_RN_MASK (0xf << 12) 43 #define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12) 44 45 #define OPT3001_CONFIGURATION_CT BIT(11) 46 47 #define OPT3001_CONFIGURATION_M_MASK (3 << 9) 48 #define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9) 49 #define OPT3001_CONFIGURATION_M_SINGLE (1 << 9) 50 #define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */ 51 52 #define OPT3001_CONFIGURATION_OVF BIT(8) 53 #define OPT3001_CONFIGURATION_CRF BIT(7) 54 #define OPT3001_CONFIGURATION_FH BIT(6) 55 #define OPT3001_CONFIGURATION_FL BIT(5) 56 #define OPT3001_CONFIGURATION_L BIT(4) 57 #define OPT3001_CONFIGURATION_POL BIT(3) 58 #define OPT3001_CONFIGURATION_ME BIT(2) 59 60 #define OPT3001_CONFIGURATION_FC_MASK (3 << 0) 61 62 /* The end-of-conversion enable is located in the low-limit register */ 63 #define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000 64 65 #define OPT3001_REG_EXPONENT(n) ((n) >> 12) 66 #define OPT3001_REG_MANTISSA(n) ((n) & 0xfff) 67 68 #define OPT3001_INT_TIME_LONG 800000 69 #define OPT3001_INT_TIME_SHORT 100000 70 71 /* 72 * Time to wait for conversion result to be ready. The device datasheet 73 * sect. 6.5 states results are ready after total integration time plus 3ms. 74 * This results in worst-case max values of 113ms or 883ms, respectively. 75 * Add some slack to be on the safe side. 76 */ 77 #define OPT3001_RESULT_READY_SHORT 150 78 #define OPT3001_RESULT_READY_LONG 1000 79 80 struct opt3001 { 81 struct i2c_client *client; 82 struct device *dev; 83 84 struct mutex lock; 85 bool ok_to_ignore_lock; 86 bool result_ready; 87 wait_queue_head_t result_ready_queue; 88 u16 result; 89 90 u32 int_time; 91 u32 mode; 92 93 u16 high_thresh_mantissa; 94 u16 low_thresh_mantissa; 95 96 u8 high_thresh_exp; 97 u8 low_thresh_exp; 98 99 bool use_irq; 100 }; 101 102 struct opt3001_scale { 103 int val; 104 int val2; 105 }; 106 107 static const struct opt3001_scale opt3001_scales[] = { 108 { 109 .val = 40, 110 .val2 = 950000, 111 }, 112 { 113 .val = 81, 114 .val2 = 900000, 115 }, 116 { 117 .val = 163, 118 .val2 = 800000, 119 }, 120 { 121 .val = 327, 122 .val2 = 600000, 123 }, 124 { 125 .val = 655, 126 .val2 = 200000, 127 }, 128 { 129 .val = 1310, 130 .val2 = 400000, 131 }, 132 { 133 .val = 2620, 134 .val2 = 800000, 135 }, 136 { 137 .val = 5241, 138 .val2 = 600000, 139 }, 140 { 141 .val = 10483, 142 .val2 = 200000, 143 }, 144 { 145 .val = 20966, 146 .val2 = 400000, 147 }, 148 { 149 .val = 83865, 150 .val2 = 600000, 151 }, 152 }; 153 154 static int opt3001_find_scale(const struct opt3001 *opt, int val, 155 int val2, u8 *exponent) 156 { 157 int i; 158 159 for (i = 0; i < ARRAY_SIZE(opt3001_scales); i++) { 160 const struct opt3001_scale *scale = &opt3001_scales[i]; 161 162 /* 163 * Combine the integer and micro parts for comparison 164 * purposes. Use milli lux precision to avoid 32-bit integer 165 * overflows. 166 */ 167 if ((val * 1000 + val2 / 1000) <= 168 (scale->val * 1000 + scale->val2 / 1000)) { 169 *exponent = i; 170 return 0; 171 } 172 } 173 174 return -EINVAL; 175 } 176 177 static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent, 178 u16 mantissa, int *val, int *val2) 179 { 180 int lux; 181 182 lux = 10 * (mantissa << exponent); 183 *val = lux / 1000; 184 *val2 = (lux - (*val * 1000)) * 1000; 185 } 186 187 static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode) 188 { 189 *reg &= ~OPT3001_CONFIGURATION_M_MASK; 190 *reg |= mode; 191 opt->mode = mode; 192 } 193 194 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8"); 195 196 static struct attribute *opt3001_attributes[] = { 197 &iio_const_attr_integration_time_available.dev_attr.attr, 198 NULL 199 }; 200 201 static const struct attribute_group opt3001_attribute_group = { 202 .attrs = opt3001_attributes, 203 }; 204 205 static const struct iio_event_spec opt3001_event_spec[] = { 206 { 207 .type = IIO_EV_TYPE_THRESH, 208 .dir = IIO_EV_DIR_RISING, 209 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 210 BIT(IIO_EV_INFO_ENABLE), 211 }, 212 { 213 .type = IIO_EV_TYPE_THRESH, 214 .dir = IIO_EV_DIR_FALLING, 215 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 216 BIT(IIO_EV_INFO_ENABLE), 217 }, 218 }; 219 220 static const struct iio_chan_spec opt3001_channels[] = { 221 { 222 .type = IIO_LIGHT, 223 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | 224 BIT(IIO_CHAN_INFO_INT_TIME), 225 .event_spec = opt3001_event_spec, 226 .num_event_specs = ARRAY_SIZE(opt3001_event_spec), 227 }, 228 IIO_CHAN_SOFT_TIMESTAMP(1), 229 }; 230 231 static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2) 232 { 233 int ret; 234 u16 mantissa; 235 u16 reg; 236 u8 exponent; 237 u16 value; 238 long timeout; 239 240 if (opt->use_irq) { 241 /* 242 * Enable the end-of-conversion interrupt mechanism. Note that 243 * doing so will overwrite the low-level limit value however we 244 * will restore this value later on. 245 */ 246 ret = i2c_smbus_write_word_swapped(opt->client, 247 OPT3001_LOW_LIMIT, 248 OPT3001_LOW_LIMIT_EOC_ENABLE); 249 if (ret < 0) { 250 dev_err(opt->dev, "failed to write register %02x\n", 251 OPT3001_LOW_LIMIT); 252 return ret; 253 } 254 255 /* Allow IRQ to access the device despite lock being set */ 256 opt->ok_to_ignore_lock = true; 257 } 258 259 /* Reset data-ready indicator flag */ 260 opt->result_ready = false; 261 262 /* Configure for single-conversion mode and start a new conversion */ 263 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 264 if (ret < 0) { 265 dev_err(opt->dev, "failed to read register %02x\n", 266 OPT3001_CONFIGURATION); 267 goto err; 268 } 269 270 reg = ret; 271 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SINGLE); 272 273 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 274 reg); 275 if (ret < 0) { 276 dev_err(opt->dev, "failed to write register %02x\n", 277 OPT3001_CONFIGURATION); 278 goto err; 279 } 280 281 if (opt->use_irq) { 282 /* Wait for the IRQ to indicate the conversion is complete */ 283 ret = wait_event_timeout(opt->result_ready_queue, 284 opt->result_ready, 285 msecs_to_jiffies(OPT3001_RESULT_READY_LONG)); 286 } else { 287 /* Sleep for result ready time */ 288 timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ? 289 OPT3001_RESULT_READY_SHORT : OPT3001_RESULT_READY_LONG; 290 msleep(timeout); 291 292 /* Check result ready flag */ 293 ret = i2c_smbus_read_word_swapped(opt->client, 294 OPT3001_CONFIGURATION); 295 if (ret < 0) { 296 dev_err(opt->dev, "failed to read register %02x\n", 297 OPT3001_CONFIGURATION); 298 goto err; 299 } 300 301 if (!(ret & OPT3001_CONFIGURATION_CRF)) { 302 ret = -ETIMEDOUT; 303 goto err; 304 } 305 306 /* Obtain value */ 307 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT); 308 if (ret < 0) { 309 dev_err(opt->dev, "failed to read register %02x\n", 310 OPT3001_RESULT); 311 goto err; 312 } 313 opt->result = ret; 314 opt->result_ready = true; 315 } 316 317 err: 318 if (opt->use_irq) 319 /* Disallow IRQ to access the device while lock is active */ 320 opt->ok_to_ignore_lock = false; 321 322 if (ret == 0) 323 return -ETIMEDOUT; 324 else if (ret < 0) 325 return ret; 326 327 if (opt->use_irq) { 328 /* 329 * Disable the end-of-conversion interrupt mechanism by 330 * restoring the low-level limit value (clearing 331 * OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing 332 * those enable bits would affect the actual limit value due to 333 * bit-overlap and therefore can't be done. 334 */ 335 value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa; 336 ret = i2c_smbus_write_word_swapped(opt->client, 337 OPT3001_LOW_LIMIT, 338 value); 339 if (ret < 0) { 340 dev_err(opt->dev, "failed to write register %02x\n", 341 OPT3001_LOW_LIMIT); 342 return ret; 343 } 344 } 345 346 exponent = OPT3001_REG_EXPONENT(opt->result); 347 mantissa = OPT3001_REG_MANTISSA(opt->result); 348 349 opt3001_to_iio_ret(opt, exponent, mantissa, val, val2); 350 351 return IIO_VAL_INT_PLUS_MICRO; 352 } 353 354 static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2) 355 { 356 *val = 0; 357 *val2 = opt->int_time; 358 359 return IIO_VAL_INT_PLUS_MICRO; 360 } 361 362 static int opt3001_set_int_time(struct opt3001 *opt, int time) 363 { 364 int ret; 365 u16 reg; 366 367 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 368 if (ret < 0) { 369 dev_err(opt->dev, "failed to read register %02x\n", 370 OPT3001_CONFIGURATION); 371 return ret; 372 } 373 374 reg = ret; 375 376 switch (time) { 377 case OPT3001_INT_TIME_SHORT: 378 reg &= ~OPT3001_CONFIGURATION_CT; 379 opt->int_time = OPT3001_INT_TIME_SHORT; 380 break; 381 case OPT3001_INT_TIME_LONG: 382 reg |= OPT3001_CONFIGURATION_CT; 383 opt->int_time = OPT3001_INT_TIME_LONG; 384 break; 385 default: 386 return -EINVAL; 387 } 388 389 return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 390 reg); 391 } 392 393 static int opt3001_read_raw(struct iio_dev *iio, 394 struct iio_chan_spec const *chan, int *val, int *val2, 395 long mask) 396 { 397 struct opt3001 *opt = iio_priv(iio); 398 int ret; 399 400 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 401 return -EBUSY; 402 403 if (chan->type != IIO_LIGHT) 404 return -EINVAL; 405 406 mutex_lock(&opt->lock); 407 408 switch (mask) { 409 case IIO_CHAN_INFO_PROCESSED: 410 ret = opt3001_get_lux(opt, val, val2); 411 break; 412 case IIO_CHAN_INFO_INT_TIME: 413 ret = opt3001_get_int_time(opt, val, val2); 414 break; 415 default: 416 ret = -EINVAL; 417 } 418 419 mutex_unlock(&opt->lock); 420 421 return ret; 422 } 423 424 static int opt3001_write_raw(struct iio_dev *iio, 425 struct iio_chan_spec const *chan, int val, int val2, 426 long mask) 427 { 428 struct opt3001 *opt = iio_priv(iio); 429 int ret; 430 431 if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 432 return -EBUSY; 433 434 if (chan->type != IIO_LIGHT) 435 return -EINVAL; 436 437 if (mask != IIO_CHAN_INFO_INT_TIME) 438 return -EINVAL; 439 440 if (val != 0) 441 return -EINVAL; 442 443 mutex_lock(&opt->lock); 444 ret = opt3001_set_int_time(opt, val2); 445 mutex_unlock(&opt->lock); 446 447 return ret; 448 } 449 450 static int opt3001_read_event_value(struct iio_dev *iio, 451 const struct iio_chan_spec *chan, enum iio_event_type type, 452 enum iio_event_direction dir, enum iio_event_info info, 453 int *val, int *val2) 454 { 455 struct opt3001 *opt = iio_priv(iio); 456 int ret = IIO_VAL_INT_PLUS_MICRO; 457 458 mutex_lock(&opt->lock); 459 460 switch (dir) { 461 case IIO_EV_DIR_RISING: 462 opt3001_to_iio_ret(opt, opt->high_thresh_exp, 463 opt->high_thresh_mantissa, val, val2); 464 break; 465 case IIO_EV_DIR_FALLING: 466 opt3001_to_iio_ret(opt, opt->low_thresh_exp, 467 opt->low_thresh_mantissa, val, val2); 468 break; 469 default: 470 ret = -EINVAL; 471 } 472 473 mutex_unlock(&opt->lock); 474 475 return ret; 476 } 477 478 static int opt3001_write_event_value(struct iio_dev *iio, 479 const struct iio_chan_spec *chan, enum iio_event_type type, 480 enum iio_event_direction dir, enum iio_event_info info, 481 int val, int val2) 482 { 483 struct opt3001 *opt = iio_priv(iio); 484 int ret; 485 486 u16 mantissa; 487 u16 value; 488 u16 reg; 489 490 u8 exponent; 491 492 if (val < 0) 493 return -EINVAL; 494 495 mutex_lock(&opt->lock); 496 497 ret = opt3001_find_scale(opt, val, val2, &exponent); 498 if (ret < 0) { 499 dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2); 500 goto err; 501 } 502 503 mantissa = (((val * 1000) + (val2 / 1000)) / 10) >> exponent; 504 value = (exponent << 12) | mantissa; 505 506 switch (dir) { 507 case IIO_EV_DIR_RISING: 508 reg = OPT3001_HIGH_LIMIT; 509 opt->high_thresh_mantissa = mantissa; 510 opt->high_thresh_exp = exponent; 511 break; 512 case IIO_EV_DIR_FALLING: 513 reg = OPT3001_LOW_LIMIT; 514 opt->low_thresh_mantissa = mantissa; 515 opt->low_thresh_exp = exponent; 516 break; 517 default: 518 ret = -EINVAL; 519 goto err; 520 } 521 522 ret = i2c_smbus_write_word_swapped(opt->client, reg, value); 523 if (ret < 0) { 524 dev_err(opt->dev, "failed to write register %02x\n", reg); 525 goto err; 526 } 527 528 err: 529 mutex_unlock(&opt->lock); 530 531 return ret; 532 } 533 534 static int opt3001_read_event_config(struct iio_dev *iio, 535 const struct iio_chan_spec *chan, enum iio_event_type type, 536 enum iio_event_direction dir) 537 { 538 struct opt3001 *opt = iio_priv(iio); 539 540 return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS; 541 } 542 543 static int opt3001_write_event_config(struct iio_dev *iio, 544 const struct iio_chan_spec *chan, enum iio_event_type type, 545 enum iio_event_direction dir, int state) 546 { 547 struct opt3001 *opt = iio_priv(iio); 548 int ret; 549 u16 mode; 550 u16 reg; 551 552 if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 553 return 0; 554 555 if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN) 556 return 0; 557 558 mutex_lock(&opt->lock); 559 560 mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS 561 : OPT3001_CONFIGURATION_M_SHUTDOWN; 562 563 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 564 if (ret < 0) { 565 dev_err(opt->dev, "failed to read register %02x\n", 566 OPT3001_CONFIGURATION); 567 goto err; 568 } 569 570 reg = ret; 571 opt3001_set_mode(opt, ®, mode); 572 573 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 574 reg); 575 if (ret < 0) { 576 dev_err(opt->dev, "failed to write register %02x\n", 577 OPT3001_CONFIGURATION); 578 goto err; 579 } 580 581 err: 582 mutex_unlock(&opt->lock); 583 584 return ret; 585 } 586 587 static const struct iio_info opt3001_info = { 588 .attrs = &opt3001_attribute_group, 589 .read_raw = opt3001_read_raw, 590 .write_raw = opt3001_write_raw, 591 .read_event_value = opt3001_read_event_value, 592 .write_event_value = opt3001_write_event_value, 593 .read_event_config = opt3001_read_event_config, 594 .write_event_config = opt3001_write_event_config, 595 }; 596 597 static int opt3001_read_id(struct opt3001 *opt) 598 { 599 char manufacturer[2]; 600 u16 device_id; 601 int ret; 602 603 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID); 604 if (ret < 0) { 605 dev_err(opt->dev, "failed to read register %02x\n", 606 OPT3001_MANUFACTURER_ID); 607 return ret; 608 } 609 610 manufacturer[0] = ret >> 8; 611 manufacturer[1] = ret & 0xff; 612 613 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID); 614 if (ret < 0) { 615 dev_err(opt->dev, "failed to read register %02x\n", 616 OPT3001_DEVICE_ID); 617 return ret; 618 } 619 620 device_id = ret; 621 622 dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0], 623 manufacturer[1], device_id); 624 625 return 0; 626 } 627 628 static int opt3001_configure(struct opt3001 *opt) 629 { 630 int ret; 631 u16 reg; 632 633 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 634 if (ret < 0) { 635 dev_err(opt->dev, "failed to read register %02x\n", 636 OPT3001_CONFIGURATION); 637 return ret; 638 } 639 640 reg = ret; 641 642 /* Enable automatic full-scale setting mode */ 643 reg &= ~OPT3001_CONFIGURATION_RN_MASK; 644 reg |= OPT3001_CONFIGURATION_RN_AUTO; 645 646 /* Reflect status of the device's integration time setting */ 647 if (reg & OPT3001_CONFIGURATION_CT) 648 opt->int_time = OPT3001_INT_TIME_LONG; 649 else 650 opt->int_time = OPT3001_INT_TIME_SHORT; 651 652 /* Ensure device is in shutdown initially */ 653 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN); 654 655 /* Configure for latched window-style comparison operation */ 656 reg |= OPT3001_CONFIGURATION_L; 657 reg &= ~OPT3001_CONFIGURATION_POL; 658 reg &= ~OPT3001_CONFIGURATION_ME; 659 reg &= ~OPT3001_CONFIGURATION_FC_MASK; 660 661 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 662 reg); 663 if (ret < 0) { 664 dev_err(opt->dev, "failed to write register %02x\n", 665 OPT3001_CONFIGURATION); 666 return ret; 667 } 668 669 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT); 670 if (ret < 0) { 671 dev_err(opt->dev, "failed to read register %02x\n", 672 OPT3001_LOW_LIMIT); 673 return ret; 674 } 675 676 opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 677 opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret); 678 679 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT); 680 if (ret < 0) { 681 dev_err(opt->dev, "failed to read register %02x\n", 682 OPT3001_HIGH_LIMIT); 683 return ret; 684 } 685 686 opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 687 opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret); 688 689 return 0; 690 } 691 692 static irqreturn_t opt3001_irq(int irq, void *_iio) 693 { 694 struct iio_dev *iio = _iio; 695 struct opt3001 *opt = iio_priv(iio); 696 int ret; 697 698 if (!opt->ok_to_ignore_lock) 699 mutex_lock(&opt->lock); 700 701 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 702 if (ret < 0) { 703 dev_err(opt->dev, "failed to read register %02x\n", 704 OPT3001_CONFIGURATION); 705 goto out; 706 } 707 708 if ((ret & OPT3001_CONFIGURATION_M_MASK) == 709 OPT3001_CONFIGURATION_M_CONTINUOUS) { 710 if (ret & OPT3001_CONFIGURATION_FH) 711 iio_push_event(iio, 712 IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0, 713 IIO_EV_TYPE_THRESH, 714 IIO_EV_DIR_RISING), 715 iio_get_time_ns(iio)); 716 if (ret & OPT3001_CONFIGURATION_FL) 717 iio_push_event(iio, 718 IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0, 719 IIO_EV_TYPE_THRESH, 720 IIO_EV_DIR_FALLING), 721 iio_get_time_ns(iio)); 722 } else if (ret & OPT3001_CONFIGURATION_CRF) { 723 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT); 724 if (ret < 0) { 725 dev_err(opt->dev, "failed to read register %02x\n", 726 OPT3001_RESULT); 727 goto out; 728 } 729 opt->result = ret; 730 opt->result_ready = true; 731 wake_up(&opt->result_ready_queue); 732 } 733 734 out: 735 if (!opt->ok_to_ignore_lock) 736 mutex_unlock(&opt->lock); 737 738 return IRQ_HANDLED; 739 } 740 741 static int opt3001_probe(struct i2c_client *client, 742 const struct i2c_device_id *id) 743 { 744 struct device *dev = &client->dev; 745 746 struct iio_dev *iio; 747 struct opt3001 *opt; 748 int irq = client->irq; 749 int ret; 750 751 iio = devm_iio_device_alloc(dev, sizeof(*opt)); 752 if (!iio) 753 return -ENOMEM; 754 755 opt = iio_priv(iio); 756 opt->client = client; 757 opt->dev = dev; 758 759 mutex_init(&opt->lock); 760 init_waitqueue_head(&opt->result_ready_queue); 761 i2c_set_clientdata(client, iio); 762 763 ret = opt3001_read_id(opt); 764 if (ret) 765 return ret; 766 767 ret = opt3001_configure(opt); 768 if (ret) 769 return ret; 770 771 iio->name = client->name; 772 iio->channels = opt3001_channels; 773 iio->num_channels = ARRAY_SIZE(opt3001_channels); 774 iio->dev.parent = dev; 775 iio->modes = INDIO_DIRECT_MODE; 776 iio->info = &opt3001_info; 777 778 ret = devm_iio_device_register(dev, iio); 779 if (ret) { 780 dev_err(dev, "failed to register IIO device\n"); 781 return ret; 782 } 783 784 /* Make use of INT pin only if valid IRQ no. is given */ 785 if (irq > 0) { 786 ret = request_threaded_irq(irq, NULL, opt3001_irq, 787 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 788 "opt3001", iio); 789 if (ret) { 790 dev_err(dev, "failed to request IRQ #%d\n", irq); 791 return ret; 792 } 793 opt->use_irq = true; 794 } else { 795 dev_dbg(opt->dev, "enabling interrupt-less operation\n"); 796 } 797 798 return 0; 799 } 800 801 static int opt3001_remove(struct i2c_client *client) 802 { 803 struct iio_dev *iio = i2c_get_clientdata(client); 804 struct opt3001 *opt = iio_priv(iio); 805 int ret; 806 u16 reg; 807 808 if (opt->use_irq) 809 free_irq(client->irq, iio); 810 811 ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 812 if (ret < 0) { 813 dev_err(opt->dev, "failed to read register %02x\n", 814 OPT3001_CONFIGURATION); 815 return ret; 816 } 817 818 reg = ret; 819 opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN); 820 821 ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 822 reg); 823 if (ret < 0) { 824 dev_err(opt->dev, "failed to write register %02x\n", 825 OPT3001_CONFIGURATION); 826 return ret; 827 } 828 829 return 0; 830 } 831 832 static const struct i2c_device_id opt3001_id[] = { 833 { "opt3001", 0 }, 834 { } /* Terminating Entry */ 835 }; 836 MODULE_DEVICE_TABLE(i2c, opt3001_id); 837 838 static const struct of_device_id opt3001_of_match[] = { 839 { .compatible = "ti,opt3001" }, 840 { } 841 }; 842 MODULE_DEVICE_TABLE(of, opt3001_of_match); 843 844 static struct i2c_driver opt3001_driver = { 845 .probe = opt3001_probe, 846 .remove = opt3001_remove, 847 .id_table = opt3001_id, 848 849 .driver = { 850 .name = "opt3001", 851 .of_match_table = of_match_ptr(opt3001_of_match), 852 }, 853 }; 854 855 module_i2c_driver(opt3001_driver); 856 857 MODULE_LICENSE("GPL v2"); 858 MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>"); 859 MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver"); 860