xref: /openbmc/linux/drivers/iio/light/ltr501.c (revision f71a261a)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Support for Lite-On LTR501 and similar ambient light and proximity sensors.
4  *
5  * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net>
6  *
7  * 7-bit I2C slave address 0x23
8  *
9  * TODO: IR LED characteristics
10  */
11 
12 #include <linux/module.h>
13 #include <linux/i2c.h>
14 #include <linux/err.h>
15 #include <linux/delay.h>
16 #include <linux/regmap.h>
17 #include <linux/acpi.h>
18 #include <linux/regulator/consumer.h>
19 
20 #include <linux/iio/iio.h>
21 #include <linux/iio/events.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/trigger_consumer.h>
24 #include <linux/iio/buffer.h>
25 #include <linux/iio/triggered_buffer.h>
26 
27 #define LTR501_DRV_NAME "ltr501"
28 
29 #define LTR501_ALS_CONTR 0x80 /* ALS operation mode, SW reset */
30 #define LTR501_PS_CONTR 0x81 /* PS operation mode */
31 #define LTR501_PS_MEAS_RATE 0x84 /* measurement rate*/
32 #define LTR501_ALS_MEAS_RATE 0x85 /* ALS integ time, measurement rate*/
33 #define LTR501_PART_ID 0x86
34 #define LTR501_MANUFAC_ID 0x87
35 #define LTR501_ALS_DATA1 0x88 /* 16-bit, little endian */
36 #define LTR501_ALS_DATA1_UPPER 0x89 /* upper 8 bits of LTR501_ALS_DATA1 */
37 #define LTR501_ALS_DATA0 0x8a /* 16-bit, little endian */
38 #define LTR501_ALS_DATA0_UPPER 0x8b /* upper 8 bits of LTR501_ALS_DATA0 */
39 #define LTR501_ALS_PS_STATUS 0x8c
40 #define LTR501_PS_DATA 0x8d /* 16-bit, little endian */
41 #define LTR501_PS_DATA_UPPER 0x8e /* upper 8 bits of LTR501_PS_DATA */
42 #define LTR501_INTR 0x8f /* output mode, polarity, mode */
43 #define LTR501_PS_THRESH_UP 0x90 /* 11 bit, ps upper threshold */
44 #define LTR501_PS_THRESH_LOW 0x92 /* 11 bit, ps lower threshold */
45 #define LTR501_ALS_THRESH_UP 0x97 /* 16 bit, ALS upper threshold */
46 #define LTR501_ALS_THRESH_LOW 0x99 /* 16 bit, ALS lower threshold */
47 #define LTR501_INTR_PRST 0x9e /* ps thresh, als thresh */
48 #define LTR501_MAX_REG 0x9f
49 
50 #define LTR501_ALS_CONTR_SW_RESET BIT(2)
51 #define LTR501_CONTR_PS_GAIN_MASK (BIT(3) | BIT(2))
52 #define LTR501_CONTR_PS_GAIN_SHIFT 2
53 #define LTR501_CONTR_ALS_GAIN_MASK BIT(3)
54 #define LTR501_CONTR_ACTIVE BIT(1)
55 
56 #define LTR501_STATUS_ALS_INTR BIT(3)
57 #define LTR501_STATUS_ALS_RDY BIT(2)
58 #define LTR501_STATUS_PS_INTR BIT(1)
59 #define LTR501_STATUS_PS_RDY BIT(0)
60 
61 #define LTR501_PS_DATA_MASK 0x7ff
62 #define LTR501_PS_THRESH_MASK 0x7ff
63 #define LTR501_ALS_THRESH_MASK 0xffff
64 
65 #define LTR501_ALS_DEF_PERIOD 500000
66 #define LTR501_PS_DEF_PERIOD 100000
67 
68 #define LTR501_REGMAP_NAME "ltr501_regmap"
69 
70 #define LTR501_LUX_CONV(vis_coeff, vis_data, ir_coeff, ir_data) \
71 			((vis_coeff * vis_data) - (ir_coeff * ir_data))
72 
73 static const int int_time_mapping[] = {100000, 50000, 200000, 400000};
74 
75 static const struct reg_field reg_field_it =
76 				REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4);
77 static const struct reg_field reg_field_als_intr =
78 				REG_FIELD(LTR501_INTR, 1, 1);
79 static const struct reg_field reg_field_ps_intr =
80 				REG_FIELD(LTR501_INTR, 0, 0);
81 static const struct reg_field reg_field_als_rate =
82 				REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2);
83 static const struct reg_field reg_field_ps_rate =
84 				REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3);
85 static const struct reg_field reg_field_als_prst =
86 				REG_FIELD(LTR501_INTR_PRST, 0, 3);
87 static const struct reg_field reg_field_ps_prst =
88 				REG_FIELD(LTR501_INTR_PRST, 4, 7);
89 
90 struct ltr501_samp_table {
91 	int freq_val;  /* repetition frequency in micro HZ*/
92 	int time_val; /* repetition rate in micro seconds */
93 };
94 
95 #define LTR501_RESERVED_GAIN -1
96 
97 enum {
98 	ltr501 = 0,
99 	ltr559,
100 	ltr301,
101 	ltr303,
102 };
103 
104 struct ltr501_gain {
105 	int scale;
106 	int uscale;
107 };
108 
109 static const struct ltr501_gain ltr501_als_gain_tbl[] = {
110 	{1, 0},
111 	{0, 5000},
112 };
113 
114 static const struct ltr501_gain ltr559_als_gain_tbl[] = {
115 	{1, 0},
116 	{0, 500000},
117 	{0, 250000},
118 	{0, 125000},
119 	{LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
120 	{LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN},
121 	{0, 20000},
122 	{0, 10000},
123 };
124 
125 static const struct ltr501_gain ltr501_ps_gain_tbl[] = {
126 	{1, 0},
127 	{0, 250000},
128 	{0, 125000},
129 	{0, 62500},
130 };
131 
132 static const struct ltr501_gain ltr559_ps_gain_tbl[] = {
133 	{0, 62500}, /* x16 gain */
134 	{0, 31250}, /* x32 gain */
135 	{0, 15625}, /* bits X1 are for x64 gain */
136 	{0, 15624},
137 };
138 
139 struct ltr501_chip_info {
140 	u8 partid;
141 	const struct ltr501_gain *als_gain;
142 	int als_gain_tbl_size;
143 	const struct ltr501_gain *ps_gain;
144 	int ps_gain_tbl_size;
145 	u8 als_mode_active;
146 	u8 als_gain_mask;
147 	u8 als_gain_shift;
148 	struct iio_chan_spec const *channels;
149 	const int no_channels;
150 	const struct iio_info *info;
151 	const struct iio_info *info_no_irq;
152 };
153 
154 struct ltr501_data {
155 	struct i2c_client *client;
156 	struct regulator_bulk_data regulators[2];
157 	struct mutex lock_als, lock_ps;
158 	const struct ltr501_chip_info *chip_info;
159 	u8 als_contr, ps_contr;
160 	int als_period, ps_period; /* period in micro seconds */
161 	struct regmap *regmap;
162 	struct regmap_field *reg_it;
163 	struct regmap_field *reg_als_intr;
164 	struct regmap_field *reg_ps_intr;
165 	struct regmap_field *reg_als_rate;
166 	struct regmap_field *reg_ps_rate;
167 	struct regmap_field *reg_als_prst;
168 	struct regmap_field *reg_ps_prst;
169 	uint32_t near_level;
170 };
171 
172 static const struct ltr501_samp_table ltr501_als_samp_table[] = {
173 			{20000000, 50000}, {10000000, 100000},
174 			{5000000, 200000}, {2000000, 500000},
175 			{1000000, 1000000}, {500000, 2000000},
176 			{500000, 2000000}, {500000, 2000000}
177 };
178 
179 static const struct ltr501_samp_table ltr501_ps_samp_table[] = {
180 			{20000000, 50000}, {14285714, 70000},
181 			{10000000, 100000}, {5000000, 200000},
182 			{2000000, 500000}, {1000000, 1000000},
183 			{500000, 2000000}, {500000, 2000000},
184 			{500000, 2000000}
185 };
186 
187 static int ltr501_match_samp_freq(const struct ltr501_samp_table *tab,
188 					   int len, int val, int val2)
189 {
190 	int i, freq;
191 
192 	freq = val * 1000000 + val2;
193 
194 	for (i = 0; i < len; i++) {
195 		if (tab[i].freq_val == freq)
196 			return i;
197 	}
198 
199 	return -EINVAL;
200 }
201 
202 static int ltr501_als_read_samp_freq(const struct ltr501_data *data,
203 				     int *val, int *val2)
204 {
205 	int ret, i;
206 
207 	ret = regmap_field_read(data->reg_als_rate, &i);
208 	if (ret < 0)
209 		return ret;
210 
211 	if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
212 		return -EINVAL;
213 
214 	*val = ltr501_als_samp_table[i].freq_val / 1000000;
215 	*val2 = ltr501_als_samp_table[i].freq_val % 1000000;
216 
217 	return IIO_VAL_INT_PLUS_MICRO;
218 }
219 
220 static int ltr501_ps_read_samp_freq(const struct ltr501_data *data,
221 				    int *val, int *val2)
222 {
223 	int ret, i;
224 
225 	ret = regmap_field_read(data->reg_ps_rate, &i);
226 	if (ret < 0)
227 		return ret;
228 
229 	if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
230 		return -EINVAL;
231 
232 	*val = ltr501_ps_samp_table[i].freq_val / 1000000;
233 	*val2 = ltr501_ps_samp_table[i].freq_val % 1000000;
234 
235 	return IIO_VAL_INT_PLUS_MICRO;
236 }
237 
238 static int ltr501_als_write_samp_freq(struct ltr501_data *data,
239 				      int val, int val2)
240 {
241 	int i, ret;
242 
243 	i = ltr501_match_samp_freq(ltr501_als_samp_table,
244 				   ARRAY_SIZE(ltr501_als_samp_table),
245 				   val, val2);
246 
247 	if (i < 0)
248 		return i;
249 
250 	mutex_lock(&data->lock_als);
251 	ret = regmap_field_write(data->reg_als_rate, i);
252 	mutex_unlock(&data->lock_als);
253 
254 	return ret;
255 }
256 
257 static int ltr501_ps_write_samp_freq(struct ltr501_data *data,
258 				     int val, int val2)
259 {
260 	int i, ret;
261 
262 	i = ltr501_match_samp_freq(ltr501_ps_samp_table,
263 				   ARRAY_SIZE(ltr501_ps_samp_table),
264 				   val, val2);
265 
266 	if (i < 0)
267 		return i;
268 
269 	mutex_lock(&data->lock_ps);
270 	ret = regmap_field_write(data->reg_ps_rate, i);
271 	mutex_unlock(&data->lock_ps);
272 
273 	return ret;
274 }
275 
276 static int ltr501_als_read_samp_period(const struct ltr501_data *data, int *val)
277 {
278 	int ret, i;
279 
280 	ret = regmap_field_read(data->reg_als_rate, &i);
281 	if (ret < 0)
282 		return ret;
283 
284 	if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table))
285 		return -EINVAL;
286 
287 	*val = ltr501_als_samp_table[i].time_val;
288 
289 	return IIO_VAL_INT;
290 }
291 
292 static int ltr501_ps_read_samp_period(const struct ltr501_data *data, int *val)
293 {
294 	int ret, i;
295 
296 	ret = regmap_field_read(data->reg_ps_rate, &i);
297 	if (ret < 0)
298 		return ret;
299 
300 	if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table))
301 		return -EINVAL;
302 
303 	*val = ltr501_ps_samp_table[i].time_val;
304 
305 	return IIO_VAL_INT;
306 }
307 
308 /* IR and visible spectrum coeff's are given in data sheet */
309 static unsigned long ltr501_calculate_lux(u16 vis_data, u16 ir_data)
310 {
311 	unsigned long ratio, lux;
312 
313 	if (vis_data == 0)
314 		return 0;
315 
316 	/* multiply numerator by 100 to avoid handling ratio < 1 */
317 	ratio = DIV_ROUND_UP(ir_data * 100, ir_data + vis_data);
318 
319 	if (ratio < 45)
320 		lux = LTR501_LUX_CONV(1774, vis_data, -1105, ir_data);
321 	else if (ratio >= 45 && ratio < 64)
322 		lux = LTR501_LUX_CONV(3772, vis_data, 1336, ir_data);
323 	else if (ratio >= 64 && ratio < 85)
324 		lux = LTR501_LUX_CONV(1690, vis_data, 169, ir_data);
325 	else
326 		lux = 0;
327 
328 	return lux / 1000;
329 }
330 
331 static int ltr501_drdy(const struct ltr501_data *data, u8 drdy_mask)
332 {
333 	int tries = 100;
334 	int ret, status;
335 
336 	while (tries--) {
337 		ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
338 		if (ret < 0)
339 			return ret;
340 		if ((status & drdy_mask) == drdy_mask)
341 			return 0;
342 		msleep(25);
343 	}
344 
345 	dev_err(&data->client->dev, "ltr501_drdy() failed, data not ready\n");
346 	return -EIO;
347 }
348 
349 static int ltr501_set_it_time(struct ltr501_data *data, int it)
350 {
351 	int ret, i, index = -1, status;
352 
353 	for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) {
354 		if (int_time_mapping[i] == it) {
355 			index = i;
356 			break;
357 		}
358 	}
359 	/* Make sure integ time index is valid */
360 	if (index < 0)
361 		return -EINVAL;
362 
363 	ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
364 	if (ret < 0)
365 		return ret;
366 
367 	if (status & LTR501_CONTR_ALS_GAIN_MASK) {
368 		/*
369 		 * 200 ms and 400 ms integ time can only be
370 		 * used in dynamic range 1
371 		 */
372 		if (index > 1)
373 			return -EINVAL;
374 	} else
375 		/* 50 ms integ time can only be used in dynamic range 2 */
376 		if (index == 1)
377 			return -EINVAL;
378 
379 	return regmap_field_write(data->reg_it, index);
380 }
381 
382 /* read int time in micro seconds */
383 static int ltr501_read_it_time(const struct ltr501_data *data,
384 			       int *val, int *val2)
385 {
386 	int ret, index;
387 
388 	ret = regmap_field_read(data->reg_it, &index);
389 	if (ret < 0)
390 		return ret;
391 
392 	/* Make sure integ time index is valid */
393 	if (index < 0 || index >= ARRAY_SIZE(int_time_mapping))
394 		return -EINVAL;
395 
396 	*val2 = int_time_mapping[index];
397 	*val = 0;
398 
399 	return IIO_VAL_INT_PLUS_MICRO;
400 }
401 
402 static int ltr501_read_als(const struct ltr501_data *data, __le16 buf[2])
403 {
404 	int ret;
405 
406 	ret = ltr501_drdy(data, LTR501_STATUS_ALS_RDY);
407 	if (ret < 0)
408 		return ret;
409 	/* always read both ALS channels in given order */
410 	return regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
411 				buf, 2 * sizeof(__le16));
412 }
413 
414 static int ltr501_read_ps(const struct ltr501_data *data)
415 {
416 	__le16 status;
417 	int ret;
418 
419 	ret = ltr501_drdy(data, LTR501_STATUS_PS_RDY);
420 	if (ret < 0)
421 		return ret;
422 
423 	ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
424 			       &status, sizeof(status));
425 	if (ret < 0)
426 		return ret;
427 
428 	return le16_to_cpu(status);
429 }
430 
431 static int ltr501_read_intr_prst(const struct ltr501_data *data,
432 				 enum iio_chan_type type,
433 				 int *val2)
434 {
435 	int ret, samp_period, prst;
436 
437 	switch (type) {
438 	case IIO_INTENSITY:
439 		ret = regmap_field_read(data->reg_als_prst, &prst);
440 		if (ret < 0)
441 			return ret;
442 
443 		ret = ltr501_als_read_samp_period(data, &samp_period);
444 
445 		if (ret < 0)
446 			return ret;
447 		*val2 = samp_period * prst;
448 		return IIO_VAL_INT_PLUS_MICRO;
449 	case IIO_PROXIMITY:
450 		ret = regmap_field_read(data->reg_ps_prst, &prst);
451 		if (ret < 0)
452 			return ret;
453 
454 		ret = ltr501_ps_read_samp_period(data, &samp_period);
455 
456 		if (ret < 0)
457 			return ret;
458 
459 		*val2 = samp_period * prst;
460 		return IIO_VAL_INT_PLUS_MICRO;
461 	default:
462 		return -EINVAL;
463 	}
464 
465 	return -EINVAL;
466 }
467 
468 static int ltr501_write_intr_prst(struct ltr501_data *data,
469 				  enum iio_chan_type type,
470 				  int val, int val2)
471 {
472 	int ret, samp_period, new_val;
473 	unsigned long period;
474 
475 	if (val < 0 || val2 < 0)
476 		return -EINVAL;
477 
478 	/* period in microseconds */
479 	period = ((val * 1000000) + val2);
480 
481 	switch (type) {
482 	case IIO_INTENSITY:
483 		ret = ltr501_als_read_samp_period(data, &samp_period);
484 		if (ret < 0)
485 			return ret;
486 
487 		/* period should be atleast equal to sampling period */
488 		if (period < samp_period)
489 			return -EINVAL;
490 
491 		new_val = DIV_ROUND_UP(period, samp_period);
492 		if (new_val < 0 || new_val > 0x0f)
493 			return -EINVAL;
494 
495 		mutex_lock(&data->lock_als);
496 		ret = regmap_field_write(data->reg_als_prst, new_val);
497 		mutex_unlock(&data->lock_als);
498 		if (ret >= 0)
499 			data->als_period = period;
500 
501 		return ret;
502 	case IIO_PROXIMITY:
503 		ret = ltr501_ps_read_samp_period(data, &samp_period);
504 		if (ret < 0)
505 			return ret;
506 
507 		/* period should be atleast equal to rate */
508 		if (period < samp_period)
509 			return -EINVAL;
510 
511 		new_val = DIV_ROUND_UP(period, samp_period);
512 		if (new_val < 0 || new_val > 0x0f)
513 			return -EINVAL;
514 
515 		mutex_lock(&data->lock_ps);
516 		ret = regmap_field_write(data->reg_ps_prst, new_val);
517 		mutex_unlock(&data->lock_ps);
518 		if (ret >= 0)
519 			data->ps_period = period;
520 
521 		return ret;
522 	default:
523 		return -EINVAL;
524 	}
525 
526 	return -EINVAL;
527 }
528 
529 static ssize_t ltr501_read_near_level(struct iio_dev *indio_dev,
530 				      uintptr_t priv,
531 				      const struct iio_chan_spec *chan,
532 				      char *buf)
533 {
534 	struct ltr501_data *data = iio_priv(indio_dev);
535 
536 	return sprintf(buf, "%u\n", data->near_level);
537 }
538 
539 static const struct iio_chan_spec_ext_info ltr501_ext_info[] = {
540 	{
541 		.name = "nearlevel",
542 		.shared = IIO_SEPARATE,
543 		.read = ltr501_read_near_level,
544 	},
545 	{ /* sentinel */ }
546 };
547 
548 static const struct iio_event_spec ltr501_als_event_spec[] = {
549 	{
550 		.type = IIO_EV_TYPE_THRESH,
551 		.dir = IIO_EV_DIR_RISING,
552 		.mask_separate = BIT(IIO_EV_INFO_VALUE),
553 	}, {
554 		.type = IIO_EV_TYPE_THRESH,
555 		.dir = IIO_EV_DIR_FALLING,
556 		.mask_separate = BIT(IIO_EV_INFO_VALUE),
557 	}, {
558 		.type = IIO_EV_TYPE_THRESH,
559 		.dir = IIO_EV_DIR_EITHER,
560 		.mask_separate = BIT(IIO_EV_INFO_ENABLE) |
561 				 BIT(IIO_EV_INFO_PERIOD),
562 	},
563 
564 };
565 
566 static const struct iio_event_spec ltr501_pxs_event_spec[] = {
567 	{
568 		.type = IIO_EV_TYPE_THRESH,
569 		.dir = IIO_EV_DIR_RISING,
570 		.mask_separate = BIT(IIO_EV_INFO_VALUE),
571 	}, {
572 		.type = IIO_EV_TYPE_THRESH,
573 		.dir = IIO_EV_DIR_FALLING,
574 		.mask_separate = BIT(IIO_EV_INFO_VALUE),
575 	}, {
576 		.type = IIO_EV_TYPE_THRESH,
577 		.dir = IIO_EV_DIR_EITHER,
578 		.mask_separate = BIT(IIO_EV_INFO_ENABLE) |
579 				 BIT(IIO_EV_INFO_PERIOD),
580 	},
581 };
582 
583 #define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \
584 				 _evspec, _evsize) { \
585 	.type = IIO_INTENSITY, \
586 	.modified = 1, \
587 	.address = (_addr), \
588 	.channel2 = (_mod), \
589 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
590 	.info_mask_shared_by_type = (_shared), \
591 	.scan_index = (_idx), \
592 	.scan_type = { \
593 		.sign = 'u', \
594 		.realbits = 16, \
595 		.storagebits = 16, \
596 		.endianness = IIO_CPU, \
597 	}, \
598 	.event_spec = _evspec,\
599 	.num_event_specs = _evsize,\
600 }
601 
602 #define LTR501_LIGHT_CHANNEL() { \
603 	.type = IIO_LIGHT, \
604 	.info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \
605 	.scan_index = -1, \
606 }
607 
608 static const struct iio_chan_spec ltr501_channels[] = {
609 	LTR501_LIGHT_CHANNEL(),
610 	LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
611 				 ltr501_als_event_spec,
612 				 ARRAY_SIZE(ltr501_als_event_spec)),
613 	LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
614 				 BIT(IIO_CHAN_INFO_SCALE) |
615 				 BIT(IIO_CHAN_INFO_INT_TIME) |
616 				 BIT(IIO_CHAN_INFO_SAMP_FREQ),
617 				 NULL, 0),
618 	{
619 		.type = IIO_PROXIMITY,
620 		.address = LTR501_PS_DATA,
621 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
622 			BIT(IIO_CHAN_INFO_SCALE),
623 		.scan_index = 2,
624 		.scan_type = {
625 			.sign = 'u',
626 			.realbits = 11,
627 			.storagebits = 16,
628 			.endianness = IIO_CPU,
629 		},
630 		.event_spec = ltr501_pxs_event_spec,
631 		.num_event_specs = ARRAY_SIZE(ltr501_pxs_event_spec),
632 		.ext_info = ltr501_ext_info,
633 	},
634 	IIO_CHAN_SOFT_TIMESTAMP(3),
635 };
636 
637 static const struct iio_chan_spec ltr301_channels[] = {
638 	LTR501_LIGHT_CHANNEL(),
639 	LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0,
640 				 ltr501_als_event_spec,
641 				 ARRAY_SIZE(ltr501_als_event_spec)),
642 	LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR,
643 				 BIT(IIO_CHAN_INFO_SCALE) |
644 				 BIT(IIO_CHAN_INFO_INT_TIME) |
645 				 BIT(IIO_CHAN_INFO_SAMP_FREQ),
646 				 NULL, 0),
647 	IIO_CHAN_SOFT_TIMESTAMP(2),
648 };
649 
650 static int ltr501_read_raw(struct iio_dev *indio_dev,
651 			   struct iio_chan_spec const *chan,
652 			   int *val, int *val2, long mask)
653 {
654 	struct ltr501_data *data = iio_priv(indio_dev);
655 	__le16 buf[2];
656 	int ret, i;
657 
658 	switch (mask) {
659 	case IIO_CHAN_INFO_PROCESSED:
660 		switch (chan->type) {
661 		case IIO_LIGHT:
662 			ret = iio_device_claim_direct_mode(indio_dev);
663 			if (ret)
664 				return ret;
665 
666 			mutex_lock(&data->lock_als);
667 			ret = ltr501_read_als(data, buf);
668 			mutex_unlock(&data->lock_als);
669 			iio_device_release_direct_mode(indio_dev);
670 			if (ret < 0)
671 				return ret;
672 			*val = ltr501_calculate_lux(le16_to_cpu(buf[1]),
673 						    le16_to_cpu(buf[0]));
674 			return IIO_VAL_INT;
675 		default:
676 			return -EINVAL;
677 		}
678 	case IIO_CHAN_INFO_RAW:
679 		ret = iio_device_claim_direct_mode(indio_dev);
680 		if (ret)
681 			return ret;
682 
683 		switch (chan->type) {
684 		case IIO_INTENSITY:
685 			mutex_lock(&data->lock_als);
686 			ret = ltr501_read_als(data, buf);
687 			mutex_unlock(&data->lock_als);
688 			if (ret < 0)
689 				break;
690 			*val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ?
691 					   buf[0] : buf[1]);
692 			ret = IIO_VAL_INT;
693 			break;
694 		case IIO_PROXIMITY:
695 			mutex_lock(&data->lock_ps);
696 			ret = ltr501_read_ps(data);
697 			mutex_unlock(&data->lock_ps);
698 			if (ret < 0)
699 				break;
700 			*val = ret & LTR501_PS_DATA_MASK;
701 			ret = IIO_VAL_INT;
702 			break;
703 		default:
704 			ret = -EINVAL;
705 			break;
706 		}
707 
708 		iio_device_release_direct_mode(indio_dev);
709 		return ret;
710 
711 	case IIO_CHAN_INFO_SCALE:
712 		switch (chan->type) {
713 		case IIO_INTENSITY:
714 			i = (data->als_contr & data->chip_info->als_gain_mask)
715 			     >> data->chip_info->als_gain_shift;
716 			*val = data->chip_info->als_gain[i].scale;
717 			*val2 = data->chip_info->als_gain[i].uscale;
718 			return IIO_VAL_INT_PLUS_MICRO;
719 		case IIO_PROXIMITY:
720 			i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >>
721 				LTR501_CONTR_PS_GAIN_SHIFT;
722 			*val = data->chip_info->ps_gain[i].scale;
723 			*val2 = data->chip_info->ps_gain[i].uscale;
724 			return IIO_VAL_INT_PLUS_MICRO;
725 		default:
726 			return -EINVAL;
727 		}
728 	case IIO_CHAN_INFO_INT_TIME:
729 		switch (chan->type) {
730 		case IIO_INTENSITY:
731 			return ltr501_read_it_time(data, val, val2);
732 		default:
733 			return -EINVAL;
734 		}
735 	case IIO_CHAN_INFO_SAMP_FREQ:
736 		switch (chan->type) {
737 		case IIO_INTENSITY:
738 			return ltr501_als_read_samp_freq(data, val, val2);
739 		case IIO_PROXIMITY:
740 			return ltr501_ps_read_samp_freq(data, val, val2);
741 		default:
742 			return -EINVAL;
743 		}
744 	}
745 	return -EINVAL;
746 }
747 
748 static int ltr501_get_gain_index(const struct ltr501_gain *gain, int size,
749 				 int val, int val2)
750 {
751 	int i;
752 
753 	for (i = 0; i < size; i++)
754 		if (val == gain[i].scale && val2 == gain[i].uscale)
755 			return i;
756 
757 	return -1;
758 }
759 
760 static int ltr501_write_raw(struct iio_dev *indio_dev,
761 			    struct iio_chan_spec const *chan,
762 			    int val, int val2, long mask)
763 {
764 	struct ltr501_data *data = iio_priv(indio_dev);
765 	int i, ret, freq_val, freq_val2;
766 	const struct ltr501_chip_info *info = data->chip_info;
767 
768 	ret = iio_device_claim_direct_mode(indio_dev);
769 	if (ret)
770 		return ret;
771 
772 	switch (mask) {
773 	case IIO_CHAN_INFO_SCALE:
774 		switch (chan->type) {
775 		case IIO_INTENSITY:
776 			i = ltr501_get_gain_index(info->als_gain,
777 						  info->als_gain_tbl_size,
778 						  val, val2);
779 			if (i < 0) {
780 				ret = -EINVAL;
781 				break;
782 			}
783 
784 			data->als_contr &= ~info->als_gain_mask;
785 			data->als_contr |= i << info->als_gain_shift;
786 
787 			ret = regmap_write(data->regmap, LTR501_ALS_CONTR,
788 					   data->als_contr);
789 			break;
790 		case IIO_PROXIMITY:
791 			i = ltr501_get_gain_index(info->ps_gain,
792 						  info->ps_gain_tbl_size,
793 						  val, val2);
794 			if (i < 0) {
795 				ret = -EINVAL;
796 				break;
797 			}
798 			data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK;
799 			data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT;
800 
801 			ret = regmap_write(data->regmap, LTR501_PS_CONTR,
802 					   data->ps_contr);
803 			break;
804 		default:
805 			ret = -EINVAL;
806 			break;
807 		}
808 		break;
809 
810 	case IIO_CHAN_INFO_INT_TIME:
811 		switch (chan->type) {
812 		case IIO_INTENSITY:
813 			if (val != 0) {
814 				ret = -EINVAL;
815 				break;
816 			}
817 			mutex_lock(&data->lock_als);
818 			ret = ltr501_set_it_time(data, val2);
819 			mutex_unlock(&data->lock_als);
820 			break;
821 		default:
822 			ret = -EINVAL;
823 			break;
824 		}
825 		break;
826 
827 	case IIO_CHAN_INFO_SAMP_FREQ:
828 		switch (chan->type) {
829 		case IIO_INTENSITY:
830 			ret = ltr501_als_read_samp_freq(data, &freq_val,
831 							&freq_val2);
832 			if (ret < 0)
833 				break;
834 
835 			ret = ltr501_als_write_samp_freq(data, val, val2);
836 			if (ret < 0)
837 				break;
838 
839 			/* update persistence count when changing frequency */
840 			ret = ltr501_write_intr_prst(data, chan->type,
841 						     0, data->als_period);
842 
843 			if (ret < 0)
844 				ret = ltr501_als_write_samp_freq(data, freq_val,
845 								 freq_val2);
846 			break;
847 		case IIO_PROXIMITY:
848 			ret = ltr501_ps_read_samp_freq(data, &freq_val,
849 						       &freq_val2);
850 			if (ret < 0)
851 				break;
852 
853 			ret = ltr501_ps_write_samp_freq(data, val, val2);
854 			if (ret < 0)
855 				break;
856 
857 			/* update persistence count when changing frequency */
858 			ret = ltr501_write_intr_prst(data, chan->type,
859 						     0, data->ps_period);
860 
861 			if (ret < 0)
862 				ret = ltr501_ps_write_samp_freq(data, freq_val,
863 								freq_val2);
864 			break;
865 		default:
866 			ret = -EINVAL;
867 			break;
868 		}
869 		break;
870 
871 	default:
872 		ret = -EINVAL;
873 		break;
874 	}
875 
876 	iio_device_release_direct_mode(indio_dev);
877 	return ret;
878 }
879 
880 static int ltr501_read_thresh(const struct iio_dev *indio_dev,
881 			      const struct iio_chan_spec *chan,
882 			      enum iio_event_type type,
883 			      enum iio_event_direction dir,
884 			      enum iio_event_info info,
885 			      int *val, int *val2)
886 {
887 	const struct ltr501_data *data = iio_priv(indio_dev);
888 	int ret, thresh_data;
889 
890 	switch (chan->type) {
891 	case IIO_INTENSITY:
892 		switch (dir) {
893 		case IIO_EV_DIR_RISING:
894 			ret = regmap_bulk_read(data->regmap,
895 					       LTR501_ALS_THRESH_UP,
896 					       &thresh_data, 2);
897 			if (ret < 0)
898 				return ret;
899 			*val = thresh_data & LTR501_ALS_THRESH_MASK;
900 			return IIO_VAL_INT;
901 		case IIO_EV_DIR_FALLING:
902 			ret = regmap_bulk_read(data->regmap,
903 					       LTR501_ALS_THRESH_LOW,
904 					       &thresh_data, 2);
905 			if (ret < 0)
906 				return ret;
907 			*val = thresh_data & LTR501_ALS_THRESH_MASK;
908 			return IIO_VAL_INT;
909 		default:
910 			return -EINVAL;
911 		}
912 	case IIO_PROXIMITY:
913 		switch (dir) {
914 		case IIO_EV_DIR_RISING:
915 			ret = regmap_bulk_read(data->regmap,
916 					       LTR501_PS_THRESH_UP,
917 					       &thresh_data, 2);
918 			if (ret < 0)
919 				return ret;
920 			*val = thresh_data & LTR501_PS_THRESH_MASK;
921 			return IIO_VAL_INT;
922 		case IIO_EV_DIR_FALLING:
923 			ret = regmap_bulk_read(data->regmap,
924 					       LTR501_PS_THRESH_LOW,
925 					       &thresh_data, 2);
926 			if (ret < 0)
927 				return ret;
928 			*val = thresh_data & LTR501_PS_THRESH_MASK;
929 			return IIO_VAL_INT;
930 		default:
931 			return -EINVAL;
932 		}
933 	default:
934 		return -EINVAL;
935 	}
936 
937 	return -EINVAL;
938 }
939 
940 static int ltr501_write_thresh(struct iio_dev *indio_dev,
941 			       const struct iio_chan_spec *chan,
942 			       enum iio_event_type type,
943 			       enum iio_event_direction dir,
944 			       enum iio_event_info info,
945 			       int val, int val2)
946 {
947 	struct ltr501_data *data = iio_priv(indio_dev);
948 	int ret;
949 
950 	if (val < 0)
951 		return -EINVAL;
952 
953 	switch (chan->type) {
954 	case IIO_INTENSITY:
955 		if (val > LTR501_ALS_THRESH_MASK)
956 			return -EINVAL;
957 		switch (dir) {
958 		case IIO_EV_DIR_RISING:
959 			mutex_lock(&data->lock_als);
960 			ret = regmap_bulk_write(data->regmap,
961 						LTR501_ALS_THRESH_UP,
962 						&val, 2);
963 			mutex_unlock(&data->lock_als);
964 			return ret;
965 		case IIO_EV_DIR_FALLING:
966 			mutex_lock(&data->lock_als);
967 			ret = regmap_bulk_write(data->regmap,
968 						LTR501_ALS_THRESH_LOW,
969 						&val, 2);
970 			mutex_unlock(&data->lock_als);
971 			return ret;
972 		default:
973 			return -EINVAL;
974 		}
975 	case IIO_PROXIMITY:
976 		if (val > LTR501_PS_THRESH_MASK)
977 			return -EINVAL;
978 		switch (dir) {
979 		case IIO_EV_DIR_RISING:
980 			mutex_lock(&data->lock_ps);
981 			ret = regmap_bulk_write(data->regmap,
982 						LTR501_PS_THRESH_UP,
983 						&val, 2);
984 			mutex_unlock(&data->lock_ps);
985 			return ret;
986 		case IIO_EV_DIR_FALLING:
987 			mutex_lock(&data->lock_ps);
988 			ret = regmap_bulk_write(data->regmap,
989 						LTR501_PS_THRESH_LOW,
990 						&val, 2);
991 			mutex_unlock(&data->lock_ps);
992 			return ret;
993 		default:
994 			return -EINVAL;
995 		}
996 	default:
997 		return -EINVAL;
998 	}
999 
1000 	return -EINVAL;
1001 }
1002 
1003 static int ltr501_read_event(struct iio_dev *indio_dev,
1004 			     const struct iio_chan_spec *chan,
1005 			     enum iio_event_type type,
1006 			     enum iio_event_direction dir,
1007 			     enum iio_event_info info,
1008 			     int *val, int *val2)
1009 {
1010 	int ret;
1011 
1012 	switch (info) {
1013 	case IIO_EV_INFO_VALUE:
1014 		return ltr501_read_thresh(indio_dev, chan, type, dir,
1015 					  info, val, val2);
1016 	case IIO_EV_INFO_PERIOD:
1017 		ret = ltr501_read_intr_prst(iio_priv(indio_dev),
1018 					    chan->type, val2);
1019 		*val = *val2 / 1000000;
1020 		*val2 = *val2 % 1000000;
1021 		return ret;
1022 	default:
1023 		return -EINVAL;
1024 	}
1025 
1026 	return -EINVAL;
1027 }
1028 
1029 static int ltr501_write_event(struct iio_dev *indio_dev,
1030 			      const struct iio_chan_spec *chan,
1031 			      enum iio_event_type type,
1032 			      enum iio_event_direction dir,
1033 			      enum iio_event_info info,
1034 			      int val, int val2)
1035 {
1036 	switch (info) {
1037 	case IIO_EV_INFO_VALUE:
1038 		if (val2 != 0)
1039 			return -EINVAL;
1040 		return ltr501_write_thresh(indio_dev, chan, type, dir,
1041 					   info, val, val2);
1042 	case IIO_EV_INFO_PERIOD:
1043 		return ltr501_write_intr_prst(iio_priv(indio_dev), chan->type,
1044 					      val, val2);
1045 	default:
1046 		return -EINVAL;
1047 	}
1048 
1049 	return -EINVAL;
1050 }
1051 
1052 static int ltr501_read_event_config(struct iio_dev *indio_dev,
1053 				    const struct iio_chan_spec *chan,
1054 				    enum iio_event_type type,
1055 				    enum iio_event_direction dir)
1056 {
1057 	struct ltr501_data *data = iio_priv(indio_dev);
1058 	int ret, status;
1059 
1060 	switch (chan->type) {
1061 	case IIO_INTENSITY:
1062 		ret = regmap_field_read(data->reg_als_intr, &status);
1063 		if (ret < 0)
1064 			return ret;
1065 		return status;
1066 	case IIO_PROXIMITY:
1067 		ret = regmap_field_read(data->reg_ps_intr, &status);
1068 		if (ret < 0)
1069 			return ret;
1070 		return status;
1071 	default:
1072 		return -EINVAL;
1073 	}
1074 
1075 	return -EINVAL;
1076 }
1077 
1078 static int ltr501_write_event_config(struct iio_dev *indio_dev,
1079 				     const struct iio_chan_spec *chan,
1080 				     enum iio_event_type type,
1081 				     enum iio_event_direction dir, int state)
1082 {
1083 	struct ltr501_data *data = iio_priv(indio_dev);
1084 	int ret;
1085 
1086 	/* only 1 and 0 are valid inputs */
1087 	if (state != 1  && state != 0)
1088 		return -EINVAL;
1089 
1090 	switch (chan->type) {
1091 	case IIO_INTENSITY:
1092 		mutex_lock(&data->lock_als);
1093 		ret = regmap_field_write(data->reg_als_intr, state);
1094 		mutex_unlock(&data->lock_als);
1095 		return ret;
1096 	case IIO_PROXIMITY:
1097 		mutex_lock(&data->lock_ps);
1098 		ret = regmap_field_write(data->reg_ps_intr, state);
1099 		mutex_unlock(&data->lock_ps);
1100 		return ret;
1101 	default:
1102 		return -EINVAL;
1103 	}
1104 
1105 	return -EINVAL;
1106 }
1107 
1108 static ssize_t ltr501_show_proximity_scale_avail(struct device *dev,
1109 						 struct device_attribute *attr,
1110 						 char *buf)
1111 {
1112 	struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
1113 	const struct ltr501_chip_info *info = data->chip_info;
1114 	ssize_t len = 0;
1115 	int i;
1116 
1117 	for (i = 0; i < info->ps_gain_tbl_size; i++) {
1118 		if (info->ps_gain[i].scale == LTR501_RESERVED_GAIN)
1119 			continue;
1120 		len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
1121 				 info->ps_gain[i].scale,
1122 				 info->ps_gain[i].uscale);
1123 	}
1124 
1125 	buf[len - 1] = '\n';
1126 
1127 	return len;
1128 }
1129 
1130 static ssize_t ltr501_show_intensity_scale_avail(struct device *dev,
1131 						 struct device_attribute *attr,
1132 						 char *buf)
1133 {
1134 	struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev));
1135 	const struct ltr501_chip_info *info = data->chip_info;
1136 	ssize_t len = 0;
1137 	int i;
1138 
1139 	for (i = 0; i < info->als_gain_tbl_size; i++) {
1140 		if (info->als_gain[i].scale == LTR501_RESERVED_GAIN)
1141 			continue;
1142 		len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ",
1143 				 info->als_gain[i].scale,
1144 				 info->als_gain[i].uscale);
1145 	}
1146 
1147 	buf[len - 1] = '\n';
1148 
1149 	return len;
1150 }
1151 
1152 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.05 0.1 0.2 0.4");
1153 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("20 10 5 2 1 0.5");
1154 
1155 static IIO_DEVICE_ATTR(in_proximity_scale_available, S_IRUGO,
1156 		       ltr501_show_proximity_scale_avail, NULL, 0);
1157 static IIO_DEVICE_ATTR(in_intensity_scale_available, S_IRUGO,
1158 		       ltr501_show_intensity_scale_avail, NULL, 0);
1159 
1160 static struct attribute *ltr501_attributes[] = {
1161 	&iio_dev_attr_in_proximity_scale_available.dev_attr.attr,
1162 	&iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1163 	&iio_const_attr_integration_time_available.dev_attr.attr,
1164 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
1165 	NULL
1166 };
1167 
1168 static struct attribute *ltr301_attributes[] = {
1169 	&iio_dev_attr_in_intensity_scale_available.dev_attr.attr,
1170 	&iio_const_attr_integration_time_available.dev_attr.attr,
1171 	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
1172 	NULL
1173 };
1174 
1175 static const struct attribute_group ltr501_attribute_group = {
1176 	.attrs = ltr501_attributes,
1177 };
1178 
1179 static const struct attribute_group ltr301_attribute_group = {
1180 	.attrs = ltr301_attributes,
1181 };
1182 
1183 static const struct iio_info ltr501_info_no_irq = {
1184 	.read_raw = ltr501_read_raw,
1185 	.write_raw = ltr501_write_raw,
1186 	.attrs = &ltr501_attribute_group,
1187 };
1188 
1189 static const struct iio_info ltr501_info = {
1190 	.read_raw = ltr501_read_raw,
1191 	.write_raw = ltr501_write_raw,
1192 	.attrs = &ltr501_attribute_group,
1193 	.read_event_value	= &ltr501_read_event,
1194 	.write_event_value	= &ltr501_write_event,
1195 	.read_event_config	= &ltr501_read_event_config,
1196 	.write_event_config	= &ltr501_write_event_config,
1197 };
1198 
1199 static const struct iio_info ltr301_info_no_irq = {
1200 	.read_raw = ltr501_read_raw,
1201 	.write_raw = ltr501_write_raw,
1202 	.attrs = &ltr301_attribute_group,
1203 };
1204 
1205 static const struct iio_info ltr301_info = {
1206 	.read_raw = ltr501_read_raw,
1207 	.write_raw = ltr501_write_raw,
1208 	.attrs = &ltr301_attribute_group,
1209 	.read_event_value	= &ltr501_read_event,
1210 	.write_event_value	= &ltr501_write_event,
1211 	.read_event_config	= &ltr501_read_event_config,
1212 	.write_event_config	= &ltr501_write_event_config,
1213 };
1214 
1215 static const struct ltr501_chip_info ltr501_chip_info_tbl[] = {
1216 	[ltr501] = {
1217 		.partid = 0x08,
1218 		.als_gain = ltr501_als_gain_tbl,
1219 		.als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1220 		.ps_gain = ltr501_ps_gain_tbl,
1221 		.ps_gain_tbl_size = ARRAY_SIZE(ltr501_ps_gain_tbl),
1222 		.als_mode_active = BIT(0) | BIT(1),
1223 		.als_gain_mask = BIT(3),
1224 		.als_gain_shift = 3,
1225 		.info = &ltr501_info,
1226 		.info_no_irq = &ltr501_info_no_irq,
1227 		.channels = ltr501_channels,
1228 		.no_channels = ARRAY_SIZE(ltr501_channels),
1229 	},
1230 	[ltr559] = {
1231 		.partid = 0x09,
1232 		.als_gain = ltr559_als_gain_tbl,
1233 		.als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl),
1234 		.ps_gain = ltr559_ps_gain_tbl,
1235 		.ps_gain_tbl_size = ARRAY_SIZE(ltr559_ps_gain_tbl),
1236 		.als_mode_active = BIT(0),
1237 		.als_gain_mask = BIT(2) | BIT(3) | BIT(4),
1238 		.als_gain_shift = 2,
1239 		.info = &ltr501_info,
1240 		.info_no_irq = &ltr501_info_no_irq,
1241 		.channels = ltr501_channels,
1242 		.no_channels = ARRAY_SIZE(ltr501_channels),
1243 	},
1244 	[ltr301] = {
1245 		.partid = 0x08,
1246 		.als_gain = ltr501_als_gain_tbl,
1247 		.als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl),
1248 		.als_mode_active = BIT(0) | BIT(1),
1249 		.als_gain_mask = BIT(3),
1250 		.als_gain_shift = 3,
1251 		.info = &ltr301_info,
1252 		.info_no_irq = &ltr301_info_no_irq,
1253 		.channels = ltr301_channels,
1254 		.no_channels = ARRAY_SIZE(ltr301_channels),
1255 	},
1256 	[ltr303] = {
1257 		.partid = 0x0A,
1258 		.als_gain = ltr559_als_gain_tbl,
1259 		.als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl),
1260 		.als_mode_active = BIT(0),
1261 		.als_gain_mask = BIT(2) | BIT(3) | BIT(4),
1262 		.als_gain_shift = 2,
1263 		.info = &ltr301_info,
1264 		.info_no_irq = &ltr301_info_no_irq,
1265 		.channels = ltr301_channels,
1266 		.no_channels = ARRAY_SIZE(ltr301_channels),
1267 	},
1268 };
1269 
1270 static int ltr501_write_contr(struct ltr501_data *data, u8 als_val, u8 ps_val)
1271 {
1272 	int ret;
1273 
1274 	ret = regmap_write(data->regmap, LTR501_ALS_CONTR, als_val);
1275 	if (ret < 0)
1276 		return ret;
1277 
1278 	return regmap_write(data->regmap, LTR501_PS_CONTR, ps_val);
1279 }
1280 
1281 static irqreturn_t ltr501_trigger_handler(int irq, void *p)
1282 {
1283 	struct iio_poll_func *pf = p;
1284 	struct iio_dev *indio_dev = pf->indio_dev;
1285 	struct ltr501_data *data = iio_priv(indio_dev);
1286 	struct {
1287 		u16 channels[3];
1288 		s64 ts __aligned(8);
1289 	} scan;
1290 	__le16 als_buf[2];
1291 	u8 mask = 0;
1292 	int j = 0;
1293 	int ret, psdata;
1294 
1295 	memset(&scan, 0, sizeof(scan));
1296 
1297 	/* figure out which data needs to be ready */
1298 	if (test_bit(0, indio_dev->active_scan_mask) ||
1299 	    test_bit(1, indio_dev->active_scan_mask))
1300 		mask |= LTR501_STATUS_ALS_RDY;
1301 	if (test_bit(2, indio_dev->active_scan_mask))
1302 		mask |= LTR501_STATUS_PS_RDY;
1303 
1304 	ret = ltr501_drdy(data, mask);
1305 	if (ret < 0)
1306 		goto done;
1307 
1308 	if (mask & LTR501_STATUS_ALS_RDY) {
1309 		ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1,
1310 				       als_buf, sizeof(als_buf));
1311 		if (ret < 0)
1312 			goto done;
1313 		if (test_bit(0, indio_dev->active_scan_mask))
1314 			scan.channels[j++] = le16_to_cpu(als_buf[1]);
1315 		if (test_bit(1, indio_dev->active_scan_mask))
1316 			scan.channels[j++] = le16_to_cpu(als_buf[0]);
1317 	}
1318 
1319 	if (mask & LTR501_STATUS_PS_RDY) {
1320 		ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA,
1321 				       &psdata, 2);
1322 		if (ret < 0)
1323 			goto done;
1324 		scan.channels[j++] = psdata & LTR501_PS_DATA_MASK;
1325 	}
1326 
1327 	iio_push_to_buffers_with_timestamp(indio_dev, &scan,
1328 					   iio_get_time_ns(indio_dev));
1329 
1330 done:
1331 	iio_trigger_notify_done(indio_dev->trig);
1332 
1333 	return IRQ_HANDLED;
1334 }
1335 
1336 static irqreturn_t ltr501_interrupt_handler(int irq, void *private)
1337 {
1338 	struct iio_dev *indio_dev = private;
1339 	struct ltr501_data *data = iio_priv(indio_dev);
1340 	int ret, status;
1341 
1342 	ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status);
1343 	if (ret < 0) {
1344 		dev_err(&data->client->dev,
1345 			"irq read int reg failed\n");
1346 		return IRQ_HANDLED;
1347 	}
1348 
1349 	if (status & LTR501_STATUS_ALS_INTR)
1350 		iio_push_event(indio_dev,
1351 			       IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0,
1352 						    IIO_EV_TYPE_THRESH,
1353 						    IIO_EV_DIR_EITHER),
1354 			       iio_get_time_ns(indio_dev));
1355 
1356 	if (status & LTR501_STATUS_PS_INTR)
1357 		iio_push_event(indio_dev,
1358 			       IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0,
1359 						    IIO_EV_TYPE_THRESH,
1360 						    IIO_EV_DIR_EITHER),
1361 			       iio_get_time_ns(indio_dev));
1362 
1363 	return IRQ_HANDLED;
1364 }
1365 
1366 static int ltr501_init(struct ltr501_data *data)
1367 {
1368 	int ret, status;
1369 
1370 	ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status);
1371 	if (ret < 0)
1372 		return ret;
1373 
1374 	data->als_contr = status | data->chip_info->als_mode_active;
1375 
1376 	ret = regmap_read(data->regmap, LTR501_PS_CONTR, &status);
1377 	if (ret < 0)
1378 		return ret;
1379 
1380 	data->ps_contr = status | LTR501_CONTR_ACTIVE;
1381 
1382 	ret = ltr501_read_intr_prst(data, IIO_INTENSITY, &data->als_period);
1383 	if (ret < 0)
1384 		return ret;
1385 
1386 	ret = ltr501_read_intr_prst(data, IIO_PROXIMITY, &data->ps_period);
1387 	if (ret < 0)
1388 		return ret;
1389 
1390 	return ltr501_write_contr(data, data->als_contr, data->ps_contr);
1391 }
1392 
1393 static bool ltr501_is_volatile_reg(struct device *dev, unsigned int reg)
1394 {
1395 	switch (reg) {
1396 	case LTR501_ALS_DATA1:
1397 	case LTR501_ALS_DATA1_UPPER:
1398 	case LTR501_ALS_DATA0:
1399 	case LTR501_ALS_DATA0_UPPER:
1400 	case LTR501_ALS_PS_STATUS:
1401 	case LTR501_PS_DATA:
1402 	case LTR501_PS_DATA_UPPER:
1403 		return true;
1404 	default:
1405 		return false;
1406 	}
1407 }
1408 
1409 static const struct regmap_config ltr501_regmap_config = {
1410 	.name =  LTR501_REGMAP_NAME,
1411 	.reg_bits = 8,
1412 	.val_bits = 8,
1413 	.max_register = LTR501_MAX_REG,
1414 	.cache_type = REGCACHE_RBTREE,
1415 	.volatile_reg = ltr501_is_volatile_reg,
1416 };
1417 
1418 static void ltr501_disable_regulators(void *d)
1419 {
1420 	struct ltr501_data *data = d;
1421 
1422 	regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators);
1423 }
1424 
1425 static int ltr501_powerdown(struct ltr501_data *data)
1426 {
1427 	return ltr501_write_contr(data, data->als_contr &
1428 				  ~data->chip_info->als_mode_active,
1429 				  data->ps_contr & ~LTR501_CONTR_ACTIVE);
1430 }
1431 
1432 static const char *ltr501_match_acpi_device(struct device *dev, int *chip_idx)
1433 {
1434 	const struct acpi_device_id *id;
1435 
1436 	id = acpi_match_device(dev->driver->acpi_match_table, dev);
1437 	if (!id)
1438 		return NULL;
1439 	*chip_idx = id->driver_data;
1440 	return dev_name(dev);
1441 }
1442 
1443 static int ltr501_probe(struct i2c_client *client,
1444 			const struct i2c_device_id *id)
1445 {
1446 	struct ltr501_data *data;
1447 	struct iio_dev *indio_dev;
1448 	struct regmap *regmap;
1449 	int ret, partid, chip_idx = 0;
1450 	const char *name = NULL;
1451 
1452 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1453 	if (!indio_dev)
1454 		return -ENOMEM;
1455 
1456 	regmap = devm_regmap_init_i2c(client, &ltr501_regmap_config);
1457 	if (IS_ERR(regmap)) {
1458 		dev_err(&client->dev, "Regmap initialization failed.\n");
1459 		return PTR_ERR(regmap);
1460 	}
1461 
1462 	data = iio_priv(indio_dev);
1463 	i2c_set_clientdata(client, indio_dev);
1464 	data->client = client;
1465 	data->regmap = regmap;
1466 	mutex_init(&data->lock_als);
1467 	mutex_init(&data->lock_ps);
1468 
1469 	data->regulators[0].supply = "vdd";
1470 	data->regulators[1].supply = "vddio";
1471 	ret = devm_regulator_bulk_get(&client->dev,
1472 				      ARRAY_SIZE(data->regulators),
1473 				      data->regulators);
1474 	if (ret)
1475 		return dev_err_probe(&client->dev, ret,
1476 				     "Failed to get regulators\n");
1477 
1478 	ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators),
1479 				    data->regulators);
1480 	if (ret)
1481 		return ret;
1482 
1483 	ret = devm_add_action_or_reset(&client->dev,
1484 				       ltr501_disable_regulators, data);
1485 	if (ret)
1486 		return ret;
1487 
1488 	data->reg_it = devm_regmap_field_alloc(&client->dev, regmap,
1489 					       reg_field_it);
1490 	if (IS_ERR(data->reg_it)) {
1491 		dev_err(&client->dev, "Integ time reg field init failed.\n");
1492 		return PTR_ERR(data->reg_it);
1493 	}
1494 
1495 	data->reg_als_intr = devm_regmap_field_alloc(&client->dev, regmap,
1496 						     reg_field_als_intr);
1497 	if (IS_ERR(data->reg_als_intr)) {
1498 		dev_err(&client->dev, "ALS intr mode reg field init failed\n");
1499 		return PTR_ERR(data->reg_als_intr);
1500 	}
1501 
1502 	data->reg_ps_intr = devm_regmap_field_alloc(&client->dev, regmap,
1503 						    reg_field_ps_intr);
1504 	if (IS_ERR(data->reg_ps_intr)) {
1505 		dev_err(&client->dev, "PS intr mode reg field init failed.\n");
1506 		return PTR_ERR(data->reg_ps_intr);
1507 	}
1508 
1509 	data->reg_als_rate = devm_regmap_field_alloc(&client->dev, regmap,
1510 						     reg_field_als_rate);
1511 	if (IS_ERR(data->reg_als_rate)) {
1512 		dev_err(&client->dev, "ALS samp rate field init failed.\n");
1513 		return PTR_ERR(data->reg_als_rate);
1514 	}
1515 
1516 	data->reg_ps_rate = devm_regmap_field_alloc(&client->dev, regmap,
1517 						    reg_field_ps_rate);
1518 	if (IS_ERR(data->reg_ps_rate)) {
1519 		dev_err(&client->dev, "PS samp rate field init failed.\n");
1520 		return PTR_ERR(data->reg_ps_rate);
1521 	}
1522 
1523 	data->reg_als_prst = devm_regmap_field_alloc(&client->dev, regmap,
1524 						     reg_field_als_prst);
1525 	if (IS_ERR(data->reg_als_prst)) {
1526 		dev_err(&client->dev, "ALS prst reg field init failed\n");
1527 		return PTR_ERR(data->reg_als_prst);
1528 	}
1529 
1530 	data->reg_ps_prst = devm_regmap_field_alloc(&client->dev, regmap,
1531 						    reg_field_ps_prst);
1532 	if (IS_ERR(data->reg_ps_prst)) {
1533 		dev_err(&client->dev, "PS prst reg field init failed.\n");
1534 		return PTR_ERR(data->reg_ps_prst);
1535 	}
1536 
1537 	ret = regmap_read(data->regmap, LTR501_PART_ID, &partid);
1538 	if (ret < 0)
1539 		return ret;
1540 
1541 	if (id) {
1542 		name = id->name;
1543 		chip_idx = id->driver_data;
1544 	} else  if (ACPI_HANDLE(&client->dev)) {
1545 		name = ltr501_match_acpi_device(&client->dev, &chip_idx);
1546 	} else {
1547 		return -ENODEV;
1548 	}
1549 
1550 	data->chip_info = &ltr501_chip_info_tbl[chip_idx];
1551 
1552 	if ((partid >> 4) != data->chip_info->partid)
1553 		return -ENODEV;
1554 
1555 	if (device_property_read_u32(&client->dev, "proximity-near-level",
1556 				     &data->near_level))
1557 		data->near_level = 0;
1558 
1559 	indio_dev->info = data->chip_info->info;
1560 	indio_dev->channels = data->chip_info->channels;
1561 	indio_dev->num_channels = data->chip_info->no_channels;
1562 	indio_dev->name = name;
1563 	indio_dev->modes = INDIO_DIRECT_MODE;
1564 
1565 	ret = ltr501_init(data);
1566 	if (ret < 0)
1567 		return ret;
1568 
1569 	if (client->irq > 0) {
1570 		ret = devm_request_threaded_irq(&client->dev, client->irq,
1571 						NULL, ltr501_interrupt_handler,
1572 						IRQF_TRIGGER_FALLING |
1573 						IRQF_ONESHOT,
1574 						"ltr501_thresh_event",
1575 						indio_dev);
1576 		if (ret) {
1577 			dev_err(&client->dev, "request irq (%d) failed\n",
1578 				client->irq);
1579 			return ret;
1580 		}
1581 	} else {
1582 		indio_dev->info = data->chip_info->info_no_irq;
1583 	}
1584 
1585 	ret = iio_triggered_buffer_setup(indio_dev, NULL,
1586 					 ltr501_trigger_handler, NULL);
1587 	if (ret)
1588 		goto powerdown_on_error;
1589 
1590 	ret = iio_device_register(indio_dev);
1591 	if (ret)
1592 		goto error_unreg_buffer;
1593 
1594 	return 0;
1595 
1596 error_unreg_buffer:
1597 	iio_triggered_buffer_cleanup(indio_dev);
1598 powerdown_on_error:
1599 	ltr501_powerdown(data);
1600 	return ret;
1601 }
1602 
1603 static int ltr501_remove(struct i2c_client *client)
1604 {
1605 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
1606 
1607 	iio_device_unregister(indio_dev);
1608 	iio_triggered_buffer_cleanup(indio_dev);
1609 	ltr501_powerdown(iio_priv(indio_dev));
1610 
1611 	return 0;
1612 }
1613 
1614 static int ltr501_suspend(struct device *dev)
1615 {
1616 	struct ltr501_data *data = iio_priv(i2c_get_clientdata(
1617 					    to_i2c_client(dev)));
1618 	return ltr501_powerdown(data);
1619 }
1620 
1621 static int ltr501_resume(struct device *dev)
1622 {
1623 	struct ltr501_data *data = iio_priv(i2c_get_clientdata(
1624 					    to_i2c_client(dev)));
1625 
1626 	return ltr501_write_contr(data, data->als_contr,
1627 		data->ps_contr);
1628 }
1629 
1630 static DEFINE_SIMPLE_DEV_PM_OPS(ltr501_pm_ops, ltr501_suspend, ltr501_resume);
1631 
1632 static const struct acpi_device_id ltr_acpi_match[] = {
1633 	{ "LTER0501", ltr501 },
1634 	{ "LTER0559", ltr559 },
1635 	{ "LTER0301", ltr301 },
1636 	{ },
1637 };
1638 MODULE_DEVICE_TABLE(acpi, ltr_acpi_match);
1639 
1640 static const struct i2c_device_id ltr501_id[] = {
1641 	{ "ltr501", ltr501 },
1642 	{ "ltr559", ltr559 },
1643 	{ "ltr301", ltr301 },
1644 	{ "ltr303", ltr303 },
1645 	{ }
1646 };
1647 MODULE_DEVICE_TABLE(i2c, ltr501_id);
1648 
1649 static const struct of_device_id ltr501_of_match[] = {
1650 	{ .compatible = "liteon,ltr501", },
1651 	{ .compatible = "liteon,ltr559", },
1652 	{ .compatible = "liteon,ltr301", },
1653 	{ .compatible = "liteon,ltr303", },
1654 	{}
1655 };
1656 MODULE_DEVICE_TABLE(of, ltr501_of_match);
1657 
1658 static struct i2c_driver ltr501_driver = {
1659 	.driver = {
1660 		.name   = LTR501_DRV_NAME,
1661 		.of_match_table = ltr501_of_match,
1662 		.pm	= pm_sleep_ptr(&ltr501_pm_ops),
1663 		.acpi_match_table = ACPI_PTR(ltr_acpi_match),
1664 	},
1665 	.probe  = ltr501_probe,
1666 	.remove	= ltr501_remove,
1667 	.id_table = ltr501_id,
1668 };
1669 
1670 module_i2c_driver(ltr501_driver);
1671 
1672 MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>");
1673 MODULE_DESCRIPTION("Lite-On LTR501 ambient light and proximity sensor driver");
1674 MODULE_LICENSE("GPL");
1675