1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Support for Lite-On LTR501 and similar ambient light and proximity sensors. 4 * 5 * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net> 6 * 7 * 7-bit I2C slave address 0x23 8 * 9 * TODO: IR LED characteristics 10 */ 11 12 #include <linux/module.h> 13 #include <linux/i2c.h> 14 #include <linux/err.h> 15 #include <linux/delay.h> 16 #include <linux/regmap.h> 17 #include <linux/acpi.h> 18 #include <linux/regulator/consumer.h> 19 20 #include <linux/iio/iio.h> 21 #include <linux/iio/events.h> 22 #include <linux/iio/sysfs.h> 23 #include <linux/iio/trigger_consumer.h> 24 #include <linux/iio/buffer.h> 25 #include <linux/iio/triggered_buffer.h> 26 27 #define LTR501_DRV_NAME "ltr501" 28 29 #define LTR501_ALS_CONTR 0x80 /* ALS operation mode, SW reset */ 30 #define LTR501_PS_CONTR 0x81 /* PS operation mode */ 31 #define LTR501_PS_MEAS_RATE 0x84 /* measurement rate*/ 32 #define LTR501_ALS_MEAS_RATE 0x85 /* ALS integ time, measurement rate*/ 33 #define LTR501_PART_ID 0x86 34 #define LTR501_MANUFAC_ID 0x87 35 #define LTR501_ALS_DATA1 0x88 /* 16-bit, little endian */ 36 #define LTR501_ALS_DATA1_UPPER 0x89 /* upper 8 bits of LTR501_ALS_DATA1 */ 37 #define LTR501_ALS_DATA0 0x8a /* 16-bit, little endian */ 38 #define LTR501_ALS_DATA0_UPPER 0x8b /* upper 8 bits of LTR501_ALS_DATA0 */ 39 #define LTR501_ALS_PS_STATUS 0x8c 40 #define LTR501_PS_DATA 0x8d /* 16-bit, little endian */ 41 #define LTR501_PS_DATA_UPPER 0x8e /* upper 8 bits of LTR501_PS_DATA */ 42 #define LTR501_INTR 0x8f /* output mode, polarity, mode */ 43 #define LTR501_PS_THRESH_UP 0x90 /* 11 bit, ps upper threshold */ 44 #define LTR501_PS_THRESH_LOW 0x92 /* 11 bit, ps lower threshold */ 45 #define LTR501_ALS_THRESH_UP 0x97 /* 16 bit, ALS upper threshold */ 46 #define LTR501_ALS_THRESH_LOW 0x99 /* 16 bit, ALS lower threshold */ 47 #define LTR501_INTR_PRST 0x9e /* ps thresh, als thresh */ 48 #define LTR501_MAX_REG 0x9f 49 50 #define LTR501_ALS_CONTR_SW_RESET BIT(2) 51 #define LTR501_CONTR_PS_GAIN_MASK (BIT(3) | BIT(2)) 52 #define LTR501_CONTR_PS_GAIN_SHIFT 2 53 #define LTR501_CONTR_ALS_GAIN_MASK BIT(3) 54 #define LTR501_CONTR_ACTIVE BIT(1) 55 56 #define LTR501_STATUS_ALS_INTR BIT(3) 57 #define LTR501_STATUS_ALS_RDY BIT(2) 58 #define LTR501_STATUS_PS_INTR BIT(1) 59 #define LTR501_STATUS_PS_RDY BIT(0) 60 61 #define LTR501_PS_DATA_MASK 0x7ff 62 #define LTR501_PS_THRESH_MASK 0x7ff 63 #define LTR501_ALS_THRESH_MASK 0xffff 64 65 #define LTR501_ALS_DEF_PERIOD 500000 66 #define LTR501_PS_DEF_PERIOD 100000 67 68 #define LTR501_REGMAP_NAME "ltr501_regmap" 69 70 #define LTR501_LUX_CONV(vis_coeff, vis_data, ir_coeff, ir_data) \ 71 ((vis_coeff * vis_data) - (ir_coeff * ir_data)) 72 73 static const int int_time_mapping[] = {100000, 50000, 200000, 400000}; 74 75 static const struct reg_field reg_field_it = 76 REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4); 77 static const struct reg_field reg_field_als_intr = 78 REG_FIELD(LTR501_INTR, 1, 1); 79 static const struct reg_field reg_field_ps_intr = 80 REG_FIELD(LTR501_INTR, 0, 0); 81 static const struct reg_field reg_field_als_rate = 82 REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2); 83 static const struct reg_field reg_field_ps_rate = 84 REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3); 85 static const struct reg_field reg_field_als_prst = 86 REG_FIELD(LTR501_INTR_PRST, 0, 3); 87 static const struct reg_field reg_field_ps_prst = 88 REG_FIELD(LTR501_INTR_PRST, 4, 7); 89 90 struct ltr501_samp_table { 91 int freq_val; /* repetition frequency in micro HZ*/ 92 int time_val; /* repetition rate in micro seconds */ 93 }; 94 95 #define LTR501_RESERVED_GAIN -1 96 97 enum { 98 ltr501 = 0, 99 ltr559, 100 ltr301, 101 ltr303, 102 }; 103 104 struct ltr501_gain { 105 int scale; 106 int uscale; 107 }; 108 109 static const struct ltr501_gain ltr501_als_gain_tbl[] = { 110 {1, 0}, 111 {0, 5000}, 112 }; 113 114 static const struct ltr501_gain ltr559_als_gain_tbl[] = { 115 {1, 0}, 116 {0, 500000}, 117 {0, 250000}, 118 {0, 125000}, 119 {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN}, 120 {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN}, 121 {0, 20000}, 122 {0, 10000}, 123 }; 124 125 static const struct ltr501_gain ltr501_ps_gain_tbl[] = { 126 {1, 0}, 127 {0, 250000}, 128 {0, 125000}, 129 {0, 62500}, 130 }; 131 132 static const struct ltr501_gain ltr559_ps_gain_tbl[] = { 133 {0, 62500}, /* x16 gain */ 134 {0, 31250}, /* x32 gain */ 135 {0, 15625}, /* bits X1 are for x64 gain */ 136 {0, 15624}, 137 }; 138 139 struct ltr501_chip_info { 140 u8 partid; 141 const struct ltr501_gain *als_gain; 142 int als_gain_tbl_size; 143 const struct ltr501_gain *ps_gain; 144 int ps_gain_tbl_size; 145 u8 als_mode_active; 146 u8 als_gain_mask; 147 u8 als_gain_shift; 148 struct iio_chan_spec const *channels; 149 const int no_channels; 150 const struct iio_info *info; 151 const struct iio_info *info_no_irq; 152 }; 153 154 struct ltr501_data { 155 struct i2c_client *client; 156 struct regulator_bulk_data regulators[2]; 157 struct mutex lock_als, lock_ps; 158 const struct ltr501_chip_info *chip_info; 159 u8 als_contr, ps_contr; 160 int als_period, ps_period; /* period in micro seconds */ 161 struct regmap *regmap; 162 struct regmap_field *reg_it; 163 struct regmap_field *reg_als_intr; 164 struct regmap_field *reg_ps_intr; 165 struct regmap_field *reg_als_rate; 166 struct regmap_field *reg_ps_rate; 167 struct regmap_field *reg_als_prst; 168 struct regmap_field *reg_ps_prst; 169 }; 170 171 static const struct ltr501_samp_table ltr501_als_samp_table[] = { 172 {20000000, 50000}, {10000000, 100000}, 173 {5000000, 200000}, {2000000, 500000}, 174 {1000000, 1000000}, {500000, 2000000}, 175 {500000, 2000000}, {500000, 2000000} 176 }; 177 178 static const struct ltr501_samp_table ltr501_ps_samp_table[] = { 179 {20000000, 50000}, {14285714, 70000}, 180 {10000000, 100000}, {5000000, 200000}, 181 {2000000, 500000}, {1000000, 1000000}, 182 {500000, 2000000}, {500000, 2000000}, 183 {500000, 2000000} 184 }; 185 186 static int ltr501_match_samp_freq(const struct ltr501_samp_table *tab, 187 int len, int val, int val2) 188 { 189 int i, freq; 190 191 freq = val * 1000000 + val2; 192 193 for (i = 0; i < len; i++) { 194 if (tab[i].freq_val == freq) 195 return i; 196 } 197 198 return -EINVAL; 199 } 200 201 static int ltr501_als_read_samp_freq(const struct ltr501_data *data, 202 int *val, int *val2) 203 { 204 int ret, i; 205 206 ret = regmap_field_read(data->reg_als_rate, &i); 207 if (ret < 0) 208 return ret; 209 210 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table)) 211 return -EINVAL; 212 213 *val = ltr501_als_samp_table[i].freq_val / 1000000; 214 *val2 = ltr501_als_samp_table[i].freq_val % 1000000; 215 216 return IIO_VAL_INT_PLUS_MICRO; 217 } 218 219 static int ltr501_ps_read_samp_freq(const struct ltr501_data *data, 220 int *val, int *val2) 221 { 222 int ret, i; 223 224 ret = regmap_field_read(data->reg_ps_rate, &i); 225 if (ret < 0) 226 return ret; 227 228 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table)) 229 return -EINVAL; 230 231 *val = ltr501_ps_samp_table[i].freq_val / 1000000; 232 *val2 = ltr501_ps_samp_table[i].freq_val % 1000000; 233 234 return IIO_VAL_INT_PLUS_MICRO; 235 } 236 237 static int ltr501_als_write_samp_freq(struct ltr501_data *data, 238 int val, int val2) 239 { 240 int i, ret; 241 242 i = ltr501_match_samp_freq(ltr501_als_samp_table, 243 ARRAY_SIZE(ltr501_als_samp_table), 244 val, val2); 245 246 if (i < 0) 247 return i; 248 249 mutex_lock(&data->lock_als); 250 ret = regmap_field_write(data->reg_als_rate, i); 251 mutex_unlock(&data->lock_als); 252 253 return ret; 254 } 255 256 static int ltr501_ps_write_samp_freq(struct ltr501_data *data, 257 int val, int val2) 258 { 259 int i, ret; 260 261 i = ltr501_match_samp_freq(ltr501_ps_samp_table, 262 ARRAY_SIZE(ltr501_ps_samp_table), 263 val, val2); 264 265 if (i < 0) 266 return i; 267 268 mutex_lock(&data->lock_ps); 269 ret = regmap_field_write(data->reg_ps_rate, i); 270 mutex_unlock(&data->lock_ps); 271 272 return ret; 273 } 274 275 static int ltr501_als_read_samp_period(const struct ltr501_data *data, int *val) 276 { 277 int ret, i; 278 279 ret = regmap_field_read(data->reg_als_rate, &i); 280 if (ret < 0) 281 return ret; 282 283 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table)) 284 return -EINVAL; 285 286 *val = ltr501_als_samp_table[i].time_val; 287 288 return IIO_VAL_INT; 289 } 290 291 static int ltr501_ps_read_samp_period(const struct ltr501_data *data, int *val) 292 { 293 int ret, i; 294 295 ret = regmap_field_read(data->reg_ps_rate, &i); 296 if (ret < 0) 297 return ret; 298 299 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table)) 300 return -EINVAL; 301 302 *val = ltr501_ps_samp_table[i].time_val; 303 304 return IIO_VAL_INT; 305 } 306 307 /* IR and visible spectrum coeff's are given in data sheet */ 308 static unsigned long ltr501_calculate_lux(u16 vis_data, u16 ir_data) 309 { 310 unsigned long ratio, lux; 311 312 if (vis_data == 0) 313 return 0; 314 315 /* multiply numerator by 100 to avoid handling ratio < 1 */ 316 ratio = DIV_ROUND_UP(ir_data * 100, ir_data + vis_data); 317 318 if (ratio < 45) 319 lux = LTR501_LUX_CONV(1774, vis_data, -1105, ir_data); 320 else if (ratio >= 45 && ratio < 64) 321 lux = LTR501_LUX_CONV(3772, vis_data, 1336, ir_data); 322 else if (ratio >= 64 && ratio < 85) 323 lux = LTR501_LUX_CONV(1690, vis_data, 169, ir_data); 324 else 325 lux = 0; 326 327 return lux / 1000; 328 } 329 330 static int ltr501_drdy(const struct ltr501_data *data, u8 drdy_mask) 331 { 332 int tries = 100; 333 int ret, status; 334 335 while (tries--) { 336 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status); 337 if (ret < 0) 338 return ret; 339 if ((status & drdy_mask) == drdy_mask) 340 return 0; 341 msleep(25); 342 } 343 344 dev_err(&data->client->dev, "ltr501_drdy() failed, data not ready\n"); 345 return -EIO; 346 } 347 348 static int ltr501_set_it_time(struct ltr501_data *data, int it) 349 { 350 int ret, i, index = -1, status; 351 352 for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) { 353 if (int_time_mapping[i] == it) { 354 index = i; 355 break; 356 } 357 } 358 /* Make sure integ time index is valid */ 359 if (index < 0) 360 return -EINVAL; 361 362 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status); 363 if (ret < 0) 364 return ret; 365 366 if (status & LTR501_CONTR_ALS_GAIN_MASK) { 367 /* 368 * 200 ms and 400 ms integ time can only be 369 * used in dynamic range 1 370 */ 371 if (index > 1) 372 return -EINVAL; 373 } else 374 /* 50 ms integ time can only be used in dynamic range 2 */ 375 if (index == 1) 376 return -EINVAL; 377 378 return regmap_field_write(data->reg_it, index); 379 } 380 381 /* read int time in micro seconds */ 382 static int ltr501_read_it_time(const struct ltr501_data *data, 383 int *val, int *val2) 384 { 385 int ret, index; 386 387 ret = regmap_field_read(data->reg_it, &index); 388 if (ret < 0) 389 return ret; 390 391 /* Make sure integ time index is valid */ 392 if (index < 0 || index >= ARRAY_SIZE(int_time_mapping)) 393 return -EINVAL; 394 395 *val2 = int_time_mapping[index]; 396 *val = 0; 397 398 return IIO_VAL_INT_PLUS_MICRO; 399 } 400 401 static int ltr501_read_als(const struct ltr501_data *data, __le16 buf[2]) 402 { 403 int ret; 404 405 ret = ltr501_drdy(data, LTR501_STATUS_ALS_RDY); 406 if (ret < 0) 407 return ret; 408 /* always read both ALS channels in given order */ 409 return regmap_bulk_read(data->regmap, LTR501_ALS_DATA1, 410 buf, 2 * sizeof(__le16)); 411 } 412 413 static int ltr501_read_ps(const struct ltr501_data *data) 414 { 415 __le16 status; 416 int ret; 417 418 ret = ltr501_drdy(data, LTR501_STATUS_PS_RDY); 419 if (ret < 0) 420 return ret; 421 422 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA, 423 &status, sizeof(status)); 424 if (ret < 0) 425 return ret; 426 427 return le16_to_cpu(status); 428 } 429 430 static int ltr501_read_intr_prst(const struct ltr501_data *data, 431 enum iio_chan_type type, 432 int *val2) 433 { 434 int ret, samp_period, prst; 435 436 switch (type) { 437 case IIO_INTENSITY: 438 ret = regmap_field_read(data->reg_als_prst, &prst); 439 if (ret < 0) 440 return ret; 441 442 ret = ltr501_als_read_samp_period(data, &samp_period); 443 444 if (ret < 0) 445 return ret; 446 *val2 = samp_period * prst; 447 return IIO_VAL_INT_PLUS_MICRO; 448 case IIO_PROXIMITY: 449 ret = regmap_field_read(data->reg_ps_prst, &prst); 450 if (ret < 0) 451 return ret; 452 453 ret = ltr501_ps_read_samp_period(data, &samp_period); 454 455 if (ret < 0) 456 return ret; 457 458 *val2 = samp_period * prst; 459 return IIO_VAL_INT_PLUS_MICRO; 460 default: 461 return -EINVAL; 462 } 463 464 return -EINVAL; 465 } 466 467 static int ltr501_write_intr_prst(struct ltr501_data *data, 468 enum iio_chan_type type, 469 int val, int val2) 470 { 471 int ret, samp_period, new_val; 472 unsigned long period; 473 474 if (val < 0 || val2 < 0) 475 return -EINVAL; 476 477 /* period in microseconds */ 478 period = ((val * 1000000) + val2); 479 480 switch (type) { 481 case IIO_INTENSITY: 482 ret = ltr501_als_read_samp_period(data, &samp_period); 483 if (ret < 0) 484 return ret; 485 486 /* period should be atleast equal to sampling period */ 487 if (period < samp_period) 488 return -EINVAL; 489 490 new_val = DIV_ROUND_UP(period, samp_period); 491 if (new_val < 0 || new_val > 0x0f) 492 return -EINVAL; 493 494 mutex_lock(&data->lock_als); 495 ret = regmap_field_write(data->reg_als_prst, new_val); 496 mutex_unlock(&data->lock_als); 497 if (ret >= 0) 498 data->als_period = period; 499 500 return ret; 501 case IIO_PROXIMITY: 502 ret = ltr501_ps_read_samp_period(data, &samp_period); 503 if (ret < 0) 504 return ret; 505 506 /* period should be atleast equal to rate */ 507 if (period < samp_period) 508 return -EINVAL; 509 510 new_val = DIV_ROUND_UP(period, samp_period); 511 if (new_val < 0 || new_val > 0x0f) 512 return -EINVAL; 513 514 mutex_lock(&data->lock_ps); 515 ret = regmap_field_write(data->reg_ps_prst, new_val); 516 mutex_unlock(&data->lock_ps); 517 if (ret >= 0) 518 data->ps_period = period; 519 520 return ret; 521 default: 522 return -EINVAL; 523 } 524 525 return -EINVAL; 526 } 527 528 static const struct iio_event_spec ltr501_als_event_spec[] = { 529 { 530 .type = IIO_EV_TYPE_THRESH, 531 .dir = IIO_EV_DIR_RISING, 532 .mask_separate = BIT(IIO_EV_INFO_VALUE), 533 }, { 534 .type = IIO_EV_TYPE_THRESH, 535 .dir = IIO_EV_DIR_FALLING, 536 .mask_separate = BIT(IIO_EV_INFO_VALUE), 537 }, { 538 .type = IIO_EV_TYPE_THRESH, 539 .dir = IIO_EV_DIR_EITHER, 540 .mask_separate = BIT(IIO_EV_INFO_ENABLE) | 541 BIT(IIO_EV_INFO_PERIOD), 542 }, 543 544 }; 545 546 static const struct iio_event_spec ltr501_pxs_event_spec[] = { 547 { 548 .type = IIO_EV_TYPE_THRESH, 549 .dir = IIO_EV_DIR_RISING, 550 .mask_separate = BIT(IIO_EV_INFO_VALUE), 551 }, { 552 .type = IIO_EV_TYPE_THRESH, 553 .dir = IIO_EV_DIR_FALLING, 554 .mask_separate = BIT(IIO_EV_INFO_VALUE), 555 }, { 556 .type = IIO_EV_TYPE_THRESH, 557 .dir = IIO_EV_DIR_EITHER, 558 .mask_separate = BIT(IIO_EV_INFO_ENABLE) | 559 BIT(IIO_EV_INFO_PERIOD), 560 }, 561 }; 562 563 #define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \ 564 _evspec, _evsize) { \ 565 .type = IIO_INTENSITY, \ 566 .modified = 1, \ 567 .address = (_addr), \ 568 .channel2 = (_mod), \ 569 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 570 .info_mask_shared_by_type = (_shared), \ 571 .scan_index = (_idx), \ 572 .scan_type = { \ 573 .sign = 'u', \ 574 .realbits = 16, \ 575 .storagebits = 16, \ 576 .endianness = IIO_CPU, \ 577 }, \ 578 .event_spec = _evspec,\ 579 .num_event_specs = _evsize,\ 580 } 581 582 #define LTR501_LIGHT_CHANNEL() { \ 583 .type = IIO_LIGHT, \ 584 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \ 585 .scan_index = -1, \ 586 } 587 588 static const struct iio_chan_spec ltr501_channels[] = { 589 LTR501_LIGHT_CHANNEL(), 590 LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0, 591 ltr501_als_event_spec, 592 ARRAY_SIZE(ltr501_als_event_spec)), 593 LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR, 594 BIT(IIO_CHAN_INFO_SCALE) | 595 BIT(IIO_CHAN_INFO_INT_TIME) | 596 BIT(IIO_CHAN_INFO_SAMP_FREQ), 597 NULL, 0), 598 { 599 .type = IIO_PROXIMITY, 600 .address = LTR501_PS_DATA, 601 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 602 BIT(IIO_CHAN_INFO_SCALE), 603 .scan_index = 2, 604 .scan_type = { 605 .sign = 'u', 606 .realbits = 11, 607 .storagebits = 16, 608 .endianness = IIO_CPU, 609 }, 610 .event_spec = ltr501_pxs_event_spec, 611 .num_event_specs = ARRAY_SIZE(ltr501_pxs_event_spec), 612 }, 613 IIO_CHAN_SOFT_TIMESTAMP(3), 614 }; 615 616 static const struct iio_chan_spec ltr301_channels[] = { 617 LTR501_LIGHT_CHANNEL(), 618 LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0, 619 ltr501_als_event_spec, 620 ARRAY_SIZE(ltr501_als_event_spec)), 621 LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR, 622 BIT(IIO_CHAN_INFO_SCALE) | 623 BIT(IIO_CHAN_INFO_INT_TIME) | 624 BIT(IIO_CHAN_INFO_SAMP_FREQ), 625 NULL, 0), 626 IIO_CHAN_SOFT_TIMESTAMP(2), 627 }; 628 629 static int ltr501_read_raw(struct iio_dev *indio_dev, 630 struct iio_chan_spec const *chan, 631 int *val, int *val2, long mask) 632 { 633 struct ltr501_data *data = iio_priv(indio_dev); 634 __le16 buf[2]; 635 int ret, i; 636 637 switch (mask) { 638 case IIO_CHAN_INFO_PROCESSED: 639 switch (chan->type) { 640 case IIO_LIGHT: 641 ret = iio_device_claim_direct_mode(indio_dev); 642 if (ret) 643 return ret; 644 645 mutex_lock(&data->lock_als); 646 ret = ltr501_read_als(data, buf); 647 mutex_unlock(&data->lock_als); 648 iio_device_release_direct_mode(indio_dev); 649 if (ret < 0) 650 return ret; 651 *val = ltr501_calculate_lux(le16_to_cpu(buf[1]), 652 le16_to_cpu(buf[0])); 653 return IIO_VAL_INT; 654 default: 655 return -EINVAL; 656 } 657 case IIO_CHAN_INFO_RAW: 658 ret = iio_device_claim_direct_mode(indio_dev); 659 if (ret) 660 return ret; 661 662 switch (chan->type) { 663 case IIO_INTENSITY: 664 mutex_lock(&data->lock_als); 665 ret = ltr501_read_als(data, buf); 666 mutex_unlock(&data->lock_als); 667 if (ret < 0) 668 break; 669 *val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ? 670 buf[0] : buf[1]); 671 ret = IIO_VAL_INT; 672 break; 673 case IIO_PROXIMITY: 674 mutex_lock(&data->lock_ps); 675 ret = ltr501_read_ps(data); 676 mutex_unlock(&data->lock_ps); 677 if (ret < 0) 678 break; 679 *val = ret & LTR501_PS_DATA_MASK; 680 ret = IIO_VAL_INT; 681 break; 682 default: 683 ret = -EINVAL; 684 break; 685 } 686 687 iio_device_release_direct_mode(indio_dev); 688 return ret; 689 690 case IIO_CHAN_INFO_SCALE: 691 switch (chan->type) { 692 case IIO_INTENSITY: 693 i = (data->als_contr & data->chip_info->als_gain_mask) 694 >> data->chip_info->als_gain_shift; 695 *val = data->chip_info->als_gain[i].scale; 696 *val2 = data->chip_info->als_gain[i].uscale; 697 return IIO_VAL_INT_PLUS_MICRO; 698 case IIO_PROXIMITY: 699 i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >> 700 LTR501_CONTR_PS_GAIN_SHIFT; 701 *val = data->chip_info->ps_gain[i].scale; 702 *val2 = data->chip_info->ps_gain[i].uscale; 703 return IIO_VAL_INT_PLUS_MICRO; 704 default: 705 return -EINVAL; 706 } 707 case IIO_CHAN_INFO_INT_TIME: 708 switch (chan->type) { 709 case IIO_INTENSITY: 710 return ltr501_read_it_time(data, val, val2); 711 default: 712 return -EINVAL; 713 } 714 case IIO_CHAN_INFO_SAMP_FREQ: 715 switch (chan->type) { 716 case IIO_INTENSITY: 717 return ltr501_als_read_samp_freq(data, val, val2); 718 case IIO_PROXIMITY: 719 return ltr501_ps_read_samp_freq(data, val, val2); 720 default: 721 return -EINVAL; 722 } 723 } 724 return -EINVAL; 725 } 726 727 static int ltr501_get_gain_index(const struct ltr501_gain *gain, int size, 728 int val, int val2) 729 { 730 int i; 731 732 for (i = 0; i < size; i++) 733 if (val == gain[i].scale && val2 == gain[i].uscale) 734 return i; 735 736 return -1; 737 } 738 739 static int ltr501_write_raw(struct iio_dev *indio_dev, 740 struct iio_chan_spec const *chan, 741 int val, int val2, long mask) 742 { 743 struct ltr501_data *data = iio_priv(indio_dev); 744 int i, ret, freq_val, freq_val2; 745 const struct ltr501_chip_info *info = data->chip_info; 746 747 ret = iio_device_claim_direct_mode(indio_dev); 748 if (ret) 749 return ret; 750 751 switch (mask) { 752 case IIO_CHAN_INFO_SCALE: 753 switch (chan->type) { 754 case IIO_INTENSITY: 755 i = ltr501_get_gain_index(info->als_gain, 756 info->als_gain_tbl_size, 757 val, val2); 758 if (i < 0) { 759 ret = -EINVAL; 760 break; 761 } 762 763 data->als_contr &= ~info->als_gain_mask; 764 data->als_contr |= i << info->als_gain_shift; 765 766 ret = regmap_write(data->regmap, LTR501_ALS_CONTR, 767 data->als_contr); 768 break; 769 case IIO_PROXIMITY: 770 i = ltr501_get_gain_index(info->ps_gain, 771 info->ps_gain_tbl_size, 772 val, val2); 773 if (i < 0) { 774 ret = -EINVAL; 775 break; 776 } 777 data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK; 778 data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT; 779 780 ret = regmap_write(data->regmap, LTR501_PS_CONTR, 781 data->ps_contr); 782 break; 783 default: 784 ret = -EINVAL; 785 break; 786 } 787 break; 788 789 case IIO_CHAN_INFO_INT_TIME: 790 switch (chan->type) { 791 case IIO_INTENSITY: 792 if (val != 0) { 793 ret = -EINVAL; 794 break; 795 } 796 mutex_lock(&data->lock_als); 797 ret = ltr501_set_it_time(data, val2); 798 mutex_unlock(&data->lock_als); 799 break; 800 default: 801 ret = -EINVAL; 802 break; 803 } 804 break; 805 806 case IIO_CHAN_INFO_SAMP_FREQ: 807 switch (chan->type) { 808 case IIO_INTENSITY: 809 ret = ltr501_als_read_samp_freq(data, &freq_val, 810 &freq_val2); 811 if (ret < 0) 812 break; 813 814 ret = ltr501_als_write_samp_freq(data, val, val2); 815 if (ret < 0) 816 break; 817 818 /* update persistence count when changing frequency */ 819 ret = ltr501_write_intr_prst(data, chan->type, 820 0, data->als_period); 821 822 if (ret < 0) 823 ret = ltr501_als_write_samp_freq(data, freq_val, 824 freq_val2); 825 break; 826 case IIO_PROXIMITY: 827 ret = ltr501_ps_read_samp_freq(data, &freq_val, 828 &freq_val2); 829 if (ret < 0) 830 break; 831 832 ret = ltr501_ps_write_samp_freq(data, val, val2); 833 if (ret < 0) 834 break; 835 836 /* update persistence count when changing frequency */ 837 ret = ltr501_write_intr_prst(data, chan->type, 838 0, data->ps_period); 839 840 if (ret < 0) 841 ret = ltr501_ps_write_samp_freq(data, freq_val, 842 freq_val2); 843 break; 844 default: 845 ret = -EINVAL; 846 break; 847 } 848 break; 849 850 default: 851 ret = -EINVAL; 852 break; 853 } 854 855 iio_device_release_direct_mode(indio_dev); 856 return ret; 857 } 858 859 static int ltr501_read_thresh(const struct iio_dev *indio_dev, 860 const struct iio_chan_spec *chan, 861 enum iio_event_type type, 862 enum iio_event_direction dir, 863 enum iio_event_info info, 864 int *val, int *val2) 865 { 866 const struct ltr501_data *data = iio_priv(indio_dev); 867 int ret, thresh_data; 868 869 switch (chan->type) { 870 case IIO_INTENSITY: 871 switch (dir) { 872 case IIO_EV_DIR_RISING: 873 ret = regmap_bulk_read(data->regmap, 874 LTR501_ALS_THRESH_UP, 875 &thresh_data, 2); 876 if (ret < 0) 877 return ret; 878 *val = thresh_data & LTR501_ALS_THRESH_MASK; 879 return IIO_VAL_INT; 880 case IIO_EV_DIR_FALLING: 881 ret = regmap_bulk_read(data->regmap, 882 LTR501_ALS_THRESH_LOW, 883 &thresh_data, 2); 884 if (ret < 0) 885 return ret; 886 *val = thresh_data & LTR501_ALS_THRESH_MASK; 887 return IIO_VAL_INT; 888 default: 889 return -EINVAL; 890 } 891 case IIO_PROXIMITY: 892 switch (dir) { 893 case IIO_EV_DIR_RISING: 894 ret = regmap_bulk_read(data->regmap, 895 LTR501_PS_THRESH_UP, 896 &thresh_data, 2); 897 if (ret < 0) 898 return ret; 899 *val = thresh_data & LTR501_PS_THRESH_MASK; 900 return IIO_VAL_INT; 901 case IIO_EV_DIR_FALLING: 902 ret = regmap_bulk_read(data->regmap, 903 LTR501_PS_THRESH_LOW, 904 &thresh_data, 2); 905 if (ret < 0) 906 return ret; 907 *val = thresh_data & LTR501_PS_THRESH_MASK; 908 return IIO_VAL_INT; 909 default: 910 return -EINVAL; 911 } 912 default: 913 return -EINVAL; 914 } 915 916 return -EINVAL; 917 } 918 919 static int ltr501_write_thresh(struct iio_dev *indio_dev, 920 const struct iio_chan_spec *chan, 921 enum iio_event_type type, 922 enum iio_event_direction dir, 923 enum iio_event_info info, 924 int val, int val2) 925 { 926 struct ltr501_data *data = iio_priv(indio_dev); 927 int ret; 928 929 if (val < 0) 930 return -EINVAL; 931 932 switch (chan->type) { 933 case IIO_INTENSITY: 934 if (val > LTR501_ALS_THRESH_MASK) 935 return -EINVAL; 936 switch (dir) { 937 case IIO_EV_DIR_RISING: 938 mutex_lock(&data->lock_als); 939 ret = regmap_bulk_write(data->regmap, 940 LTR501_ALS_THRESH_UP, 941 &val, 2); 942 mutex_unlock(&data->lock_als); 943 return ret; 944 case IIO_EV_DIR_FALLING: 945 mutex_lock(&data->lock_als); 946 ret = regmap_bulk_write(data->regmap, 947 LTR501_ALS_THRESH_LOW, 948 &val, 2); 949 mutex_unlock(&data->lock_als); 950 return ret; 951 default: 952 return -EINVAL; 953 } 954 case IIO_PROXIMITY: 955 if (val > LTR501_PS_THRESH_MASK) 956 return -EINVAL; 957 switch (dir) { 958 case IIO_EV_DIR_RISING: 959 mutex_lock(&data->lock_ps); 960 ret = regmap_bulk_write(data->regmap, 961 LTR501_PS_THRESH_UP, 962 &val, 2); 963 mutex_unlock(&data->lock_ps); 964 return ret; 965 case IIO_EV_DIR_FALLING: 966 mutex_lock(&data->lock_ps); 967 ret = regmap_bulk_write(data->regmap, 968 LTR501_PS_THRESH_LOW, 969 &val, 2); 970 mutex_unlock(&data->lock_ps); 971 return ret; 972 default: 973 return -EINVAL; 974 } 975 default: 976 return -EINVAL; 977 } 978 979 return -EINVAL; 980 } 981 982 static int ltr501_read_event(struct iio_dev *indio_dev, 983 const struct iio_chan_spec *chan, 984 enum iio_event_type type, 985 enum iio_event_direction dir, 986 enum iio_event_info info, 987 int *val, int *val2) 988 { 989 int ret; 990 991 switch (info) { 992 case IIO_EV_INFO_VALUE: 993 return ltr501_read_thresh(indio_dev, chan, type, dir, 994 info, val, val2); 995 case IIO_EV_INFO_PERIOD: 996 ret = ltr501_read_intr_prst(iio_priv(indio_dev), 997 chan->type, val2); 998 *val = *val2 / 1000000; 999 *val2 = *val2 % 1000000; 1000 return ret; 1001 default: 1002 return -EINVAL; 1003 } 1004 1005 return -EINVAL; 1006 } 1007 1008 static int ltr501_write_event(struct iio_dev *indio_dev, 1009 const struct iio_chan_spec *chan, 1010 enum iio_event_type type, 1011 enum iio_event_direction dir, 1012 enum iio_event_info info, 1013 int val, int val2) 1014 { 1015 switch (info) { 1016 case IIO_EV_INFO_VALUE: 1017 if (val2 != 0) 1018 return -EINVAL; 1019 return ltr501_write_thresh(indio_dev, chan, type, dir, 1020 info, val, val2); 1021 case IIO_EV_INFO_PERIOD: 1022 return ltr501_write_intr_prst(iio_priv(indio_dev), chan->type, 1023 val, val2); 1024 default: 1025 return -EINVAL; 1026 } 1027 1028 return -EINVAL; 1029 } 1030 1031 static int ltr501_read_event_config(struct iio_dev *indio_dev, 1032 const struct iio_chan_spec *chan, 1033 enum iio_event_type type, 1034 enum iio_event_direction dir) 1035 { 1036 struct ltr501_data *data = iio_priv(indio_dev); 1037 int ret, status; 1038 1039 switch (chan->type) { 1040 case IIO_INTENSITY: 1041 ret = regmap_field_read(data->reg_als_intr, &status); 1042 if (ret < 0) 1043 return ret; 1044 return status; 1045 case IIO_PROXIMITY: 1046 ret = regmap_field_read(data->reg_ps_intr, &status); 1047 if (ret < 0) 1048 return ret; 1049 return status; 1050 default: 1051 return -EINVAL; 1052 } 1053 1054 return -EINVAL; 1055 } 1056 1057 static int ltr501_write_event_config(struct iio_dev *indio_dev, 1058 const struct iio_chan_spec *chan, 1059 enum iio_event_type type, 1060 enum iio_event_direction dir, int state) 1061 { 1062 struct ltr501_data *data = iio_priv(indio_dev); 1063 int ret; 1064 1065 /* only 1 and 0 are valid inputs */ 1066 if (state != 1 && state != 0) 1067 return -EINVAL; 1068 1069 switch (chan->type) { 1070 case IIO_INTENSITY: 1071 mutex_lock(&data->lock_als); 1072 ret = regmap_field_write(data->reg_als_intr, state); 1073 mutex_unlock(&data->lock_als); 1074 return ret; 1075 case IIO_PROXIMITY: 1076 mutex_lock(&data->lock_ps); 1077 ret = regmap_field_write(data->reg_ps_intr, state); 1078 mutex_unlock(&data->lock_ps); 1079 return ret; 1080 default: 1081 return -EINVAL; 1082 } 1083 1084 return -EINVAL; 1085 } 1086 1087 static ssize_t ltr501_show_proximity_scale_avail(struct device *dev, 1088 struct device_attribute *attr, 1089 char *buf) 1090 { 1091 struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev)); 1092 const struct ltr501_chip_info *info = data->chip_info; 1093 ssize_t len = 0; 1094 int i; 1095 1096 for (i = 0; i < info->ps_gain_tbl_size; i++) { 1097 if (info->ps_gain[i].scale == LTR501_RESERVED_GAIN) 1098 continue; 1099 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ", 1100 info->ps_gain[i].scale, 1101 info->ps_gain[i].uscale); 1102 } 1103 1104 buf[len - 1] = '\n'; 1105 1106 return len; 1107 } 1108 1109 static ssize_t ltr501_show_intensity_scale_avail(struct device *dev, 1110 struct device_attribute *attr, 1111 char *buf) 1112 { 1113 struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev)); 1114 const struct ltr501_chip_info *info = data->chip_info; 1115 ssize_t len = 0; 1116 int i; 1117 1118 for (i = 0; i < info->als_gain_tbl_size; i++) { 1119 if (info->als_gain[i].scale == LTR501_RESERVED_GAIN) 1120 continue; 1121 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ", 1122 info->als_gain[i].scale, 1123 info->als_gain[i].uscale); 1124 } 1125 1126 buf[len - 1] = '\n'; 1127 1128 return len; 1129 } 1130 1131 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.05 0.1 0.2 0.4"); 1132 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("20 10 5 2 1 0.5"); 1133 1134 static IIO_DEVICE_ATTR(in_proximity_scale_available, S_IRUGO, 1135 ltr501_show_proximity_scale_avail, NULL, 0); 1136 static IIO_DEVICE_ATTR(in_intensity_scale_available, S_IRUGO, 1137 ltr501_show_intensity_scale_avail, NULL, 0); 1138 1139 static struct attribute *ltr501_attributes[] = { 1140 &iio_dev_attr_in_proximity_scale_available.dev_attr.attr, 1141 &iio_dev_attr_in_intensity_scale_available.dev_attr.attr, 1142 &iio_const_attr_integration_time_available.dev_attr.attr, 1143 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 1144 NULL 1145 }; 1146 1147 static struct attribute *ltr301_attributes[] = { 1148 &iio_dev_attr_in_intensity_scale_available.dev_attr.attr, 1149 &iio_const_attr_integration_time_available.dev_attr.attr, 1150 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 1151 NULL 1152 }; 1153 1154 static const struct attribute_group ltr501_attribute_group = { 1155 .attrs = ltr501_attributes, 1156 }; 1157 1158 static const struct attribute_group ltr301_attribute_group = { 1159 .attrs = ltr301_attributes, 1160 }; 1161 1162 static const struct iio_info ltr501_info_no_irq = { 1163 .read_raw = ltr501_read_raw, 1164 .write_raw = ltr501_write_raw, 1165 .attrs = <r501_attribute_group, 1166 }; 1167 1168 static const struct iio_info ltr501_info = { 1169 .read_raw = ltr501_read_raw, 1170 .write_raw = ltr501_write_raw, 1171 .attrs = <r501_attribute_group, 1172 .read_event_value = <r501_read_event, 1173 .write_event_value = <r501_write_event, 1174 .read_event_config = <r501_read_event_config, 1175 .write_event_config = <r501_write_event_config, 1176 }; 1177 1178 static const struct iio_info ltr301_info_no_irq = { 1179 .read_raw = ltr501_read_raw, 1180 .write_raw = ltr501_write_raw, 1181 .attrs = <r301_attribute_group, 1182 }; 1183 1184 static const struct iio_info ltr301_info = { 1185 .read_raw = ltr501_read_raw, 1186 .write_raw = ltr501_write_raw, 1187 .attrs = <r301_attribute_group, 1188 .read_event_value = <r501_read_event, 1189 .write_event_value = <r501_write_event, 1190 .read_event_config = <r501_read_event_config, 1191 .write_event_config = <r501_write_event_config, 1192 }; 1193 1194 static const struct ltr501_chip_info ltr501_chip_info_tbl[] = { 1195 [ltr501] = { 1196 .partid = 0x08, 1197 .als_gain = ltr501_als_gain_tbl, 1198 .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl), 1199 .ps_gain = ltr501_ps_gain_tbl, 1200 .ps_gain_tbl_size = ARRAY_SIZE(ltr501_ps_gain_tbl), 1201 .als_mode_active = BIT(0) | BIT(1), 1202 .als_gain_mask = BIT(3), 1203 .als_gain_shift = 3, 1204 .info = <r501_info, 1205 .info_no_irq = <r501_info_no_irq, 1206 .channels = ltr501_channels, 1207 .no_channels = ARRAY_SIZE(ltr501_channels), 1208 }, 1209 [ltr559] = { 1210 .partid = 0x09, 1211 .als_gain = ltr559_als_gain_tbl, 1212 .als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl), 1213 .ps_gain = ltr559_ps_gain_tbl, 1214 .ps_gain_tbl_size = ARRAY_SIZE(ltr559_ps_gain_tbl), 1215 .als_mode_active = BIT(0), 1216 .als_gain_mask = BIT(2) | BIT(3) | BIT(4), 1217 .als_gain_shift = 2, 1218 .info = <r501_info, 1219 .info_no_irq = <r501_info_no_irq, 1220 .channels = ltr501_channels, 1221 .no_channels = ARRAY_SIZE(ltr501_channels), 1222 }, 1223 [ltr301] = { 1224 .partid = 0x08, 1225 .als_gain = ltr501_als_gain_tbl, 1226 .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl), 1227 .als_mode_active = BIT(0) | BIT(1), 1228 .als_gain_mask = BIT(3), 1229 .als_gain_shift = 3, 1230 .info = <r301_info, 1231 .info_no_irq = <r301_info_no_irq, 1232 .channels = ltr301_channels, 1233 .no_channels = ARRAY_SIZE(ltr301_channels), 1234 }, 1235 [ltr303] = { 1236 .partid = 0x0A, 1237 .als_gain = ltr559_als_gain_tbl, 1238 .als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl), 1239 .als_mode_active = BIT(0), 1240 .als_gain_mask = BIT(2) | BIT(3) | BIT(4), 1241 .als_gain_shift = 2, 1242 .info = <r301_info, 1243 .info_no_irq = <r301_info_no_irq, 1244 .channels = ltr301_channels, 1245 .no_channels = ARRAY_SIZE(ltr301_channels), 1246 }, 1247 }; 1248 1249 static int ltr501_write_contr(struct ltr501_data *data, u8 als_val, u8 ps_val) 1250 { 1251 int ret; 1252 1253 ret = regmap_write(data->regmap, LTR501_ALS_CONTR, als_val); 1254 if (ret < 0) 1255 return ret; 1256 1257 return regmap_write(data->regmap, LTR501_PS_CONTR, ps_val); 1258 } 1259 1260 static irqreturn_t ltr501_trigger_handler(int irq, void *p) 1261 { 1262 struct iio_poll_func *pf = p; 1263 struct iio_dev *indio_dev = pf->indio_dev; 1264 struct ltr501_data *data = iio_priv(indio_dev); 1265 struct { 1266 u16 channels[3]; 1267 s64 ts __aligned(8); 1268 } scan; 1269 __le16 als_buf[2]; 1270 u8 mask = 0; 1271 int j = 0; 1272 int ret, psdata; 1273 1274 memset(&scan, 0, sizeof(scan)); 1275 1276 /* figure out which data needs to be ready */ 1277 if (test_bit(0, indio_dev->active_scan_mask) || 1278 test_bit(1, indio_dev->active_scan_mask)) 1279 mask |= LTR501_STATUS_ALS_RDY; 1280 if (test_bit(2, indio_dev->active_scan_mask)) 1281 mask |= LTR501_STATUS_PS_RDY; 1282 1283 ret = ltr501_drdy(data, mask); 1284 if (ret < 0) 1285 goto done; 1286 1287 if (mask & LTR501_STATUS_ALS_RDY) { 1288 ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1, 1289 als_buf, sizeof(als_buf)); 1290 if (ret < 0) 1291 return ret; 1292 if (test_bit(0, indio_dev->active_scan_mask)) 1293 scan.channels[j++] = le16_to_cpu(als_buf[1]); 1294 if (test_bit(1, indio_dev->active_scan_mask)) 1295 scan.channels[j++] = le16_to_cpu(als_buf[0]); 1296 } 1297 1298 if (mask & LTR501_STATUS_PS_RDY) { 1299 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA, 1300 &psdata, 2); 1301 if (ret < 0) 1302 goto done; 1303 scan.channels[j++] = psdata & LTR501_PS_DATA_MASK; 1304 } 1305 1306 iio_push_to_buffers_with_timestamp(indio_dev, &scan, 1307 iio_get_time_ns(indio_dev)); 1308 1309 done: 1310 iio_trigger_notify_done(indio_dev->trig); 1311 1312 return IRQ_HANDLED; 1313 } 1314 1315 static irqreturn_t ltr501_interrupt_handler(int irq, void *private) 1316 { 1317 struct iio_dev *indio_dev = private; 1318 struct ltr501_data *data = iio_priv(indio_dev); 1319 int ret, status; 1320 1321 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status); 1322 if (ret < 0) { 1323 dev_err(&data->client->dev, 1324 "irq read int reg failed\n"); 1325 return IRQ_HANDLED; 1326 } 1327 1328 if (status & LTR501_STATUS_ALS_INTR) 1329 iio_push_event(indio_dev, 1330 IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0, 1331 IIO_EV_TYPE_THRESH, 1332 IIO_EV_DIR_EITHER), 1333 iio_get_time_ns(indio_dev)); 1334 1335 if (status & LTR501_STATUS_PS_INTR) 1336 iio_push_event(indio_dev, 1337 IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0, 1338 IIO_EV_TYPE_THRESH, 1339 IIO_EV_DIR_EITHER), 1340 iio_get_time_ns(indio_dev)); 1341 1342 return IRQ_HANDLED; 1343 } 1344 1345 static int ltr501_init(struct ltr501_data *data) 1346 { 1347 int ret, status; 1348 1349 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status); 1350 if (ret < 0) 1351 return ret; 1352 1353 data->als_contr = status | data->chip_info->als_mode_active; 1354 1355 ret = regmap_read(data->regmap, LTR501_PS_CONTR, &status); 1356 if (ret < 0) 1357 return ret; 1358 1359 data->ps_contr = status | LTR501_CONTR_ACTIVE; 1360 1361 ret = ltr501_read_intr_prst(data, IIO_INTENSITY, &data->als_period); 1362 if (ret < 0) 1363 return ret; 1364 1365 ret = ltr501_read_intr_prst(data, IIO_PROXIMITY, &data->ps_period); 1366 if (ret < 0) 1367 return ret; 1368 1369 return ltr501_write_contr(data, data->als_contr, data->ps_contr); 1370 } 1371 1372 static bool ltr501_is_volatile_reg(struct device *dev, unsigned int reg) 1373 { 1374 switch (reg) { 1375 case LTR501_ALS_DATA1: 1376 case LTR501_ALS_DATA1_UPPER: 1377 case LTR501_ALS_DATA0: 1378 case LTR501_ALS_DATA0_UPPER: 1379 case LTR501_ALS_PS_STATUS: 1380 case LTR501_PS_DATA: 1381 case LTR501_PS_DATA_UPPER: 1382 return true; 1383 default: 1384 return false; 1385 } 1386 } 1387 1388 static const struct regmap_config ltr501_regmap_config = { 1389 .name = LTR501_REGMAP_NAME, 1390 .reg_bits = 8, 1391 .val_bits = 8, 1392 .max_register = LTR501_MAX_REG, 1393 .cache_type = REGCACHE_RBTREE, 1394 .volatile_reg = ltr501_is_volatile_reg, 1395 }; 1396 1397 static void ltr501_disable_regulators(void *d) 1398 { 1399 struct ltr501_data *data = d; 1400 1401 regulator_bulk_disable(ARRAY_SIZE(data->regulators), data->regulators); 1402 } 1403 1404 static int ltr501_powerdown(struct ltr501_data *data) 1405 { 1406 return ltr501_write_contr(data, data->als_contr & 1407 ~data->chip_info->als_mode_active, 1408 data->ps_contr & ~LTR501_CONTR_ACTIVE); 1409 } 1410 1411 static const char *ltr501_match_acpi_device(struct device *dev, int *chip_idx) 1412 { 1413 const struct acpi_device_id *id; 1414 1415 id = acpi_match_device(dev->driver->acpi_match_table, dev); 1416 if (!id) 1417 return NULL; 1418 *chip_idx = id->driver_data; 1419 return dev_name(dev); 1420 } 1421 1422 static int ltr501_probe(struct i2c_client *client, 1423 const struct i2c_device_id *id) 1424 { 1425 struct ltr501_data *data; 1426 struct iio_dev *indio_dev; 1427 struct regmap *regmap; 1428 int ret, partid, chip_idx = 0; 1429 const char *name = NULL; 1430 1431 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1432 if (!indio_dev) 1433 return -ENOMEM; 1434 1435 regmap = devm_regmap_init_i2c(client, <r501_regmap_config); 1436 if (IS_ERR(regmap)) { 1437 dev_err(&client->dev, "Regmap initialization failed.\n"); 1438 return PTR_ERR(regmap); 1439 } 1440 1441 data = iio_priv(indio_dev); 1442 i2c_set_clientdata(client, indio_dev); 1443 data->client = client; 1444 data->regmap = regmap; 1445 mutex_init(&data->lock_als); 1446 mutex_init(&data->lock_ps); 1447 1448 data->regulators[0].supply = "vdd"; 1449 data->regulators[1].supply = "vddio"; 1450 ret = devm_regulator_bulk_get(&client->dev, 1451 ARRAY_SIZE(data->regulators), 1452 data->regulators); 1453 if (ret) 1454 return dev_err_probe(&client->dev, ret, 1455 "Failed to get regulators\n"); 1456 1457 ret = regulator_bulk_enable(ARRAY_SIZE(data->regulators), 1458 data->regulators); 1459 if (ret) 1460 return ret; 1461 1462 ret = devm_add_action_or_reset(&client->dev, 1463 ltr501_disable_regulators, data); 1464 if (ret) 1465 return ret; 1466 1467 data->reg_it = devm_regmap_field_alloc(&client->dev, regmap, 1468 reg_field_it); 1469 if (IS_ERR(data->reg_it)) { 1470 dev_err(&client->dev, "Integ time reg field init failed.\n"); 1471 return PTR_ERR(data->reg_it); 1472 } 1473 1474 data->reg_als_intr = devm_regmap_field_alloc(&client->dev, regmap, 1475 reg_field_als_intr); 1476 if (IS_ERR(data->reg_als_intr)) { 1477 dev_err(&client->dev, "ALS intr mode reg field init failed\n"); 1478 return PTR_ERR(data->reg_als_intr); 1479 } 1480 1481 data->reg_ps_intr = devm_regmap_field_alloc(&client->dev, regmap, 1482 reg_field_ps_intr); 1483 if (IS_ERR(data->reg_ps_intr)) { 1484 dev_err(&client->dev, "PS intr mode reg field init failed.\n"); 1485 return PTR_ERR(data->reg_ps_intr); 1486 } 1487 1488 data->reg_als_rate = devm_regmap_field_alloc(&client->dev, regmap, 1489 reg_field_als_rate); 1490 if (IS_ERR(data->reg_als_rate)) { 1491 dev_err(&client->dev, "ALS samp rate field init failed.\n"); 1492 return PTR_ERR(data->reg_als_rate); 1493 } 1494 1495 data->reg_ps_rate = devm_regmap_field_alloc(&client->dev, regmap, 1496 reg_field_ps_rate); 1497 if (IS_ERR(data->reg_ps_rate)) { 1498 dev_err(&client->dev, "PS samp rate field init failed.\n"); 1499 return PTR_ERR(data->reg_ps_rate); 1500 } 1501 1502 data->reg_als_prst = devm_regmap_field_alloc(&client->dev, regmap, 1503 reg_field_als_prst); 1504 if (IS_ERR(data->reg_als_prst)) { 1505 dev_err(&client->dev, "ALS prst reg field init failed\n"); 1506 return PTR_ERR(data->reg_als_prst); 1507 } 1508 1509 data->reg_ps_prst = devm_regmap_field_alloc(&client->dev, regmap, 1510 reg_field_ps_prst); 1511 if (IS_ERR(data->reg_ps_prst)) { 1512 dev_err(&client->dev, "PS prst reg field init failed.\n"); 1513 return PTR_ERR(data->reg_ps_prst); 1514 } 1515 1516 ret = regmap_read(data->regmap, LTR501_PART_ID, &partid); 1517 if (ret < 0) 1518 return ret; 1519 1520 if (id) { 1521 name = id->name; 1522 chip_idx = id->driver_data; 1523 } else if (ACPI_HANDLE(&client->dev)) { 1524 name = ltr501_match_acpi_device(&client->dev, &chip_idx); 1525 } else { 1526 return -ENODEV; 1527 } 1528 1529 data->chip_info = <r501_chip_info_tbl[chip_idx]; 1530 1531 if ((partid >> 4) != data->chip_info->partid) 1532 return -ENODEV; 1533 1534 indio_dev->info = data->chip_info->info; 1535 indio_dev->channels = data->chip_info->channels; 1536 indio_dev->num_channels = data->chip_info->no_channels; 1537 indio_dev->name = name; 1538 indio_dev->modes = INDIO_DIRECT_MODE; 1539 1540 ret = ltr501_init(data); 1541 if (ret < 0) 1542 return ret; 1543 1544 if (client->irq > 0) { 1545 ret = devm_request_threaded_irq(&client->dev, client->irq, 1546 NULL, ltr501_interrupt_handler, 1547 IRQF_TRIGGER_FALLING | 1548 IRQF_ONESHOT, 1549 "ltr501_thresh_event", 1550 indio_dev); 1551 if (ret) { 1552 dev_err(&client->dev, "request irq (%d) failed\n", 1553 client->irq); 1554 return ret; 1555 } 1556 } else { 1557 indio_dev->info = data->chip_info->info_no_irq; 1558 } 1559 1560 ret = iio_triggered_buffer_setup(indio_dev, NULL, 1561 ltr501_trigger_handler, NULL); 1562 if (ret) 1563 goto powerdown_on_error; 1564 1565 ret = iio_device_register(indio_dev); 1566 if (ret) 1567 goto error_unreg_buffer; 1568 1569 return 0; 1570 1571 error_unreg_buffer: 1572 iio_triggered_buffer_cleanup(indio_dev); 1573 powerdown_on_error: 1574 ltr501_powerdown(data); 1575 return ret; 1576 } 1577 1578 static int ltr501_remove(struct i2c_client *client) 1579 { 1580 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1581 1582 iio_device_unregister(indio_dev); 1583 iio_triggered_buffer_cleanup(indio_dev); 1584 ltr501_powerdown(iio_priv(indio_dev)); 1585 1586 return 0; 1587 } 1588 1589 #ifdef CONFIG_PM_SLEEP 1590 static int ltr501_suspend(struct device *dev) 1591 { 1592 struct ltr501_data *data = iio_priv(i2c_get_clientdata( 1593 to_i2c_client(dev))); 1594 return ltr501_powerdown(data); 1595 } 1596 1597 static int ltr501_resume(struct device *dev) 1598 { 1599 struct ltr501_data *data = iio_priv(i2c_get_clientdata( 1600 to_i2c_client(dev))); 1601 1602 return ltr501_write_contr(data, data->als_contr, 1603 data->ps_contr); 1604 } 1605 #endif 1606 1607 static SIMPLE_DEV_PM_OPS(ltr501_pm_ops, ltr501_suspend, ltr501_resume); 1608 1609 static const struct acpi_device_id ltr_acpi_match[] = { 1610 {"LTER0501", ltr501}, 1611 {"LTER0559", ltr559}, 1612 {"LTER0301", ltr301}, 1613 { }, 1614 }; 1615 MODULE_DEVICE_TABLE(acpi, ltr_acpi_match); 1616 1617 static const struct i2c_device_id ltr501_id[] = { 1618 { "ltr501", ltr501}, 1619 { "ltr559", ltr559}, 1620 { "ltr301", ltr301}, 1621 { "ltr303", ltr303}, 1622 { } 1623 }; 1624 MODULE_DEVICE_TABLE(i2c, ltr501_id); 1625 1626 static const struct of_device_id ltr501_of_match[] = { 1627 { .compatible = "liteon,ltr501", }, 1628 { .compatible = "liteon,ltr559", }, 1629 { .compatible = "liteon,ltr301", }, 1630 { .compatible = "liteon,ltr303", }, 1631 {} 1632 }; 1633 MODULE_DEVICE_TABLE(of, ltr501_of_match); 1634 1635 static struct i2c_driver ltr501_driver = { 1636 .driver = { 1637 .name = LTR501_DRV_NAME, 1638 .of_match_table = ltr501_of_match, 1639 .pm = <r501_pm_ops, 1640 .acpi_match_table = ACPI_PTR(ltr_acpi_match), 1641 }, 1642 .probe = ltr501_probe, 1643 .remove = ltr501_remove, 1644 .id_table = ltr501_id, 1645 }; 1646 1647 module_i2c_driver(ltr501_driver); 1648 1649 MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>"); 1650 MODULE_DESCRIPTION("Lite-On LTR501 ambient light and proximity sensor driver"); 1651 MODULE_LICENSE("GPL"); 1652