1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * ltr501.c - Support for Lite-On LTR501 ambient light and proximity sensor 4 * 5 * Copyright 2014 Peter Meerwald <pmeerw@pmeerw.net> 6 * 7 * 7-bit I2C slave address 0x23 8 * 9 * TODO: IR LED characteristics 10 */ 11 12 #include <linux/module.h> 13 #include <linux/i2c.h> 14 #include <linux/err.h> 15 #include <linux/delay.h> 16 #include <linux/regmap.h> 17 #include <linux/acpi.h> 18 19 #include <linux/iio/iio.h> 20 #include <linux/iio/events.h> 21 #include <linux/iio/sysfs.h> 22 #include <linux/iio/trigger_consumer.h> 23 #include <linux/iio/buffer.h> 24 #include <linux/iio/triggered_buffer.h> 25 26 #define LTR501_DRV_NAME "ltr501" 27 28 #define LTR501_ALS_CONTR 0x80 /* ALS operation mode, SW reset */ 29 #define LTR501_PS_CONTR 0x81 /* PS operation mode */ 30 #define LTR501_PS_MEAS_RATE 0x84 /* measurement rate*/ 31 #define LTR501_ALS_MEAS_RATE 0x85 /* ALS integ time, measurement rate*/ 32 #define LTR501_PART_ID 0x86 33 #define LTR501_MANUFAC_ID 0x87 34 #define LTR501_ALS_DATA1 0x88 /* 16-bit, little endian */ 35 #define LTR501_ALS_DATA0 0x8a /* 16-bit, little endian */ 36 #define LTR501_ALS_PS_STATUS 0x8c 37 #define LTR501_PS_DATA 0x8d /* 16-bit, little endian */ 38 #define LTR501_INTR 0x8f /* output mode, polarity, mode */ 39 #define LTR501_PS_THRESH_UP 0x90 /* 11 bit, ps upper threshold */ 40 #define LTR501_PS_THRESH_LOW 0x92 /* 11 bit, ps lower threshold */ 41 #define LTR501_ALS_THRESH_UP 0x97 /* 16 bit, ALS upper threshold */ 42 #define LTR501_ALS_THRESH_LOW 0x99 /* 16 bit, ALS lower threshold */ 43 #define LTR501_INTR_PRST 0x9e /* ps thresh, als thresh */ 44 #define LTR501_MAX_REG 0x9f 45 46 #define LTR501_ALS_CONTR_SW_RESET BIT(2) 47 #define LTR501_CONTR_PS_GAIN_MASK (BIT(3) | BIT(2)) 48 #define LTR501_CONTR_PS_GAIN_SHIFT 2 49 #define LTR501_CONTR_ALS_GAIN_MASK BIT(3) 50 #define LTR501_CONTR_ACTIVE BIT(1) 51 52 #define LTR501_STATUS_ALS_INTR BIT(3) 53 #define LTR501_STATUS_ALS_RDY BIT(2) 54 #define LTR501_STATUS_PS_INTR BIT(1) 55 #define LTR501_STATUS_PS_RDY BIT(0) 56 57 #define LTR501_PS_DATA_MASK 0x7ff 58 #define LTR501_PS_THRESH_MASK 0x7ff 59 #define LTR501_ALS_THRESH_MASK 0xffff 60 61 #define LTR501_ALS_DEF_PERIOD 500000 62 #define LTR501_PS_DEF_PERIOD 100000 63 64 #define LTR501_REGMAP_NAME "ltr501_regmap" 65 66 #define LTR501_LUX_CONV(vis_coeff, vis_data, ir_coeff, ir_data) \ 67 ((vis_coeff * vis_data) - (ir_coeff * ir_data)) 68 69 static const int int_time_mapping[] = {100000, 50000, 200000, 400000}; 70 71 static const struct reg_field reg_field_it = 72 REG_FIELD(LTR501_ALS_MEAS_RATE, 3, 4); 73 static const struct reg_field reg_field_als_intr = 74 REG_FIELD(LTR501_INTR, 1, 1); 75 static const struct reg_field reg_field_ps_intr = 76 REG_FIELD(LTR501_INTR, 0, 0); 77 static const struct reg_field reg_field_als_rate = 78 REG_FIELD(LTR501_ALS_MEAS_RATE, 0, 2); 79 static const struct reg_field reg_field_ps_rate = 80 REG_FIELD(LTR501_PS_MEAS_RATE, 0, 3); 81 static const struct reg_field reg_field_als_prst = 82 REG_FIELD(LTR501_INTR_PRST, 0, 3); 83 static const struct reg_field reg_field_ps_prst = 84 REG_FIELD(LTR501_INTR_PRST, 4, 7); 85 86 struct ltr501_samp_table { 87 int freq_val; /* repetition frequency in micro HZ*/ 88 int time_val; /* repetition rate in micro seconds */ 89 }; 90 91 #define LTR501_RESERVED_GAIN -1 92 93 enum { 94 ltr501 = 0, 95 ltr559, 96 ltr301, 97 }; 98 99 struct ltr501_gain { 100 int scale; 101 int uscale; 102 }; 103 104 static const struct ltr501_gain ltr501_als_gain_tbl[] = { 105 {1, 0}, 106 {0, 5000}, 107 }; 108 109 static const struct ltr501_gain ltr559_als_gain_tbl[] = { 110 {1, 0}, 111 {0, 500000}, 112 {0, 250000}, 113 {0, 125000}, 114 {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN}, 115 {LTR501_RESERVED_GAIN, LTR501_RESERVED_GAIN}, 116 {0, 20000}, 117 {0, 10000}, 118 }; 119 120 static const struct ltr501_gain ltr501_ps_gain_tbl[] = { 121 {1, 0}, 122 {0, 250000}, 123 {0, 125000}, 124 {0, 62500}, 125 }; 126 127 static const struct ltr501_gain ltr559_ps_gain_tbl[] = { 128 {0, 62500}, /* x16 gain */ 129 {0, 31250}, /* x32 gain */ 130 {0, 15625}, /* bits X1 are for x64 gain */ 131 {0, 15624}, 132 }; 133 134 struct ltr501_chip_info { 135 u8 partid; 136 const struct ltr501_gain *als_gain; 137 int als_gain_tbl_size; 138 const struct ltr501_gain *ps_gain; 139 int ps_gain_tbl_size; 140 u8 als_mode_active; 141 u8 als_gain_mask; 142 u8 als_gain_shift; 143 struct iio_chan_spec const *channels; 144 const int no_channels; 145 const struct iio_info *info; 146 const struct iio_info *info_no_irq; 147 }; 148 149 struct ltr501_data { 150 struct i2c_client *client; 151 struct mutex lock_als, lock_ps; 152 struct ltr501_chip_info *chip_info; 153 u8 als_contr, ps_contr; 154 int als_period, ps_period; /* period in micro seconds */ 155 struct regmap *regmap; 156 struct regmap_field *reg_it; 157 struct regmap_field *reg_als_intr; 158 struct regmap_field *reg_ps_intr; 159 struct regmap_field *reg_als_rate; 160 struct regmap_field *reg_ps_rate; 161 struct regmap_field *reg_als_prst; 162 struct regmap_field *reg_ps_prst; 163 }; 164 165 static const struct ltr501_samp_table ltr501_als_samp_table[] = { 166 {20000000, 50000}, {10000000, 100000}, 167 {5000000, 200000}, {2000000, 500000}, 168 {1000000, 1000000}, {500000, 2000000}, 169 {500000, 2000000}, {500000, 2000000} 170 }; 171 172 static const struct ltr501_samp_table ltr501_ps_samp_table[] = { 173 {20000000, 50000}, {14285714, 70000}, 174 {10000000, 100000}, {5000000, 200000}, 175 {2000000, 500000}, {1000000, 1000000}, 176 {500000, 2000000}, {500000, 2000000}, 177 {500000, 2000000} 178 }; 179 180 static int ltr501_match_samp_freq(const struct ltr501_samp_table *tab, 181 int len, int val, int val2) 182 { 183 int i, freq; 184 185 freq = val * 1000000 + val2; 186 187 for (i = 0; i < len; i++) { 188 if (tab[i].freq_val == freq) 189 return i; 190 } 191 192 return -EINVAL; 193 } 194 195 static int ltr501_als_read_samp_freq(const struct ltr501_data *data, 196 int *val, int *val2) 197 { 198 int ret, i; 199 200 ret = regmap_field_read(data->reg_als_rate, &i); 201 if (ret < 0) 202 return ret; 203 204 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table)) 205 return -EINVAL; 206 207 *val = ltr501_als_samp_table[i].freq_val / 1000000; 208 *val2 = ltr501_als_samp_table[i].freq_val % 1000000; 209 210 return IIO_VAL_INT_PLUS_MICRO; 211 } 212 213 static int ltr501_ps_read_samp_freq(const struct ltr501_data *data, 214 int *val, int *val2) 215 { 216 int ret, i; 217 218 ret = regmap_field_read(data->reg_ps_rate, &i); 219 if (ret < 0) 220 return ret; 221 222 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table)) 223 return -EINVAL; 224 225 *val = ltr501_ps_samp_table[i].freq_val / 1000000; 226 *val2 = ltr501_ps_samp_table[i].freq_val % 1000000; 227 228 return IIO_VAL_INT_PLUS_MICRO; 229 } 230 231 static int ltr501_als_write_samp_freq(struct ltr501_data *data, 232 int val, int val2) 233 { 234 int i, ret; 235 236 i = ltr501_match_samp_freq(ltr501_als_samp_table, 237 ARRAY_SIZE(ltr501_als_samp_table), 238 val, val2); 239 240 if (i < 0) 241 return i; 242 243 mutex_lock(&data->lock_als); 244 ret = regmap_field_write(data->reg_als_rate, i); 245 mutex_unlock(&data->lock_als); 246 247 return ret; 248 } 249 250 static int ltr501_ps_write_samp_freq(struct ltr501_data *data, 251 int val, int val2) 252 { 253 int i, ret; 254 255 i = ltr501_match_samp_freq(ltr501_ps_samp_table, 256 ARRAY_SIZE(ltr501_ps_samp_table), 257 val, val2); 258 259 if (i < 0) 260 return i; 261 262 mutex_lock(&data->lock_ps); 263 ret = regmap_field_write(data->reg_ps_rate, i); 264 mutex_unlock(&data->lock_ps); 265 266 return ret; 267 } 268 269 static int ltr501_als_read_samp_period(const struct ltr501_data *data, int *val) 270 { 271 int ret, i; 272 273 ret = regmap_field_read(data->reg_als_rate, &i); 274 if (ret < 0) 275 return ret; 276 277 if (i < 0 || i >= ARRAY_SIZE(ltr501_als_samp_table)) 278 return -EINVAL; 279 280 *val = ltr501_als_samp_table[i].time_val; 281 282 return IIO_VAL_INT; 283 } 284 285 static int ltr501_ps_read_samp_period(const struct ltr501_data *data, int *val) 286 { 287 int ret, i; 288 289 ret = regmap_field_read(data->reg_ps_rate, &i); 290 if (ret < 0) 291 return ret; 292 293 if (i < 0 || i >= ARRAY_SIZE(ltr501_ps_samp_table)) 294 return -EINVAL; 295 296 *val = ltr501_ps_samp_table[i].time_val; 297 298 return IIO_VAL_INT; 299 } 300 301 /* IR and visible spectrum coeff's are given in data sheet */ 302 static unsigned long ltr501_calculate_lux(u16 vis_data, u16 ir_data) 303 { 304 unsigned long ratio, lux; 305 306 if (vis_data == 0) 307 return 0; 308 309 /* multiply numerator by 100 to avoid handling ratio < 1 */ 310 ratio = DIV_ROUND_UP(ir_data * 100, ir_data + vis_data); 311 312 if (ratio < 45) 313 lux = LTR501_LUX_CONV(1774, vis_data, -1105, ir_data); 314 else if (ratio >= 45 && ratio < 64) 315 lux = LTR501_LUX_CONV(3772, vis_data, 1336, ir_data); 316 else if (ratio >= 64 && ratio < 85) 317 lux = LTR501_LUX_CONV(1690, vis_data, 169, ir_data); 318 else 319 lux = 0; 320 321 return lux / 1000; 322 } 323 324 static int ltr501_drdy(const struct ltr501_data *data, u8 drdy_mask) 325 { 326 int tries = 100; 327 int ret, status; 328 329 while (tries--) { 330 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status); 331 if (ret < 0) 332 return ret; 333 if ((status & drdy_mask) == drdy_mask) 334 return 0; 335 msleep(25); 336 } 337 338 dev_err(&data->client->dev, "ltr501_drdy() failed, data not ready\n"); 339 return -EIO; 340 } 341 342 static int ltr501_set_it_time(struct ltr501_data *data, int it) 343 { 344 int ret, i, index = -1, status; 345 346 for (i = 0; i < ARRAY_SIZE(int_time_mapping); i++) { 347 if (int_time_mapping[i] == it) { 348 index = i; 349 break; 350 } 351 } 352 /* Make sure integ time index is valid */ 353 if (index < 0) 354 return -EINVAL; 355 356 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status); 357 if (ret < 0) 358 return ret; 359 360 if (status & LTR501_CONTR_ALS_GAIN_MASK) { 361 /* 362 * 200 ms and 400 ms integ time can only be 363 * used in dynamic range 1 364 */ 365 if (index > 1) 366 return -EINVAL; 367 } else 368 /* 50 ms integ time can only be used in dynamic range 2 */ 369 if (index == 1) 370 return -EINVAL; 371 372 return regmap_field_write(data->reg_it, index); 373 } 374 375 /* read int time in micro seconds */ 376 static int ltr501_read_it_time(const struct ltr501_data *data, 377 int *val, int *val2) 378 { 379 int ret, index; 380 381 ret = regmap_field_read(data->reg_it, &index); 382 if (ret < 0) 383 return ret; 384 385 /* Make sure integ time index is valid */ 386 if (index < 0 || index >= ARRAY_SIZE(int_time_mapping)) 387 return -EINVAL; 388 389 *val2 = int_time_mapping[index]; 390 *val = 0; 391 392 return IIO_VAL_INT_PLUS_MICRO; 393 } 394 395 static int ltr501_read_als(const struct ltr501_data *data, __le16 buf[2]) 396 { 397 int ret; 398 399 ret = ltr501_drdy(data, LTR501_STATUS_ALS_RDY); 400 if (ret < 0) 401 return ret; 402 /* always read both ALS channels in given order */ 403 return regmap_bulk_read(data->regmap, LTR501_ALS_DATA1, 404 buf, 2 * sizeof(__le16)); 405 } 406 407 static int ltr501_read_ps(const struct ltr501_data *data) 408 { 409 int ret, status; 410 411 ret = ltr501_drdy(data, LTR501_STATUS_PS_RDY); 412 if (ret < 0) 413 return ret; 414 415 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA, 416 &status, 2); 417 if (ret < 0) 418 return ret; 419 420 return status; 421 } 422 423 static int ltr501_read_intr_prst(const struct ltr501_data *data, 424 enum iio_chan_type type, 425 int *val2) 426 { 427 int ret, samp_period, prst; 428 429 switch (type) { 430 case IIO_INTENSITY: 431 ret = regmap_field_read(data->reg_als_prst, &prst); 432 if (ret < 0) 433 return ret; 434 435 ret = ltr501_als_read_samp_period(data, &samp_period); 436 437 if (ret < 0) 438 return ret; 439 *val2 = samp_period * prst; 440 return IIO_VAL_INT_PLUS_MICRO; 441 case IIO_PROXIMITY: 442 ret = regmap_field_read(data->reg_ps_prst, &prst); 443 if (ret < 0) 444 return ret; 445 446 ret = ltr501_ps_read_samp_period(data, &samp_period); 447 448 if (ret < 0) 449 return ret; 450 451 *val2 = samp_period * prst; 452 return IIO_VAL_INT_PLUS_MICRO; 453 default: 454 return -EINVAL; 455 } 456 457 return -EINVAL; 458 } 459 460 static int ltr501_write_intr_prst(struct ltr501_data *data, 461 enum iio_chan_type type, 462 int val, int val2) 463 { 464 int ret, samp_period, new_val; 465 unsigned long period; 466 467 if (val < 0 || val2 < 0) 468 return -EINVAL; 469 470 /* period in microseconds */ 471 period = ((val * 1000000) + val2); 472 473 switch (type) { 474 case IIO_INTENSITY: 475 ret = ltr501_als_read_samp_period(data, &samp_period); 476 if (ret < 0) 477 return ret; 478 479 /* period should be atleast equal to sampling period */ 480 if (period < samp_period) 481 return -EINVAL; 482 483 new_val = DIV_ROUND_UP(period, samp_period); 484 if (new_val < 0 || new_val > 0x0f) 485 return -EINVAL; 486 487 mutex_lock(&data->lock_als); 488 ret = regmap_field_write(data->reg_als_prst, new_val); 489 mutex_unlock(&data->lock_als); 490 if (ret >= 0) 491 data->als_period = period; 492 493 return ret; 494 case IIO_PROXIMITY: 495 ret = ltr501_ps_read_samp_period(data, &samp_period); 496 if (ret < 0) 497 return ret; 498 499 /* period should be atleast equal to rate */ 500 if (period < samp_period) 501 return -EINVAL; 502 503 new_val = DIV_ROUND_UP(period, samp_period); 504 if (new_val < 0 || new_val > 0x0f) 505 return -EINVAL; 506 507 mutex_lock(&data->lock_ps); 508 ret = regmap_field_write(data->reg_ps_prst, new_val); 509 mutex_unlock(&data->lock_ps); 510 if (ret >= 0) 511 data->ps_period = period; 512 513 return ret; 514 default: 515 return -EINVAL; 516 } 517 518 return -EINVAL; 519 } 520 521 static const struct iio_event_spec ltr501_als_event_spec[] = { 522 { 523 .type = IIO_EV_TYPE_THRESH, 524 .dir = IIO_EV_DIR_RISING, 525 .mask_separate = BIT(IIO_EV_INFO_VALUE), 526 }, { 527 .type = IIO_EV_TYPE_THRESH, 528 .dir = IIO_EV_DIR_FALLING, 529 .mask_separate = BIT(IIO_EV_INFO_VALUE), 530 }, { 531 .type = IIO_EV_TYPE_THRESH, 532 .dir = IIO_EV_DIR_EITHER, 533 .mask_separate = BIT(IIO_EV_INFO_ENABLE) | 534 BIT(IIO_EV_INFO_PERIOD), 535 }, 536 537 }; 538 539 static const struct iio_event_spec ltr501_pxs_event_spec[] = { 540 { 541 .type = IIO_EV_TYPE_THRESH, 542 .dir = IIO_EV_DIR_RISING, 543 .mask_separate = BIT(IIO_EV_INFO_VALUE), 544 }, { 545 .type = IIO_EV_TYPE_THRESH, 546 .dir = IIO_EV_DIR_FALLING, 547 .mask_separate = BIT(IIO_EV_INFO_VALUE), 548 }, { 549 .type = IIO_EV_TYPE_THRESH, 550 .dir = IIO_EV_DIR_EITHER, 551 .mask_separate = BIT(IIO_EV_INFO_ENABLE) | 552 BIT(IIO_EV_INFO_PERIOD), 553 }, 554 }; 555 556 #define LTR501_INTENSITY_CHANNEL(_idx, _addr, _mod, _shared, \ 557 _evspec, _evsize) { \ 558 .type = IIO_INTENSITY, \ 559 .modified = 1, \ 560 .address = (_addr), \ 561 .channel2 = (_mod), \ 562 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 563 .info_mask_shared_by_type = (_shared), \ 564 .scan_index = (_idx), \ 565 .scan_type = { \ 566 .sign = 'u', \ 567 .realbits = 16, \ 568 .storagebits = 16, \ 569 .endianness = IIO_CPU, \ 570 }, \ 571 .event_spec = _evspec,\ 572 .num_event_specs = _evsize,\ 573 } 574 575 #define LTR501_LIGHT_CHANNEL() { \ 576 .type = IIO_LIGHT, \ 577 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), \ 578 .scan_index = -1, \ 579 } 580 581 static const struct iio_chan_spec ltr501_channels[] = { 582 LTR501_LIGHT_CHANNEL(), 583 LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0, 584 ltr501_als_event_spec, 585 ARRAY_SIZE(ltr501_als_event_spec)), 586 LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR, 587 BIT(IIO_CHAN_INFO_SCALE) | 588 BIT(IIO_CHAN_INFO_INT_TIME) | 589 BIT(IIO_CHAN_INFO_SAMP_FREQ), 590 NULL, 0), 591 { 592 .type = IIO_PROXIMITY, 593 .address = LTR501_PS_DATA, 594 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 595 BIT(IIO_CHAN_INFO_SCALE), 596 .scan_index = 2, 597 .scan_type = { 598 .sign = 'u', 599 .realbits = 11, 600 .storagebits = 16, 601 .endianness = IIO_CPU, 602 }, 603 .event_spec = ltr501_pxs_event_spec, 604 .num_event_specs = ARRAY_SIZE(ltr501_pxs_event_spec), 605 }, 606 IIO_CHAN_SOFT_TIMESTAMP(3), 607 }; 608 609 static const struct iio_chan_spec ltr301_channels[] = { 610 LTR501_LIGHT_CHANNEL(), 611 LTR501_INTENSITY_CHANNEL(0, LTR501_ALS_DATA0, IIO_MOD_LIGHT_BOTH, 0, 612 ltr501_als_event_spec, 613 ARRAY_SIZE(ltr501_als_event_spec)), 614 LTR501_INTENSITY_CHANNEL(1, LTR501_ALS_DATA1, IIO_MOD_LIGHT_IR, 615 BIT(IIO_CHAN_INFO_SCALE) | 616 BIT(IIO_CHAN_INFO_INT_TIME) | 617 BIT(IIO_CHAN_INFO_SAMP_FREQ), 618 NULL, 0), 619 IIO_CHAN_SOFT_TIMESTAMP(2), 620 }; 621 622 static int ltr501_read_raw(struct iio_dev *indio_dev, 623 struct iio_chan_spec const *chan, 624 int *val, int *val2, long mask) 625 { 626 struct ltr501_data *data = iio_priv(indio_dev); 627 __le16 buf[2]; 628 int ret, i; 629 630 switch (mask) { 631 case IIO_CHAN_INFO_PROCESSED: 632 switch (chan->type) { 633 case IIO_LIGHT: 634 ret = iio_device_claim_direct_mode(indio_dev); 635 if (ret) 636 return ret; 637 638 mutex_lock(&data->lock_als); 639 ret = ltr501_read_als(data, buf); 640 mutex_unlock(&data->lock_als); 641 iio_device_release_direct_mode(indio_dev); 642 if (ret < 0) 643 return ret; 644 *val = ltr501_calculate_lux(le16_to_cpu(buf[1]), 645 le16_to_cpu(buf[0])); 646 return IIO_VAL_INT; 647 default: 648 return -EINVAL; 649 } 650 case IIO_CHAN_INFO_RAW: 651 ret = iio_device_claim_direct_mode(indio_dev); 652 if (ret) 653 return ret; 654 655 switch (chan->type) { 656 case IIO_INTENSITY: 657 mutex_lock(&data->lock_als); 658 ret = ltr501_read_als(data, buf); 659 mutex_unlock(&data->lock_als); 660 if (ret < 0) 661 break; 662 *val = le16_to_cpu(chan->address == LTR501_ALS_DATA1 ? 663 buf[0] : buf[1]); 664 ret = IIO_VAL_INT; 665 break; 666 case IIO_PROXIMITY: 667 mutex_lock(&data->lock_ps); 668 ret = ltr501_read_ps(data); 669 mutex_unlock(&data->lock_ps); 670 if (ret < 0) 671 break; 672 *val = ret & LTR501_PS_DATA_MASK; 673 ret = IIO_VAL_INT; 674 break; 675 default: 676 ret = -EINVAL; 677 break; 678 } 679 680 iio_device_release_direct_mode(indio_dev); 681 return ret; 682 683 case IIO_CHAN_INFO_SCALE: 684 switch (chan->type) { 685 case IIO_INTENSITY: 686 i = (data->als_contr & data->chip_info->als_gain_mask) 687 >> data->chip_info->als_gain_shift; 688 *val = data->chip_info->als_gain[i].scale; 689 *val2 = data->chip_info->als_gain[i].uscale; 690 return IIO_VAL_INT_PLUS_MICRO; 691 case IIO_PROXIMITY: 692 i = (data->ps_contr & LTR501_CONTR_PS_GAIN_MASK) >> 693 LTR501_CONTR_PS_GAIN_SHIFT; 694 *val = data->chip_info->ps_gain[i].scale; 695 *val2 = data->chip_info->ps_gain[i].uscale; 696 return IIO_VAL_INT_PLUS_MICRO; 697 default: 698 return -EINVAL; 699 } 700 case IIO_CHAN_INFO_INT_TIME: 701 switch (chan->type) { 702 case IIO_INTENSITY: 703 return ltr501_read_it_time(data, val, val2); 704 default: 705 return -EINVAL; 706 } 707 case IIO_CHAN_INFO_SAMP_FREQ: 708 switch (chan->type) { 709 case IIO_INTENSITY: 710 return ltr501_als_read_samp_freq(data, val, val2); 711 case IIO_PROXIMITY: 712 return ltr501_ps_read_samp_freq(data, val, val2); 713 default: 714 return -EINVAL; 715 } 716 } 717 return -EINVAL; 718 } 719 720 static int ltr501_get_gain_index(const struct ltr501_gain *gain, int size, 721 int val, int val2) 722 { 723 int i; 724 725 for (i = 0; i < size; i++) 726 if (val == gain[i].scale && val2 == gain[i].uscale) 727 return i; 728 729 return -1; 730 } 731 732 static int ltr501_write_raw(struct iio_dev *indio_dev, 733 struct iio_chan_spec const *chan, 734 int val, int val2, long mask) 735 { 736 struct ltr501_data *data = iio_priv(indio_dev); 737 int i, ret, freq_val, freq_val2; 738 struct ltr501_chip_info *info = data->chip_info; 739 740 ret = iio_device_claim_direct_mode(indio_dev); 741 if (ret) 742 return ret; 743 744 switch (mask) { 745 case IIO_CHAN_INFO_SCALE: 746 switch (chan->type) { 747 case IIO_INTENSITY: 748 i = ltr501_get_gain_index(info->als_gain, 749 info->als_gain_tbl_size, 750 val, val2); 751 if (i < 0) { 752 ret = -EINVAL; 753 break; 754 } 755 756 data->als_contr &= ~info->als_gain_mask; 757 data->als_contr |= i << info->als_gain_shift; 758 759 ret = regmap_write(data->regmap, LTR501_ALS_CONTR, 760 data->als_contr); 761 break; 762 case IIO_PROXIMITY: 763 i = ltr501_get_gain_index(info->ps_gain, 764 info->ps_gain_tbl_size, 765 val, val2); 766 if (i < 0) { 767 ret = -EINVAL; 768 break; 769 } 770 data->ps_contr &= ~LTR501_CONTR_PS_GAIN_MASK; 771 data->ps_contr |= i << LTR501_CONTR_PS_GAIN_SHIFT; 772 773 ret = regmap_write(data->regmap, LTR501_PS_CONTR, 774 data->ps_contr); 775 break; 776 default: 777 ret = -EINVAL; 778 break; 779 } 780 break; 781 782 case IIO_CHAN_INFO_INT_TIME: 783 switch (chan->type) { 784 case IIO_INTENSITY: 785 if (val != 0) { 786 ret = -EINVAL; 787 break; 788 } 789 mutex_lock(&data->lock_als); 790 ret = ltr501_set_it_time(data, val2); 791 mutex_unlock(&data->lock_als); 792 break; 793 default: 794 ret = -EINVAL; 795 break; 796 } 797 break; 798 799 case IIO_CHAN_INFO_SAMP_FREQ: 800 switch (chan->type) { 801 case IIO_INTENSITY: 802 ret = ltr501_als_read_samp_freq(data, &freq_val, 803 &freq_val2); 804 if (ret < 0) 805 break; 806 807 ret = ltr501_als_write_samp_freq(data, val, val2); 808 if (ret < 0) 809 break; 810 811 /* update persistence count when changing frequency */ 812 ret = ltr501_write_intr_prst(data, chan->type, 813 0, data->als_period); 814 815 if (ret < 0) 816 ret = ltr501_als_write_samp_freq(data, freq_val, 817 freq_val2); 818 break; 819 case IIO_PROXIMITY: 820 ret = ltr501_ps_read_samp_freq(data, &freq_val, 821 &freq_val2); 822 if (ret < 0) 823 break; 824 825 ret = ltr501_ps_write_samp_freq(data, val, val2); 826 if (ret < 0) 827 break; 828 829 /* update persistence count when changing frequency */ 830 ret = ltr501_write_intr_prst(data, chan->type, 831 0, data->ps_period); 832 833 if (ret < 0) 834 ret = ltr501_ps_write_samp_freq(data, freq_val, 835 freq_val2); 836 break; 837 default: 838 ret = -EINVAL; 839 break; 840 } 841 break; 842 843 default: 844 ret = -EINVAL; 845 break; 846 } 847 848 iio_device_release_direct_mode(indio_dev); 849 return ret; 850 } 851 852 static int ltr501_read_thresh(const struct iio_dev *indio_dev, 853 const struct iio_chan_spec *chan, 854 enum iio_event_type type, 855 enum iio_event_direction dir, 856 enum iio_event_info info, 857 int *val, int *val2) 858 { 859 const struct ltr501_data *data = iio_priv(indio_dev); 860 int ret, thresh_data; 861 862 switch (chan->type) { 863 case IIO_INTENSITY: 864 switch (dir) { 865 case IIO_EV_DIR_RISING: 866 ret = regmap_bulk_read(data->regmap, 867 LTR501_ALS_THRESH_UP, 868 &thresh_data, 2); 869 if (ret < 0) 870 return ret; 871 *val = thresh_data & LTR501_ALS_THRESH_MASK; 872 return IIO_VAL_INT; 873 case IIO_EV_DIR_FALLING: 874 ret = regmap_bulk_read(data->regmap, 875 LTR501_ALS_THRESH_LOW, 876 &thresh_data, 2); 877 if (ret < 0) 878 return ret; 879 *val = thresh_data & LTR501_ALS_THRESH_MASK; 880 return IIO_VAL_INT; 881 default: 882 return -EINVAL; 883 } 884 case IIO_PROXIMITY: 885 switch (dir) { 886 case IIO_EV_DIR_RISING: 887 ret = regmap_bulk_read(data->regmap, 888 LTR501_PS_THRESH_UP, 889 &thresh_data, 2); 890 if (ret < 0) 891 return ret; 892 *val = thresh_data & LTR501_PS_THRESH_MASK; 893 return IIO_VAL_INT; 894 case IIO_EV_DIR_FALLING: 895 ret = regmap_bulk_read(data->regmap, 896 LTR501_PS_THRESH_LOW, 897 &thresh_data, 2); 898 if (ret < 0) 899 return ret; 900 *val = thresh_data & LTR501_PS_THRESH_MASK; 901 return IIO_VAL_INT; 902 default: 903 return -EINVAL; 904 } 905 default: 906 return -EINVAL; 907 } 908 909 return -EINVAL; 910 } 911 912 static int ltr501_write_thresh(struct iio_dev *indio_dev, 913 const struct iio_chan_spec *chan, 914 enum iio_event_type type, 915 enum iio_event_direction dir, 916 enum iio_event_info info, 917 int val, int val2) 918 { 919 struct ltr501_data *data = iio_priv(indio_dev); 920 int ret; 921 922 if (val < 0) 923 return -EINVAL; 924 925 switch (chan->type) { 926 case IIO_INTENSITY: 927 if (val > LTR501_ALS_THRESH_MASK) 928 return -EINVAL; 929 switch (dir) { 930 case IIO_EV_DIR_RISING: 931 mutex_lock(&data->lock_als); 932 ret = regmap_bulk_write(data->regmap, 933 LTR501_ALS_THRESH_UP, 934 &val, 2); 935 mutex_unlock(&data->lock_als); 936 return ret; 937 case IIO_EV_DIR_FALLING: 938 mutex_lock(&data->lock_als); 939 ret = regmap_bulk_write(data->regmap, 940 LTR501_ALS_THRESH_LOW, 941 &val, 2); 942 mutex_unlock(&data->lock_als); 943 return ret; 944 default: 945 return -EINVAL; 946 } 947 case IIO_PROXIMITY: 948 if (val > LTR501_PS_THRESH_MASK) 949 return -EINVAL; 950 switch (dir) { 951 case IIO_EV_DIR_RISING: 952 mutex_lock(&data->lock_ps); 953 ret = regmap_bulk_write(data->regmap, 954 LTR501_PS_THRESH_UP, 955 &val, 2); 956 mutex_unlock(&data->lock_ps); 957 return ret; 958 case IIO_EV_DIR_FALLING: 959 mutex_lock(&data->lock_ps); 960 ret = regmap_bulk_write(data->regmap, 961 LTR501_PS_THRESH_LOW, 962 &val, 2); 963 mutex_unlock(&data->lock_ps); 964 return ret; 965 default: 966 return -EINVAL; 967 } 968 default: 969 return -EINVAL; 970 } 971 972 return -EINVAL; 973 } 974 975 static int ltr501_read_event(struct iio_dev *indio_dev, 976 const struct iio_chan_spec *chan, 977 enum iio_event_type type, 978 enum iio_event_direction dir, 979 enum iio_event_info info, 980 int *val, int *val2) 981 { 982 int ret; 983 984 switch (info) { 985 case IIO_EV_INFO_VALUE: 986 return ltr501_read_thresh(indio_dev, chan, type, dir, 987 info, val, val2); 988 case IIO_EV_INFO_PERIOD: 989 ret = ltr501_read_intr_prst(iio_priv(indio_dev), 990 chan->type, val2); 991 *val = *val2 / 1000000; 992 *val2 = *val2 % 1000000; 993 return ret; 994 default: 995 return -EINVAL; 996 } 997 998 return -EINVAL; 999 } 1000 1001 static int ltr501_write_event(struct iio_dev *indio_dev, 1002 const struct iio_chan_spec *chan, 1003 enum iio_event_type type, 1004 enum iio_event_direction dir, 1005 enum iio_event_info info, 1006 int val, int val2) 1007 { 1008 switch (info) { 1009 case IIO_EV_INFO_VALUE: 1010 if (val2 != 0) 1011 return -EINVAL; 1012 return ltr501_write_thresh(indio_dev, chan, type, dir, 1013 info, val, val2); 1014 case IIO_EV_INFO_PERIOD: 1015 return ltr501_write_intr_prst(iio_priv(indio_dev), chan->type, 1016 val, val2); 1017 default: 1018 return -EINVAL; 1019 } 1020 1021 return -EINVAL; 1022 } 1023 1024 static int ltr501_read_event_config(struct iio_dev *indio_dev, 1025 const struct iio_chan_spec *chan, 1026 enum iio_event_type type, 1027 enum iio_event_direction dir) 1028 { 1029 struct ltr501_data *data = iio_priv(indio_dev); 1030 int ret, status; 1031 1032 switch (chan->type) { 1033 case IIO_INTENSITY: 1034 ret = regmap_field_read(data->reg_als_intr, &status); 1035 if (ret < 0) 1036 return ret; 1037 return status; 1038 case IIO_PROXIMITY: 1039 ret = regmap_field_read(data->reg_ps_intr, &status); 1040 if (ret < 0) 1041 return ret; 1042 return status; 1043 default: 1044 return -EINVAL; 1045 } 1046 1047 return -EINVAL; 1048 } 1049 1050 static int ltr501_write_event_config(struct iio_dev *indio_dev, 1051 const struct iio_chan_spec *chan, 1052 enum iio_event_type type, 1053 enum iio_event_direction dir, int state) 1054 { 1055 struct ltr501_data *data = iio_priv(indio_dev); 1056 int ret; 1057 1058 /* only 1 and 0 are valid inputs */ 1059 if (state != 1 && state != 0) 1060 return -EINVAL; 1061 1062 switch (chan->type) { 1063 case IIO_INTENSITY: 1064 mutex_lock(&data->lock_als); 1065 ret = regmap_field_write(data->reg_als_intr, state); 1066 mutex_unlock(&data->lock_als); 1067 return ret; 1068 case IIO_PROXIMITY: 1069 mutex_lock(&data->lock_ps); 1070 ret = regmap_field_write(data->reg_ps_intr, state); 1071 mutex_unlock(&data->lock_ps); 1072 return ret; 1073 default: 1074 return -EINVAL; 1075 } 1076 1077 return -EINVAL; 1078 } 1079 1080 static ssize_t ltr501_show_proximity_scale_avail(struct device *dev, 1081 struct device_attribute *attr, 1082 char *buf) 1083 { 1084 struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev)); 1085 struct ltr501_chip_info *info = data->chip_info; 1086 ssize_t len = 0; 1087 int i; 1088 1089 for (i = 0; i < info->ps_gain_tbl_size; i++) { 1090 if (info->ps_gain[i].scale == LTR501_RESERVED_GAIN) 1091 continue; 1092 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ", 1093 info->ps_gain[i].scale, 1094 info->ps_gain[i].uscale); 1095 } 1096 1097 buf[len - 1] = '\n'; 1098 1099 return len; 1100 } 1101 1102 static ssize_t ltr501_show_intensity_scale_avail(struct device *dev, 1103 struct device_attribute *attr, 1104 char *buf) 1105 { 1106 struct ltr501_data *data = iio_priv(dev_to_iio_dev(dev)); 1107 struct ltr501_chip_info *info = data->chip_info; 1108 ssize_t len = 0; 1109 int i; 1110 1111 for (i = 0; i < info->als_gain_tbl_size; i++) { 1112 if (info->als_gain[i].scale == LTR501_RESERVED_GAIN) 1113 continue; 1114 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%06d ", 1115 info->als_gain[i].scale, 1116 info->als_gain[i].uscale); 1117 } 1118 1119 buf[len - 1] = '\n'; 1120 1121 return len; 1122 } 1123 1124 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.05 0.1 0.2 0.4"); 1125 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("20 10 5 2 1 0.5"); 1126 1127 static IIO_DEVICE_ATTR(in_proximity_scale_available, S_IRUGO, 1128 ltr501_show_proximity_scale_avail, NULL, 0); 1129 static IIO_DEVICE_ATTR(in_intensity_scale_available, S_IRUGO, 1130 ltr501_show_intensity_scale_avail, NULL, 0); 1131 1132 static struct attribute *ltr501_attributes[] = { 1133 &iio_dev_attr_in_proximity_scale_available.dev_attr.attr, 1134 &iio_dev_attr_in_intensity_scale_available.dev_attr.attr, 1135 &iio_const_attr_integration_time_available.dev_attr.attr, 1136 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 1137 NULL 1138 }; 1139 1140 static struct attribute *ltr301_attributes[] = { 1141 &iio_dev_attr_in_intensity_scale_available.dev_attr.attr, 1142 &iio_const_attr_integration_time_available.dev_attr.attr, 1143 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 1144 NULL 1145 }; 1146 1147 static const struct attribute_group ltr501_attribute_group = { 1148 .attrs = ltr501_attributes, 1149 }; 1150 1151 static const struct attribute_group ltr301_attribute_group = { 1152 .attrs = ltr301_attributes, 1153 }; 1154 1155 static const struct iio_info ltr501_info_no_irq = { 1156 .read_raw = ltr501_read_raw, 1157 .write_raw = ltr501_write_raw, 1158 .attrs = <r501_attribute_group, 1159 }; 1160 1161 static const struct iio_info ltr501_info = { 1162 .read_raw = ltr501_read_raw, 1163 .write_raw = ltr501_write_raw, 1164 .attrs = <r501_attribute_group, 1165 .read_event_value = <r501_read_event, 1166 .write_event_value = <r501_write_event, 1167 .read_event_config = <r501_read_event_config, 1168 .write_event_config = <r501_write_event_config, 1169 }; 1170 1171 static const struct iio_info ltr301_info_no_irq = { 1172 .read_raw = ltr501_read_raw, 1173 .write_raw = ltr501_write_raw, 1174 .attrs = <r301_attribute_group, 1175 }; 1176 1177 static const struct iio_info ltr301_info = { 1178 .read_raw = ltr501_read_raw, 1179 .write_raw = ltr501_write_raw, 1180 .attrs = <r301_attribute_group, 1181 .read_event_value = <r501_read_event, 1182 .write_event_value = <r501_write_event, 1183 .read_event_config = <r501_read_event_config, 1184 .write_event_config = <r501_write_event_config, 1185 }; 1186 1187 static struct ltr501_chip_info ltr501_chip_info_tbl[] = { 1188 [ltr501] = { 1189 .partid = 0x08, 1190 .als_gain = ltr501_als_gain_tbl, 1191 .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl), 1192 .ps_gain = ltr501_ps_gain_tbl, 1193 .ps_gain_tbl_size = ARRAY_SIZE(ltr501_ps_gain_tbl), 1194 .als_mode_active = BIT(0) | BIT(1), 1195 .als_gain_mask = BIT(3), 1196 .als_gain_shift = 3, 1197 .info = <r501_info, 1198 .info_no_irq = <r501_info_no_irq, 1199 .channels = ltr501_channels, 1200 .no_channels = ARRAY_SIZE(ltr501_channels), 1201 }, 1202 [ltr559] = { 1203 .partid = 0x09, 1204 .als_gain = ltr559_als_gain_tbl, 1205 .als_gain_tbl_size = ARRAY_SIZE(ltr559_als_gain_tbl), 1206 .ps_gain = ltr559_ps_gain_tbl, 1207 .ps_gain_tbl_size = ARRAY_SIZE(ltr559_ps_gain_tbl), 1208 .als_mode_active = BIT(1), 1209 .als_gain_mask = BIT(2) | BIT(3) | BIT(4), 1210 .als_gain_shift = 2, 1211 .info = <r501_info, 1212 .info_no_irq = <r501_info_no_irq, 1213 .channels = ltr501_channels, 1214 .no_channels = ARRAY_SIZE(ltr501_channels), 1215 }, 1216 [ltr301] = { 1217 .partid = 0x08, 1218 .als_gain = ltr501_als_gain_tbl, 1219 .als_gain_tbl_size = ARRAY_SIZE(ltr501_als_gain_tbl), 1220 .als_mode_active = BIT(0) | BIT(1), 1221 .als_gain_mask = BIT(3), 1222 .als_gain_shift = 3, 1223 .info = <r301_info, 1224 .info_no_irq = <r301_info_no_irq, 1225 .channels = ltr301_channels, 1226 .no_channels = ARRAY_SIZE(ltr301_channels), 1227 }, 1228 }; 1229 1230 static int ltr501_write_contr(struct ltr501_data *data, u8 als_val, u8 ps_val) 1231 { 1232 int ret; 1233 1234 ret = regmap_write(data->regmap, LTR501_ALS_CONTR, als_val); 1235 if (ret < 0) 1236 return ret; 1237 1238 return regmap_write(data->regmap, LTR501_PS_CONTR, ps_val); 1239 } 1240 1241 static irqreturn_t ltr501_trigger_handler(int irq, void *p) 1242 { 1243 struct iio_poll_func *pf = p; 1244 struct iio_dev *indio_dev = pf->indio_dev; 1245 struct ltr501_data *data = iio_priv(indio_dev); 1246 u16 buf[8]; 1247 __le16 als_buf[2]; 1248 u8 mask = 0; 1249 int j = 0; 1250 int ret, psdata; 1251 1252 memset(buf, 0, sizeof(buf)); 1253 1254 /* figure out which data needs to be ready */ 1255 if (test_bit(0, indio_dev->active_scan_mask) || 1256 test_bit(1, indio_dev->active_scan_mask)) 1257 mask |= LTR501_STATUS_ALS_RDY; 1258 if (test_bit(2, indio_dev->active_scan_mask)) 1259 mask |= LTR501_STATUS_PS_RDY; 1260 1261 ret = ltr501_drdy(data, mask); 1262 if (ret < 0) 1263 goto done; 1264 1265 if (mask & LTR501_STATUS_ALS_RDY) { 1266 ret = regmap_bulk_read(data->regmap, LTR501_ALS_DATA1, 1267 als_buf, sizeof(als_buf)); 1268 if (ret < 0) 1269 return ret; 1270 if (test_bit(0, indio_dev->active_scan_mask)) 1271 buf[j++] = le16_to_cpu(als_buf[1]); 1272 if (test_bit(1, indio_dev->active_scan_mask)) 1273 buf[j++] = le16_to_cpu(als_buf[0]); 1274 } 1275 1276 if (mask & LTR501_STATUS_PS_RDY) { 1277 ret = regmap_bulk_read(data->regmap, LTR501_PS_DATA, 1278 &psdata, 2); 1279 if (ret < 0) 1280 goto done; 1281 buf[j++] = psdata & LTR501_PS_DATA_MASK; 1282 } 1283 1284 iio_push_to_buffers_with_timestamp(indio_dev, buf, 1285 iio_get_time_ns(indio_dev)); 1286 1287 done: 1288 iio_trigger_notify_done(indio_dev->trig); 1289 1290 return IRQ_HANDLED; 1291 } 1292 1293 static irqreturn_t ltr501_interrupt_handler(int irq, void *private) 1294 { 1295 struct iio_dev *indio_dev = private; 1296 struct ltr501_data *data = iio_priv(indio_dev); 1297 int ret, status; 1298 1299 ret = regmap_read(data->regmap, LTR501_ALS_PS_STATUS, &status); 1300 if (ret < 0) { 1301 dev_err(&data->client->dev, 1302 "irq read int reg failed\n"); 1303 return IRQ_HANDLED; 1304 } 1305 1306 if (status & LTR501_STATUS_ALS_INTR) 1307 iio_push_event(indio_dev, 1308 IIO_UNMOD_EVENT_CODE(IIO_INTENSITY, 0, 1309 IIO_EV_TYPE_THRESH, 1310 IIO_EV_DIR_EITHER), 1311 iio_get_time_ns(indio_dev)); 1312 1313 if (status & LTR501_STATUS_PS_INTR) 1314 iio_push_event(indio_dev, 1315 IIO_UNMOD_EVENT_CODE(IIO_PROXIMITY, 0, 1316 IIO_EV_TYPE_THRESH, 1317 IIO_EV_DIR_EITHER), 1318 iio_get_time_ns(indio_dev)); 1319 1320 return IRQ_HANDLED; 1321 } 1322 1323 static int ltr501_init(struct ltr501_data *data) 1324 { 1325 int ret, status; 1326 1327 ret = regmap_read(data->regmap, LTR501_ALS_CONTR, &status); 1328 if (ret < 0) 1329 return ret; 1330 1331 data->als_contr = status | data->chip_info->als_mode_active; 1332 1333 ret = regmap_read(data->regmap, LTR501_PS_CONTR, &status); 1334 if (ret < 0) 1335 return ret; 1336 1337 data->ps_contr = status | LTR501_CONTR_ACTIVE; 1338 1339 ret = ltr501_read_intr_prst(data, IIO_INTENSITY, &data->als_period); 1340 if (ret < 0) 1341 return ret; 1342 1343 ret = ltr501_read_intr_prst(data, IIO_PROXIMITY, &data->ps_period); 1344 if (ret < 0) 1345 return ret; 1346 1347 return ltr501_write_contr(data, data->als_contr, data->ps_contr); 1348 } 1349 1350 static bool ltr501_is_volatile_reg(struct device *dev, unsigned int reg) 1351 { 1352 switch (reg) { 1353 case LTR501_ALS_DATA1: 1354 case LTR501_ALS_DATA0: 1355 case LTR501_ALS_PS_STATUS: 1356 case LTR501_PS_DATA: 1357 return true; 1358 default: 1359 return false; 1360 } 1361 } 1362 1363 static const struct regmap_config ltr501_regmap_config = { 1364 .name = LTR501_REGMAP_NAME, 1365 .reg_bits = 8, 1366 .val_bits = 8, 1367 .max_register = LTR501_MAX_REG, 1368 .cache_type = REGCACHE_RBTREE, 1369 .volatile_reg = ltr501_is_volatile_reg, 1370 }; 1371 1372 static int ltr501_powerdown(struct ltr501_data *data) 1373 { 1374 return ltr501_write_contr(data, data->als_contr & 1375 ~data->chip_info->als_mode_active, 1376 data->ps_contr & ~LTR501_CONTR_ACTIVE); 1377 } 1378 1379 static const char *ltr501_match_acpi_device(struct device *dev, int *chip_idx) 1380 { 1381 const struct acpi_device_id *id; 1382 1383 id = acpi_match_device(dev->driver->acpi_match_table, dev); 1384 if (!id) 1385 return NULL; 1386 *chip_idx = id->driver_data; 1387 return dev_name(dev); 1388 } 1389 1390 static int ltr501_probe(struct i2c_client *client, 1391 const struct i2c_device_id *id) 1392 { 1393 struct ltr501_data *data; 1394 struct iio_dev *indio_dev; 1395 struct regmap *regmap; 1396 int ret, partid, chip_idx = 0; 1397 const char *name = NULL; 1398 1399 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1400 if (!indio_dev) 1401 return -ENOMEM; 1402 1403 regmap = devm_regmap_init_i2c(client, <r501_regmap_config); 1404 if (IS_ERR(regmap)) { 1405 dev_err(&client->dev, "Regmap initialization failed.\n"); 1406 return PTR_ERR(regmap); 1407 } 1408 1409 data = iio_priv(indio_dev); 1410 i2c_set_clientdata(client, indio_dev); 1411 data->client = client; 1412 data->regmap = regmap; 1413 mutex_init(&data->lock_als); 1414 mutex_init(&data->lock_ps); 1415 1416 data->reg_it = devm_regmap_field_alloc(&client->dev, regmap, 1417 reg_field_it); 1418 if (IS_ERR(data->reg_it)) { 1419 dev_err(&client->dev, "Integ time reg field init failed.\n"); 1420 return PTR_ERR(data->reg_it); 1421 } 1422 1423 data->reg_als_intr = devm_regmap_field_alloc(&client->dev, regmap, 1424 reg_field_als_intr); 1425 if (IS_ERR(data->reg_als_intr)) { 1426 dev_err(&client->dev, "ALS intr mode reg field init failed\n"); 1427 return PTR_ERR(data->reg_als_intr); 1428 } 1429 1430 data->reg_ps_intr = devm_regmap_field_alloc(&client->dev, regmap, 1431 reg_field_ps_intr); 1432 if (IS_ERR(data->reg_ps_intr)) { 1433 dev_err(&client->dev, "PS intr mode reg field init failed.\n"); 1434 return PTR_ERR(data->reg_ps_intr); 1435 } 1436 1437 data->reg_als_rate = devm_regmap_field_alloc(&client->dev, regmap, 1438 reg_field_als_rate); 1439 if (IS_ERR(data->reg_als_rate)) { 1440 dev_err(&client->dev, "ALS samp rate field init failed.\n"); 1441 return PTR_ERR(data->reg_als_rate); 1442 } 1443 1444 data->reg_ps_rate = devm_regmap_field_alloc(&client->dev, regmap, 1445 reg_field_ps_rate); 1446 if (IS_ERR(data->reg_ps_rate)) { 1447 dev_err(&client->dev, "PS samp rate field init failed.\n"); 1448 return PTR_ERR(data->reg_ps_rate); 1449 } 1450 1451 data->reg_als_prst = devm_regmap_field_alloc(&client->dev, regmap, 1452 reg_field_als_prst); 1453 if (IS_ERR(data->reg_als_prst)) { 1454 dev_err(&client->dev, "ALS prst reg field init failed\n"); 1455 return PTR_ERR(data->reg_als_prst); 1456 } 1457 1458 data->reg_ps_prst = devm_regmap_field_alloc(&client->dev, regmap, 1459 reg_field_ps_prst); 1460 if (IS_ERR(data->reg_ps_prst)) { 1461 dev_err(&client->dev, "PS prst reg field init failed.\n"); 1462 return PTR_ERR(data->reg_ps_prst); 1463 } 1464 1465 ret = regmap_read(data->regmap, LTR501_PART_ID, &partid); 1466 if (ret < 0) 1467 return ret; 1468 1469 if (id) { 1470 name = id->name; 1471 chip_idx = id->driver_data; 1472 } else if (ACPI_HANDLE(&client->dev)) { 1473 name = ltr501_match_acpi_device(&client->dev, &chip_idx); 1474 } else { 1475 return -ENODEV; 1476 } 1477 1478 data->chip_info = <r501_chip_info_tbl[chip_idx]; 1479 1480 if ((partid >> 4) != data->chip_info->partid) 1481 return -ENODEV; 1482 1483 indio_dev->dev.parent = &client->dev; 1484 indio_dev->info = data->chip_info->info; 1485 indio_dev->channels = data->chip_info->channels; 1486 indio_dev->num_channels = data->chip_info->no_channels; 1487 indio_dev->name = name; 1488 indio_dev->modes = INDIO_DIRECT_MODE; 1489 1490 ret = ltr501_init(data); 1491 if (ret < 0) 1492 return ret; 1493 1494 if (client->irq > 0) { 1495 ret = devm_request_threaded_irq(&client->dev, client->irq, 1496 NULL, ltr501_interrupt_handler, 1497 IRQF_TRIGGER_FALLING | 1498 IRQF_ONESHOT, 1499 "ltr501_thresh_event", 1500 indio_dev); 1501 if (ret) { 1502 dev_err(&client->dev, "request irq (%d) failed\n", 1503 client->irq); 1504 return ret; 1505 } 1506 } else { 1507 indio_dev->info = data->chip_info->info_no_irq; 1508 } 1509 1510 ret = iio_triggered_buffer_setup(indio_dev, NULL, 1511 ltr501_trigger_handler, NULL); 1512 if (ret) 1513 goto powerdown_on_error; 1514 1515 ret = iio_device_register(indio_dev); 1516 if (ret) 1517 goto error_unreg_buffer; 1518 1519 return 0; 1520 1521 error_unreg_buffer: 1522 iio_triggered_buffer_cleanup(indio_dev); 1523 powerdown_on_error: 1524 ltr501_powerdown(data); 1525 return ret; 1526 } 1527 1528 static int ltr501_remove(struct i2c_client *client) 1529 { 1530 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1531 1532 iio_device_unregister(indio_dev); 1533 iio_triggered_buffer_cleanup(indio_dev); 1534 ltr501_powerdown(iio_priv(indio_dev)); 1535 1536 return 0; 1537 } 1538 1539 #ifdef CONFIG_PM_SLEEP 1540 static int ltr501_suspend(struct device *dev) 1541 { 1542 struct ltr501_data *data = iio_priv(i2c_get_clientdata( 1543 to_i2c_client(dev))); 1544 return ltr501_powerdown(data); 1545 } 1546 1547 static int ltr501_resume(struct device *dev) 1548 { 1549 struct ltr501_data *data = iio_priv(i2c_get_clientdata( 1550 to_i2c_client(dev))); 1551 1552 return ltr501_write_contr(data, data->als_contr, 1553 data->ps_contr); 1554 } 1555 #endif 1556 1557 static SIMPLE_DEV_PM_OPS(ltr501_pm_ops, ltr501_suspend, ltr501_resume); 1558 1559 static const struct acpi_device_id ltr_acpi_match[] = { 1560 {"LTER0501", ltr501}, 1561 {"LTER0559", ltr559}, 1562 {"LTER0301", ltr301}, 1563 { }, 1564 }; 1565 MODULE_DEVICE_TABLE(acpi, ltr_acpi_match); 1566 1567 static const struct i2c_device_id ltr501_id[] = { 1568 { "ltr501", ltr501}, 1569 { "ltr559", ltr559}, 1570 { "ltr301", ltr301}, 1571 { } 1572 }; 1573 MODULE_DEVICE_TABLE(i2c, ltr501_id); 1574 1575 static struct i2c_driver ltr501_driver = { 1576 .driver = { 1577 .name = LTR501_DRV_NAME, 1578 .pm = <r501_pm_ops, 1579 .acpi_match_table = ACPI_PTR(ltr_acpi_match), 1580 }, 1581 .probe = ltr501_probe, 1582 .remove = ltr501_remove, 1583 .id_table = ltr501_id, 1584 }; 1585 1586 module_i2c_driver(ltr501_driver); 1587 1588 MODULE_AUTHOR("Peter Meerwald <pmeerw@pmeerw.net>"); 1589 MODULE_DESCRIPTION("Lite-On LTR501 ambient light and proximity sensor driver"); 1590 MODULE_LICENSE("GPL"); 1591