1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * STMicroelectronics st_lsm6dsx sensor driver 4 * 5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer 6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial 7 * interface standard output. 8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale 9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of 10 * +-125/+-245/+-500/+-1000/+-2000 dps 11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer 12 * allowing dynamic batching of sensor data. 13 * LSM9DSx series is similar but includes an additional magnetometer, handled 14 * by a different driver. 15 * 16 * Supported sensors: 17 * - LSM6DS3: 18 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416 19 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 20 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 21 * - FIFO size: 8KB 22 * 23 * - LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C: 24 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416 25 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 26 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 27 * - FIFO size: 4KB 28 * 29 * - LSM6DSO/LSM6DSOX/ASM330LHH/LSM6DSR/ISM330DHCX: 30 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416 31 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 32 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 33 * - FIFO size: 3KB 34 * 35 * - LSM9DS1: 36 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952 37 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 38 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952 39 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000 40 * - FIFO size: 32 41 * 42 * Copyright 2016 STMicroelectronics Inc. 43 * 44 * Lorenzo Bianconi <lorenzo.bianconi@st.com> 45 * Denis Ciocca <denis.ciocca@st.com> 46 */ 47 48 #include <linux/kernel.h> 49 #include <linux/module.h> 50 #include <linux/delay.h> 51 #include <linux/iio/events.h> 52 #include <linux/iio/iio.h> 53 #include <linux/iio/sysfs.h> 54 #include <linux/interrupt.h> 55 #include <linux/irq.h> 56 #include <linux/pm.h> 57 #include <linux/regmap.h> 58 #include <linux/bitfield.h> 59 60 #include <linux/platform_data/st_sensors_pdata.h> 61 62 #include "st_lsm6dsx.h" 63 64 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f 65 66 #define ST_LSM6DSX_TS_SENSITIVITY 25000UL /* 25us */ 67 68 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = { 69 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0), 70 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1), 71 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2), 72 IIO_CHAN_SOFT_TIMESTAMP(3), 73 }; 74 75 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = { 76 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0), 77 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1), 78 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2), 79 IIO_CHAN_SOFT_TIMESTAMP(3), 80 }; 81 82 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = { 83 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0), 84 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1), 85 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2), 86 IIO_CHAN_SOFT_TIMESTAMP(3), 87 }; 88 89 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 90 { 91 .wai = 0x68, 92 .reset = { 93 .addr = 0x22, 94 .mask = BIT(0), 95 }, 96 .boot = { 97 .addr = 0x22, 98 .mask = BIT(7), 99 }, 100 .bdu = { 101 .addr = 0x22, 102 .mask = BIT(6), 103 }, 104 .max_fifo_size = 32, 105 .id = { 106 { 107 .hw_id = ST_LSM9DS1_ID, 108 .name = ST_LSM9DS1_DEV_NAME, 109 }, 110 }, 111 .channels = { 112 [ST_LSM6DSX_ID_ACC] = { 113 .chan = st_lsm6dsx_acc_channels, 114 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 115 }, 116 [ST_LSM6DSX_ID_GYRO] = { 117 .chan = st_lsm6ds0_gyro_channels, 118 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels), 119 }, 120 }, 121 .odr_table = { 122 [ST_LSM6DSX_ID_ACC] = { 123 .reg = { 124 .addr = 0x20, 125 .mask = GENMASK(7, 5), 126 }, 127 .odr_avl[0] = { 10, 0x01 }, 128 .odr_avl[1] = { 50, 0x02 }, 129 .odr_avl[2] = { 119, 0x03 }, 130 .odr_avl[3] = { 238, 0x04 }, 131 .odr_avl[4] = { 476, 0x05 }, 132 .odr_avl[5] = { 952, 0x06 }, 133 }, 134 [ST_LSM6DSX_ID_GYRO] = { 135 .reg = { 136 .addr = 0x10, 137 .mask = GENMASK(7, 5), 138 }, 139 .odr_avl[0] = { 15, 0x01 }, 140 .odr_avl[1] = { 60, 0x02 }, 141 .odr_avl[2] = { 119, 0x03 }, 142 .odr_avl[3] = { 238, 0x04 }, 143 .odr_avl[4] = { 476, 0x05 }, 144 .odr_avl[5] = { 952, 0x06 }, 145 }, 146 }, 147 .fs_table = { 148 [ST_LSM6DSX_ID_ACC] = { 149 .reg = { 150 .addr = 0x20, 151 .mask = GENMASK(4, 3), 152 }, 153 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 154 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 155 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 156 .fs_avl[3] = { IIO_G_TO_M_S_2(732), 0x1 }, 157 .fs_len = 4, 158 }, 159 [ST_LSM6DSX_ID_GYRO] = { 160 .reg = { 161 .addr = 0x10, 162 .mask = GENMASK(4, 3), 163 }, 164 .fs_avl[0] = { IIO_DEGREE_TO_RAD(245), 0x0 }, 165 .fs_avl[1] = { IIO_DEGREE_TO_RAD(500), 0x1 }, 166 .fs_avl[2] = { IIO_DEGREE_TO_RAD(2000), 0x3 }, 167 .fs_len = 3, 168 }, 169 }, 170 .irq_config = { 171 .irq1 = { 172 .addr = 0x0c, 173 .mask = BIT(3), 174 }, 175 .irq2 = { 176 .addr = 0x0d, 177 .mask = BIT(3), 178 }, 179 .hla = { 180 .addr = 0x22, 181 .mask = BIT(5), 182 }, 183 .od = { 184 .addr = 0x22, 185 .mask = BIT(4), 186 }, 187 }, 188 }, 189 { 190 .wai = 0x69, 191 .reset = { 192 .addr = 0x12, 193 .mask = BIT(0), 194 }, 195 .boot = { 196 .addr = 0x12, 197 .mask = BIT(7), 198 }, 199 .bdu = { 200 .addr = 0x12, 201 .mask = BIT(6), 202 }, 203 .max_fifo_size = 1365, 204 .id = { 205 { 206 .hw_id = ST_LSM6DS3_ID, 207 .name = ST_LSM6DS3_DEV_NAME, 208 }, 209 }, 210 .channels = { 211 [ST_LSM6DSX_ID_ACC] = { 212 .chan = st_lsm6dsx_acc_channels, 213 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 214 }, 215 [ST_LSM6DSX_ID_GYRO] = { 216 .chan = st_lsm6dsx_gyro_channels, 217 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 218 }, 219 }, 220 .odr_table = { 221 [ST_LSM6DSX_ID_ACC] = { 222 .reg = { 223 .addr = 0x10, 224 .mask = GENMASK(7, 4), 225 }, 226 .odr_avl[0] = { 13, 0x01 }, 227 .odr_avl[1] = { 26, 0x02 }, 228 .odr_avl[2] = { 52, 0x03 }, 229 .odr_avl[3] = { 104, 0x04 }, 230 .odr_avl[4] = { 208, 0x05 }, 231 .odr_avl[5] = { 416, 0x06 }, 232 }, 233 [ST_LSM6DSX_ID_GYRO] = { 234 .reg = { 235 .addr = 0x11, 236 .mask = GENMASK(7, 4), 237 }, 238 .odr_avl[0] = { 13, 0x01 }, 239 .odr_avl[1] = { 26, 0x02 }, 240 .odr_avl[2] = { 52, 0x03 }, 241 .odr_avl[3] = { 104, 0x04 }, 242 .odr_avl[4] = { 208, 0x05 }, 243 .odr_avl[5] = { 416, 0x06 }, 244 }, 245 }, 246 .fs_table = { 247 [ST_LSM6DSX_ID_ACC] = { 248 .reg = { 249 .addr = 0x10, 250 .mask = GENMASK(3, 2), 251 }, 252 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 253 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 254 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 255 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 256 .fs_len = 4, 257 }, 258 [ST_LSM6DSX_ID_GYRO] = { 259 .reg = { 260 .addr = 0x11, 261 .mask = GENMASK(3, 2), 262 }, 263 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 264 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 265 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 266 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 267 .fs_len = 4, 268 }, 269 }, 270 .irq_config = { 271 .irq1 = { 272 .addr = 0x0d, 273 .mask = BIT(3), 274 }, 275 .irq2 = { 276 .addr = 0x0e, 277 .mask = BIT(3), 278 }, 279 .lir = { 280 .addr = 0x58, 281 .mask = BIT(0), 282 }, 283 .irq1_func = { 284 .addr = 0x5e, 285 .mask = BIT(5), 286 }, 287 .irq2_func = { 288 .addr = 0x5f, 289 .mask = BIT(5), 290 }, 291 .hla = { 292 .addr = 0x12, 293 .mask = BIT(5), 294 }, 295 .od = { 296 .addr = 0x12, 297 .mask = BIT(4), 298 }, 299 }, 300 .decimator = { 301 [ST_LSM6DSX_ID_ACC] = { 302 .addr = 0x08, 303 .mask = GENMASK(2, 0), 304 }, 305 [ST_LSM6DSX_ID_GYRO] = { 306 .addr = 0x08, 307 .mask = GENMASK(5, 3), 308 }, 309 }, 310 .fifo_ops = { 311 .update_fifo = st_lsm6dsx_update_fifo, 312 .read_fifo = st_lsm6dsx_read_fifo, 313 .fifo_th = { 314 .addr = 0x06, 315 .mask = GENMASK(11, 0), 316 }, 317 .fifo_diff = { 318 .addr = 0x3a, 319 .mask = GENMASK(11, 0), 320 }, 321 .th_wl = 3, /* 1LSB = 2B */ 322 }, 323 .ts_settings = { 324 .timer_en = { 325 .addr = 0x58, 326 .mask = BIT(7), 327 }, 328 .hr_timer = { 329 .addr = 0x5c, 330 .mask = BIT(4), 331 }, 332 .fifo_en = { 333 .addr = 0x07, 334 .mask = BIT(7), 335 }, 336 .decimator = { 337 .addr = 0x09, 338 .mask = GENMASK(5, 3), 339 }, 340 }, 341 .event_settings = { 342 .wakeup_reg = { 343 .addr = 0x5B, 344 .mask = GENMASK(5, 0), 345 }, 346 .wakeup_src_reg = 0x1b, 347 .wakeup_src_status_mask = BIT(3), 348 .wakeup_src_z_mask = BIT(0), 349 .wakeup_src_y_mask = BIT(1), 350 .wakeup_src_x_mask = BIT(2), 351 }, 352 }, 353 { 354 .wai = 0x69, 355 .reset = { 356 .addr = 0x12, 357 .mask = BIT(0), 358 }, 359 .boot = { 360 .addr = 0x12, 361 .mask = BIT(7), 362 }, 363 .bdu = { 364 .addr = 0x12, 365 .mask = BIT(6), 366 }, 367 .max_fifo_size = 682, 368 .id = { 369 { 370 .hw_id = ST_LSM6DS3H_ID, 371 .name = ST_LSM6DS3H_DEV_NAME, 372 }, 373 }, 374 .channels = { 375 [ST_LSM6DSX_ID_ACC] = { 376 .chan = st_lsm6dsx_acc_channels, 377 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 378 }, 379 [ST_LSM6DSX_ID_GYRO] = { 380 .chan = st_lsm6dsx_gyro_channels, 381 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 382 }, 383 }, 384 .odr_table = { 385 [ST_LSM6DSX_ID_ACC] = { 386 .reg = { 387 .addr = 0x10, 388 .mask = GENMASK(7, 4), 389 }, 390 .odr_avl[0] = { 13, 0x01 }, 391 .odr_avl[1] = { 26, 0x02 }, 392 .odr_avl[2] = { 52, 0x03 }, 393 .odr_avl[3] = { 104, 0x04 }, 394 .odr_avl[4] = { 208, 0x05 }, 395 .odr_avl[5] = { 416, 0x06 }, 396 }, 397 [ST_LSM6DSX_ID_GYRO] = { 398 .reg = { 399 .addr = 0x11, 400 .mask = GENMASK(7, 4), 401 }, 402 .odr_avl[0] = { 13, 0x01 }, 403 .odr_avl[1] = { 26, 0x02 }, 404 .odr_avl[2] = { 52, 0x03 }, 405 .odr_avl[3] = { 104, 0x04 }, 406 .odr_avl[4] = { 208, 0x05 }, 407 .odr_avl[5] = { 416, 0x06 }, 408 }, 409 }, 410 .fs_table = { 411 [ST_LSM6DSX_ID_ACC] = { 412 .reg = { 413 .addr = 0x10, 414 .mask = GENMASK(3, 2), 415 }, 416 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 417 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 418 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 419 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 420 .fs_len = 4, 421 }, 422 [ST_LSM6DSX_ID_GYRO] = { 423 .reg = { 424 .addr = 0x11, 425 .mask = GENMASK(3, 2), 426 }, 427 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 428 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 429 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 430 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 431 .fs_len = 4, 432 }, 433 }, 434 .irq_config = { 435 .irq1 = { 436 .addr = 0x0d, 437 .mask = BIT(3), 438 }, 439 .irq2 = { 440 .addr = 0x0e, 441 .mask = BIT(3), 442 }, 443 .lir = { 444 .addr = 0x58, 445 .mask = BIT(0), 446 }, 447 .irq1_func = { 448 .addr = 0x5e, 449 .mask = BIT(5), 450 }, 451 .irq2_func = { 452 .addr = 0x5f, 453 .mask = BIT(5), 454 }, 455 .hla = { 456 .addr = 0x12, 457 .mask = BIT(5), 458 }, 459 .od = { 460 .addr = 0x12, 461 .mask = BIT(4), 462 }, 463 }, 464 .decimator = { 465 [ST_LSM6DSX_ID_ACC] = { 466 .addr = 0x08, 467 .mask = GENMASK(2, 0), 468 }, 469 [ST_LSM6DSX_ID_GYRO] = { 470 .addr = 0x08, 471 .mask = GENMASK(5, 3), 472 }, 473 }, 474 .fifo_ops = { 475 .update_fifo = st_lsm6dsx_update_fifo, 476 .read_fifo = st_lsm6dsx_read_fifo, 477 .fifo_th = { 478 .addr = 0x06, 479 .mask = GENMASK(11, 0), 480 }, 481 .fifo_diff = { 482 .addr = 0x3a, 483 .mask = GENMASK(11, 0), 484 }, 485 .th_wl = 3, /* 1LSB = 2B */ 486 }, 487 .ts_settings = { 488 .timer_en = { 489 .addr = 0x58, 490 .mask = BIT(7), 491 }, 492 .hr_timer = { 493 .addr = 0x5c, 494 .mask = BIT(4), 495 }, 496 .fifo_en = { 497 .addr = 0x07, 498 .mask = BIT(7), 499 }, 500 .decimator = { 501 .addr = 0x09, 502 .mask = GENMASK(5, 3), 503 }, 504 }, 505 .event_settings = { 506 .wakeup_reg = { 507 .addr = 0x5B, 508 .mask = GENMASK(5, 0), 509 }, 510 .wakeup_src_reg = 0x1b, 511 .wakeup_src_status_mask = BIT(3), 512 .wakeup_src_z_mask = BIT(0), 513 .wakeup_src_y_mask = BIT(1), 514 .wakeup_src_x_mask = BIT(2), 515 }, 516 }, 517 { 518 .wai = 0x6a, 519 .reset = { 520 .addr = 0x12, 521 .mask = BIT(0), 522 }, 523 .boot = { 524 .addr = 0x12, 525 .mask = BIT(7), 526 }, 527 .bdu = { 528 .addr = 0x12, 529 .mask = BIT(6), 530 }, 531 .max_fifo_size = 682, 532 .id = { 533 { 534 .hw_id = ST_LSM6DSL_ID, 535 .name = ST_LSM6DSL_DEV_NAME, 536 }, { 537 .hw_id = ST_LSM6DSM_ID, 538 .name = ST_LSM6DSM_DEV_NAME, 539 }, { 540 .hw_id = ST_ISM330DLC_ID, 541 .name = ST_ISM330DLC_DEV_NAME, 542 }, { 543 .hw_id = ST_LSM6DS3TRC_ID, 544 .name = ST_LSM6DS3TRC_DEV_NAME, 545 }, 546 }, 547 .channels = { 548 [ST_LSM6DSX_ID_ACC] = { 549 .chan = st_lsm6dsx_acc_channels, 550 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 551 }, 552 [ST_LSM6DSX_ID_GYRO] = { 553 .chan = st_lsm6dsx_gyro_channels, 554 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 555 }, 556 }, 557 .odr_table = { 558 [ST_LSM6DSX_ID_ACC] = { 559 .reg = { 560 .addr = 0x10, 561 .mask = GENMASK(7, 4), 562 }, 563 .odr_avl[0] = { 13, 0x01 }, 564 .odr_avl[1] = { 26, 0x02 }, 565 .odr_avl[2] = { 52, 0x03 }, 566 .odr_avl[3] = { 104, 0x04 }, 567 .odr_avl[4] = { 208, 0x05 }, 568 .odr_avl[5] = { 416, 0x06 }, 569 }, 570 [ST_LSM6DSX_ID_GYRO] = { 571 .reg = { 572 .addr = 0x11, 573 .mask = GENMASK(7, 4), 574 }, 575 .odr_avl[0] = { 13, 0x01 }, 576 .odr_avl[1] = { 26, 0x02 }, 577 .odr_avl[2] = { 52, 0x03 }, 578 .odr_avl[3] = { 104, 0x04 }, 579 .odr_avl[4] = { 208, 0x05 }, 580 .odr_avl[5] = { 416, 0x06 }, 581 }, 582 }, 583 .fs_table = { 584 [ST_LSM6DSX_ID_ACC] = { 585 .reg = { 586 .addr = 0x10, 587 .mask = GENMASK(3, 2), 588 }, 589 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 590 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 591 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 592 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 593 .fs_len = 4, 594 }, 595 [ST_LSM6DSX_ID_GYRO] = { 596 .reg = { 597 .addr = 0x11, 598 .mask = GENMASK(3, 2), 599 }, 600 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 601 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 602 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 603 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 604 .fs_len = 4, 605 }, 606 }, 607 .irq_config = { 608 .irq1 = { 609 .addr = 0x0d, 610 .mask = BIT(3), 611 }, 612 .irq2 = { 613 .addr = 0x0e, 614 .mask = BIT(3), 615 }, 616 .lir = { 617 .addr = 0x58, 618 .mask = BIT(0), 619 }, 620 .irq1_func = { 621 .addr = 0x5e, 622 .mask = BIT(5), 623 }, 624 .irq2_func = { 625 .addr = 0x5f, 626 .mask = BIT(5), 627 }, 628 .hla = { 629 .addr = 0x12, 630 .mask = BIT(5), 631 }, 632 .od = { 633 .addr = 0x12, 634 .mask = BIT(4), 635 }, 636 }, 637 .decimator = { 638 [ST_LSM6DSX_ID_ACC] = { 639 .addr = 0x08, 640 .mask = GENMASK(2, 0), 641 }, 642 [ST_LSM6DSX_ID_GYRO] = { 643 .addr = 0x08, 644 .mask = GENMASK(5, 3), 645 }, 646 }, 647 .fifo_ops = { 648 .update_fifo = st_lsm6dsx_update_fifo, 649 .read_fifo = st_lsm6dsx_read_fifo, 650 .fifo_th = { 651 .addr = 0x06, 652 .mask = GENMASK(10, 0), 653 }, 654 .fifo_diff = { 655 .addr = 0x3a, 656 .mask = GENMASK(10, 0), 657 }, 658 .th_wl = 3, /* 1LSB = 2B */ 659 }, 660 .ts_settings = { 661 .timer_en = { 662 .addr = 0x19, 663 .mask = BIT(5), 664 }, 665 .hr_timer = { 666 .addr = 0x5c, 667 .mask = BIT(4), 668 }, 669 .fifo_en = { 670 .addr = 0x07, 671 .mask = BIT(7), 672 }, 673 .decimator = { 674 .addr = 0x09, 675 .mask = GENMASK(5, 3), 676 }, 677 }, 678 .event_settings = { 679 .enable_reg = { 680 .addr = 0x58, 681 .mask = BIT(7), 682 }, 683 .wakeup_reg = { 684 .addr = 0x5B, 685 .mask = GENMASK(5, 0), 686 }, 687 .wakeup_src_reg = 0x1b, 688 .wakeup_src_status_mask = BIT(3), 689 .wakeup_src_z_mask = BIT(0), 690 .wakeup_src_y_mask = BIT(1), 691 .wakeup_src_x_mask = BIT(2), 692 }, 693 }, 694 { 695 .wai = 0x6c, 696 .reset = { 697 .addr = 0x12, 698 .mask = BIT(0), 699 }, 700 .boot = { 701 .addr = 0x12, 702 .mask = BIT(7), 703 }, 704 .bdu = { 705 .addr = 0x12, 706 .mask = BIT(6), 707 }, 708 .max_fifo_size = 512, 709 .id = { 710 { 711 .hw_id = ST_LSM6DSO_ID, 712 .name = ST_LSM6DSO_DEV_NAME, 713 }, { 714 .hw_id = ST_LSM6DSOX_ID, 715 .name = ST_LSM6DSOX_DEV_NAME, 716 }, 717 }, 718 .channels = { 719 [ST_LSM6DSX_ID_ACC] = { 720 .chan = st_lsm6dsx_acc_channels, 721 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 722 }, 723 [ST_LSM6DSX_ID_GYRO] = { 724 .chan = st_lsm6dsx_gyro_channels, 725 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 726 }, 727 }, 728 .drdy_mask = { 729 .addr = 0x13, 730 .mask = BIT(3), 731 }, 732 .odr_table = { 733 [ST_LSM6DSX_ID_ACC] = { 734 .reg = { 735 .addr = 0x10, 736 .mask = GENMASK(7, 4), 737 }, 738 .odr_avl[0] = { 13, 0x01 }, 739 .odr_avl[1] = { 26, 0x02 }, 740 .odr_avl[2] = { 52, 0x03 }, 741 .odr_avl[3] = { 104, 0x04 }, 742 .odr_avl[4] = { 208, 0x05 }, 743 .odr_avl[5] = { 416, 0x06 }, 744 }, 745 [ST_LSM6DSX_ID_GYRO] = { 746 .reg = { 747 .addr = 0x11, 748 .mask = GENMASK(7, 4), 749 }, 750 .odr_avl[0] = { 13, 0x01 }, 751 .odr_avl[1] = { 26, 0x02 }, 752 .odr_avl[2] = { 52, 0x03 }, 753 .odr_avl[3] = { 104, 0x04 }, 754 .odr_avl[4] = { 208, 0x05 }, 755 .odr_avl[5] = { 416, 0x06 }, 756 }, 757 }, 758 .fs_table = { 759 [ST_LSM6DSX_ID_ACC] = { 760 .reg = { 761 .addr = 0x10, 762 .mask = GENMASK(3, 2), 763 }, 764 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 765 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 766 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 767 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 768 .fs_len = 4, 769 }, 770 [ST_LSM6DSX_ID_GYRO] = { 771 .reg = { 772 .addr = 0x11, 773 .mask = GENMASK(3, 2), 774 }, 775 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 776 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 777 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 778 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 779 .fs_len = 4, 780 }, 781 }, 782 .irq_config = { 783 .irq1 = { 784 .addr = 0x0d, 785 .mask = BIT(3), 786 }, 787 .irq2 = { 788 .addr = 0x0e, 789 .mask = BIT(3), 790 }, 791 .lir = { 792 .addr = 0x56, 793 .mask = BIT(0), 794 }, 795 .clear_on_read = { 796 .addr = 0x56, 797 .mask = BIT(6), 798 }, 799 .irq1_func = { 800 .addr = 0x5e, 801 .mask = BIT(5), 802 }, 803 .irq2_func = { 804 .addr = 0x5f, 805 .mask = BIT(5), 806 }, 807 .hla = { 808 .addr = 0x12, 809 .mask = BIT(5), 810 }, 811 .od = { 812 .addr = 0x12, 813 .mask = BIT(4), 814 }, 815 }, 816 .batch = { 817 [ST_LSM6DSX_ID_ACC] = { 818 .addr = 0x09, 819 .mask = GENMASK(3, 0), 820 }, 821 [ST_LSM6DSX_ID_GYRO] = { 822 .addr = 0x09, 823 .mask = GENMASK(7, 4), 824 }, 825 }, 826 .fifo_ops = { 827 .update_fifo = st_lsm6dsx_update_fifo, 828 .read_fifo = st_lsm6dsx_read_tagged_fifo, 829 .fifo_th = { 830 .addr = 0x07, 831 .mask = GENMASK(8, 0), 832 }, 833 .fifo_diff = { 834 .addr = 0x3a, 835 .mask = GENMASK(9, 0), 836 }, 837 .th_wl = 1, 838 }, 839 .ts_settings = { 840 .timer_en = { 841 .addr = 0x19, 842 .mask = BIT(5), 843 }, 844 .decimator = { 845 .addr = 0x0a, 846 .mask = GENMASK(7, 6), 847 }, 848 .freq_fine = 0x63, 849 }, 850 .shub_settings = { 851 .page_mux = { 852 .addr = 0x01, 853 .mask = BIT(6), 854 }, 855 .master_en = { 856 .addr = 0x14, 857 .mask = BIT(2), 858 }, 859 .pullup_en = { 860 .addr = 0x14, 861 .mask = BIT(3), 862 }, 863 .aux_sens = { 864 .addr = 0x14, 865 .mask = GENMASK(1, 0), 866 }, 867 .wr_once = { 868 .addr = 0x14, 869 .mask = BIT(6), 870 }, 871 .shub_out = 0x02, 872 .slv0_addr = 0x15, 873 .dw_slv0_addr = 0x21, 874 .batch_en = BIT(3), 875 }, 876 .event_settings = { 877 .enable_reg = { 878 .addr = 0x58, 879 .mask = BIT(7), 880 }, 881 .wakeup_reg = { 882 .addr = 0x5b, 883 .mask = GENMASK(5, 0), 884 }, 885 .wakeup_src_reg = 0x1b, 886 .wakeup_src_status_mask = BIT(3), 887 .wakeup_src_z_mask = BIT(0), 888 .wakeup_src_y_mask = BIT(1), 889 .wakeup_src_x_mask = BIT(2), 890 }, 891 }, 892 { 893 .wai = 0x6b, 894 .reset = { 895 .addr = 0x12, 896 .mask = BIT(0), 897 }, 898 .boot = { 899 .addr = 0x12, 900 .mask = BIT(7), 901 }, 902 .bdu = { 903 .addr = 0x12, 904 .mask = BIT(6), 905 }, 906 .max_fifo_size = 512, 907 .id = { 908 { 909 .hw_id = ST_ASM330LHH_ID, 910 .name = ST_ASM330LHH_DEV_NAME, 911 }, 912 }, 913 .channels = { 914 [ST_LSM6DSX_ID_ACC] = { 915 .chan = st_lsm6dsx_acc_channels, 916 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 917 }, 918 [ST_LSM6DSX_ID_GYRO] = { 919 .chan = st_lsm6dsx_gyro_channels, 920 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 921 }, 922 }, 923 .drdy_mask = { 924 .addr = 0x13, 925 .mask = BIT(3), 926 }, 927 .odr_table = { 928 [ST_LSM6DSX_ID_ACC] = { 929 .reg = { 930 .addr = 0x10, 931 .mask = GENMASK(7, 4), 932 }, 933 .odr_avl[0] = { 13, 0x01 }, 934 .odr_avl[1] = { 26, 0x02 }, 935 .odr_avl[2] = { 52, 0x03 }, 936 .odr_avl[3] = { 104, 0x04 }, 937 .odr_avl[4] = { 208, 0x05 }, 938 .odr_avl[5] = { 416, 0x06 }, 939 }, 940 [ST_LSM6DSX_ID_GYRO] = { 941 .reg = { 942 .addr = 0x11, 943 .mask = GENMASK(7, 4), 944 }, 945 .odr_avl[0] = { 13, 0x01 }, 946 .odr_avl[1] = { 26, 0x02 }, 947 .odr_avl[2] = { 52, 0x03 }, 948 .odr_avl[3] = { 104, 0x04 }, 949 .odr_avl[4] = { 208, 0x05 }, 950 .odr_avl[5] = { 416, 0x06 }, 951 }, 952 }, 953 .fs_table = { 954 [ST_LSM6DSX_ID_ACC] = { 955 .reg = { 956 .addr = 0x10, 957 .mask = GENMASK(3, 2), 958 }, 959 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 960 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 961 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 962 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 963 .fs_len = 4, 964 }, 965 [ST_LSM6DSX_ID_GYRO] = { 966 .reg = { 967 .addr = 0x11, 968 .mask = GENMASK(3, 2), 969 }, 970 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 971 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 972 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 973 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 974 .fs_len = 4, 975 }, 976 }, 977 .irq_config = { 978 .irq1 = { 979 .addr = 0x0d, 980 .mask = BIT(3), 981 }, 982 .irq2 = { 983 .addr = 0x0e, 984 .mask = BIT(3), 985 }, 986 .lir = { 987 .addr = 0x56, 988 .mask = BIT(0), 989 }, 990 .clear_on_read = { 991 .addr = 0x56, 992 .mask = BIT(6), 993 }, 994 .irq1_func = { 995 .addr = 0x5e, 996 .mask = BIT(5), 997 }, 998 .irq2_func = { 999 .addr = 0x5f, 1000 .mask = BIT(5), 1001 }, 1002 .hla = { 1003 .addr = 0x12, 1004 .mask = BIT(5), 1005 }, 1006 .od = { 1007 .addr = 0x12, 1008 .mask = BIT(4), 1009 }, 1010 }, 1011 .batch = { 1012 [ST_LSM6DSX_ID_ACC] = { 1013 .addr = 0x09, 1014 .mask = GENMASK(3, 0), 1015 }, 1016 [ST_LSM6DSX_ID_GYRO] = { 1017 .addr = 0x09, 1018 .mask = GENMASK(7, 4), 1019 }, 1020 }, 1021 .fifo_ops = { 1022 .update_fifo = st_lsm6dsx_update_fifo, 1023 .read_fifo = st_lsm6dsx_read_tagged_fifo, 1024 .fifo_th = { 1025 .addr = 0x07, 1026 .mask = GENMASK(8, 0), 1027 }, 1028 .fifo_diff = { 1029 .addr = 0x3a, 1030 .mask = GENMASK(9, 0), 1031 }, 1032 .th_wl = 1, 1033 }, 1034 .ts_settings = { 1035 .timer_en = { 1036 .addr = 0x19, 1037 .mask = BIT(5), 1038 }, 1039 .decimator = { 1040 .addr = 0x0a, 1041 .mask = GENMASK(7, 6), 1042 }, 1043 .freq_fine = 0x63, 1044 }, 1045 .event_settings = { 1046 .enable_reg = { 1047 .addr = 0x58, 1048 .mask = BIT(7), 1049 }, 1050 .wakeup_reg = { 1051 .addr = 0x5B, 1052 .mask = GENMASK(5, 0), 1053 }, 1054 .wakeup_src_reg = 0x1b, 1055 .wakeup_src_status_mask = BIT(3), 1056 .wakeup_src_z_mask = BIT(0), 1057 .wakeup_src_y_mask = BIT(1), 1058 .wakeup_src_x_mask = BIT(2), 1059 }, 1060 }, 1061 { 1062 .wai = 0x6b, 1063 .reset = { 1064 .addr = 0x12, 1065 .mask = BIT(0), 1066 }, 1067 .boot = { 1068 .addr = 0x12, 1069 .mask = BIT(7), 1070 }, 1071 .bdu = { 1072 .addr = 0x12, 1073 .mask = BIT(6), 1074 }, 1075 .max_fifo_size = 512, 1076 .id = { 1077 { 1078 .hw_id = ST_LSM6DSR_ID, 1079 .name = ST_LSM6DSR_DEV_NAME, 1080 }, { 1081 .hw_id = ST_ISM330DHCX_ID, 1082 .name = ST_ISM330DHCX_DEV_NAME, 1083 }, 1084 }, 1085 .channels = { 1086 [ST_LSM6DSX_ID_ACC] = { 1087 .chan = st_lsm6dsx_acc_channels, 1088 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 1089 }, 1090 [ST_LSM6DSX_ID_GYRO] = { 1091 .chan = st_lsm6dsx_gyro_channels, 1092 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 1093 }, 1094 }, 1095 .drdy_mask = { 1096 .addr = 0x13, 1097 .mask = BIT(3), 1098 }, 1099 .odr_table = { 1100 [ST_LSM6DSX_ID_ACC] = { 1101 .reg = { 1102 .addr = 0x10, 1103 .mask = GENMASK(7, 4), 1104 }, 1105 .odr_avl[0] = { 13, 0x01 }, 1106 .odr_avl[1] = { 26, 0x02 }, 1107 .odr_avl[2] = { 52, 0x03 }, 1108 .odr_avl[3] = { 104, 0x04 }, 1109 .odr_avl[4] = { 208, 0x05 }, 1110 .odr_avl[5] = { 416, 0x06 }, 1111 }, 1112 [ST_LSM6DSX_ID_GYRO] = { 1113 .reg = { 1114 .addr = 0x11, 1115 .mask = GENMASK(7, 4), 1116 }, 1117 .odr_avl[0] = { 13, 0x01 }, 1118 .odr_avl[1] = { 26, 0x02 }, 1119 .odr_avl[2] = { 52, 0x03 }, 1120 .odr_avl[3] = { 104, 0x04 }, 1121 .odr_avl[4] = { 208, 0x05 }, 1122 .odr_avl[5] = { 416, 0x06 }, 1123 }, 1124 }, 1125 .fs_table = { 1126 [ST_LSM6DSX_ID_ACC] = { 1127 .reg = { 1128 .addr = 0x10, 1129 .mask = GENMASK(3, 2), 1130 }, 1131 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 1132 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 1133 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 1134 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 1135 .fs_len = 4, 1136 }, 1137 [ST_LSM6DSX_ID_GYRO] = { 1138 .reg = { 1139 .addr = 0x11, 1140 .mask = GENMASK(3, 2), 1141 }, 1142 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 1143 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 1144 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 1145 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 1146 .fs_len = 4, 1147 }, 1148 }, 1149 .irq_config = { 1150 .irq1 = { 1151 .addr = 0x0d, 1152 .mask = BIT(3), 1153 }, 1154 .irq2 = { 1155 .addr = 0x0e, 1156 .mask = BIT(3), 1157 }, 1158 .lir = { 1159 .addr = 0x56, 1160 .mask = BIT(0), 1161 }, 1162 .clear_on_read = { 1163 .addr = 0x56, 1164 .mask = BIT(6), 1165 }, 1166 .irq1_func = { 1167 .addr = 0x5e, 1168 .mask = BIT(5), 1169 }, 1170 .irq2_func = { 1171 .addr = 0x5f, 1172 .mask = BIT(5), 1173 }, 1174 .hla = { 1175 .addr = 0x12, 1176 .mask = BIT(5), 1177 }, 1178 .od = { 1179 .addr = 0x12, 1180 .mask = BIT(4), 1181 }, 1182 }, 1183 .batch = { 1184 [ST_LSM6DSX_ID_ACC] = { 1185 .addr = 0x09, 1186 .mask = GENMASK(3, 0), 1187 }, 1188 [ST_LSM6DSX_ID_GYRO] = { 1189 .addr = 0x09, 1190 .mask = GENMASK(7, 4), 1191 }, 1192 }, 1193 .fifo_ops = { 1194 .update_fifo = st_lsm6dsx_update_fifo, 1195 .read_fifo = st_lsm6dsx_read_tagged_fifo, 1196 .fifo_th = { 1197 .addr = 0x07, 1198 .mask = GENMASK(8, 0), 1199 }, 1200 .fifo_diff = { 1201 .addr = 0x3a, 1202 .mask = GENMASK(9, 0), 1203 }, 1204 .th_wl = 1, 1205 }, 1206 .ts_settings = { 1207 .timer_en = { 1208 .addr = 0x19, 1209 .mask = BIT(5), 1210 }, 1211 .decimator = { 1212 .addr = 0x0a, 1213 .mask = GENMASK(7, 6), 1214 }, 1215 .freq_fine = 0x63, 1216 }, 1217 .shub_settings = { 1218 .page_mux = { 1219 .addr = 0x01, 1220 .mask = BIT(6), 1221 }, 1222 .master_en = { 1223 .addr = 0x14, 1224 .mask = BIT(2), 1225 }, 1226 .pullup_en = { 1227 .addr = 0x14, 1228 .mask = BIT(3), 1229 }, 1230 .aux_sens = { 1231 .addr = 0x14, 1232 .mask = GENMASK(1, 0), 1233 }, 1234 .wr_once = { 1235 .addr = 0x14, 1236 .mask = BIT(6), 1237 }, 1238 .shub_out = 0x02, 1239 .slv0_addr = 0x15, 1240 .dw_slv0_addr = 0x21, 1241 .batch_en = BIT(3), 1242 }, 1243 .event_settings = { 1244 .enable_reg = { 1245 .addr = 0x58, 1246 .mask = BIT(7), 1247 }, 1248 .wakeup_reg = { 1249 .addr = 0x5B, 1250 .mask = GENMASK(5, 0), 1251 }, 1252 .wakeup_src_reg = 0x1b, 1253 .wakeup_src_status_mask = BIT(3), 1254 .wakeup_src_z_mask = BIT(0), 1255 .wakeup_src_y_mask = BIT(1), 1256 .wakeup_src_x_mask = BIT(2), 1257 } 1258 }, 1259 }; 1260 1261 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable) 1262 { 1263 const struct st_lsm6dsx_shub_settings *hub_settings; 1264 unsigned int data; 1265 int err; 1266 1267 hub_settings = &hw->settings->shub_settings; 1268 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask); 1269 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr, 1270 hub_settings->page_mux.mask, data); 1271 usleep_range(100, 150); 1272 1273 return err; 1274 } 1275 1276 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id, 1277 const char **name) 1278 { 1279 int err, i, j, data; 1280 1281 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) { 1282 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) { 1283 if (id == st_lsm6dsx_sensor_settings[i].id[j].hw_id) 1284 break; 1285 } 1286 if (j < ST_LSM6DSX_MAX_ID) 1287 break; 1288 } 1289 1290 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) { 1291 dev_err(hw->dev, "unsupported hw id [%02x]\n", id); 1292 return -ENODEV; 1293 } 1294 1295 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data); 1296 if (err < 0) { 1297 dev_err(hw->dev, "failed to read whoami register\n"); 1298 return err; 1299 } 1300 1301 if (data != st_lsm6dsx_sensor_settings[i].wai) { 1302 dev_err(hw->dev, "unsupported whoami [%02x]\n", data); 1303 return -ENODEV; 1304 } 1305 1306 *name = st_lsm6dsx_sensor_settings[i].id[j].name; 1307 hw->settings = &st_lsm6dsx_sensor_settings[i]; 1308 1309 return 0; 1310 } 1311 1312 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor, 1313 u32 gain) 1314 { 1315 const struct st_lsm6dsx_fs_table_entry *fs_table; 1316 unsigned int data; 1317 int i, err; 1318 1319 fs_table = &sensor->hw->settings->fs_table[sensor->id]; 1320 for (i = 0; i < fs_table->fs_len; i++) { 1321 if (fs_table->fs_avl[i].gain == gain) 1322 break; 1323 } 1324 1325 if (i == fs_table->fs_len) 1326 return -EINVAL; 1327 1328 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val, 1329 fs_table->reg.mask); 1330 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr, 1331 fs_table->reg.mask, data); 1332 if (err < 0) 1333 return err; 1334 1335 sensor->gain = gain; 1336 1337 return 0; 1338 } 1339 1340 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u16 odr, u8 *val) 1341 { 1342 const struct st_lsm6dsx_odr_table_entry *odr_table; 1343 int i; 1344 1345 odr_table = &sensor->hw->settings->odr_table[sensor->id]; 1346 for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) 1347 /* 1348 * ext devices can run at different odr respect to 1349 * accel sensor 1350 */ 1351 if (odr_table->odr_avl[i].hz >= odr) 1352 break; 1353 1354 if (i == ST_LSM6DSX_ODR_LIST_SIZE) 1355 return -EINVAL; 1356 1357 *val = odr_table->odr_avl[i].val; 1358 1359 return 0; 1360 } 1361 1362 static u16 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u16 odr, 1363 enum st_lsm6dsx_sensor_id id) 1364 { 1365 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]); 1366 1367 if (odr > 0) { 1368 if (hw->enable_mask & BIT(id)) 1369 return max_t(u16, ref->odr, odr); 1370 else 1371 return odr; 1372 } else { 1373 return (hw->enable_mask & BIT(id)) ? ref->odr : 0; 1374 } 1375 } 1376 1377 static int st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u16 req_odr) 1378 { 1379 struct st_lsm6dsx_sensor *ref_sensor = sensor; 1380 struct st_lsm6dsx_hw *hw = sensor->hw; 1381 const struct st_lsm6dsx_reg *reg; 1382 unsigned int data; 1383 u8 val = 0; 1384 int err; 1385 1386 switch (sensor->id) { 1387 case ST_LSM6DSX_ID_EXT0: 1388 case ST_LSM6DSX_ID_EXT1: 1389 case ST_LSM6DSX_ID_EXT2: 1390 case ST_LSM6DSX_ID_ACC: { 1391 u16 odr; 1392 int i; 1393 1394 /* 1395 * i2c embedded controller relies on the accelerometer sensor as 1396 * bus read/write trigger so we need to enable accel device 1397 * at odr = max(accel_odr, ext_odr) in order to properly 1398 * communicate with i2c slave devices 1399 */ 1400 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]); 1401 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) { 1402 if (!hw->iio_devs[i] || i == sensor->id) 1403 continue; 1404 1405 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i); 1406 if (odr != req_odr) 1407 /* device already configured */ 1408 return 0; 1409 } 1410 break; 1411 } 1412 default: 1413 break; 1414 } 1415 1416 if (req_odr > 0) { 1417 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val); 1418 if (err < 0) 1419 return err; 1420 } 1421 1422 reg = &hw->settings->odr_table[ref_sensor->id].reg; 1423 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask); 1424 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); 1425 } 1426 1427 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 1428 bool enable) 1429 { 1430 struct st_lsm6dsx_hw *hw = sensor->hw; 1431 u16 odr = enable ? sensor->odr : 0; 1432 int err; 1433 1434 err = st_lsm6dsx_set_odr(sensor, odr); 1435 if (err < 0) 1436 return err; 1437 1438 if (enable) 1439 hw->enable_mask |= BIT(sensor->id); 1440 else 1441 hw->enable_mask &= ~BIT(sensor->id); 1442 1443 return 0; 1444 } 1445 1446 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor, 1447 u8 addr, int *val) 1448 { 1449 struct st_lsm6dsx_hw *hw = sensor->hw; 1450 int err, delay; 1451 __le16 data; 1452 1453 err = st_lsm6dsx_sensor_set_enable(sensor, true); 1454 if (err < 0) 1455 return err; 1456 1457 delay = 1000000 / sensor->odr; 1458 usleep_range(delay, 2 * delay); 1459 1460 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data)); 1461 if (err < 0) 1462 return err; 1463 1464 if (!hw->enable_event) 1465 st_lsm6dsx_sensor_set_enable(sensor, false); 1466 1467 *val = (s16)le16_to_cpu(data); 1468 1469 return IIO_VAL_INT; 1470 } 1471 1472 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev, 1473 struct iio_chan_spec const *ch, 1474 int *val, int *val2, long mask) 1475 { 1476 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1477 int ret; 1478 1479 switch (mask) { 1480 case IIO_CHAN_INFO_RAW: 1481 ret = iio_device_claim_direct_mode(iio_dev); 1482 if (ret) 1483 break; 1484 1485 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val); 1486 iio_device_release_direct_mode(iio_dev); 1487 break; 1488 case IIO_CHAN_INFO_SAMP_FREQ: 1489 *val = sensor->odr; 1490 ret = IIO_VAL_INT; 1491 break; 1492 case IIO_CHAN_INFO_SCALE: 1493 *val = 0; 1494 *val2 = sensor->gain; 1495 ret = IIO_VAL_INT_PLUS_MICRO; 1496 break; 1497 default: 1498 ret = -EINVAL; 1499 break; 1500 } 1501 1502 return ret; 1503 } 1504 1505 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev, 1506 struct iio_chan_spec const *chan, 1507 int val, int val2, long mask) 1508 { 1509 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1510 int err; 1511 1512 err = iio_device_claim_direct_mode(iio_dev); 1513 if (err) 1514 return err; 1515 1516 switch (mask) { 1517 case IIO_CHAN_INFO_SCALE: 1518 err = st_lsm6dsx_set_full_scale(sensor, val2); 1519 break; 1520 case IIO_CHAN_INFO_SAMP_FREQ: { 1521 u8 data; 1522 1523 err = st_lsm6dsx_check_odr(sensor, val, &data); 1524 if (!err) 1525 sensor->odr = val; 1526 break; 1527 } 1528 default: 1529 err = -EINVAL; 1530 break; 1531 } 1532 1533 iio_device_release_direct_mode(iio_dev); 1534 1535 return err; 1536 } 1537 1538 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, int state) 1539 { 1540 const struct st_lsm6dsx_reg *reg; 1541 unsigned int data; 1542 int err; 1543 1544 if (!hw->settings->irq_config.irq1_func.addr) 1545 return -ENOTSUPP; 1546 1547 reg = &hw->settings->event_settings.enable_reg; 1548 if (reg->addr) { 1549 data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask); 1550 err = st_lsm6dsx_update_bits_locked(hw, reg->addr, 1551 reg->mask, data); 1552 if (err < 0) 1553 return err; 1554 } 1555 1556 /* Enable wakeup interrupt */ 1557 data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask); 1558 return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr, 1559 hw->irq_routing->mask, data); 1560 } 1561 1562 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev, 1563 const struct iio_chan_spec *chan, 1564 enum iio_event_type type, 1565 enum iio_event_direction dir, 1566 enum iio_event_info info, 1567 int *val, int *val2) 1568 { 1569 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1570 struct st_lsm6dsx_hw *hw = sensor->hw; 1571 1572 if (type != IIO_EV_TYPE_THRESH) 1573 return -EINVAL; 1574 1575 *val2 = 0; 1576 *val = hw->event_threshold; 1577 1578 return IIO_VAL_INT; 1579 } 1580 1581 static int 1582 st_lsm6dsx_write_event(struct iio_dev *iio_dev, 1583 const struct iio_chan_spec *chan, 1584 enum iio_event_type type, 1585 enum iio_event_direction dir, 1586 enum iio_event_info info, 1587 int val, int val2) 1588 { 1589 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1590 struct st_lsm6dsx_hw *hw = sensor->hw; 1591 const struct st_lsm6dsx_reg *reg; 1592 unsigned int data; 1593 int err; 1594 1595 if (type != IIO_EV_TYPE_THRESH) 1596 return -EINVAL; 1597 1598 if (val < 0 || val > 31) 1599 return -EINVAL; 1600 1601 reg = &hw->settings->event_settings.wakeup_reg; 1602 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask); 1603 err = st_lsm6dsx_update_bits_locked(hw, reg->addr, 1604 reg->mask, data); 1605 if (err < 0) 1606 return -EINVAL; 1607 1608 hw->event_threshold = val; 1609 1610 return 0; 1611 } 1612 1613 static int 1614 st_lsm6dsx_read_event_config(struct iio_dev *iio_dev, 1615 const struct iio_chan_spec *chan, 1616 enum iio_event_type type, 1617 enum iio_event_direction dir) 1618 { 1619 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1620 struct st_lsm6dsx_hw *hw = sensor->hw; 1621 1622 if (type != IIO_EV_TYPE_THRESH) 1623 return -EINVAL; 1624 1625 return !!(hw->enable_event & BIT(chan->channel2)); 1626 } 1627 1628 static int 1629 st_lsm6dsx_write_event_config(struct iio_dev *iio_dev, 1630 const struct iio_chan_spec *chan, 1631 enum iio_event_type type, 1632 enum iio_event_direction dir, int state) 1633 { 1634 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1635 struct st_lsm6dsx_hw *hw = sensor->hw; 1636 u8 enable_event; 1637 int err = 0; 1638 1639 if (type != IIO_EV_TYPE_THRESH) 1640 return -EINVAL; 1641 1642 if (state) { 1643 enable_event = hw->enable_event | BIT(chan->channel2); 1644 1645 /* do not enable events if they are already enabled */ 1646 if (hw->enable_event) 1647 goto out; 1648 } else { 1649 enable_event = hw->enable_event & ~BIT(chan->channel2); 1650 1651 /* only turn off sensor if no events is enabled */ 1652 if (enable_event) 1653 goto out; 1654 } 1655 1656 /* stop here if no changes have been made */ 1657 if (hw->enable_event == enable_event) 1658 return 0; 1659 1660 err = st_lsm6dsx_event_setup(hw, state); 1661 if (err < 0) 1662 return err; 1663 1664 mutex_lock(&hw->conf_lock); 1665 err = st_lsm6dsx_sensor_set_enable(sensor, state); 1666 mutex_unlock(&hw->conf_lock); 1667 if (err < 0) 1668 return err; 1669 1670 out: 1671 hw->enable_event = enable_event; 1672 1673 return 0; 1674 } 1675 1676 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val) 1677 { 1678 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1679 struct st_lsm6dsx_hw *hw = sensor->hw; 1680 int err; 1681 1682 if (val < 1 || val > hw->settings->max_fifo_size) 1683 return -EINVAL; 1684 1685 mutex_lock(&hw->conf_lock); 1686 1687 err = st_lsm6dsx_update_watermark(sensor, val); 1688 1689 mutex_unlock(&hw->conf_lock); 1690 1691 if (err < 0) 1692 return err; 1693 1694 sensor->watermark = val; 1695 1696 return 0; 1697 } 1698 1699 static ssize_t 1700 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev, 1701 struct device_attribute *attr, 1702 char *buf) 1703 { 1704 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev)); 1705 enum st_lsm6dsx_sensor_id id = sensor->id; 1706 struct st_lsm6dsx_hw *hw = sensor->hw; 1707 int i, len = 0; 1708 1709 for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) 1710 len += scnprintf(buf + len, PAGE_SIZE - len, "%d ", 1711 hw->settings->odr_table[id].odr_avl[i].hz); 1712 buf[len - 1] = '\n'; 1713 1714 return len; 1715 } 1716 1717 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev, 1718 struct device_attribute *attr, 1719 char *buf) 1720 { 1721 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev)); 1722 const struct st_lsm6dsx_fs_table_entry *fs_table; 1723 struct st_lsm6dsx_hw *hw = sensor->hw; 1724 int i, len = 0; 1725 1726 fs_table = &hw->settings->fs_table[sensor->id]; 1727 for (i = 0; i < fs_table->fs_len; i++) 1728 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ", 1729 fs_table->fs_avl[i].gain); 1730 buf[len - 1] = '\n'; 1731 1732 return len; 1733 } 1734 1735 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail); 1736 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444, 1737 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 1738 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444, 1739 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 1740 1741 static struct attribute *st_lsm6dsx_acc_attributes[] = { 1742 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 1743 &iio_dev_attr_in_accel_scale_available.dev_attr.attr, 1744 NULL, 1745 }; 1746 1747 static const struct attribute_group st_lsm6dsx_acc_attribute_group = { 1748 .attrs = st_lsm6dsx_acc_attributes, 1749 }; 1750 1751 static const struct iio_info st_lsm6dsx_acc_info = { 1752 .attrs = &st_lsm6dsx_acc_attribute_group, 1753 .read_raw = st_lsm6dsx_read_raw, 1754 .write_raw = st_lsm6dsx_write_raw, 1755 .read_event_value = st_lsm6dsx_read_event, 1756 .write_event_value = st_lsm6dsx_write_event, 1757 .read_event_config = st_lsm6dsx_read_event_config, 1758 .write_event_config = st_lsm6dsx_write_event_config, 1759 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 1760 }; 1761 1762 static struct attribute *st_lsm6dsx_gyro_attributes[] = { 1763 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 1764 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr, 1765 NULL, 1766 }; 1767 1768 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = { 1769 .attrs = st_lsm6dsx_gyro_attributes, 1770 }; 1771 1772 static const struct iio_info st_lsm6dsx_gyro_info = { 1773 .attrs = &st_lsm6dsx_gyro_attribute_group, 1774 .read_raw = st_lsm6dsx_read_raw, 1775 .write_raw = st_lsm6dsx_write_raw, 1776 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 1777 }; 1778 1779 static int st_lsm6dsx_of_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin) 1780 { 1781 struct device_node *np = hw->dev->of_node; 1782 1783 if (!np) 1784 return -EINVAL; 1785 1786 return of_property_read_u32(np, "st,drdy-int-pin", drdy_pin); 1787 } 1788 1789 static int 1790 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, 1791 const struct st_lsm6dsx_reg **drdy_reg) 1792 { 1793 int err = 0, drdy_pin; 1794 1795 if (st_lsm6dsx_of_get_drdy_pin(hw, &drdy_pin) < 0) { 1796 struct st_sensors_platform_data *pdata; 1797 struct device *dev = hw->dev; 1798 1799 pdata = (struct st_sensors_platform_data *)dev->platform_data; 1800 drdy_pin = pdata ? pdata->drdy_int_pin : 1; 1801 } 1802 1803 switch (drdy_pin) { 1804 case 1: 1805 hw->irq_routing = &hw->settings->irq_config.irq1_func; 1806 *drdy_reg = &hw->settings->irq_config.irq1; 1807 break; 1808 case 2: 1809 hw->irq_routing = &hw->settings->irq_config.irq2_func; 1810 *drdy_reg = &hw->settings->irq_config.irq2; 1811 break; 1812 default: 1813 dev_err(hw->dev, "unsupported data ready pin\n"); 1814 err = -EINVAL; 1815 break; 1816 } 1817 1818 return err; 1819 } 1820 1821 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw) 1822 { 1823 const struct st_lsm6dsx_shub_settings *hub_settings; 1824 struct device_node *np = hw->dev->of_node; 1825 struct st_sensors_platform_data *pdata; 1826 unsigned int data; 1827 int err = 0; 1828 1829 hub_settings = &hw->settings->shub_settings; 1830 1831 pdata = (struct st_sensors_platform_data *)hw->dev->platform_data; 1832 if ((np && of_property_read_bool(np, "st,pullups")) || 1833 (pdata && pdata->pullups)) { 1834 err = st_lsm6dsx_set_page(hw, true); 1835 if (err < 0) 1836 return err; 1837 1838 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask); 1839 err = regmap_update_bits(hw->regmap, 1840 hub_settings->pullup_en.addr, 1841 hub_settings->pullup_en.mask, data); 1842 1843 st_lsm6dsx_set_page(hw, false); 1844 1845 if (err < 0) 1846 return err; 1847 } 1848 1849 if (hub_settings->aux_sens.addr) { 1850 /* configure aux sensors */ 1851 err = st_lsm6dsx_set_page(hw, true); 1852 if (err < 0) 1853 return err; 1854 1855 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask); 1856 err = regmap_update_bits(hw->regmap, 1857 hub_settings->aux_sens.addr, 1858 hub_settings->aux_sens.mask, data); 1859 1860 st_lsm6dsx_set_page(hw, false); 1861 } 1862 1863 return err; 1864 } 1865 1866 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw) 1867 { 1868 const struct st_lsm6dsx_hw_ts_settings *ts_settings; 1869 int err, val; 1870 1871 ts_settings = &hw->settings->ts_settings; 1872 /* enable hw timestamp generation if necessary */ 1873 if (ts_settings->timer_en.addr) { 1874 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask); 1875 err = regmap_update_bits(hw->regmap, 1876 ts_settings->timer_en.addr, 1877 ts_settings->timer_en.mask, val); 1878 if (err < 0) 1879 return err; 1880 } 1881 1882 /* enable high resolution for hw ts timer if necessary */ 1883 if (ts_settings->hr_timer.addr) { 1884 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask); 1885 err = regmap_update_bits(hw->regmap, 1886 ts_settings->hr_timer.addr, 1887 ts_settings->hr_timer.mask, val); 1888 if (err < 0) 1889 return err; 1890 } 1891 1892 /* enable ts queueing in FIFO if necessary */ 1893 if (ts_settings->fifo_en.addr) { 1894 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask); 1895 err = regmap_update_bits(hw->regmap, 1896 ts_settings->fifo_en.addr, 1897 ts_settings->fifo_en.mask, val); 1898 if (err < 0) 1899 return err; 1900 } 1901 1902 /* calibrate timestamp sensitivity */ 1903 hw->ts_gain = ST_LSM6DSX_TS_SENSITIVITY; 1904 if (ts_settings->freq_fine) { 1905 err = regmap_read(hw->regmap, ts_settings->freq_fine, &val); 1906 if (err < 0) 1907 return err; 1908 1909 /* 1910 * linearize the AN5192 formula: 1911 * 1 / (1 + x) ~= 1 - x (Taylor’s Series) 1912 * ttrim[s] = 1 / (40000 * (1 + 0.0015 * val)) 1913 * ttrim[ns] ~= 25000 - 37.5 * val 1914 * ttrim[ns] ~= 25000 - (37500 * val) / 1000 1915 */ 1916 hw->ts_gain -= ((s8)val * 37500) / 1000; 1917 } 1918 1919 return 0; 1920 } 1921 1922 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw) 1923 { 1924 const struct st_lsm6dsx_reg *reg; 1925 int err; 1926 1927 /* device sw reset */ 1928 reg = &hw->settings->reset; 1929 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1930 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1931 if (err < 0) 1932 return err; 1933 1934 msleep(50); 1935 1936 /* reload trimming parameter */ 1937 reg = &hw->settings->boot; 1938 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1939 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1940 if (err < 0) 1941 return err; 1942 1943 msleep(50); 1944 1945 /* enable Block Data Update */ 1946 reg = &hw->settings->bdu; 1947 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1948 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1949 if (err < 0) 1950 return err; 1951 1952 /* enable FIFO watermak interrupt */ 1953 err = st_lsm6dsx_get_drdy_reg(hw, ®); 1954 if (err < 0) 1955 return err; 1956 1957 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1958 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1959 if (err < 0) 1960 return err; 1961 1962 /* enable Latched interrupts for device events */ 1963 if (hw->settings->irq_config.lir.addr) { 1964 reg = &hw->settings->irq_config.lir; 1965 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1966 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1967 if (err < 0) 1968 return err; 1969 1970 /* enable clear on read for latched interrupts */ 1971 if (hw->settings->irq_config.clear_on_read.addr) { 1972 reg = &hw->settings->irq_config.clear_on_read; 1973 err = regmap_update_bits(hw->regmap, 1974 reg->addr, reg->mask, 1975 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1976 if (err < 0) 1977 return err; 1978 } 1979 } 1980 1981 /* enable drdy-mas if available */ 1982 if (hw->settings->drdy_mask.addr) { 1983 reg = &hw->settings->drdy_mask; 1984 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1985 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1986 if (err < 0) 1987 return err; 1988 } 1989 1990 err = st_lsm6dsx_init_shub(hw); 1991 if (err < 0) 1992 return err; 1993 1994 return st_lsm6dsx_init_hw_timer(hw); 1995 } 1996 1997 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw, 1998 enum st_lsm6dsx_sensor_id id, 1999 const char *name) 2000 { 2001 struct st_lsm6dsx_sensor *sensor; 2002 struct iio_dev *iio_dev; 2003 2004 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor)); 2005 if (!iio_dev) 2006 return NULL; 2007 2008 iio_dev->modes = INDIO_DIRECT_MODE; 2009 iio_dev->dev.parent = hw->dev; 2010 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks; 2011 iio_dev->channels = hw->settings->channels[id].chan; 2012 iio_dev->num_channels = hw->settings->channels[id].len; 2013 2014 sensor = iio_priv(iio_dev); 2015 sensor->id = id; 2016 sensor->hw = hw; 2017 sensor->odr = hw->settings->odr_table[id].odr_avl[0].hz; 2018 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain; 2019 sensor->watermark = 1; 2020 2021 switch (id) { 2022 case ST_LSM6DSX_ID_ACC: 2023 iio_dev->info = &st_lsm6dsx_acc_info; 2024 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel", 2025 name); 2026 break; 2027 case ST_LSM6DSX_ID_GYRO: 2028 iio_dev->info = &st_lsm6dsx_gyro_info; 2029 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro", 2030 name); 2031 break; 2032 default: 2033 return NULL; 2034 } 2035 iio_dev->name = sensor->name; 2036 2037 return iio_dev; 2038 } 2039 2040 static bool 2041 st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw) 2042 { 2043 const struct st_lsm6dsx_event_settings *event_settings; 2044 int err, data; 2045 s64 timestamp; 2046 2047 if (!hw->enable_event) 2048 return false; 2049 2050 event_settings = &hw->settings->event_settings; 2051 err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg, 2052 &data, sizeof(data)); 2053 if (err < 0) 2054 return false; 2055 2056 timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]); 2057 if ((data & hw->settings->event_settings.wakeup_src_z_mask) && 2058 (hw->enable_event & BIT(IIO_MOD_Z))) 2059 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2060 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2061 0, 2062 IIO_MOD_Z, 2063 IIO_EV_TYPE_THRESH, 2064 IIO_EV_DIR_EITHER), 2065 timestamp); 2066 2067 if ((data & hw->settings->event_settings.wakeup_src_y_mask) && 2068 (hw->enable_event & BIT(IIO_MOD_Y))) 2069 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2070 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2071 0, 2072 IIO_MOD_Y, 2073 IIO_EV_TYPE_THRESH, 2074 IIO_EV_DIR_EITHER), 2075 timestamp); 2076 2077 if ((data & hw->settings->event_settings.wakeup_src_x_mask) && 2078 (hw->enable_event & BIT(IIO_MOD_X))) 2079 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2080 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2081 0, 2082 IIO_MOD_X, 2083 IIO_EV_TYPE_THRESH, 2084 IIO_EV_DIR_EITHER), 2085 timestamp); 2086 2087 return data & event_settings->wakeup_src_status_mask; 2088 } 2089 2090 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private) 2091 { 2092 struct st_lsm6dsx_hw *hw = private; 2093 bool event; 2094 int count; 2095 2096 event = st_lsm6dsx_report_motion_event(hw); 2097 2098 if (!hw->settings->fifo_ops.read_fifo) 2099 return event ? IRQ_HANDLED : IRQ_NONE; 2100 2101 mutex_lock(&hw->fifo_lock); 2102 count = hw->settings->fifo_ops.read_fifo(hw); 2103 mutex_unlock(&hw->fifo_lock); 2104 2105 return count || event ? IRQ_HANDLED : IRQ_NONE; 2106 } 2107 2108 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw) 2109 { 2110 struct device_node *np = hw->dev->of_node; 2111 struct st_sensors_platform_data *pdata; 2112 const struct st_lsm6dsx_reg *reg; 2113 unsigned long irq_type; 2114 bool irq_active_low; 2115 int err; 2116 2117 irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq)); 2118 2119 switch (irq_type) { 2120 case IRQF_TRIGGER_HIGH: 2121 case IRQF_TRIGGER_RISING: 2122 irq_active_low = false; 2123 break; 2124 case IRQF_TRIGGER_LOW: 2125 case IRQF_TRIGGER_FALLING: 2126 irq_active_low = true; 2127 break; 2128 default: 2129 dev_info(hw->dev, "mode %lx unsupported\n", irq_type); 2130 return -EINVAL; 2131 } 2132 2133 reg = &hw->settings->irq_config.hla; 2134 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2135 ST_LSM6DSX_SHIFT_VAL(irq_active_low, 2136 reg->mask)); 2137 if (err < 0) 2138 return err; 2139 2140 pdata = (struct st_sensors_platform_data *)hw->dev->platform_data; 2141 if ((np && of_property_read_bool(np, "drive-open-drain")) || 2142 (pdata && pdata->open_drain)) { 2143 reg = &hw->settings->irq_config.od; 2144 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2145 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2146 if (err < 0) 2147 return err; 2148 2149 irq_type |= IRQF_SHARED; 2150 } 2151 2152 err = devm_request_threaded_irq(hw->dev, hw->irq, 2153 NULL, 2154 st_lsm6dsx_handler_thread, 2155 irq_type | IRQF_ONESHOT, 2156 "lsm6dsx", hw); 2157 if (err) { 2158 dev_err(hw->dev, "failed to request trigger irq %d\n", 2159 hw->irq); 2160 return err; 2161 } 2162 2163 return 0; 2164 } 2165 2166 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id, 2167 struct regmap *regmap) 2168 { 2169 struct st_sensors_platform_data *pdata = dev->platform_data; 2170 const struct st_lsm6dsx_shub_settings *hub_settings; 2171 struct device_node *np = dev->of_node; 2172 struct st_lsm6dsx_hw *hw; 2173 const char *name = NULL; 2174 int i, err; 2175 2176 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL); 2177 if (!hw) 2178 return -ENOMEM; 2179 2180 dev_set_drvdata(dev, (void *)hw); 2181 2182 mutex_init(&hw->fifo_lock); 2183 mutex_init(&hw->conf_lock); 2184 mutex_init(&hw->page_lock); 2185 2186 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL); 2187 if (!hw->buff) 2188 return -ENOMEM; 2189 2190 hw->dev = dev; 2191 hw->irq = irq; 2192 hw->regmap = regmap; 2193 2194 err = st_lsm6dsx_check_whoami(hw, hw_id, &name); 2195 if (err < 0) 2196 return err; 2197 2198 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) { 2199 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name); 2200 if (!hw->iio_devs[i]) 2201 return -ENOMEM; 2202 } 2203 2204 err = st_lsm6dsx_init_device(hw); 2205 if (err < 0) 2206 return err; 2207 2208 hub_settings = &hw->settings->shub_settings; 2209 if (hub_settings->master_en.addr) { 2210 err = st_lsm6dsx_shub_probe(hw, name); 2211 if (err < 0) 2212 return err; 2213 } 2214 2215 if (hw->irq > 0) { 2216 err = st_lsm6dsx_irq_setup(hw); 2217 if (err < 0) 2218 return err; 2219 2220 err = st_lsm6dsx_fifo_setup(hw); 2221 if (err < 0) 2222 return err; 2223 } 2224 2225 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2226 if (!hw->iio_devs[i]) 2227 continue; 2228 2229 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]); 2230 if (err) 2231 return err; 2232 } 2233 2234 if ((np && of_property_read_bool(np, "wakeup-source")) || 2235 (pdata && pdata->wakeup_source)) 2236 device_init_wakeup(dev, true); 2237 2238 return 0; 2239 } 2240 EXPORT_SYMBOL(st_lsm6dsx_probe); 2241 2242 static int __maybe_unused st_lsm6dsx_suspend(struct device *dev) 2243 { 2244 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 2245 struct st_lsm6dsx_sensor *sensor; 2246 int i, err = 0; 2247 2248 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2249 if (!hw->iio_devs[i]) 2250 continue; 2251 2252 sensor = iio_priv(hw->iio_devs[i]); 2253 if (!(hw->enable_mask & BIT(sensor->id))) 2254 continue; 2255 2256 if (device_may_wakeup(dev) && 2257 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) { 2258 /* Enable wake from IRQ */ 2259 enable_irq_wake(hw->irq); 2260 continue; 2261 } 2262 2263 if (sensor->id == ST_LSM6DSX_ID_EXT0 || 2264 sensor->id == ST_LSM6DSX_ID_EXT1 || 2265 sensor->id == ST_LSM6DSX_ID_EXT2) 2266 err = st_lsm6dsx_shub_set_enable(sensor, false); 2267 else 2268 err = st_lsm6dsx_sensor_set_enable(sensor, false); 2269 if (err < 0) 2270 return err; 2271 2272 hw->suspend_mask |= BIT(sensor->id); 2273 } 2274 2275 if (hw->fifo_mode != ST_LSM6DSX_FIFO_BYPASS) 2276 err = st_lsm6dsx_flush_fifo(hw); 2277 2278 return err; 2279 } 2280 2281 static int __maybe_unused st_lsm6dsx_resume(struct device *dev) 2282 { 2283 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 2284 struct st_lsm6dsx_sensor *sensor; 2285 int i, err = 0; 2286 2287 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2288 if (!hw->iio_devs[i]) 2289 continue; 2290 2291 sensor = iio_priv(hw->iio_devs[i]); 2292 if (device_may_wakeup(dev) && 2293 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) 2294 disable_irq_wake(hw->irq); 2295 2296 if (!(hw->suspend_mask & BIT(sensor->id))) 2297 continue; 2298 2299 if (sensor->id == ST_LSM6DSX_ID_EXT0 || 2300 sensor->id == ST_LSM6DSX_ID_EXT1 || 2301 sensor->id == ST_LSM6DSX_ID_EXT2) 2302 err = st_lsm6dsx_shub_set_enable(sensor, true); 2303 else 2304 err = st_lsm6dsx_sensor_set_enable(sensor, true); 2305 if (err < 0) 2306 return err; 2307 2308 hw->suspend_mask &= ~BIT(sensor->id); 2309 } 2310 2311 if (hw->enable_mask) 2312 err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT); 2313 2314 return err; 2315 } 2316 2317 const struct dev_pm_ops st_lsm6dsx_pm_ops = { 2318 SET_SYSTEM_SLEEP_PM_OPS(st_lsm6dsx_suspend, st_lsm6dsx_resume) 2319 }; 2320 EXPORT_SYMBOL(st_lsm6dsx_pm_ops); 2321 2322 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>"); 2323 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); 2324 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver"); 2325 MODULE_LICENSE("GPL v2"); 2326