1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * STMicroelectronics st_lsm6dsx sensor driver 4 * 5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer 6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial 7 * interface standard output. 8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale 9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of 10 * +-125/+-245/+-500/+-1000/+-2000 dps 11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer 12 * allowing dynamic batching of sensor data. 13 * LSM9DSx series is similar but includes an additional magnetometer, handled 14 * by a different driver. 15 * 16 * Supported sensors: 17 * - LSM6DS3: 18 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416 19 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 20 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 21 * - FIFO size: 8KB 22 * 23 * - LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C: 24 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416 25 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 26 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 27 * - FIFO size: 4KB 28 * 29 * - LSM6DSO/LSM6DSOX/ASM330LHH/LSM6DSR/ISM330DHCX: 30 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416 31 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 32 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 33 * - FIFO size: 3KB 34 * 35 * - LSM9DS1: 36 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952 37 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 38 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952 39 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000 40 * - FIFO size: 32 41 * 42 * Copyright 2016 STMicroelectronics Inc. 43 * 44 * Lorenzo Bianconi <lorenzo.bianconi@st.com> 45 * Denis Ciocca <denis.ciocca@st.com> 46 */ 47 48 #include <linux/kernel.h> 49 #include <linux/module.h> 50 #include <linux/delay.h> 51 #include <linux/iio/events.h> 52 #include <linux/iio/iio.h> 53 #include <linux/iio/sysfs.h> 54 #include <linux/interrupt.h> 55 #include <linux/irq.h> 56 #include <linux/pm.h> 57 #include <linux/regmap.h> 58 #include <linux/bitfield.h> 59 60 #include <linux/platform_data/st_sensors_pdata.h> 61 62 #include "st_lsm6dsx.h" 63 64 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f 65 66 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = { 67 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0), 68 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1), 69 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2), 70 IIO_CHAN_SOFT_TIMESTAMP(3), 71 }; 72 73 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = { 74 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0), 75 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1), 76 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2), 77 IIO_CHAN_SOFT_TIMESTAMP(3), 78 }; 79 80 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = { 81 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0), 82 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1), 83 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2), 84 IIO_CHAN_SOFT_TIMESTAMP(3), 85 }; 86 87 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 88 { 89 .wai = 0x68, 90 .reset = { 91 .addr = 0x22, 92 .mask = BIT(0), 93 }, 94 .boot = { 95 .addr = 0x22, 96 .mask = BIT(7), 97 }, 98 .bdu = { 99 .addr = 0x22, 100 .mask = BIT(6), 101 }, 102 .max_fifo_size = 32, 103 .id = { 104 { 105 .hw_id = ST_LSM9DS1_ID, 106 .name = ST_LSM9DS1_DEV_NAME, 107 }, 108 }, 109 .channels = { 110 [ST_LSM6DSX_ID_ACC] = { 111 .chan = st_lsm6dsx_acc_channels, 112 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 113 }, 114 [ST_LSM6DSX_ID_GYRO] = { 115 .chan = st_lsm6ds0_gyro_channels, 116 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels), 117 }, 118 }, 119 .odr_table = { 120 [ST_LSM6DSX_ID_ACC] = { 121 .reg = { 122 .addr = 0x20, 123 .mask = GENMASK(7, 5), 124 }, 125 .odr_avl[0] = { 10, 0x01 }, 126 .odr_avl[1] = { 50, 0x02 }, 127 .odr_avl[2] = { 119, 0x03 }, 128 .odr_avl[3] = { 238, 0x04 }, 129 .odr_avl[4] = { 476, 0x05 }, 130 .odr_avl[5] = { 952, 0x06 }, 131 }, 132 [ST_LSM6DSX_ID_GYRO] = { 133 .reg = { 134 .addr = 0x10, 135 .mask = GENMASK(7, 5), 136 }, 137 .odr_avl[0] = { 15, 0x01 }, 138 .odr_avl[1] = { 60, 0x02 }, 139 .odr_avl[2] = { 119, 0x03 }, 140 .odr_avl[3] = { 238, 0x04 }, 141 .odr_avl[4] = { 476, 0x05 }, 142 .odr_avl[5] = { 952, 0x06 }, 143 }, 144 }, 145 .fs_table = { 146 [ST_LSM6DSX_ID_ACC] = { 147 .reg = { 148 .addr = 0x20, 149 .mask = GENMASK(4, 3), 150 }, 151 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 152 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 153 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 154 .fs_avl[3] = { IIO_G_TO_M_S_2(732), 0x1 }, 155 .fs_len = 4, 156 }, 157 [ST_LSM6DSX_ID_GYRO] = { 158 .reg = { 159 .addr = 0x10, 160 .mask = GENMASK(4, 3), 161 }, 162 .fs_avl[0] = { IIO_DEGREE_TO_RAD(245), 0x0 }, 163 .fs_avl[1] = { IIO_DEGREE_TO_RAD(500), 0x1 }, 164 .fs_avl[2] = { IIO_DEGREE_TO_RAD(2000), 0x3 }, 165 .fs_len = 3, 166 }, 167 }, 168 .irq_config = { 169 .irq1 = { 170 .addr = 0x0c, 171 .mask = BIT(3), 172 }, 173 .irq2 = { 174 .addr = 0x0d, 175 .mask = BIT(3), 176 }, 177 .hla = { 178 .addr = 0x22, 179 .mask = BIT(5), 180 }, 181 .od = { 182 .addr = 0x22, 183 .mask = BIT(4), 184 }, 185 }, 186 }, 187 { 188 .wai = 0x69, 189 .reset = { 190 .addr = 0x12, 191 .mask = BIT(0), 192 }, 193 .boot = { 194 .addr = 0x12, 195 .mask = BIT(7), 196 }, 197 .bdu = { 198 .addr = 0x12, 199 .mask = BIT(6), 200 }, 201 .max_fifo_size = 1365, 202 .id = { 203 { 204 .hw_id = ST_LSM6DS3_ID, 205 .name = ST_LSM6DS3_DEV_NAME, 206 }, 207 }, 208 .channels = { 209 [ST_LSM6DSX_ID_ACC] = { 210 .chan = st_lsm6dsx_acc_channels, 211 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 212 }, 213 [ST_LSM6DSX_ID_GYRO] = { 214 .chan = st_lsm6dsx_gyro_channels, 215 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 216 }, 217 }, 218 .odr_table = { 219 [ST_LSM6DSX_ID_ACC] = { 220 .reg = { 221 .addr = 0x10, 222 .mask = GENMASK(7, 4), 223 }, 224 .odr_avl[0] = { 13, 0x01 }, 225 .odr_avl[1] = { 26, 0x02 }, 226 .odr_avl[2] = { 52, 0x03 }, 227 .odr_avl[3] = { 104, 0x04 }, 228 .odr_avl[4] = { 208, 0x05 }, 229 .odr_avl[5] = { 416, 0x06 }, 230 }, 231 [ST_LSM6DSX_ID_GYRO] = { 232 .reg = { 233 .addr = 0x11, 234 .mask = GENMASK(7, 4), 235 }, 236 .odr_avl[0] = { 13, 0x01 }, 237 .odr_avl[1] = { 26, 0x02 }, 238 .odr_avl[2] = { 52, 0x03 }, 239 .odr_avl[3] = { 104, 0x04 }, 240 .odr_avl[4] = { 208, 0x05 }, 241 .odr_avl[5] = { 416, 0x06 }, 242 }, 243 }, 244 .fs_table = { 245 [ST_LSM6DSX_ID_ACC] = { 246 .reg = { 247 .addr = 0x10, 248 .mask = GENMASK(3, 2), 249 }, 250 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 251 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 252 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 253 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 254 .fs_len = 4, 255 }, 256 [ST_LSM6DSX_ID_GYRO] = { 257 .reg = { 258 .addr = 0x11, 259 .mask = GENMASK(3, 2), 260 }, 261 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 262 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 263 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 264 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 265 .fs_len = 4, 266 }, 267 }, 268 .irq_config = { 269 .irq1 = { 270 .addr = 0x0d, 271 .mask = BIT(3), 272 }, 273 .irq2 = { 274 .addr = 0x0e, 275 .mask = BIT(3), 276 }, 277 .lir = { 278 .addr = 0x58, 279 .mask = BIT(0), 280 }, 281 .irq1_func = { 282 .addr = 0x5e, 283 .mask = BIT(5), 284 }, 285 .irq2_func = { 286 .addr = 0x5f, 287 .mask = BIT(5), 288 }, 289 .hla = { 290 .addr = 0x12, 291 .mask = BIT(5), 292 }, 293 .od = { 294 .addr = 0x12, 295 .mask = BIT(4), 296 }, 297 }, 298 .decimator = { 299 [ST_LSM6DSX_ID_ACC] = { 300 .addr = 0x08, 301 .mask = GENMASK(2, 0), 302 }, 303 [ST_LSM6DSX_ID_GYRO] = { 304 .addr = 0x08, 305 .mask = GENMASK(5, 3), 306 }, 307 }, 308 .fifo_ops = { 309 .update_fifo = st_lsm6dsx_update_fifo, 310 .read_fifo = st_lsm6dsx_read_fifo, 311 .fifo_th = { 312 .addr = 0x06, 313 .mask = GENMASK(11, 0), 314 }, 315 .fifo_diff = { 316 .addr = 0x3a, 317 .mask = GENMASK(11, 0), 318 }, 319 .th_wl = 3, /* 1LSB = 2B */ 320 }, 321 .ts_settings = { 322 .timer_en = { 323 .addr = 0x58, 324 .mask = BIT(7), 325 }, 326 .hr_timer = { 327 .addr = 0x5c, 328 .mask = BIT(4), 329 }, 330 .fifo_en = { 331 .addr = 0x07, 332 .mask = BIT(7), 333 }, 334 .decimator = { 335 .addr = 0x09, 336 .mask = GENMASK(5, 3), 337 }, 338 }, 339 .event_settings = { 340 .wakeup_reg = { 341 .addr = 0x5B, 342 .mask = GENMASK(5, 0), 343 }, 344 .wakeup_src_reg = 0x1b, 345 .wakeup_src_status_mask = BIT(3), 346 .wakeup_src_z_mask = BIT(0), 347 .wakeup_src_y_mask = BIT(1), 348 .wakeup_src_x_mask = BIT(2), 349 }, 350 }, 351 { 352 .wai = 0x69, 353 .reset = { 354 .addr = 0x12, 355 .mask = BIT(0), 356 }, 357 .boot = { 358 .addr = 0x12, 359 .mask = BIT(7), 360 }, 361 .bdu = { 362 .addr = 0x12, 363 .mask = BIT(6), 364 }, 365 .max_fifo_size = 682, 366 .id = { 367 { 368 .hw_id = ST_LSM6DS3H_ID, 369 .name = ST_LSM6DS3H_DEV_NAME, 370 }, 371 }, 372 .channels = { 373 [ST_LSM6DSX_ID_ACC] = { 374 .chan = st_lsm6dsx_acc_channels, 375 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 376 }, 377 [ST_LSM6DSX_ID_GYRO] = { 378 .chan = st_lsm6dsx_gyro_channels, 379 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 380 }, 381 }, 382 .odr_table = { 383 [ST_LSM6DSX_ID_ACC] = { 384 .reg = { 385 .addr = 0x10, 386 .mask = GENMASK(7, 4), 387 }, 388 .odr_avl[0] = { 13, 0x01 }, 389 .odr_avl[1] = { 26, 0x02 }, 390 .odr_avl[2] = { 52, 0x03 }, 391 .odr_avl[3] = { 104, 0x04 }, 392 .odr_avl[4] = { 208, 0x05 }, 393 .odr_avl[5] = { 416, 0x06 }, 394 }, 395 [ST_LSM6DSX_ID_GYRO] = { 396 .reg = { 397 .addr = 0x11, 398 .mask = GENMASK(7, 4), 399 }, 400 .odr_avl[0] = { 13, 0x01 }, 401 .odr_avl[1] = { 26, 0x02 }, 402 .odr_avl[2] = { 52, 0x03 }, 403 .odr_avl[3] = { 104, 0x04 }, 404 .odr_avl[4] = { 208, 0x05 }, 405 .odr_avl[5] = { 416, 0x06 }, 406 }, 407 }, 408 .fs_table = { 409 [ST_LSM6DSX_ID_ACC] = { 410 .reg = { 411 .addr = 0x10, 412 .mask = GENMASK(3, 2), 413 }, 414 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 415 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 416 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 417 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 418 .fs_len = 4, 419 }, 420 [ST_LSM6DSX_ID_GYRO] = { 421 .reg = { 422 .addr = 0x11, 423 .mask = GENMASK(3, 2), 424 }, 425 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 426 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 427 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 428 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 429 .fs_len = 4, 430 }, 431 }, 432 .irq_config = { 433 .irq1 = { 434 .addr = 0x0d, 435 .mask = BIT(3), 436 }, 437 .irq2 = { 438 .addr = 0x0e, 439 .mask = BIT(3), 440 }, 441 .lir = { 442 .addr = 0x58, 443 .mask = BIT(0), 444 }, 445 .irq1_func = { 446 .addr = 0x5e, 447 .mask = BIT(5), 448 }, 449 .irq2_func = { 450 .addr = 0x5f, 451 .mask = BIT(5), 452 }, 453 .hla = { 454 .addr = 0x12, 455 .mask = BIT(5), 456 }, 457 .od = { 458 .addr = 0x12, 459 .mask = BIT(4), 460 }, 461 }, 462 .decimator = { 463 [ST_LSM6DSX_ID_ACC] = { 464 .addr = 0x08, 465 .mask = GENMASK(2, 0), 466 }, 467 [ST_LSM6DSX_ID_GYRO] = { 468 .addr = 0x08, 469 .mask = GENMASK(5, 3), 470 }, 471 }, 472 .fifo_ops = { 473 .update_fifo = st_lsm6dsx_update_fifo, 474 .read_fifo = st_lsm6dsx_read_fifo, 475 .fifo_th = { 476 .addr = 0x06, 477 .mask = GENMASK(11, 0), 478 }, 479 .fifo_diff = { 480 .addr = 0x3a, 481 .mask = GENMASK(11, 0), 482 }, 483 .th_wl = 3, /* 1LSB = 2B */ 484 }, 485 .ts_settings = { 486 .timer_en = { 487 .addr = 0x58, 488 .mask = BIT(7), 489 }, 490 .hr_timer = { 491 .addr = 0x5c, 492 .mask = BIT(4), 493 }, 494 .fifo_en = { 495 .addr = 0x07, 496 .mask = BIT(7), 497 }, 498 .decimator = { 499 .addr = 0x09, 500 .mask = GENMASK(5, 3), 501 }, 502 }, 503 .event_settings = { 504 .wakeup_reg = { 505 .addr = 0x5B, 506 .mask = GENMASK(5, 0), 507 }, 508 .wakeup_src_reg = 0x1b, 509 .wakeup_src_status_mask = BIT(3), 510 .wakeup_src_z_mask = BIT(0), 511 .wakeup_src_y_mask = BIT(1), 512 .wakeup_src_x_mask = BIT(2), 513 }, 514 }, 515 { 516 .wai = 0x6a, 517 .reset = { 518 .addr = 0x12, 519 .mask = BIT(0), 520 }, 521 .boot = { 522 .addr = 0x12, 523 .mask = BIT(7), 524 }, 525 .bdu = { 526 .addr = 0x12, 527 .mask = BIT(6), 528 }, 529 .max_fifo_size = 682, 530 .id = { 531 { 532 .hw_id = ST_LSM6DSL_ID, 533 .name = ST_LSM6DSL_DEV_NAME, 534 }, { 535 .hw_id = ST_LSM6DSM_ID, 536 .name = ST_LSM6DSM_DEV_NAME, 537 }, { 538 .hw_id = ST_ISM330DLC_ID, 539 .name = ST_ISM330DLC_DEV_NAME, 540 }, { 541 .hw_id = ST_LSM6DS3TRC_ID, 542 .name = ST_LSM6DS3TRC_DEV_NAME, 543 }, 544 }, 545 .channels = { 546 [ST_LSM6DSX_ID_ACC] = { 547 .chan = st_lsm6dsx_acc_channels, 548 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 549 }, 550 [ST_LSM6DSX_ID_GYRO] = { 551 .chan = st_lsm6dsx_gyro_channels, 552 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 553 }, 554 }, 555 .odr_table = { 556 [ST_LSM6DSX_ID_ACC] = { 557 .reg = { 558 .addr = 0x10, 559 .mask = GENMASK(7, 4), 560 }, 561 .odr_avl[0] = { 13, 0x01 }, 562 .odr_avl[1] = { 26, 0x02 }, 563 .odr_avl[2] = { 52, 0x03 }, 564 .odr_avl[3] = { 104, 0x04 }, 565 .odr_avl[4] = { 208, 0x05 }, 566 .odr_avl[5] = { 416, 0x06 }, 567 }, 568 [ST_LSM6DSX_ID_GYRO] = { 569 .reg = { 570 .addr = 0x11, 571 .mask = GENMASK(7, 4), 572 }, 573 .odr_avl[0] = { 13, 0x01 }, 574 .odr_avl[1] = { 26, 0x02 }, 575 .odr_avl[2] = { 52, 0x03 }, 576 .odr_avl[3] = { 104, 0x04 }, 577 .odr_avl[4] = { 208, 0x05 }, 578 .odr_avl[5] = { 416, 0x06 }, 579 }, 580 }, 581 .fs_table = { 582 [ST_LSM6DSX_ID_ACC] = { 583 .reg = { 584 .addr = 0x10, 585 .mask = GENMASK(3, 2), 586 }, 587 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 588 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 589 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 590 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 591 .fs_len = 4, 592 }, 593 [ST_LSM6DSX_ID_GYRO] = { 594 .reg = { 595 .addr = 0x11, 596 .mask = GENMASK(3, 2), 597 }, 598 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 599 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 600 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 601 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 602 .fs_len = 4, 603 }, 604 }, 605 .irq_config = { 606 .irq1 = { 607 .addr = 0x0d, 608 .mask = BIT(3), 609 }, 610 .irq2 = { 611 .addr = 0x0e, 612 .mask = BIT(3), 613 }, 614 .lir = { 615 .addr = 0x58, 616 .mask = BIT(0), 617 }, 618 .irq1_func = { 619 .addr = 0x5e, 620 .mask = BIT(5), 621 }, 622 .irq2_func = { 623 .addr = 0x5f, 624 .mask = BIT(5), 625 }, 626 .hla = { 627 .addr = 0x12, 628 .mask = BIT(5), 629 }, 630 .od = { 631 .addr = 0x12, 632 .mask = BIT(4), 633 }, 634 }, 635 .decimator = { 636 [ST_LSM6DSX_ID_ACC] = { 637 .addr = 0x08, 638 .mask = GENMASK(2, 0), 639 }, 640 [ST_LSM6DSX_ID_GYRO] = { 641 .addr = 0x08, 642 .mask = GENMASK(5, 3), 643 }, 644 }, 645 .fifo_ops = { 646 .update_fifo = st_lsm6dsx_update_fifo, 647 .read_fifo = st_lsm6dsx_read_fifo, 648 .fifo_th = { 649 .addr = 0x06, 650 .mask = GENMASK(10, 0), 651 }, 652 .fifo_diff = { 653 .addr = 0x3a, 654 .mask = GENMASK(10, 0), 655 }, 656 .th_wl = 3, /* 1LSB = 2B */ 657 }, 658 .ts_settings = { 659 .timer_en = { 660 .addr = 0x19, 661 .mask = BIT(5), 662 }, 663 .hr_timer = { 664 .addr = 0x5c, 665 .mask = BIT(4), 666 }, 667 .fifo_en = { 668 .addr = 0x07, 669 .mask = BIT(7), 670 }, 671 .decimator = { 672 .addr = 0x09, 673 .mask = GENMASK(5, 3), 674 }, 675 }, 676 .event_settings = { 677 .enable_reg = { 678 .addr = 0x58, 679 .mask = BIT(7), 680 }, 681 .wakeup_reg = { 682 .addr = 0x5B, 683 .mask = GENMASK(5, 0), 684 }, 685 .wakeup_src_reg = 0x1b, 686 .wakeup_src_status_mask = BIT(3), 687 .wakeup_src_z_mask = BIT(0), 688 .wakeup_src_y_mask = BIT(1), 689 .wakeup_src_x_mask = BIT(2), 690 }, 691 }, 692 { 693 .wai = 0x6c, 694 .reset = { 695 .addr = 0x12, 696 .mask = BIT(0), 697 }, 698 .boot = { 699 .addr = 0x12, 700 .mask = BIT(7), 701 }, 702 .bdu = { 703 .addr = 0x12, 704 .mask = BIT(6), 705 }, 706 .max_fifo_size = 512, 707 .id = { 708 { 709 .hw_id = ST_LSM6DSO_ID, 710 .name = ST_LSM6DSO_DEV_NAME, 711 }, { 712 .hw_id = ST_LSM6DSOX_ID, 713 .name = ST_LSM6DSOX_DEV_NAME, 714 }, 715 }, 716 .channels = { 717 [ST_LSM6DSX_ID_ACC] = { 718 .chan = st_lsm6dsx_acc_channels, 719 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 720 }, 721 [ST_LSM6DSX_ID_GYRO] = { 722 .chan = st_lsm6dsx_gyro_channels, 723 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 724 }, 725 }, 726 .odr_table = { 727 [ST_LSM6DSX_ID_ACC] = { 728 .reg = { 729 .addr = 0x10, 730 .mask = GENMASK(7, 4), 731 }, 732 .odr_avl[0] = { 13, 0x01 }, 733 .odr_avl[1] = { 26, 0x02 }, 734 .odr_avl[2] = { 52, 0x03 }, 735 .odr_avl[3] = { 104, 0x04 }, 736 .odr_avl[4] = { 208, 0x05 }, 737 .odr_avl[5] = { 416, 0x06 }, 738 }, 739 [ST_LSM6DSX_ID_GYRO] = { 740 .reg = { 741 .addr = 0x11, 742 .mask = GENMASK(7, 4), 743 }, 744 .odr_avl[0] = { 13, 0x01 }, 745 .odr_avl[1] = { 26, 0x02 }, 746 .odr_avl[2] = { 52, 0x03 }, 747 .odr_avl[3] = { 104, 0x04 }, 748 .odr_avl[4] = { 208, 0x05 }, 749 .odr_avl[5] = { 416, 0x06 }, 750 }, 751 }, 752 .fs_table = { 753 [ST_LSM6DSX_ID_ACC] = { 754 .reg = { 755 .addr = 0x10, 756 .mask = GENMASK(3, 2), 757 }, 758 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 759 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 760 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 761 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 762 .fs_len = 4, 763 }, 764 [ST_LSM6DSX_ID_GYRO] = { 765 .reg = { 766 .addr = 0x11, 767 .mask = GENMASK(3, 2), 768 }, 769 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 770 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 771 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 772 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 773 .fs_len = 4, 774 }, 775 }, 776 .irq_config = { 777 .irq1 = { 778 .addr = 0x0d, 779 .mask = BIT(3), 780 }, 781 .irq2 = { 782 .addr = 0x0e, 783 .mask = BIT(3), 784 }, 785 .lir = { 786 .addr = 0x56, 787 .mask = BIT(0), 788 }, 789 .clear_on_read = { 790 .addr = 0x56, 791 .mask = BIT(6), 792 }, 793 .hla = { 794 .addr = 0x12, 795 .mask = BIT(5), 796 }, 797 .od = { 798 .addr = 0x12, 799 .mask = BIT(4), 800 }, 801 }, 802 .batch = { 803 [ST_LSM6DSX_ID_ACC] = { 804 .addr = 0x09, 805 .mask = GENMASK(3, 0), 806 }, 807 [ST_LSM6DSX_ID_GYRO] = { 808 .addr = 0x09, 809 .mask = GENMASK(7, 4), 810 }, 811 }, 812 .fifo_ops = { 813 .update_fifo = st_lsm6dsx_update_fifo, 814 .read_fifo = st_lsm6dsx_read_tagged_fifo, 815 .fifo_th = { 816 .addr = 0x07, 817 .mask = GENMASK(8, 0), 818 }, 819 .fifo_diff = { 820 .addr = 0x3a, 821 .mask = GENMASK(9, 0), 822 }, 823 .th_wl = 1, 824 }, 825 .ts_settings = { 826 .timer_en = { 827 .addr = 0x19, 828 .mask = BIT(5), 829 }, 830 .decimator = { 831 .addr = 0x0a, 832 .mask = GENMASK(7, 6), 833 }, 834 }, 835 .shub_settings = { 836 .page_mux = { 837 .addr = 0x01, 838 .mask = BIT(6), 839 }, 840 .master_en = { 841 .addr = 0x14, 842 .mask = BIT(2), 843 }, 844 .pullup_en = { 845 .addr = 0x14, 846 .mask = BIT(3), 847 }, 848 .aux_sens = { 849 .addr = 0x14, 850 .mask = GENMASK(1, 0), 851 }, 852 .wr_once = { 853 .addr = 0x14, 854 .mask = BIT(6), 855 }, 856 .shub_out = 0x02, 857 .slv0_addr = 0x15, 858 .dw_slv0_addr = 0x21, 859 .batch_en = BIT(3), 860 } 861 }, 862 { 863 .wai = 0x6b, 864 .reset = { 865 .addr = 0x12, 866 .mask = BIT(0), 867 }, 868 .boot = { 869 .addr = 0x12, 870 .mask = BIT(7), 871 }, 872 .bdu = { 873 .addr = 0x12, 874 .mask = BIT(6), 875 }, 876 .max_fifo_size = 512, 877 .id = { 878 { 879 .hw_id = ST_ASM330LHH_ID, 880 .name = ST_ASM330LHH_DEV_NAME, 881 }, 882 }, 883 .channels = { 884 [ST_LSM6DSX_ID_ACC] = { 885 .chan = st_lsm6dsx_acc_channels, 886 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 887 }, 888 [ST_LSM6DSX_ID_GYRO] = { 889 .chan = st_lsm6dsx_gyro_channels, 890 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 891 }, 892 }, 893 .odr_table = { 894 [ST_LSM6DSX_ID_ACC] = { 895 .reg = { 896 .addr = 0x10, 897 .mask = GENMASK(7, 4), 898 }, 899 .odr_avl[0] = { 13, 0x01 }, 900 .odr_avl[1] = { 26, 0x02 }, 901 .odr_avl[2] = { 52, 0x03 }, 902 .odr_avl[3] = { 104, 0x04 }, 903 .odr_avl[4] = { 208, 0x05 }, 904 .odr_avl[5] = { 416, 0x06 }, 905 }, 906 [ST_LSM6DSX_ID_GYRO] = { 907 .reg = { 908 .addr = 0x11, 909 .mask = GENMASK(7, 4), 910 }, 911 .odr_avl[0] = { 13, 0x01 }, 912 .odr_avl[1] = { 26, 0x02 }, 913 .odr_avl[2] = { 52, 0x03 }, 914 .odr_avl[3] = { 104, 0x04 }, 915 .odr_avl[4] = { 208, 0x05 }, 916 .odr_avl[5] = { 416, 0x06 }, 917 }, 918 }, 919 .fs_table = { 920 [ST_LSM6DSX_ID_ACC] = { 921 .reg = { 922 .addr = 0x10, 923 .mask = GENMASK(3, 2), 924 }, 925 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 926 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 927 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 928 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 929 .fs_len = 4, 930 }, 931 [ST_LSM6DSX_ID_GYRO] = { 932 .reg = { 933 .addr = 0x11, 934 .mask = GENMASK(3, 2), 935 }, 936 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 937 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 938 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 939 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 940 .fs_len = 4, 941 }, 942 }, 943 .irq_config = { 944 .irq1 = { 945 .addr = 0x0d, 946 .mask = BIT(3), 947 }, 948 .irq2 = { 949 .addr = 0x0e, 950 .mask = BIT(3), 951 }, 952 .lir = { 953 .addr = 0x56, 954 .mask = BIT(0), 955 }, 956 .clear_on_read = { 957 .addr = 0x56, 958 .mask = BIT(6), 959 }, 960 .irq1_func = { 961 .addr = 0x5e, 962 .mask = BIT(5), 963 }, 964 .irq2_func = { 965 .addr = 0x5f, 966 .mask = BIT(5), 967 }, 968 .hla = { 969 .addr = 0x12, 970 .mask = BIT(5), 971 }, 972 .od = { 973 .addr = 0x12, 974 .mask = BIT(4), 975 }, 976 }, 977 .batch = { 978 [ST_LSM6DSX_ID_ACC] = { 979 .addr = 0x09, 980 .mask = GENMASK(3, 0), 981 }, 982 [ST_LSM6DSX_ID_GYRO] = { 983 .addr = 0x09, 984 .mask = GENMASK(7, 4), 985 }, 986 }, 987 .fifo_ops = { 988 .update_fifo = st_lsm6dsx_update_fifo, 989 .read_fifo = st_lsm6dsx_read_tagged_fifo, 990 .fifo_th = { 991 .addr = 0x07, 992 .mask = GENMASK(8, 0), 993 }, 994 .fifo_diff = { 995 .addr = 0x3a, 996 .mask = GENMASK(9, 0), 997 }, 998 .th_wl = 1, 999 }, 1000 .ts_settings = { 1001 .timer_en = { 1002 .addr = 0x19, 1003 .mask = BIT(5), 1004 }, 1005 .decimator = { 1006 .addr = 0x0a, 1007 .mask = GENMASK(7, 6), 1008 }, 1009 }, 1010 .event_settings = { 1011 .enable_reg = { 1012 .addr = 0x58, 1013 .mask = BIT(7), 1014 }, 1015 .wakeup_reg = { 1016 .addr = 0x5B, 1017 .mask = GENMASK(5, 0), 1018 }, 1019 .wakeup_src_reg = 0x1b, 1020 .wakeup_src_status_mask = BIT(3), 1021 .wakeup_src_z_mask = BIT(0), 1022 .wakeup_src_y_mask = BIT(1), 1023 .wakeup_src_x_mask = BIT(2), 1024 }, 1025 }, 1026 { 1027 .wai = 0x6b, 1028 .reset = { 1029 .addr = 0x12, 1030 .mask = BIT(0), 1031 }, 1032 .boot = { 1033 .addr = 0x12, 1034 .mask = BIT(7), 1035 }, 1036 .bdu = { 1037 .addr = 0x12, 1038 .mask = BIT(6), 1039 }, 1040 .max_fifo_size = 512, 1041 .id = { 1042 { 1043 .hw_id = ST_LSM6DSR_ID, 1044 .name = ST_LSM6DSR_DEV_NAME, 1045 }, { 1046 .hw_id = ST_ISM330DHCX_ID, 1047 .name = ST_ISM330DHCX_DEV_NAME, 1048 }, 1049 }, 1050 .channels = { 1051 [ST_LSM6DSX_ID_ACC] = { 1052 .chan = st_lsm6dsx_acc_channels, 1053 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 1054 }, 1055 [ST_LSM6DSX_ID_GYRO] = { 1056 .chan = st_lsm6dsx_gyro_channels, 1057 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 1058 }, 1059 }, 1060 .odr_table = { 1061 [ST_LSM6DSX_ID_ACC] = { 1062 .reg = { 1063 .addr = 0x10, 1064 .mask = GENMASK(7, 4), 1065 }, 1066 .odr_avl[0] = { 13, 0x01 }, 1067 .odr_avl[1] = { 26, 0x02 }, 1068 .odr_avl[2] = { 52, 0x03 }, 1069 .odr_avl[3] = { 104, 0x04 }, 1070 .odr_avl[4] = { 208, 0x05 }, 1071 .odr_avl[5] = { 416, 0x06 }, 1072 }, 1073 [ST_LSM6DSX_ID_GYRO] = { 1074 .reg = { 1075 .addr = 0x11, 1076 .mask = GENMASK(7, 4), 1077 }, 1078 .odr_avl[0] = { 13, 0x01 }, 1079 .odr_avl[1] = { 26, 0x02 }, 1080 .odr_avl[2] = { 52, 0x03 }, 1081 .odr_avl[3] = { 104, 0x04 }, 1082 .odr_avl[4] = { 208, 0x05 }, 1083 .odr_avl[5] = { 416, 0x06 }, 1084 }, 1085 }, 1086 .fs_table = { 1087 [ST_LSM6DSX_ID_ACC] = { 1088 .reg = { 1089 .addr = 0x10, 1090 .mask = GENMASK(3, 2), 1091 }, 1092 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 1093 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 1094 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 1095 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 1096 .fs_len = 4, 1097 }, 1098 [ST_LSM6DSX_ID_GYRO] = { 1099 .reg = { 1100 .addr = 0x11, 1101 .mask = GENMASK(3, 2), 1102 }, 1103 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 1104 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 1105 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 1106 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 1107 .fs_len = 4, 1108 }, 1109 }, 1110 .irq_config = { 1111 .irq1 = { 1112 .addr = 0x0d, 1113 .mask = BIT(3), 1114 }, 1115 .irq2 = { 1116 .addr = 0x0e, 1117 .mask = BIT(3), 1118 }, 1119 .lir = { 1120 .addr = 0x56, 1121 .mask = BIT(0), 1122 }, 1123 .clear_on_read = { 1124 .addr = 0x56, 1125 .mask = BIT(6), 1126 }, 1127 .irq1_func = { 1128 .addr = 0x5e, 1129 .mask = BIT(5), 1130 }, 1131 .irq2_func = { 1132 .addr = 0x5f, 1133 .mask = BIT(5), 1134 }, 1135 .hla = { 1136 .addr = 0x12, 1137 .mask = BIT(5), 1138 }, 1139 .od = { 1140 .addr = 0x12, 1141 .mask = BIT(4), 1142 }, 1143 }, 1144 .batch = { 1145 [ST_LSM6DSX_ID_ACC] = { 1146 .addr = 0x09, 1147 .mask = GENMASK(3, 0), 1148 }, 1149 [ST_LSM6DSX_ID_GYRO] = { 1150 .addr = 0x09, 1151 .mask = GENMASK(7, 4), 1152 }, 1153 }, 1154 .fifo_ops = { 1155 .update_fifo = st_lsm6dsx_update_fifo, 1156 .read_fifo = st_lsm6dsx_read_tagged_fifo, 1157 .fifo_th = { 1158 .addr = 0x07, 1159 .mask = GENMASK(8, 0), 1160 }, 1161 .fifo_diff = { 1162 .addr = 0x3a, 1163 .mask = GENMASK(9, 0), 1164 }, 1165 .th_wl = 1, 1166 }, 1167 .ts_settings = { 1168 .timer_en = { 1169 .addr = 0x19, 1170 .mask = BIT(5), 1171 }, 1172 .decimator = { 1173 .addr = 0x0a, 1174 .mask = GENMASK(7, 6), 1175 }, 1176 }, 1177 .shub_settings = { 1178 .page_mux = { 1179 .addr = 0x01, 1180 .mask = BIT(6), 1181 }, 1182 .master_en = { 1183 .addr = 0x14, 1184 .mask = BIT(2), 1185 }, 1186 .pullup_en = { 1187 .addr = 0x14, 1188 .mask = BIT(3), 1189 }, 1190 .aux_sens = { 1191 .addr = 0x14, 1192 .mask = GENMASK(1, 0), 1193 }, 1194 .wr_once = { 1195 .addr = 0x14, 1196 .mask = BIT(6), 1197 }, 1198 .shub_out = 0x02, 1199 .slv0_addr = 0x15, 1200 .dw_slv0_addr = 0x21, 1201 .batch_en = BIT(3), 1202 }, 1203 .event_settings = { 1204 .enable_reg = { 1205 .addr = 0x58, 1206 .mask = BIT(7), 1207 }, 1208 .wakeup_reg = { 1209 .addr = 0x5B, 1210 .mask = GENMASK(5, 0), 1211 }, 1212 .wakeup_src_reg = 0x1b, 1213 .wakeup_src_status_mask = BIT(3), 1214 .wakeup_src_z_mask = BIT(0), 1215 .wakeup_src_y_mask = BIT(1), 1216 .wakeup_src_x_mask = BIT(2), 1217 } 1218 }, 1219 }; 1220 1221 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable) 1222 { 1223 const struct st_lsm6dsx_shub_settings *hub_settings; 1224 unsigned int data; 1225 int err; 1226 1227 hub_settings = &hw->settings->shub_settings; 1228 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask); 1229 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr, 1230 hub_settings->page_mux.mask, data); 1231 usleep_range(100, 150); 1232 1233 return err; 1234 } 1235 1236 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id, 1237 const char **name) 1238 { 1239 int err, i, j, data; 1240 1241 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) { 1242 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) { 1243 if (id == st_lsm6dsx_sensor_settings[i].id[j].hw_id) 1244 break; 1245 } 1246 if (j < ST_LSM6DSX_MAX_ID) 1247 break; 1248 } 1249 1250 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) { 1251 dev_err(hw->dev, "unsupported hw id [%02x]\n", id); 1252 return -ENODEV; 1253 } 1254 1255 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data); 1256 if (err < 0) { 1257 dev_err(hw->dev, "failed to read whoami register\n"); 1258 return err; 1259 } 1260 1261 if (data != st_lsm6dsx_sensor_settings[i].wai) { 1262 dev_err(hw->dev, "unsupported whoami [%02x]\n", data); 1263 return -ENODEV; 1264 } 1265 1266 *name = st_lsm6dsx_sensor_settings[i].id[j].name; 1267 hw->settings = &st_lsm6dsx_sensor_settings[i]; 1268 1269 return 0; 1270 } 1271 1272 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor, 1273 u32 gain) 1274 { 1275 const struct st_lsm6dsx_fs_table_entry *fs_table; 1276 unsigned int data; 1277 int i, err; 1278 1279 fs_table = &sensor->hw->settings->fs_table[sensor->id]; 1280 for (i = 0; i < fs_table->fs_len; i++) { 1281 if (fs_table->fs_avl[i].gain == gain) 1282 break; 1283 } 1284 1285 if (i == fs_table->fs_len) 1286 return -EINVAL; 1287 1288 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val, 1289 fs_table->reg.mask); 1290 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr, 1291 fs_table->reg.mask, data); 1292 if (err < 0) 1293 return err; 1294 1295 sensor->gain = gain; 1296 1297 return 0; 1298 } 1299 1300 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u16 odr, u8 *val) 1301 { 1302 const struct st_lsm6dsx_odr_table_entry *odr_table; 1303 int i; 1304 1305 odr_table = &sensor->hw->settings->odr_table[sensor->id]; 1306 for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) 1307 /* 1308 * ext devices can run at different odr respect to 1309 * accel sensor 1310 */ 1311 if (odr_table->odr_avl[i].hz >= odr) 1312 break; 1313 1314 if (i == ST_LSM6DSX_ODR_LIST_SIZE) 1315 return -EINVAL; 1316 1317 *val = odr_table->odr_avl[i].val; 1318 1319 return 0; 1320 } 1321 1322 static u16 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u16 odr, 1323 enum st_lsm6dsx_sensor_id id) 1324 { 1325 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]); 1326 1327 if (odr > 0) { 1328 if (hw->enable_mask & BIT(id)) 1329 return max_t(u16, ref->odr, odr); 1330 else 1331 return odr; 1332 } else { 1333 return (hw->enable_mask & BIT(id)) ? ref->odr : 0; 1334 } 1335 } 1336 1337 static int st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u16 req_odr) 1338 { 1339 struct st_lsm6dsx_sensor *ref_sensor = sensor; 1340 struct st_lsm6dsx_hw *hw = sensor->hw; 1341 const struct st_lsm6dsx_reg *reg; 1342 unsigned int data; 1343 u8 val = 0; 1344 int err; 1345 1346 switch (sensor->id) { 1347 case ST_LSM6DSX_ID_EXT0: 1348 case ST_LSM6DSX_ID_EXT1: 1349 case ST_LSM6DSX_ID_EXT2: 1350 case ST_LSM6DSX_ID_ACC: { 1351 u16 odr; 1352 int i; 1353 1354 /* 1355 * i2c embedded controller relies on the accelerometer sensor as 1356 * bus read/write trigger so we need to enable accel device 1357 * at odr = max(accel_odr, ext_odr) in order to properly 1358 * communicate with i2c slave devices 1359 */ 1360 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]); 1361 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) { 1362 if (!hw->iio_devs[i] || i == sensor->id) 1363 continue; 1364 1365 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i); 1366 if (odr != req_odr) 1367 /* device already configured */ 1368 return 0; 1369 } 1370 break; 1371 } 1372 default: 1373 break; 1374 } 1375 1376 if (req_odr > 0) { 1377 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val); 1378 if (err < 0) 1379 return err; 1380 } 1381 1382 reg = &hw->settings->odr_table[ref_sensor->id].reg; 1383 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask); 1384 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); 1385 } 1386 1387 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 1388 bool enable) 1389 { 1390 struct st_lsm6dsx_hw *hw = sensor->hw; 1391 u16 odr = enable ? sensor->odr : 0; 1392 int err; 1393 1394 err = st_lsm6dsx_set_odr(sensor, odr); 1395 if (err < 0) 1396 return err; 1397 1398 if (enable) 1399 hw->enable_mask |= BIT(sensor->id); 1400 else 1401 hw->enable_mask &= ~BIT(sensor->id); 1402 1403 return 0; 1404 } 1405 1406 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor, 1407 u8 addr, int *val) 1408 { 1409 struct st_lsm6dsx_hw *hw = sensor->hw; 1410 int err, delay; 1411 __le16 data; 1412 1413 err = st_lsm6dsx_sensor_set_enable(sensor, true); 1414 if (err < 0) 1415 return err; 1416 1417 delay = 1000000 / sensor->odr; 1418 usleep_range(delay, 2 * delay); 1419 1420 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data)); 1421 if (err < 0) 1422 return err; 1423 1424 if (!hw->enable_event) 1425 st_lsm6dsx_sensor_set_enable(sensor, false); 1426 1427 *val = (s16)le16_to_cpu(data); 1428 1429 return IIO_VAL_INT; 1430 } 1431 1432 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev, 1433 struct iio_chan_spec const *ch, 1434 int *val, int *val2, long mask) 1435 { 1436 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1437 int ret; 1438 1439 switch (mask) { 1440 case IIO_CHAN_INFO_RAW: 1441 ret = iio_device_claim_direct_mode(iio_dev); 1442 if (ret) 1443 break; 1444 1445 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val); 1446 iio_device_release_direct_mode(iio_dev); 1447 break; 1448 case IIO_CHAN_INFO_SAMP_FREQ: 1449 *val = sensor->odr; 1450 ret = IIO_VAL_INT; 1451 break; 1452 case IIO_CHAN_INFO_SCALE: 1453 *val = 0; 1454 *val2 = sensor->gain; 1455 ret = IIO_VAL_INT_PLUS_MICRO; 1456 break; 1457 default: 1458 ret = -EINVAL; 1459 break; 1460 } 1461 1462 return ret; 1463 } 1464 1465 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev, 1466 struct iio_chan_spec const *chan, 1467 int val, int val2, long mask) 1468 { 1469 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1470 int err; 1471 1472 err = iio_device_claim_direct_mode(iio_dev); 1473 if (err) 1474 return err; 1475 1476 switch (mask) { 1477 case IIO_CHAN_INFO_SCALE: 1478 err = st_lsm6dsx_set_full_scale(sensor, val2); 1479 break; 1480 case IIO_CHAN_INFO_SAMP_FREQ: { 1481 u8 data; 1482 1483 err = st_lsm6dsx_check_odr(sensor, val, &data); 1484 if (!err) 1485 sensor->odr = val; 1486 break; 1487 } 1488 default: 1489 err = -EINVAL; 1490 break; 1491 } 1492 1493 iio_device_release_direct_mode(iio_dev); 1494 1495 return err; 1496 } 1497 1498 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, int state) 1499 { 1500 const struct st_lsm6dsx_reg *reg; 1501 unsigned int data; 1502 int err; 1503 1504 if (!hw->settings->irq_config.irq1_func.addr) 1505 return -ENOTSUPP; 1506 1507 reg = &hw->settings->event_settings.enable_reg; 1508 if (reg->addr) { 1509 data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask); 1510 err = st_lsm6dsx_update_bits_locked(hw, reg->addr, 1511 reg->mask, data); 1512 if (err < 0) 1513 return err; 1514 } 1515 1516 /* Enable wakeup interrupt */ 1517 data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask); 1518 return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr, 1519 hw->irq_routing->mask, data); 1520 } 1521 1522 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev, 1523 const struct iio_chan_spec *chan, 1524 enum iio_event_type type, 1525 enum iio_event_direction dir, 1526 enum iio_event_info info, 1527 int *val, int *val2) 1528 { 1529 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1530 struct st_lsm6dsx_hw *hw = sensor->hw; 1531 1532 if (type != IIO_EV_TYPE_THRESH) 1533 return -EINVAL; 1534 1535 *val2 = 0; 1536 *val = hw->event_threshold; 1537 1538 return IIO_VAL_INT; 1539 } 1540 1541 static int 1542 st_lsm6dsx_write_event(struct iio_dev *iio_dev, 1543 const struct iio_chan_spec *chan, 1544 enum iio_event_type type, 1545 enum iio_event_direction dir, 1546 enum iio_event_info info, 1547 int val, int val2) 1548 { 1549 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1550 struct st_lsm6dsx_hw *hw = sensor->hw; 1551 const struct st_lsm6dsx_reg *reg; 1552 unsigned int data; 1553 int err; 1554 1555 if (type != IIO_EV_TYPE_THRESH) 1556 return -EINVAL; 1557 1558 if (val < 0 || val > 31) 1559 return -EINVAL; 1560 1561 reg = &hw->settings->event_settings.wakeup_reg; 1562 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask); 1563 err = st_lsm6dsx_update_bits_locked(hw, reg->addr, 1564 reg->mask, data); 1565 if (err < 0) 1566 return -EINVAL; 1567 1568 hw->event_threshold = val; 1569 1570 return 0; 1571 } 1572 1573 static int 1574 st_lsm6dsx_read_event_config(struct iio_dev *iio_dev, 1575 const struct iio_chan_spec *chan, 1576 enum iio_event_type type, 1577 enum iio_event_direction dir) 1578 { 1579 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1580 struct st_lsm6dsx_hw *hw = sensor->hw; 1581 1582 if (type != IIO_EV_TYPE_THRESH) 1583 return -EINVAL; 1584 1585 return !!(hw->enable_event & BIT(chan->channel2)); 1586 } 1587 1588 static int 1589 st_lsm6dsx_write_event_config(struct iio_dev *iio_dev, 1590 const struct iio_chan_spec *chan, 1591 enum iio_event_type type, 1592 enum iio_event_direction dir, int state) 1593 { 1594 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1595 struct st_lsm6dsx_hw *hw = sensor->hw; 1596 u8 enable_event; 1597 int err = 0; 1598 1599 if (type != IIO_EV_TYPE_THRESH) 1600 return -EINVAL; 1601 1602 if (state) { 1603 enable_event = hw->enable_event | BIT(chan->channel2); 1604 1605 /* do not enable events if they are already enabled */ 1606 if (hw->enable_event) 1607 goto out; 1608 } else { 1609 enable_event = hw->enable_event & ~BIT(chan->channel2); 1610 1611 /* only turn off sensor if no events is enabled */ 1612 if (enable_event) 1613 goto out; 1614 } 1615 1616 /* stop here if no changes have been made */ 1617 if (hw->enable_event == enable_event) 1618 return 0; 1619 1620 err = st_lsm6dsx_event_setup(hw, state); 1621 if (err < 0) 1622 return err; 1623 1624 mutex_lock(&hw->conf_lock); 1625 err = st_lsm6dsx_sensor_set_enable(sensor, state); 1626 mutex_unlock(&hw->conf_lock); 1627 if (err < 0) 1628 return err; 1629 1630 out: 1631 hw->enable_event = enable_event; 1632 1633 return 0; 1634 } 1635 1636 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val) 1637 { 1638 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1639 struct st_lsm6dsx_hw *hw = sensor->hw; 1640 int err; 1641 1642 if (val < 1 || val > hw->settings->max_fifo_size) 1643 return -EINVAL; 1644 1645 mutex_lock(&hw->conf_lock); 1646 1647 err = st_lsm6dsx_update_watermark(sensor, val); 1648 1649 mutex_unlock(&hw->conf_lock); 1650 1651 if (err < 0) 1652 return err; 1653 1654 sensor->watermark = val; 1655 1656 return 0; 1657 } 1658 1659 static ssize_t 1660 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev, 1661 struct device_attribute *attr, 1662 char *buf) 1663 { 1664 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev)); 1665 enum st_lsm6dsx_sensor_id id = sensor->id; 1666 struct st_lsm6dsx_hw *hw = sensor->hw; 1667 int i, len = 0; 1668 1669 for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) 1670 len += scnprintf(buf + len, PAGE_SIZE - len, "%d ", 1671 hw->settings->odr_table[id].odr_avl[i].hz); 1672 buf[len - 1] = '\n'; 1673 1674 return len; 1675 } 1676 1677 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev, 1678 struct device_attribute *attr, 1679 char *buf) 1680 { 1681 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev)); 1682 const struct st_lsm6dsx_fs_table_entry *fs_table; 1683 struct st_lsm6dsx_hw *hw = sensor->hw; 1684 int i, len = 0; 1685 1686 fs_table = &hw->settings->fs_table[sensor->id]; 1687 for (i = 0; i < fs_table->fs_len; i++) 1688 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ", 1689 fs_table->fs_avl[i].gain); 1690 buf[len - 1] = '\n'; 1691 1692 return len; 1693 } 1694 1695 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail); 1696 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444, 1697 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 1698 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444, 1699 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 1700 1701 static struct attribute *st_lsm6dsx_acc_attributes[] = { 1702 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 1703 &iio_dev_attr_in_accel_scale_available.dev_attr.attr, 1704 NULL, 1705 }; 1706 1707 static const struct attribute_group st_lsm6dsx_acc_attribute_group = { 1708 .attrs = st_lsm6dsx_acc_attributes, 1709 }; 1710 1711 static const struct iio_info st_lsm6dsx_acc_info = { 1712 .attrs = &st_lsm6dsx_acc_attribute_group, 1713 .read_raw = st_lsm6dsx_read_raw, 1714 .write_raw = st_lsm6dsx_write_raw, 1715 .read_event_value = st_lsm6dsx_read_event, 1716 .write_event_value = st_lsm6dsx_write_event, 1717 .read_event_config = st_lsm6dsx_read_event_config, 1718 .write_event_config = st_lsm6dsx_write_event_config, 1719 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 1720 }; 1721 1722 static struct attribute *st_lsm6dsx_gyro_attributes[] = { 1723 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 1724 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr, 1725 NULL, 1726 }; 1727 1728 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = { 1729 .attrs = st_lsm6dsx_gyro_attributes, 1730 }; 1731 1732 static const struct iio_info st_lsm6dsx_gyro_info = { 1733 .attrs = &st_lsm6dsx_gyro_attribute_group, 1734 .read_raw = st_lsm6dsx_read_raw, 1735 .write_raw = st_lsm6dsx_write_raw, 1736 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 1737 }; 1738 1739 static int st_lsm6dsx_of_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin) 1740 { 1741 struct device_node *np = hw->dev->of_node; 1742 1743 if (!np) 1744 return -EINVAL; 1745 1746 return of_property_read_u32(np, "st,drdy-int-pin", drdy_pin); 1747 } 1748 1749 static int 1750 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, 1751 const struct st_lsm6dsx_reg **drdy_reg) 1752 { 1753 int err = 0, drdy_pin; 1754 1755 if (st_lsm6dsx_of_get_drdy_pin(hw, &drdy_pin) < 0) { 1756 struct st_sensors_platform_data *pdata; 1757 struct device *dev = hw->dev; 1758 1759 pdata = (struct st_sensors_platform_data *)dev->platform_data; 1760 drdy_pin = pdata ? pdata->drdy_int_pin : 1; 1761 } 1762 1763 switch (drdy_pin) { 1764 case 1: 1765 hw->irq_routing = &hw->settings->irq_config.irq1_func; 1766 *drdy_reg = &hw->settings->irq_config.irq1; 1767 break; 1768 case 2: 1769 hw->irq_routing = &hw->settings->irq_config.irq2_func; 1770 *drdy_reg = &hw->settings->irq_config.irq2; 1771 break; 1772 default: 1773 dev_err(hw->dev, "unsupported data ready pin\n"); 1774 err = -EINVAL; 1775 break; 1776 } 1777 1778 return err; 1779 } 1780 1781 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw) 1782 { 1783 const struct st_lsm6dsx_shub_settings *hub_settings; 1784 struct device_node *np = hw->dev->of_node; 1785 struct st_sensors_platform_data *pdata; 1786 unsigned int data; 1787 int err = 0; 1788 1789 hub_settings = &hw->settings->shub_settings; 1790 1791 pdata = (struct st_sensors_platform_data *)hw->dev->platform_data; 1792 if ((np && of_property_read_bool(np, "st,pullups")) || 1793 (pdata && pdata->pullups)) { 1794 err = st_lsm6dsx_set_page(hw, true); 1795 if (err < 0) 1796 return err; 1797 1798 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask); 1799 err = regmap_update_bits(hw->regmap, 1800 hub_settings->pullup_en.addr, 1801 hub_settings->pullup_en.mask, data); 1802 1803 st_lsm6dsx_set_page(hw, false); 1804 1805 if (err < 0) 1806 return err; 1807 } 1808 1809 if (hub_settings->aux_sens.addr) { 1810 /* configure aux sensors */ 1811 err = st_lsm6dsx_set_page(hw, true); 1812 if (err < 0) 1813 return err; 1814 1815 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask); 1816 err = regmap_update_bits(hw->regmap, 1817 hub_settings->aux_sens.addr, 1818 hub_settings->aux_sens.mask, data); 1819 1820 st_lsm6dsx_set_page(hw, false); 1821 } 1822 1823 return err; 1824 } 1825 1826 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw) 1827 { 1828 const struct st_lsm6dsx_hw_ts_settings *ts_settings; 1829 int err, val; 1830 1831 ts_settings = &hw->settings->ts_settings; 1832 /* enable hw timestamp generation if necessary */ 1833 if (ts_settings->timer_en.addr) { 1834 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask); 1835 err = regmap_update_bits(hw->regmap, 1836 ts_settings->timer_en.addr, 1837 ts_settings->timer_en.mask, val); 1838 if (err < 0) 1839 return err; 1840 } 1841 1842 /* enable high resolution for hw ts timer if necessary */ 1843 if (ts_settings->hr_timer.addr) { 1844 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask); 1845 err = regmap_update_bits(hw->regmap, 1846 ts_settings->hr_timer.addr, 1847 ts_settings->hr_timer.mask, val); 1848 if (err < 0) 1849 return err; 1850 } 1851 1852 /* enable ts queueing in FIFO if necessary */ 1853 if (ts_settings->fifo_en.addr) { 1854 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask); 1855 err = regmap_update_bits(hw->regmap, 1856 ts_settings->fifo_en.addr, 1857 ts_settings->fifo_en.mask, val); 1858 if (err < 0) 1859 return err; 1860 } 1861 return 0; 1862 } 1863 1864 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw) 1865 { 1866 const struct st_lsm6dsx_reg *reg; 1867 int err; 1868 1869 /* device sw reset */ 1870 reg = &hw->settings->reset; 1871 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1872 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1873 if (err < 0) 1874 return err; 1875 1876 msleep(50); 1877 1878 /* reload trimming parameter */ 1879 reg = &hw->settings->boot; 1880 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1881 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1882 if (err < 0) 1883 return err; 1884 1885 msleep(50); 1886 1887 /* enable Block Data Update */ 1888 reg = &hw->settings->bdu; 1889 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1890 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1891 if (err < 0) 1892 return err; 1893 1894 /* enable FIFO watermak interrupt */ 1895 err = st_lsm6dsx_get_drdy_reg(hw, ®); 1896 if (err < 0) 1897 return err; 1898 1899 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1900 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1901 if (err < 0) 1902 return err; 1903 1904 /* enable Latched interrupts for device events */ 1905 if (hw->settings->irq_config.lir.addr) { 1906 reg = &hw->settings->irq_config.lir; 1907 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1908 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1909 if (err < 0) 1910 return err; 1911 1912 /* enable clear on read for latched interrupts */ 1913 if (hw->settings->irq_config.clear_on_read.addr) { 1914 reg = &hw->settings->irq_config.clear_on_read; 1915 err = regmap_update_bits(hw->regmap, 1916 reg->addr, reg->mask, 1917 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1918 if (err < 0) 1919 return err; 1920 } 1921 } 1922 1923 err = st_lsm6dsx_init_shub(hw); 1924 if (err < 0) 1925 return err; 1926 1927 return st_lsm6dsx_init_hw_timer(hw); 1928 } 1929 1930 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw, 1931 enum st_lsm6dsx_sensor_id id, 1932 const char *name) 1933 { 1934 struct st_lsm6dsx_sensor *sensor; 1935 struct iio_dev *iio_dev; 1936 1937 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor)); 1938 if (!iio_dev) 1939 return NULL; 1940 1941 iio_dev->modes = INDIO_DIRECT_MODE; 1942 iio_dev->dev.parent = hw->dev; 1943 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks; 1944 iio_dev->channels = hw->settings->channels[id].chan; 1945 iio_dev->num_channels = hw->settings->channels[id].len; 1946 1947 sensor = iio_priv(iio_dev); 1948 sensor->id = id; 1949 sensor->hw = hw; 1950 sensor->odr = hw->settings->odr_table[id].odr_avl[0].hz; 1951 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain; 1952 sensor->watermark = 1; 1953 1954 switch (id) { 1955 case ST_LSM6DSX_ID_ACC: 1956 iio_dev->info = &st_lsm6dsx_acc_info; 1957 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel", 1958 name); 1959 break; 1960 case ST_LSM6DSX_ID_GYRO: 1961 iio_dev->info = &st_lsm6dsx_gyro_info; 1962 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro", 1963 name); 1964 break; 1965 default: 1966 return NULL; 1967 } 1968 iio_dev->name = sensor->name; 1969 1970 return iio_dev; 1971 } 1972 1973 static bool 1974 st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw) 1975 { 1976 const struct st_lsm6dsx_event_settings *event_settings; 1977 int err, data; 1978 s64 timestamp; 1979 1980 if (!hw->enable_event) 1981 return false; 1982 1983 event_settings = &hw->settings->event_settings; 1984 err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg, 1985 &data, sizeof(data)); 1986 if (err < 0) 1987 return false; 1988 1989 timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]); 1990 if ((data & hw->settings->event_settings.wakeup_src_z_mask) && 1991 (hw->enable_event & BIT(IIO_MOD_Z))) 1992 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 1993 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1994 0, 1995 IIO_MOD_Z, 1996 IIO_EV_TYPE_THRESH, 1997 IIO_EV_DIR_EITHER), 1998 timestamp); 1999 2000 if ((data & hw->settings->event_settings.wakeup_src_y_mask) && 2001 (hw->enable_event & BIT(IIO_MOD_Y))) 2002 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2003 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2004 0, 2005 IIO_MOD_Y, 2006 IIO_EV_TYPE_THRESH, 2007 IIO_EV_DIR_EITHER), 2008 timestamp); 2009 2010 if ((data & hw->settings->event_settings.wakeup_src_x_mask) && 2011 (hw->enable_event & BIT(IIO_MOD_X))) 2012 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2013 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2014 0, 2015 IIO_MOD_X, 2016 IIO_EV_TYPE_THRESH, 2017 IIO_EV_DIR_EITHER), 2018 timestamp); 2019 2020 return data & event_settings->wakeup_src_status_mask; 2021 } 2022 2023 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private) 2024 { 2025 struct st_lsm6dsx_hw *hw = private; 2026 bool event; 2027 int count; 2028 2029 event = st_lsm6dsx_report_motion_event(hw); 2030 2031 if (!hw->settings->fifo_ops.read_fifo) 2032 return event ? IRQ_HANDLED : IRQ_NONE; 2033 2034 mutex_lock(&hw->fifo_lock); 2035 count = hw->settings->fifo_ops.read_fifo(hw); 2036 mutex_unlock(&hw->fifo_lock); 2037 2038 return count || event ? IRQ_HANDLED : IRQ_NONE; 2039 } 2040 2041 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw) 2042 { 2043 struct device_node *np = hw->dev->of_node; 2044 struct st_sensors_platform_data *pdata; 2045 const struct st_lsm6dsx_reg *reg; 2046 unsigned long irq_type; 2047 bool irq_active_low; 2048 int err; 2049 2050 irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq)); 2051 2052 switch (irq_type) { 2053 case IRQF_TRIGGER_HIGH: 2054 case IRQF_TRIGGER_RISING: 2055 irq_active_low = false; 2056 break; 2057 case IRQF_TRIGGER_LOW: 2058 case IRQF_TRIGGER_FALLING: 2059 irq_active_low = true; 2060 break; 2061 default: 2062 dev_info(hw->dev, "mode %lx unsupported\n", irq_type); 2063 return -EINVAL; 2064 } 2065 2066 reg = &hw->settings->irq_config.hla; 2067 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2068 ST_LSM6DSX_SHIFT_VAL(irq_active_low, 2069 reg->mask)); 2070 if (err < 0) 2071 return err; 2072 2073 pdata = (struct st_sensors_platform_data *)hw->dev->platform_data; 2074 if ((np && of_property_read_bool(np, "drive-open-drain")) || 2075 (pdata && pdata->open_drain)) { 2076 reg = &hw->settings->irq_config.od; 2077 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2078 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2079 if (err < 0) 2080 return err; 2081 2082 irq_type |= IRQF_SHARED; 2083 } 2084 2085 err = devm_request_threaded_irq(hw->dev, hw->irq, 2086 NULL, 2087 st_lsm6dsx_handler_thread, 2088 irq_type | IRQF_ONESHOT, 2089 "lsm6dsx", hw); 2090 if (err) { 2091 dev_err(hw->dev, "failed to request trigger irq %d\n", 2092 hw->irq); 2093 return err; 2094 } 2095 2096 return 0; 2097 } 2098 2099 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id, 2100 struct regmap *regmap) 2101 { 2102 struct st_sensors_platform_data *pdata = dev->platform_data; 2103 const struct st_lsm6dsx_shub_settings *hub_settings; 2104 struct device_node *np = dev->of_node; 2105 struct st_lsm6dsx_hw *hw; 2106 const char *name = NULL; 2107 int i, err; 2108 2109 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL); 2110 if (!hw) 2111 return -ENOMEM; 2112 2113 dev_set_drvdata(dev, (void *)hw); 2114 2115 mutex_init(&hw->fifo_lock); 2116 mutex_init(&hw->conf_lock); 2117 mutex_init(&hw->page_lock); 2118 2119 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL); 2120 if (!hw->buff) 2121 return -ENOMEM; 2122 2123 hw->dev = dev; 2124 hw->irq = irq; 2125 hw->regmap = regmap; 2126 2127 err = st_lsm6dsx_check_whoami(hw, hw_id, &name); 2128 if (err < 0) 2129 return err; 2130 2131 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) { 2132 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name); 2133 if (!hw->iio_devs[i]) 2134 return -ENOMEM; 2135 } 2136 2137 err = st_lsm6dsx_init_device(hw); 2138 if (err < 0) 2139 return err; 2140 2141 hub_settings = &hw->settings->shub_settings; 2142 if (hub_settings->master_en.addr) { 2143 err = st_lsm6dsx_shub_probe(hw, name); 2144 if (err < 0) 2145 return err; 2146 } 2147 2148 if (hw->irq > 0) { 2149 err = st_lsm6dsx_irq_setup(hw); 2150 if (err < 0) 2151 return err; 2152 2153 err = st_lsm6dsx_fifo_setup(hw); 2154 if (err < 0) 2155 return err; 2156 } 2157 2158 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2159 if (!hw->iio_devs[i]) 2160 continue; 2161 2162 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]); 2163 if (err) 2164 return err; 2165 } 2166 2167 if ((np && of_property_read_bool(np, "wakeup-source")) || 2168 (pdata && pdata->wakeup_source)) 2169 device_init_wakeup(dev, true); 2170 2171 return 0; 2172 } 2173 EXPORT_SYMBOL(st_lsm6dsx_probe); 2174 2175 static int __maybe_unused st_lsm6dsx_suspend(struct device *dev) 2176 { 2177 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 2178 struct st_lsm6dsx_sensor *sensor; 2179 int i, err = 0; 2180 2181 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2182 if (!hw->iio_devs[i]) 2183 continue; 2184 2185 sensor = iio_priv(hw->iio_devs[i]); 2186 if (!(hw->enable_mask & BIT(sensor->id))) 2187 continue; 2188 2189 if (device_may_wakeup(dev) && 2190 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) { 2191 /* Enable wake from IRQ */ 2192 enable_irq_wake(hw->irq); 2193 continue; 2194 } 2195 2196 if (sensor->id == ST_LSM6DSX_ID_EXT0 || 2197 sensor->id == ST_LSM6DSX_ID_EXT1 || 2198 sensor->id == ST_LSM6DSX_ID_EXT2) 2199 err = st_lsm6dsx_shub_set_enable(sensor, false); 2200 else 2201 err = st_lsm6dsx_sensor_set_enable(sensor, false); 2202 if (err < 0) 2203 return err; 2204 2205 hw->suspend_mask |= BIT(sensor->id); 2206 } 2207 2208 if (hw->fifo_mode != ST_LSM6DSX_FIFO_BYPASS) 2209 err = st_lsm6dsx_flush_fifo(hw); 2210 2211 return err; 2212 } 2213 2214 static int __maybe_unused st_lsm6dsx_resume(struct device *dev) 2215 { 2216 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 2217 struct st_lsm6dsx_sensor *sensor; 2218 int i, err = 0; 2219 2220 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2221 if (!hw->iio_devs[i]) 2222 continue; 2223 2224 sensor = iio_priv(hw->iio_devs[i]); 2225 if (device_may_wakeup(dev) && 2226 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) 2227 disable_irq_wake(hw->irq); 2228 2229 if (!(hw->suspend_mask & BIT(sensor->id))) 2230 continue; 2231 2232 if (sensor->id == ST_LSM6DSX_ID_EXT0 || 2233 sensor->id == ST_LSM6DSX_ID_EXT1 || 2234 sensor->id == ST_LSM6DSX_ID_EXT2) 2235 err = st_lsm6dsx_shub_set_enable(sensor, true); 2236 else 2237 err = st_lsm6dsx_sensor_set_enable(sensor, true); 2238 if (err < 0) 2239 return err; 2240 2241 hw->suspend_mask &= ~BIT(sensor->id); 2242 } 2243 2244 if (hw->enable_mask) 2245 err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT); 2246 2247 return err; 2248 } 2249 2250 const struct dev_pm_ops st_lsm6dsx_pm_ops = { 2251 SET_SYSTEM_SLEEP_PM_OPS(st_lsm6dsx_suspend, st_lsm6dsx_resume) 2252 }; 2253 EXPORT_SYMBOL(st_lsm6dsx_pm_ops); 2254 2255 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>"); 2256 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); 2257 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver"); 2258 MODULE_LICENSE("GPL v2"); 2259