1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * STMicroelectronics st_lsm6dsx sensor driver 4 * 5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer 6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial 7 * interface standard output. 8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale 9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of 10 * +-125/+-245/+-500/+-1000/+-2000 dps 11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer 12 * allowing dynamic batching of sensor data. 13 * LSM9DSx series is similar but includes an additional magnetometer, handled 14 * by a different driver. 15 * 16 * Supported sensors: 17 * - LSM6DS3: 18 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416 19 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 20 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 21 * - FIFO size: 8KB 22 * 23 * - LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C: 24 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416 25 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 26 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 27 * - FIFO size: 4KB 28 * 29 * - LSM6DSO/LSM6DSOX/ASM330LHH/LSM6DSR/ISM330DHCX: 30 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416 31 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 32 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 33 * - FIFO size: 3KB 34 * 35 * - LSM9DS1: 36 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952 37 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 38 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952 39 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000 40 * - FIFO size: 32 41 * 42 * Copyright 2016 STMicroelectronics Inc. 43 * 44 * Lorenzo Bianconi <lorenzo.bianconi@st.com> 45 * Denis Ciocca <denis.ciocca@st.com> 46 */ 47 48 #include <linux/kernel.h> 49 #include <linux/module.h> 50 #include <linux/delay.h> 51 #include <linux/iio/events.h> 52 #include <linux/iio/iio.h> 53 #include <linux/iio/sysfs.h> 54 #include <linux/interrupt.h> 55 #include <linux/irq.h> 56 #include <linux/pm.h> 57 #include <linux/regmap.h> 58 #include <linux/bitfield.h> 59 60 #include <linux/platform_data/st_sensors_pdata.h> 61 62 #include "st_lsm6dsx.h" 63 64 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f 65 #define ST_LSM6DSX_REG_RESET_MASK BIT(0) 66 #define ST_LSM6DSX_REG_BOOT_MASK BIT(7) 67 #define ST_LSM6DSX_REG_BDU_ADDR 0x12 68 #define ST_LSM6DSX_REG_BDU_MASK BIT(6) 69 70 #define ST_LSM6DSX_REG_HLACTIVE_ADDR 0x12 71 #define ST_LSM6DSX_REG_HLACTIVE_MASK BIT(5) 72 #define ST_LSM6DSX_REG_PP_OD_ADDR 0x12 73 #define ST_LSM6DSX_REG_PP_OD_MASK BIT(4) 74 75 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = { 76 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0), 77 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1), 78 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2), 79 IIO_CHAN_SOFT_TIMESTAMP(3), 80 }; 81 82 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = { 83 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0), 84 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1), 85 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2), 86 IIO_CHAN_SOFT_TIMESTAMP(3), 87 }; 88 89 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = { 90 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0), 91 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1), 92 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2), 93 IIO_CHAN_SOFT_TIMESTAMP(3), 94 }; 95 96 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 97 { 98 .wai = 0x68, 99 .reset_addr = 0x22, 100 .max_fifo_size = 32, 101 .id = { 102 { 103 .hw_id = ST_LSM9DS1_ID, 104 .name = ST_LSM9DS1_DEV_NAME, 105 }, 106 }, 107 .channels = { 108 [ST_LSM6DSX_ID_ACC] = { 109 .chan = st_lsm6dsx_acc_channels, 110 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 111 }, 112 [ST_LSM6DSX_ID_GYRO] = { 113 .chan = st_lsm6ds0_gyro_channels, 114 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels), 115 }, 116 }, 117 .odr_table = { 118 [ST_LSM6DSX_ID_ACC] = { 119 .reg = { 120 .addr = 0x20, 121 .mask = GENMASK(7, 5), 122 }, 123 .odr_avl[0] = { 10, 0x01 }, 124 .odr_avl[1] = { 50, 0x02 }, 125 .odr_avl[2] = { 119, 0x03 }, 126 .odr_avl[3] = { 238, 0x04 }, 127 .odr_avl[4] = { 476, 0x05 }, 128 .odr_avl[5] = { 952, 0x06 }, 129 }, 130 [ST_LSM6DSX_ID_GYRO] = { 131 .reg = { 132 .addr = 0x10, 133 .mask = GENMASK(7, 5), 134 }, 135 .odr_avl[0] = { 15, 0x01 }, 136 .odr_avl[1] = { 60, 0x02 }, 137 .odr_avl[2] = { 119, 0x03 }, 138 .odr_avl[3] = { 238, 0x04 }, 139 .odr_avl[4] = { 476, 0x05 }, 140 .odr_avl[5] = { 952, 0x06 }, 141 }, 142 }, 143 .fs_table = { 144 [ST_LSM6DSX_ID_ACC] = { 145 .reg = { 146 .addr = 0x20, 147 .mask = GENMASK(4, 3), 148 }, 149 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 150 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 151 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 152 .fs_avl[3] = { IIO_G_TO_M_S_2(732), 0x1 }, 153 .fs_len = 4, 154 }, 155 [ST_LSM6DSX_ID_GYRO] = { 156 .reg = { 157 .addr = 0x10, 158 .mask = GENMASK(4, 3), 159 }, 160 .fs_avl[0] = { IIO_DEGREE_TO_RAD(245), 0x0 }, 161 .fs_avl[1] = { IIO_DEGREE_TO_RAD(500), 0x1 }, 162 .fs_avl[2] = { IIO_DEGREE_TO_RAD(2000), 0x3 }, 163 .fs_len = 3, 164 }, 165 }, 166 .irq_config = { 167 .irq1 = { 168 .addr = 0x0c, 169 .mask = BIT(3), 170 }, 171 .irq2 = { 172 .addr = 0x0d, 173 .mask = BIT(3), 174 }, 175 }, 176 }, 177 { 178 .wai = 0x69, 179 .reset_addr = 0x12, 180 .max_fifo_size = 1365, 181 .id = { 182 { 183 .hw_id = ST_LSM6DS3_ID, 184 .name = ST_LSM6DS3_DEV_NAME, 185 }, 186 }, 187 .channels = { 188 [ST_LSM6DSX_ID_ACC] = { 189 .chan = st_lsm6dsx_acc_channels, 190 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 191 }, 192 [ST_LSM6DSX_ID_GYRO] = { 193 .chan = st_lsm6dsx_gyro_channels, 194 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 195 }, 196 }, 197 .odr_table = { 198 [ST_LSM6DSX_ID_ACC] = { 199 .reg = { 200 .addr = 0x10, 201 .mask = GENMASK(7, 4), 202 }, 203 .odr_avl[0] = { 13, 0x01 }, 204 .odr_avl[1] = { 26, 0x02 }, 205 .odr_avl[2] = { 52, 0x03 }, 206 .odr_avl[3] = { 104, 0x04 }, 207 .odr_avl[4] = { 208, 0x05 }, 208 .odr_avl[5] = { 416, 0x06 }, 209 }, 210 [ST_LSM6DSX_ID_GYRO] = { 211 .reg = { 212 .addr = 0x11, 213 .mask = GENMASK(7, 4), 214 }, 215 .odr_avl[0] = { 13, 0x01 }, 216 .odr_avl[1] = { 26, 0x02 }, 217 .odr_avl[2] = { 52, 0x03 }, 218 .odr_avl[3] = { 104, 0x04 }, 219 .odr_avl[4] = { 208, 0x05 }, 220 .odr_avl[5] = { 416, 0x06 }, 221 }, 222 }, 223 .fs_table = { 224 [ST_LSM6DSX_ID_ACC] = { 225 .reg = { 226 .addr = 0x10, 227 .mask = GENMASK(3, 2), 228 }, 229 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 230 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 231 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 232 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 233 .fs_len = 4, 234 }, 235 [ST_LSM6DSX_ID_GYRO] = { 236 .reg = { 237 .addr = 0x11, 238 .mask = GENMASK(3, 2), 239 }, 240 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 241 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 242 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 243 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 244 .fs_len = 4, 245 }, 246 }, 247 .irq_config = { 248 .irq1 = { 249 .addr = 0x0d, 250 .mask = BIT(3), 251 }, 252 .irq2 = { 253 .addr = 0x0e, 254 .mask = BIT(3), 255 }, 256 .lir = { 257 .addr = 0x58, 258 .mask = BIT(0), 259 }, 260 .irq1_func = { 261 .addr = 0x5e, 262 .mask = BIT(5), 263 }, 264 .irq2_func = { 265 .addr = 0x5f, 266 .mask = BIT(5), 267 }, 268 }, 269 .decimator = { 270 [ST_LSM6DSX_ID_ACC] = { 271 .addr = 0x08, 272 .mask = GENMASK(2, 0), 273 }, 274 [ST_LSM6DSX_ID_GYRO] = { 275 .addr = 0x08, 276 .mask = GENMASK(5, 3), 277 }, 278 }, 279 .fifo_ops = { 280 .update_fifo = st_lsm6dsx_update_fifo, 281 .read_fifo = st_lsm6dsx_read_fifo, 282 .fifo_th = { 283 .addr = 0x06, 284 .mask = GENMASK(11, 0), 285 }, 286 .fifo_diff = { 287 .addr = 0x3a, 288 .mask = GENMASK(11, 0), 289 }, 290 .th_wl = 3, /* 1LSB = 2B */ 291 }, 292 .ts_settings = { 293 .timer_en = { 294 .addr = 0x58, 295 .mask = BIT(7), 296 }, 297 .hr_timer = { 298 .addr = 0x5c, 299 .mask = BIT(4), 300 }, 301 .fifo_en = { 302 .addr = 0x07, 303 .mask = BIT(7), 304 }, 305 .decimator = { 306 .addr = 0x09, 307 .mask = GENMASK(5, 3), 308 }, 309 }, 310 .event_settings = { 311 .wakeup_reg = { 312 .addr = 0x5B, 313 .mask = GENMASK(5, 0), 314 }, 315 .wakeup_src_reg = 0x1b, 316 .wakeup_src_status_mask = BIT(3), 317 .wakeup_src_z_mask = BIT(0), 318 .wakeup_src_y_mask = BIT(1), 319 .wakeup_src_x_mask = BIT(2), 320 }, 321 }, 322 { 323 .wai = 0x69, 324 .reset_addr = 0x12, 325 .max_fifo_size = 682, 326 .id = { 327 { 328 .hw_id = ST_LSM6DS3H_ID, 329 .name = ST_LSM6DS3H_DEV_NAME, 330 }, 331 }, 332 .channels = { 333 [ST_LSM6DSX_ID_ACC] = { 334 .chan = st_lsm6dsx_acc_channels, 335 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 336 }, 337 [ST_LSM6DSX_ID_GYRO] = { 338 .chan = st_lsm6dsx_gyro_channels, 339 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 340 }, 341 }, 342 .odr_table = { 343 [ST_LSM6DSX_ID_ACC] = { 344 .reg = { 345 .addr = 0x10, 346 .mask = GENMASK(7, 4), 347 }, 348 .odr_avl[0] = { 13, 0x01 }, 349 .odr_avl[1] = { 26, 0x02 }, 350 .odr_avl[2] = { 52, 0x03 }, 351 .odr_avl[3] = { 104, 0x04 }, 352 .odr_avl[4] = { 208, 0x05 }, 353 .odr_avl[5] = { 416, 0x06 }, 354 }, 355 [ST_LSM6DSX_ID_GYRO] = { 356 .reg = { 357 .addr = 0x11, 358 .mask = GENMASK(7, 4), 359 }, 360 .odr_avl[0] = { 13, 0x01 }, 361 .odr_avl[1] = { 26, 0x02 }, 362 .odr_avl[2] = { 52, 0x03 }, 363 .odr_avl[3] = { 104, 0x04 }, 364 .odr_avl[4] = { 208, 0x05 }, 365 .odr_avl[5] = { 416, 0x06 }, 366 }, 367 }, 368 .fs_table = { 369 [ST_LSM6DSX_ID_ACC] = { 370 .reg = { 371 .addr = 0x10, 372 .mask = GENMASK(3, 2), 373 }, 374 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 375 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 376 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 377 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 378 .fs_len = 4, 379 }, 380 [ST_LSM6DSX_ID_GYRO] = { 381 .reg = { 382 .addr = 0x11, 383 .mask = GENMASK(3, 2), 384 }, 385 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 386 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 387 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 388 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 389 .fs_len = 4, 390 }, 391 }, 392 .irq_config = { 393 .irq1 = { 394 .addr = 0x0d, 395 .mask = BIT(3), 396 }, 397 .irq2 = { 398 .addr = 0x0e, 399 .mask = BIT(3), 400 }, 401 .lir = { 402 .addr = 0x58, 403 .mask = BIT(0), 404 }, 405 .irq1_func = { 406 .addr = 0x5e, 407 .mask = BIT(5), 408 }, 409 .irq2_func = { 410 .addr = 0x5f, 411 .mask = BIT(5), 412 }, 413 }, 414 .decimator = { 415 [ST_LSM6DSX_ID_ACC] = { 416 .addr = 0x08, 417 .mask = GENMASK(2, 0), 418 }, 419 [ST_LSM6DSX_ID_GYRO] = { 420 .addr = 0x08, 421 .mask = GENMASK(5, 3), 422 }, 423 }, 424 .fifo_ops = { 425 .update_fifo = st_lsm6dsx_update_fifo, 426 .read_fifo = st_lsm6dsx_read_fifo, 427 .fifo_th = { 428 .addr = 0x06, 429 .mask = GENMASK(11, 0), 430 }, 431 .fifo_diff = { 432 .addr = 0x3a, 433 .mask = GENMASK(11, 0), 434 }, 435 .th_wl = 3, /* 1LSB = 2B */ 436 }, 437 .ts_settings = { 438 .timer_en = { 439 .addr = 0x58, 440 .mask = BIT(7), 441 }, 442 .hr_timer = { 443 .addr = 0x5c, 444 .mask = BIT(4), 445 }, 446 .fifo_en = { 447 .addr = 0x07, 448 .mask = BIT(7), 449 }, 450 .decimator = { 451 .addr = 0x09, 452 .mask = GENMASK(5, 3), 453 }, 454 }, 455 .event_settings = { 456 .wakeup_reg = { 457 .addr = 0x5B, 458 .mask = GENMASK(5, 0), 459 }, 460 .wakeup_src_reg = 0x1b, 461 .wakeup_src_status_mask = BIT(3), 462 .wakeup_src_z_mask = BIT(0), 463 .wakeup_src_y_mask = BIT(1), 464 .wakeup_src_x_mask = BIT(2), 465 }, 466 }, 467 { 468 .wai = 0x6a, 469 .reset_addr = 0x12, 470 .max_fifo_size = 682, 471 .id = { 472 { 473 .hw_id = ST_LSM6DSL_ID, 474 .name = ST_LSM6DSL_DEV_NAME, 475 }, { 476 .hw_id = ST_LSM6DSM_ID, 477 .name = ST_LSM6DSM_DEV_NAME, 478 }, { 479 .hw_id = ST_ISM330DLC_ID, 480 .name = ST_ISM330DLC_DEV_NAME, 481 }, { 482 .hw_id = ST_LSM6DS3TRC_ID, 483 .name = ST_LSM6DS3TRC_DEV_NAME, 484 }, 485 }, 486 .channels = { 487 [ST_LSM6DSX_ID_ACC] = { 488 .chan = st_lsm6dsx_acc_channels, 489 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 490 }, 491 [ST_LSM6DSX_ID_GYRO] = { 492 .chan = st_lsm6dsx_gyro_channels, 493 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 494 }, 495 }, 496 .odr_table = { 497 [ST_LSM6DSX_ID_ACC] = { 498 .reg = { 499 .addr = 0x10, 500 .mask = GENMASK(7, 4), 501 }, 502 .odr_avl[0] = { 13, 0x01 }, 503 .odr_avl[1] = { 26, 0x02 }, 504 .odr_avl[2] = { 52, 0x03 }, 505 .odr_avl[3] = { 104, 0x04 }, 506 .odr_avl[4] = { 208, 0x05 }, 507 .odr_avl[5] = { 416, 0x06 }, 508 }, 509 [ST_LSM6DSX_ID_GYRO] = { 510 .reg = { 511 .addr = 0x11, 512 .mask = GENMASK(7, 4), 513 }, 514 .odr_avl[0] = { 13, 0x01 }, 515 .odr_avl[1] = { 26, 0x02 }, 516 .odr_avl[2] = { 52, 0x03 }, 517 .odr_avl[3] = { 104, 0x04 }, 518 .odr_avl[4] = { 208, 0x05 }, 519 .odr_avl[5] = { 416, 0x06 }, 520 }, 521 }, 522 .fs_table = { 523 [ST_LSM6DSX_ID_ACC] = { 524 .reg = { 525 .addr = 0x10, 526 .mask = GENMASK(3, 2), 527 }, 528 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 529 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 530 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 531 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 532 .fs_len = 4, 533 }, 534 [ST_LSM6DSX_ID_GYRO] = { 535 .reg = { 536 .addr = 0x11, 537 .mask = GENMASK(3, 2), 538 }, 539 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 540 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 541 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 542 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 543 .fs_len = 4, 544 }, 545 }, 546 .irq_config = { 547 .irq1 = { 548 .addr = 0x0d, 549 .mask = BIT(3), 550 }, 551 .irq2 = { 552 .addr = 0x0e, 553 .mask = BIT(3), 554 }, 555 .lir = { 556 .addr = 0x58, 557 .mask = BIT(0), 558 }, 559 .irq1_func = { 560 .addr = 0x5e, 561 .mask = BIT(5), 562 }, 563 .irq2_func = { 564 .addr = 0x5f, 565 .mask = BIT(5), 566 }, 567 }, 568 .decimator = { 569 [ST_LSM6DSX_ID_ACC] = { 570 .addr = 0x08, 571 .mask = GENMASK(2, 0), 572 }, 573 [ST_LSM6DSX_ID_GYRO] = { 574 .addr = 0x08, 575 .mask = GENMASK(5, 3), 576 }, 577 }, 578 .fifo_ops = { 579 .update_fifo = st_lsm6dsx_update_fifo, 580 .read_fifo = st_lsm6dsx_read_fifo, 581 .fifo_th = { 582 .addr = 0x06, 583 .mask = GENMASK(10, 0), 584 }, 585 .fifo_diff = { 586 .addr = 0x3a, 587 .mask = GENMASK(10, 0), 588 }, 589 .th_wl = 3, /* 1LSB = 2B */ 590 }, 591 .ts_settings = { 592 .timer_en = { 593 .addr = 0x19, 594 .mask = BIT(5), 595 }, 596 .hr_timer = { 597 .addr = 0x5c, 598 .mask = BIT(4), 599 }, 600 .fifo_en = { 601 .addr = 0x07, 602 .mask = BIT(7), 603 }, 604 .decimator = { 605 .addr = 0x09, 606 .mask = GENMASK(5, 3), 607 }, 608 }, 609 .event_settings = { 610 .enable_reg = { 611 .addr = 0x58, 612 .mask = BIT(7), 613 }, 614 .wakeup_reg = { 615 .addr = 0x5B, 616 .mask = GENMASK(5, 0), 617 }, 618 .wakeup_src_reg = 0x1b, 619 .wakeup_src_status_mask = BIT(3), 620 .wakeup_src_z_mask = BIT(0), 621 .wakeup_src_y_mask = BIT(1), 622 .wakeup_src_x_mask = BIT(2), 623 }, 624 }, 625 { 626 .wai = 0x6c, 627 .reset_addr = 0x12, 628 .max_fifo_size = 512, 629 .id = { 630 { 631 .hw_id = ST_LSM6DSO_ID, 632 .name = ST_LSM6DSO_DEV_NAME, 633 }, { 634 .hw_id = ST_LSM6DSOX_ID, 635 .name = ST_LSM6DSOX_DEV_NAME, 636 }, 637 }, 638 .channels = { 639 [ST_LSM6DSX_ID_ACC] = { 640 .chan = st_lsm6dsx_acc_channels, 641 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 642 }, 643 [ST_LSM6DSX_ID_GYRO] = { 644 .chan = st_lsm6dsx_gyro_channels, 645 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 646 }, 647 }, 648 .odr_table = { 649 [ST_LSM6DSX_ID_ACC] = { 650 .reg = { 651 .addr = 0x10, 652 .mask = GENMASK(7, 4), 653 }, 654 .odr_avl[0] = { 13, 0x01 }, 655 .odr_avl[1] = { 26, 0x02 }, 656 .odr_avl[2] = { 52, 0x03 }, 657 .odr_avl[3] = { 104, 0x04 }, 658 .odr_avl[4] = { 208, 0x05 }, 659 .odr_avl[5] = { 416, 0x06 }, 660 }, 661 [ST_LSM6DSX_ID_GYRO] = { 662 .reg = { 663 .addr = 0x11, 664 .mask = GENMASK(7, 4), 665 }, 666 .odr_avl[0] = { 13, 0x01 }, 667 .odr_avl[1] = { 26, 0x02 }, 668 .odr_avl[2] = { 52, 0x03 }, 669 .odr_avl[3] = { 104, 0x04 }, 670 .odr_avl[4] = { 208, 0x05 }, 671 .odr_avl[5] = { 416, 0x06 }, 672 }, 673 }, 674 .fs_table = { 675 [ST_LSM6DSX_ID_ACC] = { 676 .reg = { 677 .addr = 0x10, 678 .mask = GENMASK(3, 2), 679 }, 680 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 681 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 682 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 683 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 684 .fs_len = 4, 685 }, 686 [ST_LSM6DSX_ID_GYRO] = { 687 .reg = { 688 .addr = 0x11, 689 .mask = GENMASK(3, 2), 690 }, 691 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 692 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 693 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 694 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 695 .fs_len = 4, 696 }, 697 }, 698 .irq_config = { 699 .irq1 = { 700 .addr = 0x0d, 701 .mask = BIT(3), 702 }, 703 .irq2 = { 704 .addr = 0x0e, 705 .mask = BIT(3), 706 }, 707 .lir = { 708 .addr = 0x56, 709 .mask = BIT(0), 710 }, 711 .clear_on_read = { 712 .addr = 0x56, 713 .mask = BIT(6), 714 }, 715 }, 716 .batch = { 717 [ST_LSM6DSX_ID_ACC] = { 718 .addr = 0x09, 719 .mask = GENMASK(3, 0), 720 }, 721 [ST_LSM6DSX_ID_GYRO] = { 722 .addr = 0x09, 723 .mask = GENMASK(7, 4), 724 }, 725 }, 726 .fifo_ops = { 727 .update_fifo = st_lsm6dsx_update_fifo, 728 .read_fifo = st_lsm6dsx_read_tagged_fifo, 729 .fifo_th = { 730 .addr = 0x07, 731 .mask = GENMASK(8, 0), 732 }, 733 .fifo_diff = { 734 .addr = 0x3a, 735 .mask = GENMASK(9, 0), 736 }, 737 .th_wl = 1, 738 }, 739 .ts_settings = { 740 .timer_en = { 741 .addr = 0x19, 742 .mask = BIT(5), 743 }, 744 .decimator = { 745 .addr = 0x0a, 746 .mask = GENMASK(7, 6), 747 }, 748 }, 749 .shub_settings = { 750 .page_mux = { 751 .addr = 0x01, 752 .mask = BIT(6), 753 }, 754 .master_en = { 755 .addr = 0x14, 756 .mask = BIT(2), 757 }, 758 .pullup_en = { 759 .addr = 0x14, 760 .mask = BIT(3), 761 }, 762 .aux_sens = { 763 .addr = 0x14, 764 .mask = GENMASK(1, 0), 765 }, 766 .wr_once = { 767 .addr = 0x14, 768 .mask = BIT(6), 769 }, 770 .shub_out = 0x02, 771 .slv0_addr = 0x15, 772 .dw_slv0_addr = 0x21, 773 .batch_en = BIT(3), 774 } 775 }, 776 { 777 .wai = 0x6b, 778 .reset_addr = 0x12, 779 .max_fifo_size = 512, 780 .id = { 781 { 782 .hw_id = ST_ASM330LHH_ID, 783 .name = ST_ASM330LHH_DEV_NAME, 784 }, 785 }, 786 .channels = { 787 [ST_LSM6DSX_ID_ACC] = { 788 .chan = st_lsm6dsx_acc_channels, 789 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 790 }, 791 [ST_LSM6DSX_ID_GYRO] = { 792 .chan = st_lsm6dsx_gyro_channels, 793 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 794 }, 795 }, 796 .odr_table = { 797 [ST_LSM6DSX_ID_ACC] = { 798 .reg = { 799 .addr = 0x10, 800 .mask = GENMASK(7, 4), 801 }, 802 .odr_avl[0] = { 13, 0x01 }, 803 .odr_avl[1] = { 26, 0x02 }, 804 .odr_avl[2] = { 52, 0x03 }, 805 .odr_avl[3] = { 104, 0x04 }, 806 .odr_avl[4] = { 208, 0x05 }, 807 .odr_avl[5] = { 416, 0x06 }, 808 }, 809 [ST_LSM6DSX_ID_GYRO] = { 810 .reg = { 811 .addr = 0x11, 812 .mask = GENMASK(7, 4), 813 }, 814 .odr_avl[0] = { 13, 0x01 }, 815 .odr_avl[1] = { 26, 0x02 }, 816 .odr_avl[2] = { 52, 0x03 }, 817 .odr_avl[3] = { 104, 0x04 }, 818 .odr_avl[4] = { 208, 0x05 }, 819 .odr_avl[5] = { 416, 0x06 }, 820 }, 821 }, 822 .fs_table = { 823 [ST_LSM6DSX_ID_ACC] = { 824 .reg = { 825 .addr = 0x10, 826 .mask = GENMASK(3, 2), 827 }, 828 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 829 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 830 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 831 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 832 .fs_len = 4, 833 }, 834 [ST_LSM6DSX_ID_GYRO] = { 835 .reg = { 836 .addr = 0x11, 837 .mask = GENMASK(3, 2), 838 }, 839 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 840 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 841 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 842 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 843 .fs_len = 4, 844 }, 845 }, 846 .irq_config = { 847 .irq1 = { 848 .addr = 0x0d, 849 .mask = BIT(3), 850 }, 851 .irq2 = { 852 .addr = 0x0e, 853 .mask = BIT(3), 854 }, 855 .lir = { 856 .addr = 0x56, 857 .mask = BIT(0), 858 }, 859 .clear_on_read = { 860 .addr = 0x56, 861 .mask = BIT(6), 862 }, 863 .irq1_func = { 864 .addr = 0x5e, 865 .mask = BIT(5), 866 }, 867 .irq2_func = { 868 .addr = 0x5f, 869 .mask = BIT(5), 870 }, 871 }, 872 .batch = { 873 [ST_LSM6DSX_ID_ACC] = { 874 .addr = 0x09, 875 .mask = GENMASK(3, 0), 876 }, 877 [ST_LSM6DSX_ID_GYRO] = { 878 .addr = 0x09, 879 .mask = GENMASK(7, 4), 880 }, 881 }, 882 .fifo_ops = { 883 .update_fifo = st_lsm6dsx_update_fifo, 884 .read_fifo = st_lsm6dsx_read_tagged_fifo, 885 .fifo_th = { 886 .addr = 0x07, 887 .mask = GENMASK(8, 0), 888 }, 889 .fifo_diff = { 890 .addr = 0x3a, 891 .mask = GENMASK(9, 0), 892 }, 893 .th_wl = 1, 894 }, 895 .ts_settings = { 896 .timer_en = { 897 .addr = 0x19, 898 .mask = BIT(5), 899 }, 900 .decimator = { 901 .addr = 0x0a, 902 .mask = GENMASK(7, 6), 903 }, 904 }, 905 .event_settings = { 906 .enable_reg = { 907 .addr = 0x58, 908 .mask = BIT(7), 909 }, 910 .wakeup_reg = { 911 .addr = 0x5B, 912 .mask = GENMASK(5, 0), 913 }, 914 .wakeup_src_reg = 0x1b, 915 .wakeup_src_status_mask = BIT(3), 916 .wakeup_src_z_mask = BIT(0), 917 .wakeup_src_y_mask = BIT(1), 918 .wakeup_src_x_mask = BIT(2), 919 }, 920 }, 921 { 922 .wai = 0x6b, 923 .reset_addr = 0x12, 924 .max_fifo_size = 512, 925 .id = { 926 { 927 .hw_id = ST_LSM6DSR_ID, 928 .name = ST_LSM6DSR_DEV_NAME, 929 }, { 930 .hw_id = ST_ISM330DHCX_ID, 931 .name = ST_ISM330DHCX_DEV_NAME, 932 }, 933 }, 934 .channels = { 935 [ST_LSM6DSX_ID_ACC] = { 936 .chan = st_lsm6dsx_acc_channels, 937 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 938 }, 939 [ST_LSM6DSX_ID_GYRO] = { 940 .chan = st_lsm6dsx_gyro_channels, 941 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 942 }, 943 }, 944 .odr_table = { 945 [ST_LSM6DSX_ID_ACC] = { 946 .reg = { 947 .addr = 0x10, 948 .mask = GENMASK(7, 4), 949 }, 950 .odr_avl[0] = { 13, 0x01 }, 951 .odr_avl[1] = { 26, 0x02 }, 952 .odr_avl[2] = { 52, 0x03 }, 953 .odr_avl[3] = { 104, 0x04 }, 954 .odr_avl[4] = { 208, 0x05 }, 955 .odr_avl[5] = { 416, 0x06 }, 956 }, 957 [ST_LSM6DSX_ID_GYRO] = { 958 .reg = { 959 .addr = 0x11, 960 .mask = GENMASK(7, 4), 961 }, 962 .odr_avl[0] = { 13, 0x01 }, 963 .odr_avl[1] = { 26, 0x02 }, 964 .odr_avl[2] = { 52, 0x03 }, 965 .odr_avl[3] = { 104, 0x04 }, 966 .odr_avl[4] = { 208, 0x05 }, 967 .odr_avl[5] = { 416, 0x06 }, 968 }, 969 }, 970 .fs_table = { 971 [ST_LSM6DSX_ID_ACC] = { 972 .reg = { 973 .addr = 0x10, 974 .mask = GENMASK(3, 2), 975 }, 976 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 977 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 978 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 979 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 980 .fs_len = 4, 981 }, 982 [ST_LSM6DSX_ID_GYRO] = { 983 .reg = { 984 .addr = 0x11, 985 .mask = GENMASK(3, 2), 986 }, 987 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 988 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 989 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 990 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 991 .fs_len = 4, 992 }, 993 }, 994 .irq_config = { 995 .irq1 = { 996 .addr = 0x0d, 997 .mask = BIT(3), 998 }, 999 .irq2 = { 1000 .addr = 0x0e, 1001 .mask = BIT(3), 1002 }, 1003 .lir = { 1004 .addr = 0x56, 1005 .mask = BIT(0), 1006 }, 1007 .clear_on_read = { 1008 .addr = 0x56, 1009 .mask = BIT(6), 1010 }, 1011 .irq1_func = { 1012 .addr = 0x5e, 1013 .mask = BIT(5), 1014 }, 1015 .irq2_func = { 1016 .addr = 0x5f, 1017 .mask = BIT(5), 1018 }, 1019 }, 1020 .batch = { 1021 [ST_LSM6DSX_ID_ACC] = { 1022 .addr = 0x09, 1023 .mask = GENMASK(3, 0), 1024 }, 1025 [ST_LSM6DSX_ID_GYRO] = { 1026 .addr = 0x09, 1027 .mask = GENMASK(7, 4), 1028 }, 1029 }, 1030 .fifo_ops = { 1031 .update_fifo = st_lsm6dsx_update_fifo, 1032 .read_fifo = st_lsm6dsx_read_tagged_fifo, 1033 .fifo_th = { 1034 .addr = 0x07, 1035 .mask = GENMASK(8, 0), 1036 }, 1037 .fifo_diff = { 1038 .addr = 0x3a, 1039 .mask = GENMASK(9, 0), 1040 }, 1041 .th_wl = 1, 1042 }, 1043 .ts_settings = { 1044 .timer_en = { 1045 .addr = 0x19, 1046 .mask = BIT(5), 1047 }, 1048 .decimator = { 1049 .addr = 0x0a, 1050 .mask = GENMASK(7, 6), 1051 }, 1052 }, 1053 .shub_settings = { 1054 .page_mux = { 1055 .addr = 0x01, 1056 .mask = BIT(6), 1057 }, 1058 .master_en = { 1059 .addr = 0x14, 1060 .mask = BIT(2), 1061 }, 1062 .pullup_en = { 1063 .addr = 0x14, 1064 .mask = BIT(3), 1065 }, 1066 .aux_sens = { 1067 .addr = 0x14, 1068 .mask = GENMASK(1, 0), 1069 }, 1070 .wr_once = { 1071 .addr = 0x14, 1072 .mask = BIT(6), 1073 }, 1074 .shub_out = 0x02, 1075 .slv0_addr = 0x15, 1076 .dw_slv0_addr = 0x21, 1077 .batch_en = BIT(3), 1078 }, 1079 .event_settings = { 1080 .enable_reg = { 1081 .addr = 0x58, 1082 .mask = BIT(7), 1083 }, 1084 .wakeup_reg = { 1085 .addr = 0x5B, 1086 .mask = GENMASK(5, 0), 1087 }, 1088 .wakeup_src_reg = 0x1b, 1089 .wakeup_src_status_mask = BIT(3), 1090 .wakeup_src_z_mask = BIT(0), 1091 .wakeup_src_y_mask = BIT(1), 1092 .wakeup_src_x_mask = BIT(2), 1093 } 1094 }, 1095 }; 1096 1097 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable) 1098 { 1099 const struct st_lsm6dsx_shub_settings *hub_settings; 1100 unsigned int data; 1101 int err; 1102 1103 hub_settings = &hw->settings->shub_settings; 1104 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask); 1105 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr, 1106 hub_settings->page_mux.mask, data); 1107 usleep_range(100, 150); 1108 1109 return err; 1110 } 1111 1112 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id, 1113 const char **name) 1114 { 1115 int err, i, j, data; 1116 1117 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) { 1118 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) { 1119 if (id == st_lsm6dsx_sensor_settings[i].id[j].hw_id) 1120 break; 1121 } 1122 if (j < ST_LSM6DSX_MAX_ID) 1123 break; 1124 } 1125 1126 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) { 1127 dev_err(hw->dev, "unsupported hw id [%02x]\n", id); 1128 return -ENODEV; 1129 } 1130 1131 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data); 1132 if (err < 0) { 1133 dev_err(hw->dev, "failed to read whoami register\n"); 1134 return err; 1135 } 1136 1137 if (data != st_lsm6dsx_sensor_settings[i].wai) { 1138 dev_err(hw->dev, "unsupported whoami [%02x]\n", data); 1139 return -ENODEV; 1140 } 1141 1142 *name = st_lsm6dsx_sensor_settings[i].id[j].name; 1143 hw->settings = &st_lsm6dsx_sensor_settings[i]; 1144 1145 return 0; 1146 } 1147 1148 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor, 1149 u32 gain) 1150 { 1151 const struct st_lsm6dsx_fs_table_entry *fs_table; 1152 unsigned int data; 1153 int i, err; 1154 1155 fs_table = &sensor->hw->settings->fs_table[sensor->id]; 1156 for (i = 0; i < fs_table->fs_len; i++) { 1157 if (fs_table->fs_avl[i].gain == gain) 1158 break; 1159 } 1160 1161 if (i == fs_table->fs_len) 1162 return -EINVAL; 1163 1164 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val, 1165 fs_table->reg.mask); 1166 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr, 1167 fs_table->reg.mask, data); 1168 if (err < 0) 1169 return err; 1170 1171 sensor->gain = gain; 1172 1173 return 0; 1174 } 1175 1176 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u16 odr, u8 *val) 1177 { 1178 const struct st_lsm6dsx_odr_table_entry *odr_table; 1179 int i; 1180 1181 odr_table = &sensor->hw->settings->odr_table[sensor->id]; 1182 for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) 1183 /* 1184 * ext devices can run at different odr respect to 1185 * accel sensor 1186 */ 1187 if (odr_table->odr_avl[i].hz >= odr) 1188 break; 1189 1190 if (i == ST_LSM6DSX_ODR_LIST_SIZE) 1191 return -EINVAL; 1192 1193 *val = odr_table->odr_avl[i].val; 1194 1195 return 0; 1196 } 1197 1198 static u16 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u16 odr, 1199 enum st_lsm6dsx_sensor_id id) 1200 { 1201 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]); 1202 1203 if (odr > 0) { 1204 if (hw->enable_mask & BIT(id)) 1205 return max_t(u16, ref->odr, odr); 1206 else 1207 return odr; 1208 } else { 1209 return (hw->enable_mask & BIT(id)) ? ref->odr : 0; 1210 } 1211 } 1212 1213 static int st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u16 req_odr) 1214 { 1215 struct st_lsm6dsx_sensor *ref_sensor = sensor; 1216 struct st_lsm6dsx_hw *hw = sensor->hw; 1217 const struct st_lsm6dsx_reg *reg; 1218 unsigned int data; 1219 u8 val = 0; 1220 int err; 1221 1222 switch (sensor->id) { 1223 case ST_LSM6DSX_ID_EXT0: 1224 case ST_LSM6DSX_ID_EXT1: 1225 case ST_LSM6DSX_ID_EXT2: 1226 case ST_LSM6DSX_ID_ACC: { 1227 u16 odr; 1228 int i; 1229 1230 /* 1231 * i2c embedded controller relies on the accelerometer sensor as 1232 * bus read/write trigger so we need to enable accel device 1233 * at odr = max(accel_odr, ext_odr) in order to properly 1234 * communicate with i2c slave devices 1235 */ 1236 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]); 1237 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) { 1238 if (!hw->iio_devs[i] || i == sensor->id) 1239 continue; 1240 1241 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i); 1242 if (odr != req_odr) 1243 /* device already configured */ 1244 return 0; 1245 } 1246 break; 1247 } 1248 default: 1249 break; 1250 } 1251 1252 if (req_odr > 0) { 1253 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val); 1254 if (err < 0) 1255 return err; 1256 } 1257 1258 reg = &hw->settings->odr_table[ref_sensor->id].reg; 1259 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask); 1260 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); 1261 } 1262 1263 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 1264 bool enable) 1265 { 1266 struct st_lsm6dsx_hw *hw = sensor->hw; 1267 u16 odr = enable ? sensor->odr : 0; 1268 int err; 1269 1270 err = st_lsm6dsx_set_odr(sensor, odr); 1271 if (err < 0) 1272 return err; 1273 1274 if (enable) 1275 hw->enable_mask |= BIT(sensor->id); 1276 else 1277 hw->enable_mask &= ~BIT(sensor->id); 1278 1279 return 0; 1280 } 1281 1282 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor, 1283 u8 addr, int *val) 1284 { 1285 struct st_lsm6dsx_hw *hw = sensor->hw; 1286 int err, delay; 1287 __le16 data; 1288 1289 err = st_lsm6dsx_sensor_set_enable(sensor, true); 1290 if (err < 0) 1291 return err; 1292 1293 delay = 1000000 / sensor->odr; 1294 usleep_range(delay, 2 * delay); 1295 1296 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data)); 1297 if (err < 0) 1298 return err; 1299 1300 if (!hw->enable_event) 1301 st_lsm6dsx_sensor_set_enable(sensor, false); 1302 1303 *val = (s16)le16_to_cpu(data); 1304 1305 return IIO_VAL_INT; 1306 } 1307 1308 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev, 1309 struct iio_chan_spec const *ch, 1310 int *val, int *val2, long mask) 1311 { 1312 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1313 int ret; 1314 1315 switch (mask) { 1316 case IIO_CHAN_INFO_RAW: 1317 ret = iio_device_claim_direct_mode(iio_dev); 1318 if (ret) 1319 break; 1320 1321 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val); 1322 iio_device_release_direct_mode(iio_dev); 1323 break; 1324 case IIO_CHAN_INFO_SAMP_FREQ: 1325 *val = sensor->odr; 1326 ret = IIO_VAL_INT; 1327 break; 1328 case IIO_CHAN_INFO_SCALE: 1329 *val = 0; 1330 *val2 = sensor->gain; 1331 ret = IIO_VAL_INT_PLUS_MICRO; 1332 break; 1333 default: 1334 ret = -EINVAL; 1335 break; 1336 } 1337 1338 return ret; 1339 } 1340 1341 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev, 1342 struct iio_chan_spec const *chan, 1343 int val, int val2, long mask) 1344 { 1345 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1346 int err; 1347 1348 err = iio_device_claim_direct_mode(iio_dev); 1349 if (err) 1350 return err; 1351 1352 switch (mask) { 1353 case IIO_CHAN_INFO_SCALE: 1354 err = st_lsm6dsx_set_full_scale(sensor, val2); 1355 break; 1356 case IIO_CHAN_INFO_SAMP_FREQ: { 1357 u8 data; 1358 1359 err = st_lsm6dsx_check_odr(sensor, val, &data); 1360 if (!err) 1361 sensor->odr = val; 1362 break; 1363 } 1364 default: 1365 err = -EINVAL; 1366 break; 1367 } 1368 1369 iio_device_release_direct_mode(iio_dev); 1370 1371 return err; 1372 } 1373 1374 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, int state) 1375 { 1376 int err; 1377 u8 enable = 0; 1378 1379 if (!hw->settings->irq_config.irq1_func.addr) 1380 return -ENOTSUPP; 1381 1382 enable = state ? hw->settings->event_settings.enable_reg.mask : 0; 1383 1384 err = regmap_update_bits(hw->regmap, 1385 hw->settings->event_settings.enable_reg.addr, 1386 hw->settings->event_settings.enable_reg.mask, 1387 enable); 1388 if (err < 0) 1389 return err; 1390 1391 enable = state ? hw->irq_routing->mask : 0; 1392 1393 /* Enable wakeup interrupt */ 1394 return regmap_update_bits(hw->regmap, hw->irq_routing->addr, 1395 hw->irq_routing->mask, enable); 1396 } 1397 1398 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev, 1399 const struct iio_chan_spec *chan, 1400 enum iio_event_type type, 1401 enum iio_event_direction dir, 1402 enum iio_event_info info, 1403 int *val, int *val2) 1404 { 1405 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1406 struct st_lsm6dsx_hw *hw = sensor->hw; 1407 1408 if (type != IIO_EV_TYPE_THRESH) 1409 return -EINVAL; 1410 1411 *val2 = 0; 1412 *val = hw->event_threshold; 1413 1414 return IIO_VAL_INT; 1415 } 1416 1417 static int st_lsm6dsx_write_event(struct iio_dev *iio_dev, 1418 const struct iio_chan_spec *chan, 1419 enum iio_event_type type, 1420 enum iio_event_direction dir, 1421 enum iio_event_info info, 1422 int val, int val2) 1423 { 1424 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1425 struct st_lsm6dsx_hw *hw = sensor->hw; 1426 int err; 1427 1428 if (type != IIO_EV_TYPE_THRESH) 1429 return -EINVAL; 1430 1431 if (val < 0 || val > 31) 1432 return -EINVAL; 1433 1434 err = regmap_update_bits(hw->regmap, 1435 hw->settings->event_settings.wakeup_reg.addr, 1436 hw->settings->event_settings.wakeup_reg.mask, 1437 val); 1438 if (err) 1439 return -EINVAL; 1440 1441 hw->event_threshold = val; 1442 1443 return 0; 1444 } 1445 1446 static int st_lsm6dsx_read_event_config(struct iio_dev *iio_dev, 1447 const struct iio_chan_spec *chan, 1448 enum iio_event_type type, 1449 enum iio_event_direction dir) 1450 { 1451 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1452 struct st_lsm6dsx_hw *hw = sensor->hw; 1453 1454 if (type != IIO_EV_TYPE_THRESH) 1455 return -EINVAL; 1456 1457 return !!(hw->enable_event & BIT(chan->channel2)); 1458 } 1459 1460 static int st_lsm6dsx_write_event_config(struct iio_dev *iio_dev, 1461 const struct iio_chan_spec *chan, 1462 enum iio_event_type type, 1463 enum iio_event_direction dir, 1464 int state) 1465 { 1466 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1467 struct st_lsm6dsx_hw *hw = sensor->hw; 1468 u8 enable_event; 1469 int err = 0; 1470 1471 if (type != IIO_EV_TYPE_THRESH) 1472 return -EINVAL; 1473 1474 if (state) { 1475 enable_event = hw->enable_event | BIT(chan->channel2); 1476 1477 /* do not enable events if they are already enabled */ 1478 if (hw->enable_event) 1479 goto out; 1480 } else { 1481 enable_event = hw->enable_event & ~BIT(chan->channel2); 1482 1483 /* only turn off sensor if no events is enabled */ 1484 if (enable_event) 1485 goto out; 1486 } 1487 1488 /* stop here if no changes have been made */ 1489 if (hw->enable_event == enable_event) 1490 return 0; 1491 1492 err = st_lsm6dsx_event_setup(hw, state); 1493 if (err < 0) 1494 return err; 1495 1496 err = st_lsm6dsx_sensor_set_enable(sensor, state); 1497 if (err < 0) 1498 return err; 1499 1500 out: 1501 hw->enable_event = enable_event; 1502 1503 return 0; 1504 } 1505 1506 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val) 1507 { 1508 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1509 struct st_lsm6dsx_hw *hw = sensor->hw; 1510 int err; 1511 1512 if (val < 1 || val > hw->settings->max_fifo_size) 1513 return -EINVAL; 1514 1515 mutex_lock(&hw->conf_lock); 1516 1517 err = st_lsm6dsx_update_watermark(sensor, val); 1518 1519 mutex_unlock(&hw->conf_lock); 1520 1521 if (err < 0) 1522 return err; 1523 1524 sensor->watermark = val; 1525 1526 return 0; 1527 } 1528 1529 static ssize_t 1530 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev, 1531 struct device_attribute *attr, 1532 char *buf) 1533 { 1534 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev)); 1535 enum st_lsm6dsx_sensor_id id = sensor->id; 1536 struct st_lsm6dsx_hw *hw = sensor->hw; 1537 int i, len = 0; 1538 1539 for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) 1540 len += scnprintf(buf + len, PAGE_SIZE - len, "%d ", 1541 hw->settings->odr_table[id].odr_avl[i].hz); 1542 buf[len - 1] = '\n'; 1543 1544 return len; 1545 } 1546 1547 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev, 1548 struct device_attribute *attr, 1549 char *buf) 1550 { 1551 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev)); 1552 const struct st_lsm6dsx_fs_table_entry *fs_table; 1553 struct st_lsm6dsx_hw *hw = sensor->hw; 1554 int i, len = 0; 1555 1556 fs_table = &hw->settings->fs_table[sensor->id]; 1557 for (i = 0; i < fs_table->fs_len; i++) 1558 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ", 1559 fs_table->fs_avl[i].gain); 1560 buf[len - 1] = '\n'; 1561 1562 return len; 1563 } 1564 1565 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail); 1566 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444, 1567 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 1568 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444, 1569 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 1570 1571 static struct attribute *st_lsm6dsx_acc_attributes[] = { 1572 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 1573 &iio_dev_attr_in_accel_scale_available.dev_attr.attr, 1574 NULL, 1575 }; 1576 1577 static const struct attribute_group st_lsm6dsx_acc_attribute_group = { 1578 .attrs = st_lsm6dsx_acc_attributes, 1579 }; 1580 1581 static const struct iio_info st_lsm6dsx_acc_info = { 1582 .attrs = &st_lsm6dsx_acc_attribute_group, 1583 .read_raw = st_lsm6dsx_read_raw, 1584 .write_raw = st_lsm6dsx_write_raw, 1585 .read_event_value = st_lsm6dsx_read_event, 1586 .write_event_value = st_lsm6dsx_write_event, 1587 .read_event_config = st_lsm6dsx_read_event_config, 1588 .write_event_config = st_lsm6dsx_write_event_config, 1589 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 1590 }; 1591 1592 static struct attribute *st_lsm6dsx_gyro_attributes[] = { 1593 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 1594 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr, 1595 NULL, 1596 }; 1597 1598 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = { 1599 .attrs = st_lsm6dsx_gyro_attributes, 1600 }; 1601 1602 static const struct iio_info st_lsm6dsx_gyro_info = { 1603 .attrs = &st_lsm6dsx_gyro_attribute_group, 1604 .read_raw = st_lsm6dsx_read_raw, 1605 .write_raw = st_lsm6dsx_write_raw, 1606 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 1607 }; 1608 1609 static int st_lsm6dsx_of_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin) 1610 { 1611 struct device_node *np = hw->dev->of_node; 1612 1613 if (!np) 1614 return -EINVAL; 1615 1616 return of_property_read_u32(np, "st,drdy-int-pin", drdy_pin); 1617 } 1618 1619 static int 1620 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, 1621 const struct st_lsm6dsx_reg **drdy_reg) 1622 { 1623 int err = 0, drdy_pin; 1624 1625 if (st_lsm6dsx_of_get_drdy_pin(hw, &drdy_pin) < 0) { 1626 struct st_sensors_platform_data *pdata; 1627 struct device *dev = hw->dev; 1628 1629 pdata = (struct st_sensors_platform_data *)dev->platform_data; 1630 drdy_pin = pdata ? pdata->drdy_int_pin : 1; 1631 } 1632 1633 switch (drdy_pin) { 1634 case 1: 1635 hw->irq_routing = &hw->settings->irq_config.irq1_func; 1636 *drdy_reg = &hw->settings->irq_config.irq1; 1637 break; 1638 case 2: 1639 hw->irq_routing = &hw->settings->irq_config.irq2_func; 1640 *drdy_reg = &hw->settings->irq_config.irq2; 1641 break; 1642 default: 1643 dev_err(hw->dev, "unsupported data ready pin\n"); 1644 err = -EINVAL; 1645 break; 1646 } 1647 1648 return err; 1649 } 1650 1651 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw) 1652 { 1653 const struct st_lsm6dsx_shub_settings *hub_settings; 1654 struct device_node *np = hw->dev->of_node; 1655 struct st_sensors_platform_data *pdata; 1656 unsigned int data; 1657 int err = 0; 1658 1659 hub_settings = &hw->settings->shub_settings; 1660 1661 pdata = (struct st_sensors_platform_data *)hw->dev->platform_data; 1662 if ((np && of_property_read_bool(np, "st,pullups")) || 1663 (pdata && pdata->pullups)) { 1664 err = st_lsm6dsx_set_page(hw, true); 1665 if (err < 0) 1666 return err; 1667 1668 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask); 1669 err = regmap_update_bits(hw->regmap, 1670 hub_settings->pullup_en.addr, 1671 hub_settings->pullup_en.mask, data); 1672 1673 st_lsm6dsx_set_page(hw, false); 1674 1675 if (err < 0) 1676 return err; 1677 } 1678 1679 if (hub_settings->aux_sens.addr) { 1680 /* configure aux sensors */ 1681 err = st_lsm6dsx_set_page(hw, true); 1682 if (err < 0) 1683 return err; 1684 1685 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask); 1686 err = regmap_update_bits(hw->regmap, 1687 hub_settings->aux_sens.addr, 1688 hub_settings->aux_sens.mask, data); 1689 1690 st_lsm6dsx_set_page(hw, false); 1691 } 1692 1693 return err; 1694 } 1695 1696 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw) 1697 { 1698 const struct st_lsm6dsx_hw_ts_settings *ts_settings; 1699 int err, val; 1700 1701 ts_settings = &hw->settings->ts_settings; 1702 /* enable hw timestamp generation if necessary */ 1703 if (ts_settings->timer_en.addr) { 1704 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask); 1705 err = regmap_update_bits(hw->regmap, 1706 ts_settings->timer_en.addr, 1707 ts_settings->timer_en.mask, val); 1708 if (err < 0) 1709 return err; 1710 } 1711 1712 /* enable high resolution for hw ts timer if necessary */ 1713 if (ts_settings->hr_timer.addr) { 1714 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask); 1715 err = regmap_update_bits(hw->regmap, 1716 ts_settings->hr_timer.addr, 1717 ts_settings->hr_timer.mask, val); 1718 if (err < 0) 1719 return err; 1720 } 1721 1722 /* enable ts queueing in FIFO if necessary */ 1723 if (ts_settings->fifo_en.addr) { 1724 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask); 1725 err = regmap_update_bits(hw->regmap, 1726 ts_settings->fifo_en.addr, 1727 ts_settings->fifo_en.mask, val); 1728 if (err < 0) 1729 return err; 1730 } 1731 return 0; 1732 } 1733 1734 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw) 1735 { 1736 const struct st_lsm6dsx_reg *reg; 1737 int err; 1738 1739 /* device sw reset */ 1740 err = regmap_update_bits(hw->regmap, hw->settings->reset_addr, 1741 ST_LSM6DSX_REG_RESET_MASK, 1742 FIELD_PREP(ST_LSM6DSX_REG_RESET_MASK, 1)); 1743 if (err < 0) 1744 return err; 1745 1746 msleep(50); 1747 1748 /* reload trimming parameter */ 1749 err = regmap_update_bits(hw->regmap, hw->settings->reset_addr, 1750 ST_LSM6DSX_REG_BOOT_MASK, 1751 FIELD_PREP(ST_LSM6DSX_REG_BOOT_MASK, 1)); 1752 if (err < 0) 1753 return err; 1754 1755 msleep(50); 1756 1757 /* enable Block Data Update */ 1758 err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_BDU_ADDR, 1759 ST_LSM6DSX_REG_BDU_MASK, 1760 FIELD_PREP(ST_LSM6DSX_REG_BDU_MASK, 1)); 1761 if (err < 0) 1762 return err; 1763 1764 /* enable FIFO watermak interrupt */ 1765 err = st_lsm6dsx_get_drdy_reg(hw, ®); 1766 if (err < 0) 1767 return err; 1768 1769 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1770 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1771 if (err < 0) 1772 return err; 1773 1774 /* enable Latched interrupts for device events */ 1775 if (hw->settings->irq_config.lir.addr) { 1776 reg = &hw->settings->irq_config.lir; 1777 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1778 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1779 if (err < 0) 1780 return err; 1781 1782 /* enable clear on read for latched interrupts */ 1783 if (hw->settings->irq_config.clear_on_read.addr) { 1784 reg = &hw->settings->irq_config.clear_on_read; 1785 err = regmap_update_bits(hw->regmap, 1786 reg->addr, reg->mask, 1787 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1788 if (err < 0) 1789 return err; 1790 } 1791 } 1792 1793 err = st_lsm6dsx_init_shub(hw); 1794 if (err < 0) 1795 return err; 1796 1797 return st_lsm6dsx_init_hw_timer(hw); 1798 } 1799 1800 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw, 1801 enum st_lsm6dsx_sensor_id id, 1802 const char *name) 1803 { 1804 struct st_lsm6dsx_sensor *sensor; 1805 struct iio_dev *iio_dev; 1806 1807 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor)); 1808 if (!iio_dev) 1809 return NULL; 1810 1811 iio_dev->modes = INDIO_DIRECT_MODE; 1812 iio_dev->dev.parent = hw->dev; 1813 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks; 1814 iio_dev->channels = hw->settings->channels[id].chan; 1815 iio_dev->num_channels = hw->settings->channels[id].len; 1816 1817 sensor = iio_priv(iio_dev); 1818 sensor->id = id; 1819 sensor->hw = hw; 1820 sensor->odr = hw->settings->odr_table[id].odr_avl[0].hz; 1821 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain; 1822 sensor->watermark = 1; 1823 1824 switch (id) { 1825 case ST_LSM6DSX_ID_ACC: 1826 iio_dev->info = &st_lsm6dsx_acc_info; 1827 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel", 1828 name); 1829 break; 1830 case ST_LSM6DSX_ID_GYRO: 1831 iio_dev->info = &st_lsm6dsx_gyro_info; 1832 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro", 1833 name); 1834 break; 1835 default: 1836 return NULL; 1837 } 1838 iio_dev->name = sensor->name; 1839 1840 return iio_dev; 1841 } 1842 1843 static bool 1844 st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw) 1845 { 1846 const struct st_lsm6dsx_event_settings *event_settings; 1847 int err, data; 1848 s64 timestamp; 1849 1850 if (!hw->enable_event) 1851 return false; 1852 1853 event_settings = &hw->settings->event_settings; 1854 err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg, 1855 &data, sizeof(data)); 1856 if (err < 0) 1857 return false; 1858 1859 timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]); 1860 if ((data & hw->settings->event_settings.wakeup_src_z_mask) && 1861 (hw->enable_event & BIT(IIO_MOD_Z))) 1862 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 1863 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1864 0, 1865 IIO_MOD_Z, 1866 IIO_EV_TYPE_THRESH, 1867 IIO_EV_DIR_EITHER), 1868 timestamp); 1869 1870 if ((data & hw->settings->event_settings.wakeup_src_y_mask) && 1871 (hw->enable_event & BIT(IIO_MOD_Y))) 1872 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 1873 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1874 0, 1875 IIO_MOD_Y, 1876 IIO_EV_TYPE_THRESH, 1877 IIO_EV_DIR_EITHER), 1878 timestamp); 1879 1880 if ((data & hw->settings->event_settings.wakeup_src_x_mask) && 1881 (hw->enable_event & BIT(IIO_MOD_X))) 1882 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 1883 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1884 0, 1885 IIO_MOD_X, 1886 IIO_EV_TYPE_THRESH, 1887 IIO_EV_DIR_EITHER), 1888 timestamp); 1889 1890 return data & event_settings->wakeup_src_status_mask; 1891 } 1892 1893 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private) 1894 { 1895 struct st_lsm6dsx_hw *hw = private; 1896 bool event; 1897 int count; 1898 1899 event = st_lsm6dsx_report_motion_event(hw); 1900 1901 if (!hw->settings->fifo_ops.read_fifo) 1902 return event ? IRQ_HANDLED : IRQ_NONE; 1903 1904 mutex_lock(&hw->fifo_lock); 1905 count = hw->settings->fifo_ops.read_fifo(hw); 1906 mutex_unlock(&hw->fifo_lock); 1907 1908 return count || event ? IRQ_HANDLED : IRQ_NONE; 1909 } 1910 1911 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw) 1912 { 1913 struct st_sensors_platform_data *pdata; 1914 struct device_node *np = hw->dev->of_node; 1915 unsigned long irq_type; 1916 bool irq_active_low; 1917 int err; 1918 1919 irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq)); 1920 1921 switch (irq_type) { 1922 case IRQF_TRIGGER_HIGH: 1923 case IRQF_TRIGGER_RISING: 1924 irq_active_low = false; 1925 break; 1926 case IRQF_TRIGGER_LOW: 1927 case IRQF_TRIGGER_FALLING: 1928 irq_active_low = true; 1929 break; 1930 default: 1931 dev_info(hw->dev, "mode %lx unsupported\n", irq_type); 1932 return -EINVAL; 1933 } 1934 1935 err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_HLACTIVE_ADDR, 1936 ST_LSM6DSX_REG_HLACTIVE_MASK, 1937 FIELD_PREP(ST_LSM6DSX_REG_HLACTIVE_MASK, 1938 irq_active_low)); 1939 if (err < 0) 1940 return err; 1941 1942 pdata = (struct st_sensors_platform_data *)hw->dev->platform_data; 1943 if ((np && of_property_read_bool(np, "drive-open-drain")) || 1944 (pdata && pdata->open_drain)) { 1945 err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_PP_OD_ADDR, 1946 ST_LSM6DSX_REG_PP_OD_MASK, 1947 FIELD_PREP(ST_LSM6DSX_REG_PP_OD_MASK, 1948 1)); 1949 if (err < 0) 1950 return err; 1951 1952 irq_type |= IRQF_SHARED; 1953 } 1954 1955 err = devm_request_threaded_irq(hw->dev, hw->irq, 1956 NULL, 1957 st_lsm6dsx_handler_thread, 1958 irq_type | IRQF_ONESHOT, 1959 "lsm6dsx", hw); 1960 if (err) { 1961 dev_err(hw->dev, "failed to request trigger irq %d\n", 1962 hw->irq); 1963 return err; 1964 } 1965 1966 return 0; 1967 } 1968 1969 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id, 1970 struct regmap *regmap) 1971 { 1972 const struct st_lsm6dsx_shub_settings *hub_settings; 1973 struct st_lsm6dsx_hw *hw; 1974 const char *name = NULL; 1975 int i, err; 1976 1977 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL); 1978 if (!hw) 1979 return -ENOMEM; 1980 1981 dev_set_drvdata(dev, (void *)hw); 1982 1983 mutex_init(&hw->fifo_lock); 1984 mutex_init(&hw->conf_lock); 1985 mutex_init(&hw->page_lock); 1986 1987 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL); 1988 if (!hw->buff) 1989 return -ENOMEM; 1990 1991 hw->dev = dev; 1992 hw->irq = irq; 1993 hw->regmap = regmap; 1994 1995 err = st_lsm6dsx_check_whoami(hw, hw_id, &name); 1996 if (err < 0) 1997 return err; 1998 1999 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) { 2000 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name); 2001 if (!hw->iio_devs[i]) 2002 return -ENOMEM; 2003 } 2004 2005 err = st_lsm6dsx_init_device(hw); 2006 if (err < 0) 2007 return err; 2008 2009 hub_settings = &hw->settings->shub_settings; 2010 if (hub_settings->master_en.addr) { 2011 err = st_lsm6dsx_shub_probe(hw, name); 2012 if (err < 0) 2013 return err; 2014 } 2015 2016 if (hw->irq > 0) { 2017 err = st_lsm6dsx_irq_setup(hw); 2018 if (err < 0) 2019 return err; 2020 2021 err = st_lsm6dsx_fifo_setup(hw); 2022 if (err < 0) 2023 return err; 2024 } 2025 2026 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2027 if (!hw->iio_devs[i]) 2028 continue; 2029 2030 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]); 2031 if (err) 2032 return err; 2033 } 2034 2035 if (dev->of_node && of_property_read_bool(dev->of_node, "wakeup-source")) 2036 device_init_wakeup(dev, true); 2037 2038 return 0; 2039 } 2040 EXPORT_SYMBOL(st_lsm6dsx_probe); 2041 2042 static int __maybe_unused st_lsm6dsx_suspend(struct device *dev) 2043 { 2044 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 2045 struct st_lsm6dsx_sensor *sensor; 2046 int i, err = 0; 2047 2048 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2049 if (!hw->iio_devs[i]) 2050 continue; 2051 2052 sensor = iio_priv(hw->iio_devs[i]); 2053 if (!(hw->enable_mask & BIT(sensor->id))) 2054 continue; 2055 2056 if (device_may_wakeup(dev) && 2057 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) { 2058 /* Enable wake from IRQ */ 2059 enable_irq_wake(hw->irq); 2060 continue; 2061 } 2062 2063 if (sensor->id == ST_LSM6DSX_ID_EXT0 || 2064 sensor->id == ST_LSM6DSX_ID_EXT1 || 2065 sensor->id == ST_LSM6DSX_ID_EXT2) 2066 err = st_lsm6dsx_shub_set_enable(sensor, false); 2067 else 2068 err = st_lsm6dsx_sensor_set_enable(sensor, false); 2069 if (err < 0) 2070 return err; 2071 2072 hw->suspend_mask |= BIT(sensor->id); 2073 } 2074 2075 if (hw->fifo_mode != ST_LSM6DSX_FIFO_BYPASS) 2076 err = st_lsm6dsx_flush_fifo(hw); 2077 2078 return err; 2079 } 2080 2081 static int __maybe_unused st_lsm6dsx_resume(struct device *dev) 2082 { 2083 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 2084 struct st_lsm6dsx_sensor *sensor; 2085 int i, err = 0; 2086 2087 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2088 if (!hw->iio_devs[i]) 2089 continue; 2090 2091 sensor = iio_priv(hw->iio_devs[i]); 2092 if (device_may_wakeup(dev) && 2093 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) 2094 disable_irq_wake(hw->irq); 2095 2096 if (!(hw->suspend_mask & BIT(sensor->id))) 2097 continue; 2098 2099 if (sensor->id == ST_LSM6DSX_ID_EXT0 || 2100 sensor->id == ST_LSM6DSX_ID_EXT1 || 2101 sensor->id == ST_LSM6DSX_ID_EXT2) 2102 err = st_lsm6dsx_shub_set_enable(sensor, true); 2103 else 2104 err = st_lsm6dsx_sensor_set_enable(sensor, true); 2105 if (err < 0) 2106 return err; 2107 2108 hw->suspend_mask &= ~BIT(sensor->id); 2109 } 2110 2111 if (hw->enable_mask) 2112 err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT); 2113 2114 return err; 2115 } 2116 2117 const struct dev_pm_ops st_lsm6dsx_pm_ops = { 2118 SET_SYSTEM_SLEEP_PM_OPS(st_lsm6dsx_suspend, st_lsm6dsx_resume) 2119 }; 2120 EXPORT_SYMBOL(st_lsm6dsx_pm_ops); 2121 2122 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>"); 2123 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); 2124 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver"); 2125 MODULE_LICENSE("GPL v2"); 2126