1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * STMicroelectronics st_lsm6dsx sensor driver 4 * 5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer 6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial 7 * interface standard output. 8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale 9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of 10 * +-125/+-245/+-500/+-1000/+-2000 dps 11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer 12 * allowing dynamic batching of sensor data. 13 * LSM9DSx series is similar but includes an additional magnetometer, handled 14 * by a different driver. 15 * 16 * Supported sensors: 17 * - LSM6DS3: 18 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416 19 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 20 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 21 * - FIFO size: 8KB 22 * 23 * - LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C: 24 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416 25 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 26 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 27 * - FIFO size: 4KB 28 * 29 * - LSM6DSO/LSM6DSOX/ASM330LHH/LSM6DSR/ISM330DHCX: 30 * - Accelerometer/Gyroscope supported ODR [Hz]: 13, 26, 52, 104, 208, 416 31 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 32 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 33 * - FIFO size: 3KB 34 * 35 * - LSM9DS1: 36 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952 37 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 38 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952 39 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000 40 * - FIFO size: 32 41 * 42 * Copyright 2016 STMicroelectronics Inc. 43 * 44 * Lorenzo Bianconi <lorenzo.bianconi@st.com> 45 * Denis Ciocca <denis.ciocca@st.com> 46 */ 47 48 #include <linux/kernel.h> 49 #include <linux/module.h> 50 #include <linux/delay.h> 51 #include <linux/iio/iio.h> 52 #include <linux/iio/sysfs.h> 53 #include <linux/pm.h> 54 #include <linux/regmap.h> 55 #include <linux/bitfield.h> 56 57 #include <linux/platform_data/st_sensors_pdata.h> 58 59 #include "st_lsm6dsx.h" 60 61 #define ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK BIT(3) 62 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f 63 #define ST_LSM6DSX_REG_RESET_MASK BIT(0) 64 #define ST_LSM6DSX_REG_BOOT_MASK BIT(7) 65 #define ST_LSM6DSX_REG_BDU_ADDR 0x12 66 #define ST_LSM6DSX_REG_BDU_MASK BIT(6) 67 68 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = { 69 ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x28, IIO_MOD_X, 0), 70 ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1), 71 ST_LSM6DSX_CHANNEL(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2), 72 IIO_CHAN_SOFT_TIMESTAMP(3), 73 }; 74 75 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = { 76 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0), 77 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1), 78 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2), 79 IIO_CHAN_SOFT_TIMESTAMP(3), 80 }; 81 82 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = { 83 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0), 84 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1), 85 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2), 86 IIO_CHAN_SOFT_TIMESTAMP(3), 87 }; 88 89 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 90 { 91 .wai = 0x68, 92 .int1_addr = 0x0c, 93 .int2_addr = 0x0d, 94 .reset_addr = 0x22, 95 .max_fifo_size = 32, 96 .id = { 97 { 98 .hw_id = ST_LSM9DS1_ID, 99 .name = ST_LSM9DS1_DEV_NAME, 100 }, 101 }, 102 .channels = { 103 [ST_LSM6DSX_ID_ACC] = { 104 .chan = st_lsm6dsx_acc_channels, 105 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 106 }, 107 [ST_LSM6DSX_ID_GYRO] = { 108 .chan = st_lsm6ds0_gyro_channels, 109 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels), 110 }, 111 }, 112 .odr_table = { 113 [ST_LSM6DSX_ID_ACC] = { 114 .reg = { 115 .addr = 0x20, 116 .mask = GENMASK(7, 5), 117 }, 118 .odr_avl[0] = { 10, 0x01 }, 119 .odr_avl[1] = { 50, 0x02 }, 120 .odr_avl[2] = { 119, 0x03 }, 121 .odr_avl[3] = { 238, 0x04 }, 122 .odr_avl[4] = { 476, 0x05 }, 123 .odr_avl[5] = { 952, 0x06 }, 124 }, 125 [ST_LSM6DSX_ID_GYRO] = { 126 .reg = { 127 .addr = 0x10, 128 .mask = GENMASK(7, 5), 129 }, 130 .odr_avl[0] = { 15, 0x01 }, 131 .odr_avl[1] = { 60, 0x02 }, 132 .odr_avl[2] = { 119, 0x03 }, 133 .odr_avl[3] = { 238, 0x04 }, 134 .odr_avl[4] = { 476, 0x05 }, 135 .odr_avl[5] = { 952, 0x06 }, 136 }, 137 }, 138 .fs_table = { 139 [ST_LSM6DSX_ID_ACC] = { 140 .reg = { 141 .addr = 0x20, 142 .mask = GENMASK(4, 3), 143 }, 144 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 145 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 146 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 147 .fs_avl[3] = { IIO_G_TO_M_S_2(732), 0x1 }, 148 }, 149 [ST_LSM6DSX_ID_GYRO] = { 150 .reg = { 151 .addr = 0x10, 152 .mask = GENMASK(4, 3), 153 }, 154 .fs_avl[0] = { IIO_DEGREE_TO_RAD(245), 0x0 }, 155 .fs_avl[1] = { IIO_DEGREE_TO_RAD(500), 0x1 }, 156 .fs_avl[2] = { IIO_DEGREE_TO_RAD(2000), 0x3 }, 157 }, 158 }, 159 }, 160 { 161 .wai = 0x69, 162 .int1_addr = 0x0d, 163 .int2_addr = 0x0e, 164 .reset_addr = 0x12, 165 .max_fifo_size = 1365, 166 .id = { 167 { 168 .hw_id = ST_LSM6DS3_ID, 169 .name = ST_LSM6DS3_DEV_NAME, 170 }, 171 }, 172 .channels = { 173 [ST_LSM6DSX_ID_ACC] = { 174 .chan = st_lsm6dsx_acc_channels, 175 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 176 }, 177 [ST_LSM6DSX_ID_GYRO] = { 178 .chan = st_lsm6dsx_gyro_channels, 179 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 180 }, 181 }, 182 .odr_table = { 183 [ST_LSM6DSX_ID_ACC] = { 184 .reg = { 185 .addr = 0x10, 186 .mask = GENMASK(7, 4), 187 }, 188 .odr_avl[0] = { 13, 0x01 }, 189 .odr_avl[1] = { 26, 0x02 }, 190 .odr_avl[2] = { 52, 0x03 }, 191 .odr_avl[3] = { 104, 0x04 }, 192 .odr_avl[4] = { 208, 0x05 }, 193 .odr_avl[5] = { 416, 0x06 }, 194 }, 195 [ST_LSM6DSX_ID_GYRO] = { 196 .reg = { 197 .addr = 0x11, 198 .mask = GENMASK(7, 4), 199 }, 200 .odr_avl[0] = { 13, 0x01 }, 201 .odr_avl[1] = { 26, 0x02 }, 202 .odr_avl[2] = { 52, 0x03 }, 203 .odr_avl[3] = { 104, 0x04 }, 204 .odr_avl[4] = { 208, 0x05 }, 205 .odr_avl[5] = { 416, 0x06 }, 206 }, 207 }, 208 .fs_table = { 209 [ST_LSM6DSX_ID_ACC] = { 210 .reg = { 211 .addr = 0x10, 212 .mask = GENMASK(3, 2), 213 }, 214 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 215 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 216 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 217 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 218 }, 219 [ST_LSM6DSX_ID_GYRO] = { 220 .reg = { 221 .addr = 0x11, 222 .mask = GENMASK(3, 2), 223 }, 224 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 225 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 226 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 227 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 228 }, 229 }, 230 .decimator = { 231 [ST_LSM6DSX_ID_ACC] = { 232 .addr = 0x08, 233 .mask = GENMASK(2, 0), 234 }, 235 [ST_LSM6DSX_ID_GYRO] = { 236 .addr = 0x08, 237 .mask = GENMASK(5, 3), 238 }, 239 }, 240 .lir = { 241 .addr = 0x58, 242 .mask = BIT(0), 243 }, 244 .fifo_ops = { 245 .update_fifo = st_lsm6dsx_update_fifo, 246 .read_fifo = st_lsm6dsx_read_fifo, 247 .fifo_th = { 248 .addr = 0x06, 249 .mask = GENMASK(11, 0), 250 }, 251 .fifo_diff = { 252 .addr = 0x3a, 253 .mask = GENMASK(11, 0), 254 }, 255 .th_wl = 3, /* 1LSB = 2B */ 256 }, 257 .ts_settings = { 258 .timer_en = { 259 .addr = 0x58, 260 .mask = BIT(7), 261 }, 262 .hr_timer = { 263 .addr = 0x5c, 264 .mask = BIT(4), 265 }, 266 .fifo_en = { 267 .addr = 0x07, 268 .mask = BIT(7), 269 }, 270 .decimator = { 271 .addr = 0x09, 272 .mask = GENMASK(5, 3), 273 }, 274 }, 275 }, 276 { 277 .wai = 0x69, 278 .int1_addr = 0x0d, 279 .int2_addr = 0x0e, 280 .reset_addr = 0x12, 281 .max_fifo_size = 682, 282 .id = { 283 { 284 .hw_id = ST_LSM6DS3H_ID, 285 .name = ST_LSM6DS3H_DEV_NAME, 286 }, 287 }, 288 .channels = { 289 [ST_LSM6DSX_ID_ACC] = { 290 .chan = st_lsm6dsx_acc_channels, 291 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 292 }, 293 [ST_LSM6DSX_ID_GYRO] = { 294 .chan = st_lsm6dsx_gyro_channels, 295 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 296 }, 297 }, 298 .odr_table = { 299 [ST_LSM6DSX_ID_ACC] = { 300 .reg = { 301 .addr = 0x10, 302 .mask = GENMASK(7, 4), 303 }, 304 .odr_avl[0] = { 13, 0x01 }, 305 .odr_avl[1] = { 26, 0x02 }, 306 .odr_avl[2] = { 52, 0x03 }, 307 .odr_avl[3] = { 104, 0x04 }, 308 .odr_avl[4] = { 208, 0x05 }, 309 .odr_avl[5] = { 416, 0x06 }, 310 }, 311 [ST_LSM6DSX_ID_GYRO] = { 312 .reg = { 313 .addr = 0x11, 314 .mask = GENMASK(7, 4), 315 }, 316 .odr_avl[0] = { 13, 0x01 }, 317 .odr_avl[1] = { 26, 0x02 }, 318 .odr_avl[2] = { 52, 0x03 }, 319 .odr_avl[3] = { 104, 0x04 }, 320 .odr_avl[4] = { 208, 0x05 }, 321 .odr_avl[5] = { 416, 0x06 }, 322 }, 323 }, 324 .fs_table = { 325 [ST_LSM6DSX_ID_ACC] = { 326 .reg = { 327 .addr = 0x10, 328 .mask = GENMASK(3, 2), 329 }, 330 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 331 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 332 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 333 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 334 }, 335 [ST_LSM6DSX_ID_GYRO] = { 336 .reg = { 337 .addr = 0x11, 338 .mask = GENMASK(3, 2), 339 }, 340 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 341 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 342 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 343 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 344 }, 345 }, 346 .decimator = { 347 [ST_LSM6DSX_ID_ACC] = { 348 .addr = 0x08, 349 .mask = GENMASK(2, 0), 350 }, 351 [ST_LSM6DSX_ID_GYRO] = { 352 .addr = 0x08, 353 .mask = GENMASK(5, 3), 354 }, 355 }, 356 .lir = { 357 .addr = 0x58, 358 .mask = BIT(0), 359 }, 360 .fifo_ops = { 361 .update_fifo = st_lsm6dsx_update_fifo, 362 .read_fifo = st_lsm6dsx_read_fifo, 363 .fifo_th = { 364 .addr = 0x06, 365 .mask = GENMASK(11, 0), 366 }, 367 .fifo_diff = { 368 .addr = 0x3a, 369 .mask = GENMASK(11, 0), 370 }, 371 .th_wl = 3, /* 1LSB = 2B */ 372 }, 373 .ts_settings = { 374 .timer_en = { 375 .addr = 0x58, 376 .mask = BIT(7), 377 }, 378 .hr_timer = { 379 .addr = 0x5c, 380 .mask = BIT(4), 381 }, 382 .fifo_en = { 383 .addr = 0x07, 384 .mask = BIT(7), 385 }, 386 .decimator = { 387 .addr = 0x09, 388 .mask = GENMASK(5, 3), 389 }, 390 }, 391 }, 392 { 393 .wai = 0x6a, 394 .int1_addr = 0x0d, 395 .int2_addr = 0x0e, 396 .reset_addr = 0x12, 397 .max_fifo_size = 682, 398 .id = { 399 { 400 .hw_id = ST_LSM6DSL_ID, 401 .name = ST_LSM6DSL_DEV_NAME, 402 }, { 403 .hw_id = ST_LSM6DSM_ID, 404 .name = ST_LSM6DSM_DEV_NAME, 405 }, { 406 .hw_id = ST_ISM330DLC_ID, 407 .name = ST_ISM330DLC_DEV_NAME, 408 }, { 409 .hw_id = ST_LSM6DS3TRC_ID, 410 .name = ST_LSM6DS3TRC_DEV_NAME, 411 }, 412 }, 413 .channels = { 414 [ST_LSM6DSX_ID_ACC] = { 415 .chan = st_lsm6dsx_acc_channels, 416 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 417 }, 418 [ST_LSM6DSX_ID_GYRO] = { 419 .chan = st_lsm6dsx_gyro_channels, 420 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 421 }, 422 }, 423 .odr_table = { 424 [ST_LSM6DSX_ID_ACC] = { 425 .reg = { 426 .addr = 0x10, 427 .mask = GENMASK(7, 4), 428 }, 429 .odr_avl[0] = { 13, 0x01 }, 430 .odr_avl[1] = { 26, 0x02 }, 431 .odr_avl[2] = { 52, 0x03 }, 432 .odr_avl[3] = { 104, 0x04 }, 433 .odr_avl[4] = { 208, 0x05 }, 434 .odr_avl[5] = { 416, 0x06 }, 435 }, 436 [ST_LSM6DSX_ID_GYRO] = { 437 .reg = { 438 .addr = 0x11, 439 .mask = GENMASK(7, 4), 440 }, 441 .odr_avl[0] = { 13, 0x01 }, 442 .odr_avl[1] = { 26, 0x02 }, 443 .odr_avl[2] = { 52, 0x03 }, 444 .odr_avl[3] = { 104, 0x04 }, 445 .odr_avl[4] = { 208, 0x05 }, 446 .odr_avl[5] = { 416, 0x06 }, 447 }, 448 }, 449 .fs_table = { 450 [ST_LSM6DSX_ID_ACC] = { 451 .reg = { 452 .addr = 0x10, 453 .mask = GENMASK(3, 2), 454 }, 455 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 456 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 457 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 458 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 459 }, 460 [ST_LSM6DSX_ID_GYRO] = { 461 .reg = { 462 .addr = 0x11, 463 .mask = GENMASK(3, 2), 464 }, 465 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 466 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 467 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 468 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 469 }, 470 }, 471 .decimator = { 472 [ST_LSM6DSX_ID_ACC] = { 473 .addr = 0x08, 474 .mask = GENMASK(2, 0), 475 }, 476 [ST_LSM6DSX_ID_GYRO] = { 477 .addr = 0x08, 478 .mask = GENMASK(5, 3), 479 }, 480 }, 481 .lir = { 482 .addr = 0x58, 483 .mask = BIT(0), 484 }, 485 .fifo_ops = { 486 .update_fifo = st_lsm6dsx_update_fifo, 487 .read_fifo = st_lsm6dsx_read_fifo, 488 .fifo_th = { 489 .addr = 0x06, 490 .mask = GENMASK(10, 0), 491 }, 492 .fifo_diff = { 493 .addr = 0x3a, 494 .mask = GENMASK(10, 0), 495 }, 496 .th_wl = 3, /* 1LSB = 2B */ 497 }, 498 .ts_settings = { 499 .timer_en = { 500 .addr = 0x19, 501 .mask = BIT(5), 502 }, 503 .hr_timer = { 504 .addr = 0x5c, 505 .mask = BIT(4), 506 }, 507 .fifo_en = { 508 .addr = 0x07, 509 .mask = BIT(7), 510 }, 511 .decimator = { 512 .addr = 0x09, 513 .mask = GENMASK(5, 3), 514 }, 515 }, 516 }, 517 { 518 .wai = 0x6c, 519 .int1_addr = 0x0d, 520 .int2_addr = 0x0e, 521 .reset_addr = 0x12, 522 .max_fifo_size = 512, 523 .id = { 524 { 525 .hw_id = ST_LSM6DSO_ID, 526 .name = ST_LSM6DSO_DEV_NAME, 527 }, { 528 .hw_id = ST_LSM6DSOX_ID, 529 .name = ST_LSM6DSOX_DEV_NAME, 530 }, 531 }, 532 .channels = { 533 [ST_LSM6DSX_ID_ACC] = { 534 .chan = st_lsm6dsx_acc_channels, 535 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 536 }, 537 [ST_LSM6DSX_ID_GYRO] = { 538 .chan = st_lsm6dsx_gyro_channels, 539 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 540 }, 541 }, 542 .odr_table = { 543 [ST_LSM6DSX_ID_ACC] = { 544 .reg = { 545 .addr = 0x10, 546 .mask = GENMASK(7, 4), 547 }, 548 .odr_avl[0] = { 13, 0x01 }, 549 .odr_avl[1] = { 26, 0x02 }, 550 .odr_avl[2] = { 52, 0x03 }, 551 .odr_avl[3] = { 104, 0x04 }, 552 .odr_avl[4] = { 208, 0x05 }, 553 .odr_avl[5] = { 416, 0x06 }, 554 }, 555 [ST_LSM6DSX_ID_GYRO] = { 556 .reg = { 557 .addr = 0x11, 558 .mask = GENMASK(7, 4), 559 }, 560 .odr_avl[0] = { 13, 0x01 }, 561 .odr_avl[1] = { 26, 0x02 }, 562 .odr_avl[2] = { 52, 0x03 }, 563 .odr_avl[3] = { 104, 0x04 }, 564 .odr_avl[4] = { 208, 0x05 }, 565 .odr_avl[5] = { 416, 0x06 }, 566 }, 567 }, 568 .fs_table = { 569 [ST_LSM6DSX_ID_ACC] = { 570 .reg = { 571 .addr = 0x10, 572 .mask = GENMASK(3, 2), 573 }, 574 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 575 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 576 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 577 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 578 }, 579 [ST_LSM6DSX_ID_GYRO] = { 580 .reg = { 581 .addr = 0x11, 582 .mask = GENMASK(3, 2), 583 }, 584 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 585 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 586 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 587 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 588 }, 589 }, 590 .batch = { 591 [ST_LSM6DSX_ID_ACC] = { 592 .addr = 0x09, 593 .mask = GENMASK(3, 0), 594 }, 595 [ST_LSM6DSX_ID_GYRO] = { 596 .addr = 0x09, 597 .mask = GENMASK(7, 4), 598 }, 599 }, 600 .lir = { 601 .addr = 0x56, 602 .mask = BIT(0), 603 }, 604 .clear_on_read = { 605 .addr = 0x56, 606 .mask = BIT(6), 607 }, 608 .fifo_ops = { 609 .update_fifo = st_lsm6dsx_update_fifo, 610 .read_fifo = st_lsm6dsx_read_tagged_fifo, 611 .fifo_th = { 612 .addr = 0x07, 613 .mask = GENMASK(8, 0), 614 }, 615 .fifo_diff = { 616 .addr = 0x3a, 617 .mask = GENMASK(9, 0), 618 }, 619 .th_wl = 1, 620 }, 621 .ts_settings = { 622 .timer_en = { 623 .addr = 0x19, 624 .mask = BIT(5), 625 }, 626 .decimator = { 627 .addr = 0x0a, 628 .mask = GENMASK(7, 6), 629 }, 630 }, 631 .shub_settings = { 632 .page_mux = { 633 .addr = 0x01, 634 .mask = BIT(6), 635 }, 636 .master_en = { 637 .addr = 0x14, 638 .mask = BIT(2), 639 }, 640 .pullup_en = { 641 .addr = 0x14, 642 .mask = BIT(3), 643 }, 644 .aux_sens = { 645 .addr = 0x14, 646 .mask = GENMASK(1, 0), 647 }, 648 .wr_once = { 649 .addr = 0x14, 650 .mask = BIT(6), 651 }, 652 .shub_out = 0x02, 653 .slv0_addr = 0x15, 654 .dw_slv0_addr = 0x21, 655 .batch_en = BIT(3), 656 } 657 }, 658 { 659 .wai = 0x6b, 660 .int1_addr = 0x0d, 661 .int2_addr = 0x0e, 662 .reset_addr = 0x12, 663 .max_fifo_size = 512, 664 .id = { 665 { 666 .hw_id = ST_ASM330LHH_ID, 667 .name = ST_ASM330LHH_DEV_NAME, 668 }, 669 }, 670 .channels = { 671 [ST_LSM6DSX_ID_ACC] = { 672 .chan = st_lsm6dsx_acc_channels, 673 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 674 }, 675 [ST_LSM6DSX_ID_GYRO] = { 676 .chan = st_lsm6dsx_gyro_channels, 677 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 678 }, 679 }, 680 .odr_table = { 681 [ST_LSM6DSX_ID_ACC] = { 682 .reg = { 683 .addr = 0x10, 684 .mask = GENMASK(7, 4), 685 }, 686 .odr_avl[0] = { 13, 0x01 }, 687 .odr_avl[1] = { 26, 0x02 }, 688 .odr_avl[2] = { 52, 0x03 }, 689 .odr_avl[3] = { 104, 0x04 }, 690 .odr_avl[4] = { 208, 0x05 }, 691 .odr_avl[5] = { 416, 0x06 }, 692 }, 693 [ST_LSM6DSX_ID_GYRO] = { 694 .reg = { 695 .addr = 0x11, 696 .mask = GENMASK(7, 4), 697 }, 698 .odr_avl[0] = { 13, 0x01 }, 699 .odr_avl[1] = { 26, 0x02 }, 700 .odr_avl[2] = { 52, 0x03 }, 701 .odr_avl[3] = { 104, 0x04 }, 702 .odr_avl[4] = { 208, 0x05 }, 703 .odr_avl[5] = { 416, 0x06 }, 704 }, 705 }, 706 .fs_table = { 707 [ST_LSM6DSX_ID_ACC] = { 708 .reg = { 709 .addr = 0x10, 710 .mask = GENMASK(3, 2), 711 }, 712 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 713 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 714 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 715 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 716 }, 717 [ST_LSM6DSX_ID_GYRO] = { 718 .reg = { 719 .addr = 0x11, 720 .mask = GENMASK(3, 2), 721 }, 722 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 723 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 724 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 725 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 726 }, 727 }, 728 .batch = { 729 [ST_LSM6DSX_ID_ACC] = { 730 .addr = 0x09, 731 .mask = GENMASK(3, 0), 732 }, 733 [ST_LSM6DSX_ID_GYRO] = { 734 .addr = 0x09, 735 .mask = GENMASK(7, 4), 736 }, 737 }, 738 .lir = { 739 .addr = 0x56, 740 .mask = BIT(0), 741 }, 742 .clear_on_read = { 743 .addr = 0x56, 744 .mask = BIT(6), 745 }, 746 .fifo_ops = { 747 .update_fifo = st_lsm6dsx_update_fifo, 748 .read_fifo = st_lsm6dsx_read_tagged_fifo, 749 .fifo_th = { 750 .addr = 0x07, 751 .mask = GENMASK(8, 0), 752 }, 753 .fifo_diff = { 754 .addr = 0x3a, 755 .mask = GENMASK(9, 0), 756 }, 757 .th_wl = 1, 758 }, 759 .ts_settings = { 760 .timer_en = { 761 .addr = 0x19, 762 .mask = BIT(5), 763 }, 764 .decimator = { 765 .addr = 0x0a, 766 .mask = GENMASK(7, 6), 767 }, 768 }, 769 }, 770 { 771 .wai = 0x6b, 772 .int1_addr = 0x0d, 773 .int2_addr = 0x0e, 774 .reset_addr = 0x12, 775 .max_fifo_size = 512, 776 .id = { 777 { 778 .hw_id = ST_LSM6DSR_ID, 779 .name = ST_LSM6DSR_DEV_NAME, 780 }, { 781 .hw_id = ST_ISM330DHCX_ID, 782 .name = ST_ISM330DHCX_DEV_NAME, 783 }, 784 }, 785 .channels = { 786 [ST_LSM6DSX_ID_ACC] = { 787 .chan = st_lsm6dsx_acc_channels, 788 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 789 }, 790 [ST_LSM6DSX_ID_GYRO] = { 791 .chan = st_lsm6dsx_gyro_channels, 792 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 793 }, 794 }, 795 .odr_table = { 796 [ST_LSM6DSX_ID_ACC] = { 797 .reg = { 798 .addr = 0x10, 799 .mask = GENMASK(7, 4), 800 }, 801 .odr_avl[0] = { 13, 0x01 }, 802 .odr_avl[1] = { 26, 0x02 }, 803 .odr_avl[2] = { 52, 0x03 }, 804 .odr_avl[3] = { 104, 0x04 }, 805 .odr_avl[4] = { 208, 0x05 }, 806 .odr_avl[5] = { 416, 0x06 }, 807 }, 808 [ST_LSM6DSX_ID_GYRO] = { 809 .reg = { 810 .addr = 0x11, 811 .mask = GENMASK(7, 4), 812 }, 813 .odr_avl[0] = { 13, 0x01 }, 814 .odr_avl[1] = { 26, 0x02 }, 815 .odr_avl[2] = { 52, 0x03 }, 816 .odr_avl[3] = { 104, 0x04 }, 817 .odr_avl[4] = { 208, 0x05 }, 818 .odr_avl[5] = { 416, 0x06 }, 819 }, 820 }, 821 .fs_table = { 822 [ST_LSM6DSX_ID_ACC] = { 823 .reg = { 824 .addr = 0x10, 825 .mask = GENMASK(3, 2), 826 }, 827 .fs_avl[0] = { IIO_G_TO_M_S_2(61), 0x0 }, 828 .fs_avl[1] = { IIO_G_TO_M_S_2(122), 0x2 }, 829 .fs_avl[2] = { IIO_G_TO_M_S_2(244), 0x3 }, 830 .fs_avl[3] = { IIO_G_TO_M_S_2(488), 0x1 }, 831 }, 832 [ST_LSM6DSX_ID_GYRO] = { 833 .reg = { 834 .addr = 0x11, 835 .mask = GENMASK(3, 2), 836 }, 837 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750), 0x0 }, 838 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500), 0x1 }, 839 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000), 0x2 }, 840 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000), 0x3 }, 841 }, 842 }, 843 .batch = { 844 [ST_LSM6DSX_ID_ACC] = { 845 .addr = 0x09, 846 .mask = GENMASK(3, 0), 847 }, 848 [ST_LSM6DSX_ID_GYRO] = { 849 .addr = 0x09, 850 .mask = GENMASK(7, 4), 851 }, 852 }, 853 .lir = { 854 .addr = 0x56, 855 .mask = BIT(0), 856 }, 857 .clear_on_read = { 858 .addr = 0x56, 859 .mask = BIT(6), 860 }, 861 .fifo_ops = { 862 .update_fifo = st_lsm6dsx_update_fifo, 863 .read_fifo = st_lsm6dsx_read_tagged_fifo, 864 .fifo_th = { 865 .addr = 0x07, 866 .mask = GENMASK(8, 0), 867 }, 868 .fifo_diff = { 869 .addr = 0x3a, 870 .mask = GENMASK(9, 0), 871 }, 872 .th_wl = 1, 873 }, 874 .ts_settings = { 875 .timer_en = { 876 .addr = 0x19, 877 .mask = BIT(5), 878 }, 879 .decimator = { 880 .addr = 0x0a, 881 .mask = GENMASK(7, 6), 882 }, 883 }, 884 .shub_settings = { 885 .page_mux = { 886 .addr = 0x01, 887 .mask = BIT(6), 888 }, 889 .master_en = { 890 .addr = 0x14, 891 .mask = BIT(2), 892 }, 893 .pullup_en = { 894 .addr = 0x14, 895 .mask = BIT(3), 896 }, 897 .aux_sens = { 898 .addr = 0x14, 899 .mask = GENMASK(1, 0), 900 }, 901 .wr_once = { 902 .addr = 0x14, 903 .mask = BIT(6), 904 }, 905 .shub_out = 0x02, 906 .slv0_addr = 0x15, 907 .dw_slv0_addr = 0x21, 908 .batch_en = BIT(3), 909 } 910 }, 911 }; 912 913 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable) 914 { 915 const struct st_lsm6dsx_shub_settings *hub_settings; 916 unsigned int data; 917 int err; 918 919 hub_settings = &hw->settings->shub_settings; 920 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask); 921 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr, 922 hub_settings->page_mux.mask, data); 923 usleep_range(100, 150); 924 925 return err; 926 } 927 928 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id, 929 const char **name) 930 { 931 int err, i, j, data; 932 933 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) { 934 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) { 935 if (id == st_lsm6dsx_sensor_settings[i].id[j].hw_id) 936 break; 937 } 938 if (j < ST_LSM6DSX_MAX_ID) 939 break; 940 } 941 942 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) { 943 dev_err(hw->dev, "unsupported hw id [%02x]\n", id); 944 return -ENODEV; 945 } 946 947 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data); 948 if (err < 0) { 949 dev_err(hw->dev, "failed to read whoami register\n"); 950 return err; 951 } 952 953 if (data != st_lsm6dsx_sensor_settings[i].wai) { 954 dev_err(hw->dev, "unsupported whoami [%02x]\n", data); 955 return -ENODEV; 956 } 957 958 *name = st_lsm6dsx_sensor_settings[i].id[j].name; 959 hw->settings = &st_lsm6dsx_sensor_settings[i]; 960 961 return 0; 962 } 963 964 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor, 965 u32 gain) 966 { 967 const struct st_lsm6dsx_fs_table_entry *fs_table; 968 unsigned int data; 969 int i, err; 970 971 fs_table = &sensor->hw->settings->fs_table[sensor->id]; 972 for (i = 0; i < ST_LSM6DSX_FS_LIST_SIZE; i++) 973 if (fs_table->fs_avl[i].gain == gain) 974 break; 975 976 if (i == ST_LSM6DSX_FS_LIST_SIZE) 977 return -EINVAL; 978 979 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val, 980 fs_table->reg.mask); 981 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr, 982 fs_table->reg.mask, data); 983 if (err < 0) 984 return err; 985 986 sensor->gain = gain; 987 988 return 0; 989 } 990 991 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u16 odr, u8 *val) 992 { 993 const struct st_lsm6dsx_odr_table_entry *odr_table; 994 int i; 995 996 odr_table = &sensor->hw->settings->odr_table[sensor->id]; 997 for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) 998 /* 999 * ext devices can run at different odr respect to 1000 * accel sensor 1001 */ 1002 if (odr_table->odr_avl[i].hz >= odr) 1003 break; 1004 1005 if (i == ST_LSM6DSX_ODR_LIST_SIZE) 1006 return -EINVAL; 1007 1008 *val = odr_table->odr_avl[i].val; 1009 1010 return 0; 1011 } 1012 1013 static u16 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u16 odr, 1014 enum st_lsm6dsx_sensor_id id) 1015 { 1016 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]); 1017 1018 if (odr > 0) { 1019 if (hw->enable_mask & BIT(id)) 1020 return max_t(u16, ref->odr, odr); 1021 else 1022 return odr; 1023 } else { 1024 return (hw->enable_mask & BIT(id)) ? ref->odr : 0; 1025 } 1026 } 1027 1028 static int st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u16 req_odr) 1029 { 1030 struct st_lsm6dsx_sensor *ref_sensor = sensor; 1031 struct st_lsm6dsx_hw *hw = sensor->hw; 1032 const struct st_lsm6dsx_reg *reg; 1033 unsigned int data; 1034 u8 val = 0; 1035 int err; 1036 1037 switch (sensor->id) { 1038 case ST_LSM6DSX_ID_EXT0: 1039 case ST_LSM6DSX_ID_EXT1: 1040 case ST_LSM6DSX_ID_EXT2: 1041 case ST_LSM6DSX_ID_ACC: { 1042 u16 odr; 1043 int i; 1044 1045 /* 1046 * i2c embedded controller relies on the accelerometer sensor as 1047 * bus read/write trigger so we need to enable accel device 1048 * at odr = max(accel_odr, ext_odr) in order to properly 1049 * communicate with i2c slave devices 1050 */ 1051 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]); 1052 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) { 1053 if (!hw->iio_devs[i] || i == sensor->id) 1054 continue; 1055 1056 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i); 1057 if (odr != req_odr) 1058 /* device already configured */ 1059 return 0; 1060 } 1061 break; 1062 } 1063 default: 1064 break; 1065 } 1066 1067 if (req_odr > 0) { 1068 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val); 1069 if (err < 0) 1070 return err; 1071 } 1072 1073 reg = &hw->settings->odr_table[ref_sensor->id].reg; 1074 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask); 1075 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); 1076 } 1077 1078 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 1079 bool enable) 1080 { 1081 struct st_lsm6dsx_hw *hw = sensor->hw; 1082 u16 odr = enable ? sensor->odr : 0; 1083 int err; 1084 1085 err = st_lsm6dsx_set_odr(sensor, odr); 1086 if (err < 0) 1087 return err; 1088 1089 if (enable) 1090 hw->enable_mask |= BIT(sensor->id); 1091 else 1092 hw->enable_mask &= ~BIT(sensor->id); 1093 1094 return 0; 1095 } 1096 1097 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor, 1098 u8 addr, int *val) 1099 { 1100 struct st_lsm6dsx_hw *hw = sensor->hw; 1101 int err, delay; 1102 __le16 data; 1103 1104 err = st_lsm6dsx_sensor_set_enable(sensor, true); 1105 if (err < 0) 1106 return err; 1107 1108 delay = 1000000 / sensor->odr; 1109 usleep_range(delay, 2 * delay); 1110 1111 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data)); 1112 if (err < 0) 1113 return err; 1114 1115 st_lsm6dsx_sensor_set_enable(sensor, false); 1116 1117 *val = (s16)le16_to_cpu(data); 1118 1119 return IIO_VAL_INT; 1120 } 1121 1122 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev, 1123 struct iio_chan_spec const *ch, 1124 int *val, int *val2, long mask) 1125 { 1126 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1127 int ret; 1128 1129 switch (mask) { 1130 case IIO_CHAN_INFO_RAW: 1131 ret = iio_device_claim_direct_mode(iio_dev); 1132 if (ret) 1133 break; 1134 1135 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val); 1136 iio_device_release_direct_mode(iio_dev); 1137 break; 1138 case IIO_CHAN_INFO_SAMP_FREQ: 1139 *val = sensor->odr; 1140 ret = IIO_VAL_INT; 1141 break; 1142 case IIO_CHAN_INFO_SCALE: 1143 *val = 0; 1144 *val2 = sensor->gain; 1145 ret = IIO_VAL_INT_PLUS_MICRO; 1146 break; 1147 default: 1148 ret = -EINVAL; 1149 break; 1150 } 1151 1152 return ret; 1153 } 1154 1155 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev, 1156 struct iio_chan_spec const *chan, 1157 int val, int val2, long mask) 1158 { 1159 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1160 int err; 1161 1162 err = iio_device_claim_direct_mode(iio_dev); 1163 if (err) 1164 return err; 1165 1166 switch (mask) { 1167 case IIO_CHAN_INFO_SCALE: 1168 err = st_lsm6dsx_set_full_scale(sensor, val2); 1169 break; 1170 case IIO_CHAN_INFO_SAMP_FREQ: { 1171 u8 data; 1172 1173 err = st_lsm6dsx_check_odr(sensor, val, &data); 1174 if (!err) 1175 sensor->odr = val; 1176 break; 1177 } 1178 default: 1179 err = -EINVAL; 1180 break; 1181 } 1182 1183 iio_device_release_direct_mode(iio_dev); 1184 1185 return err; 1186 } 1187 1188 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val) 1189 { 1190 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1191 struct st_lsm6dsx_hw *hw = sensor->hw; 1192 int err; 1193 1194 if (val < 1 || val > hw->settings->max_fifo_size) 1195 return -EINVAL; 1196 1197 mutex_lock(&hw->conf_lock); 1198 1199 err = st_lsm6dsx_update_watermark(sensor, val); 1200 1201 mutex_unlock(&hw->conf_lock); 1202 1203 if (err < 0) 1204 return err; 1205 1206 sensor->watermark = val; 1207 1208 return 0; 1209 } 1210 1211 static ssize_t 1212 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev, 1213 struct device_attribute *attr, 1214 char *buf) 1215 { 1216 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev)); 1217 enum st_lsm6dsx_sensor_id id = sensor->id; 1218 struct st_lsm6dsx_hw *hw = sensor->hw; 1219 int i, len = 0; 1220 1221 for (i = 0; i < ST_LSM6DSX_ODR_LIST_SIZE; i++) 1222 len += scnprintf(buf + len, PAGE_SIZE - len, "%d ", 1223 hw->settings->odr_table[id].odr_avl[i].hz); 1224 buf[len - 1] = '\n'; 1225 1226 return len; 1227 } 1228 1229 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev, 1230 struct device_attribute *attr, 1231 char *buf) 1232 { 1233 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_get_drvdata(dev)); 1234 const struct st_lsm6dsx_fs_table_entry *fs_table; 1235 enum st_lsm6dsx_sensor_id id = sensor->id; 1236 struct st_lsm6dsx_hw *hw = sensor->hw; 1237 int i, len = 0; 1238 1239 fs_table = &hw->settings->fs_table[id]; 1240 for (i = 0; i < ST_LSM6DSX_FS_LIST_SIZE; i++) { 1241 if (!fs_table->fs_avl[i].gain) 1242 break; 1243 1244 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%06u ", 1245 fs_table->fs_avl[i].gain); 1246 } 1247 buf[len - 1] = '\n'; 1248 1249 return len; 1250 } 1251 1252 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail); 1253 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444, 1254 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 1255 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444, 1256 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 1257 1258 static struct attribute *st_lsm6dsx_acc_attributes[] = { 1259 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 1260 &iio_dev_attr_in_accel_scale_available.dev_attr.attr, 1261 NULL, 1262 }; 1263 1264 static const struct attribute_group st_lsm6dsx_acc_attribute_group = { 1265 .attrs = st_lsm6dsx_acc_attributes, 1266 }; 1267 1268 static const struct iio_info st_lsm6dsx_acc_info = { 1269 .attrs = &st_lsm6dsx_acc_attribute_group, 1270 .read_raw = st_lsm6dsx_read_raw, 1271 .write_raw = st_lsm6dsx_write_raw, 1272 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 1273 }; 1274 1275 static struct attribute *st_lsm6dsx_gyro_attributes[] = { 1276 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 1277 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr, 1278 NULL, 1279 }; 1280 1281 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = { 1282 .attrs = st_lsm6dsx_gyro_attributes, 1283 }; 1284 1285 static const struct iio_info st_lsm6dsx_gyro_info = { 1286 .attrs = &st_lsm6dsx_gyro_attribute_group, 1287 .read_raw = st_lsm6dsx_read_raw, 1288 .write_raw = st_lsm6dsx_write_raw, 1289 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 1290 }; 1291 1292 static int st_lsm6dsx_of_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin) 1293 { 1294 struct device_node *np = hw->dev->of_node; 1295 1296 if (!np) 1297 return -EINVAL; 1298 1299 return of_property_read_u32(np, "st,drdy-int-pin", drdy_pin); 1300 } 1301 1302 static int st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, u8 *drdy_reg) 1303 { 1304 int err = 0, drdy_pin; 1305 1306 if (st_lsm6dsx_of_get_drdy_pin(hw, &drdy_pin) < 0) { 1307 struct st_sensors_platform_data *pdata; 1308 struct device *dev = hw->dev; 1309 1310 pdata = (struct st_sensors_platform_data *)dev->platform_data; 1311 drdy_pin = pdata ? pdata->drdy_int_pin : 1; 1312 } 1313 1314 switch (drdy_pin) { 1315 case 1: 1316 *drdy_reg = hw->settings->int1_addr; 1317 break; 1318 case 2: 1319 *drdy_reg = hw->settings->int2_addr; 1320 break; 1321 default: 1322 dev_err(hw->dev, "unsupported data ready pin\n"); 1323 err = -EINVAL; 1324 break; 1325 } 1326 1327 return err; 1328 } 1329 1330 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw) 1331 { 1332 const struct st_lsm6dsx_shub_settings *hub_settings; 1333 struct device_node *np = hw->dev->of_node; 1334 struct st_sensors_platform_data *pdata; 1335 unsigned int data; 1336 int err = 0; 1337 1338 hub_settings = &hw->settings->shub_settings; 1339 1340 pdata = (struct st_sensors_platform_data *)hw->dev->platform_data; 1341 if ((np && of_property_read_bool(np, "st,pullups")) || 1342 (pdata && pdata->pullups)) { 1343 err = st_lsm6dsx_set_page(hw, true); 1344 if (err < 0) 1345 return err; 1346 1347 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask); 1348 err = regmap_update_bits(hw->regmap, 1349 hub_settings->pullup_en.addr, 1350 hub_settings->pullup_en.mask, data); 1351 1352 st_lsm6dsx_set_page(hw, false); 1353 1354 if (err < 0) 1355 return err; 1356 } 1357 1358 if (hub_settings->aux_sens.addr) { 1359 /* configure aux sensors */ 1360 err = st_lsm6dsx_set_page(hw, true); 1361 if (err < 0) 1362 return err; 1363 1364 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask); 1365 err = regmap_update_bits(hw->regmap, 1366 hub_settings->aux_sens.addr, 1367 hub_settings->aux_sens.mask, data); 1368 1369 st_lsm6dsx_set_page(hw, false); 1370 } 1371 1372 return err; 1373 } 1374 1375 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw) 1376 { 1377 const struct st_lsm6dsx_hw_ts_settings *ts_settings; 1378 int err, val; 1379 1380 ts_settings = &hw->settings->ts_settings; 1381 /* enable hw timestamp generation if necessary */ 1382 if (ts_settings->timer_en.addr) { 1383 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask); 1384 err = regmap_update_bits(hw->regmap, 1385 ts_settings->timer_en.addr, 1386 ts_settings->timer_en.mask, val); 1387 if (err < 0) 1388 return err; 1389 } 1390 1391 /* enable high resolution for hw ts timer if necessary */ 1392 if (ts_settings->hr_timer.addr) { 1393 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask); 1394 err = regmap_update_bits(hw->regmap, 1395 ts_settings->hr_timer.addr, 1396 ts_settings->hr_timer.mask, val); 1397 if (err < 0) 1398 return err; 1399 } 1400 1401 /* enable ts queueing in FIFO if necessary */ 1402 if (ts_settings->fifo_en.addr) { 1403 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask); 1404 err = regmap_update_bits(hw->regmap, 1405 ts_settings->fifo_en.addr, 1406 ts_settings->fifo_en.mask, val); 1407 if (err < 0) 1408 return err; 1409 } 1410 return 0; 1411 } 1412 1413 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw) 1414 { 1415 u8 drdy_int_reg; 1416 int err; 1417 1418 /* device sw reset */ 1419 err = regmap_update_bits(hw->regmap, hw->settings->reset_addr, 1420 ST_LSM6DSX_REG_RESET_MASK, 1421 FIELD_PREP(ST_LSM6DSX_REG_RESET_MASK, 1)); 1422 if (err < 0) 1423 return err; 1424 1425 msleep(50); 1426 1427 /* reload trimming parameter */ 1428 err = regmap_update_bits(hw->regmap, hw->settings->reset_addr, 1429 ST_LSM6DSX_REG_BOOT_MASK, 1430 FIELD_PREP(ST_LSM6DSX_REG_BOOT_MASK, 1)); 1431 if (err < 0) 1432 return err; 1433 1434 msleep(50); 1435 1436 /* enable Block Data Update */ 1437 err = regmap_update_bits(hw->regmap, ST_LSM6DSX_REG_BDU_ADDR, 1438 ST_LSM6DSX_REG_BDU_MASK, 1439 FIELD_PREP(ST_LSM6DSX_REG_BDU_MASK, 1)); 1440 if (err < 0) 1441 return err; 1442 1443 /* enable FIFO watermak interrupt */ 1444 err = st_lsm6dsx_get_drdy_reg(hw, &drdy_int_reg); 1445 if (err < 0) 1446 return err; 1447 1448 err = regmap_update_bits(hw->regmap, drdy_int_reg, 1449 ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK, 1450 FIELD_PREP(ST_LSM6DSX_REG_FIFO_FTH_IRQ_MASK, 1451 1)); 1452 if (err < 0) 1453 return err; 1454 1455 /* enable Latched interrupts for device events */ 1456 if (hw->settings->lir.addr) { 1457 unsigned int data; 1458 1459 data = ST_LSM6DSX_SHIFT_VAL(1, hw->settings->lir.mask); 1460 err = regmap_update_bits(hw->regmap, hw->settings->lir.addr, 1461 hw->settings->lir.mask, data); 1462 if (err < 0) 1463 return err; 1464 1465 /* enable clear on read for latched interrupts */ 1466 if (hw->settings->clear_on_read.addr) { 1467 data = ST_LSM6DSX_SHIFT_VAL(1, 1468 hw->settings->clear_on_read.mask); 1469 err = regmap_update_bits(hw->regmap, 1470 hw->settings->clear_on_read.addr, 1471 hw->settings->clear_on_read.mask, 1472 data); 1473 if (err < 0) 1474 return err; 1475 } 1476 } 1477 1478 err = st_lsm6dsx_init_shub(hw); 1479 if (err < 0) 1480 return err; 1481 1482 return st_lsm6dsx_init_hw_timer(hw); 1483 } 1484 1485 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw, 1486 enum st_lsm6dsx_sensor_id id, 1487 const char *name) 1488 { 1489 struct st_lsm6dsx_sensor *sensor; 1490 struct iio_dev *iio_dev; 1491 1492 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor)); 1493 if (!iio_dev) 1494 return NULL; 1495 1496 iio_dev->modes = INDIO_DIRECT_MODE; 1497 iio_dev->dev.parent = hw->dev; 1498 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks; 1499 iio_dev->channels = hw->settings->channels[id].chan; 1500 iio_dev->num_channels = hw->settings->channels[id].len; 1501 1502 sensor = iio_priv(iio_dev); 1503 sensor->id = id; 1504 sensor->hw = hw; 1505 sensor->odr = hw->settings->odr_table[id].odr_avl[0].hz; 1506 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain; 1507 sensor->watermark = 1; 1508 1509 switch (id) { 1510 case ST_LSM6DSX_ID_ACC: 1511 iio_dev->info = &st_lsm6dsx_acc_info; 1512 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel", 1513 name); 1514 break; 1515 case ST_LSM6DSX_ID_GYRO: 1516 iio_dev->info = &st_lsm6dsx_gyro_info; 1517 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro", 1518 name); 1519 break; 1520 default: 1521 return NULL; 1522 } 1523 iio_dev->name = sensor->name; 1524 1525 return iio_dev; 1526 } 1527 1528 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id, 1529 struct regmap *regmap) 1530 { 1531 const struct st_lsm6dsx_shub_settings *hub_settings; 1532 struct st_lsm6dsx_hw *hw; 1533 const char *name = NULL; 1534 int i, err; 1535 1536 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL); 1537 if (!hw) 1538 return -ENOMEM; 1539 1540 dev_set_drvdata(dev, (void *)hw); 1541 1542 mutex_init(&hw->fifo_lock); 1543 mutex_init(&hw->conf_lock); 1544 mutex_init(&hw->page_lock); 1545 1546 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL); 1547 if (!hw->buff) 1548 return -ENOMEM; 1549 1550 hw->dev = dev; 1551 hw->irq = irq; 1552 hw->regmap = regmap; 1553 1554 err = st_lsm6dsx_check_whoami(hw, hw_id, &name); 1555 if (err < 0) 1556 return err; 1557 1558 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) { 1559 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name); 1560 if (!hw->iio_devs[i]) 1561 return -ENOMEM; 1562 } 1563 1564 err = st_lsm6dsx_init_device(hw); 1565 if (err < 0) 1566 return err; 1567 1568 hub_settings = &hw->settings->shub_settings; 1569 if (hub_settings->master_en.addr) { 1570 err = st_lsm6dsx_shub_probe(hw, name); 1571 if (err < 0) 1572 return err; 1573 } 1574 1575 if (hw->irq > 0) { 1576 err = st_lsm6dsx_fifo_setup(hw); 1577 if (err < 0) 1578 return err; 1579 } 1580 1581 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 1582 if (!hw->iio_devs[i]) 1583 continue; 1584 1585 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]); 1586 if (err) 1587 return err; 1588 } 1589 1590 return 0; 1591 } 1592 EXPORT_SYMBOL(st_lsm6dsx_probe); 1593 1594 static int __maybe_unused st_lsm6dsx_suspend(struct device *dev) 1595 { 1596 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 1597 struct st_lsm6dsx_sensor *sensor; 1598 int i, err = 0; 1599 1600 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 1601 if (!hw->iio_devs[i]) 1602 continue; 1603 1604 sensor = iio_priv(hw->iio_devs[i]); 1605 if (!(hw->enable_mask & BIT(sensor->id))) 1606 continue; 1607 1608 if (sensor->id == ST_LSM6DSX_ID_EXT0 || 1609 sensor->id == ST_LSM6DSX_ID_EXT1 || 1610 sensor->id == ST_LSM6DSX_ID_EXT2) 1611 err = st_lsm6dsx_shub_set_enable(sensor, false); 1612 else 1613 err = st_lsm6dsx_sensor_set_enable(sensor, false); 1614 if (err < 0) 1615 return err; 1616 1617 hw->suspend_mask |= BIT(sensor->id); 1618 } 1619 1620 if (hw->fifo_mode != ST_LSM6DSX_FIFO_BYPASS) 1621 err = st_lsm6dsx_flush_fifo(hw); 1622 1623 return err; 1624 } 1625 1626 static int __maybe_unused st_lsm6dsx_resume(struct device *dev) 1627 { 1628 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 1629 struct st_lsm6dsx_sensor *sensor; 1630 int i, err = 0; 1631 1632 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 1633 if (!hw->iio_devs[i]) 1634 continue; 1635 1636 sensor = iio_priv(hw->iio_devs[i]); 1637 if (!(hw->suspend_mask & BIT(sensor->id))) 1638 continue; 1639 1640 if (sensor->id == ST_LSM6DSX_ID_EXT0 || 1641 sensor->id == ST_LSM6DSX_ID_EXT1 || 1642 sensor->id == ST_LSM6DSX_ID_EXT2) 1643 err = st_lsm6dsx_shub_set_enable(sensor, true); 1644 else 1645 err = st_lsm6dsx_sensor_set_enable(sensor, true); 1646 if (err < 0) 1647 return err; 1648 1649 hw->suspend_mask &= ~BIT(sensor->id); 1650 } 1651 1652 if (hw->enable_mask) 1653 err = st_lsm6dsx_set_fifo_mode(hw, ST_LSM6DSX_FIFO_CONT); 1654 1655 return err; 1656 } 1657 1658 const struct dev_pm_ops st_lsm6dsx_pm_ops = { 1659 SET_SYSTEM_SLEEP_PM_OPS(st_lsm6dsx_suspend, st_lsm6dsx_resume) 1660 }; 1661 EXPORT_SYMBOL(st_lsm6dsx_pm_ops); 1662 1663 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>"); 1664 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); 1665 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver"); 1666 MODULE_LICENSE("GPL v2"); 1667