1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * STMicroelectronics st_lsm6dsx sensor driver 4 * 5 * The ST LSM6DSx IMU MEMS series consists of 3D digital accelerometer 6 * and 3D digital gyroscope system-in-package with a digital I2C/SPI serial 7 * interface standard output. 8 * LSM6DSx IMU MEMS series has a dynamic user-selectable full-scale 9 * acceleration range of +-2/+-4/+-8/+-16 g and an angular rate range of 10 * +-125/+-245/+-500/+-1000/+-2000 dps 11 * LSM6DSx series has an integrated First-In-First-Out (FIFO) buffer 12 * allowing dynamic batching of sensor data. 13 * LSM9DSx series is similar but includes an additional magnetometer, handled 14 * by a different driver. 15 * 16 * Supported sensors: 17 * - LSM6DS3: 18 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416 19 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 20 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 21 * - FIFO size: 8KB 22 * 23 * - LSM6DS3H/LSM6DSL/LSM6DSM/ISM330DLC/LSM6DS3TR-C: 24 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416 25 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 26 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 27 * - FIFO size: 4KB 28 * 29 * - LSM6DSO/LSM6DSOX/ASM330LHH/ASM330LHHX/LSM6DSR/ISM330DHCX/LSM6DST/LSM6DSOP: 30 * - Accelerometer/Gyroscope supported ODR [Hz]: 12.5, 26, 52, 104, 208, 416, 31 * 833 32 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 33 * - Gyroscope supported full-scale [dps]: +-125/+-245/+-500/+-1000/+-2000 34 * - FIFO size: 3KB 35 * 36 * - LSM9DS1/LSM6DS0: 37 * - Accelerometer supported ODR [Hz]: 10, 50, 119, 238, 476, 952 38 * - Accelerometer supported full-scale [g]: +-2/+-4/+-8/+-16 39 * - Gyroscope supported ODR [Hz]: 15, 60, 119, 238, 476, 952 40 * - Gyroscope supported full-scale [dps]: +-245/+-500/+-2000 41 * - FIFO size: 32 42 * 43 * Copyright 2016 STMicroelectronics Inc. 44 * 45 * Lorenzo Bianconi <lorenzo.bianconi@st.com> 46 * Denis Ciocca <denis.ciocca@st.com> 47 */ 48 49 #include <linux/kernel.h> 50 #include <linux/module.h> 51 #include <linux/delay.h> 52 #include <linux/iio/events.h> 53 #include <linux/iio/iio.h> 54 #include <linux/iio/sysfs.h> 55 #include <linux/interrupt.h> 56 #include <linux/irq.h> 57 #include <linux/minmax.h> 58 #include <linux/pm.h> 59 #include <linux/property.h> 60 #include <linux/regmap.h> 61 #include <linux/bitfield.h> 62 63 #include <linux/platform_data/st_sensors_pdata.h> 64 65 #include "st_lsm6dsx.h" 66 67 #define ST_LSM6DSX_REG_WHOAMI_ADDR 0x0f 68 69 #define ST_LSM6DSX_TS_SENSITIVITY 25000UL /* 25us */ 70 71 static const struct iio_chan_spec st_lsm6dsx_acc_channels[] = { 72 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0), 73 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1), 74 ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2), 75 IIO_CHAN_SOFT_TIMESTAMP(3), 76 }; 77 78 static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] = { 79 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0), 80 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1), 81 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2), 82 IIO_CHAN_SOFT_TIMESTAMP(3), 83 }; 84 85 static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] = { 86 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0), 87 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1), 88 ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2), 89 IIO_CHAN_SOFT_TIMESTAMP(3), 90 }; 91 92 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] = { 93 { 94 .reset = { 95 .addr = 0x22, 96 .mask = BIT(0), 97 }, 98 .boot = { 99 .addr = 0x22, 100 .mask = BIT(7), 101 }, 102 .bdu = { 103 .addr = 0x22, 104 .mask = BIT(6), 105 }, 106 .id = { 107 { 108 .hw_id = ST_LSM9DS1_ID, 109 .name = ST_LSM9DS1_DEV_NAME, 110 .wai = 0x68, 111 }, { 112 .hw_id = ST_LSM6DS0_ID, 113 .name = ST_LSM6DS0_DEV_NAME, 114 .wai = 0x68, 115 }, 116 }, 117 .channels = { 118 [ST_LSM6DSX_ID_ACC] = { 119 .chan = st_lsm6dsx_acc_channels, 120 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 121 }, 122 [ST_LSM6DSX_ID_GYRO] = { 123 .chan = st_lsm6ds0_gyro_channels, 124 .len = ARRAY_SIZE(st_lsm6ds0_gyro_channels), 125 }, 126 }, 127 .odr_table = { 128 [ST_LSM6DSX_ID_ACC] = { 129 .reg = { 130 .addr = 0x20, 131 .mask = GENMASK(7, 5), 132 }, 133 .odr_avl[0] = { 10000, 0x01 }, 134 .odr_avl[1] = { 50000, 0x02 }, 135 .odr_avl[2] = { 119000, 0x03 }, 136 .odr_avl[3] = { 238000, 0x04 }, 137 .odr_avl[4] = { 476000, 0x05 }, 138 .odr_avl[5] = { 952000, 0x06 }, 139 .odr_len = 6, 140 }, 141 [ST_LSM6DSX_ID_GYRO] = { 142 .reg = { 143 .addr = 0x10, 144 .mask = GENMASK(7, 5), 145 }, 146 .odr_avl[0] = { 14900, 0x01 }, 147 .odr_avl[1] = { 59500, 0x02 }, 148 .odr_avl[2] = { 119000, 0x03 }, 149 .odr_avl[3] = { 238000, 0x04 }, 150 .odr_avl[4] = { 476000, 0x05 }, 151 .odr_avl[5] = { 952000, 0x06 }, 152 .odr_len = 6, 153 }, 154 }, 155 .fs_table = { 156 [ST_LSM6DSX_ID_ACC] = { 157 .reg = { 158 .addr = 0x20, 159 .mask = GENMASK(4, 3), 160 }, 161 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 162 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 163 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 164 .fs_avl[3] = { IIO_G_TO_M_S_2(732000), 0x1 }, 165 .fs_len = 4, 166 }, 167 [ST_LSM6DSX_ID_GYRO] = { 168 .reg = { 169 .addr = 0x10, 170 .mask = GENMASK(4, 3), 171 }, 172 173 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 174 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 175 .fs_avl[2] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 176 .fs_len = 3, 177 }, 178 }, 179 .irq_config = { 180 .irq1 = { 181 .addr = 0x0c, 182 .mask = BIT(3), 183 }, 184 .irq2 = { 185 .addr = 0x0d, 186 .mask = BIT(3), 187 }, 188 .hla = { 189 .addr = 0x22, 190 .mask = BIT(5), 191 }, 192 .od = { 193 .addr = 0x22, 194 .mask = BIT(4), 195 }, 196 }, 197 .fifo_ops = { 198 .max_size = 32, 199 }, 200 }, 201 { 202 .reset = { 203 .addr = 0x12, 204 .mask = BIT(0), 205 }, 206 .boot = { 207 .addr = 0x12, 208 .mask = BIT(7), 209 }, 210 .bdu = { 211 .addr = 0x12, 212 .mask = BIT(6), 213 }, 214 .id = { 215 { 216 .hw_id = ST_LSM6DS3_ID, 217 .name = ST_LSM6DS3_DEV_NAME, 218 .wai = 0x69, 219 }, 220 }, 221 .channels = { 222 [ST_LSM6DSX_ID_ACC] = { 223 .chan = st_lsm6dsx_acc_channels, 224 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 225 }, 226 [ST_LSM6DSX_ID_GYRO] = { 227 .chan = st_lsm6dsx_gyro_channels, 228 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 229 }, 230 }, 231 .odr_table = { 232 [ST_LSM6DSX_ID_ACC] = { 233 .reg = { 234 .addr = 0x10, 235 .mask = GENMASK(7, 4), 236 }, 237 .odr_avl[0] = { 12500, 0x01 }, 238 .odr_avl[1] = { 26000, 0x02 }, 239 .odr_avl[2] = { 52000, 0x03 }, 240 .odr_avl[3] = { 104000, 0x04 }, 241 .odr_avl[4] = { 208000, 0x05 }, 242 .odr_avl[5] = { 416000, 0x06 }, 243 .odr_len = 6, 244 }, 245 [ST_LSM6DSX_ID_GYRO] = { 246 .reg = { 247 .addr = 0x11, 248 .mask = GENMASK(7, 4), 249 }, 250 .odr_avl[0] = { 12500, 0x01 }, 251 .odr_avl[1] = { 26000, 0x02 }, 252 .odr_avl[2] = { 52000, 0x03 }, 253 .odr_avl[3] = { 104000, 0x04 }, 254 .odr_avl[4] = { 208000, 0x05 }, 255 .odr_avl[5] = { 416000, 0x06 }, 256 .odr_len = 6, 257 }, 258 }, 259 .fs_table = { 260 [ST_LSM6DSX_ID_ACC] = { 261 .reg = { 262 .addr = 0x10, 263 .mask = GENMASK(3, 2), 264 }, 265 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 266 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 267 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 268 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 269 .fs_len = 4, 270 }, 271 [ST_LSM6DSX_ID_GYRO] = { 272 .reg = { 273 .addr = 0x11, 274 .mask = GENMASK(3, 2), 275 }, 276 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 277 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 278 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 279 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 280 .fs_len = 4, 281 }, 282 }, 283 .irq_config = { 284 .irq1 = { 285 .addr = 0x0d, 286 .mask = BIT(3), 287 }, 288 .irq2 = { 289 .addr = 0x0e, 290 .mask = BIT(3), 291 }, 292 .lir = { 293 .addr = 0x58, 294 .mask = BIT(0), 295 }, 296 .irq1_func = { 297 .addr = 0x5e, 298 .mask = BIT(5), 299 }, 300 .irq2_func = { 301 .addr = 0x5f, 302 .mask = BIT(5), 303 }, 304 .hla = { 305 .addr = 0x12, 306 .mask = BIT(5), 307 }, 308 .od = { 309 .addr = 0x12, 310 .mask = BIT(4), 311 }, 312 }, 313 .decimator = { 314 [ST_LSM6DSX_ID_ACC] = { 315 .addr = 0x08, 316 .mask = GENMASK(2, 0), 317 }, 318 [ST_LSM6DSX_ID_GYRO] = { 319 .addr = 0x08, 320 .mask = GENMASK(5, 3), 321 }, 322 }, 323 .fifo_ops = { 324 .update_fifo = st_lsm6dsx_update_fifo, 325 .read_fifo = st_lsm6dsx_read_fifo, 326 .fifo_th = { 327 .addr = 0x06, 328 .mask = GENMASK(11, 0), 329 }, 330 .fifo_diff = { 331 .addr = 0x3a, 332 .mask = GENMASK(11, 0), 333 }, 334 .max_size = 1365, 335 .th_wl = 3, /* 1LSB = 2B */ 336 }, 337 .ts_settings = { 338 .timer_en = { 339 .addr = 0x58, 340 .mask = BIT(7), 341 }, 342 .hr_timer = { 343 .addr = 0x5c, 344 .mask = BIT(4), 345 }, 346 .fifo_en = { 347 .addr = 0x07, 348 .mask = BIT(7), 349 }, 350 .decimator = { 351 .addr = 0x09, 352 .mask = GENMASK(5, 3), 353 }, 354 }, 355 .event_settings = { 356 .wakeup_reg = { 357 .addr = 0x5B, 358 .mask = GENMASK(5, 0), 359 }, 360 .wakeup_src_reg = 0x1b, 361 .wakeup_src_status_mask = BIT(3), 362 .wakeup_src_z_mask = BIT(0), 363 .wakeup_src_y_mask = BIT(1), 364 .wakeup_src_x_mask = BIT(2), 365 }, 366 }, 367 { 368 .reset = { 369 .addr = 0x12, 370 .mask = BIT(0), 371 }, 372 .boot = { 373 .addr = 0x12, 374 .mask = BIT(7), 375 }, 376 .bdu = { 377 .addr = 0x12, 378 .mask = BIT(6), 379 }, 380 .id = { 381 { 382 .hw_id = ST_LSM6DS3H_ID, 383 .name = ST_LSM6DS3H_DEV_NAME, 384 .wai = 0x69, 385 }, 386 }, 387 .channels = { 388 [ST_LSM6DSX_ID_ACC] = { 389 .chan = st_lsm6dsx_acc_channels, 390 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 391 }, 392 [ST_LSM6DSX_ID_GYRO] = { 393 .chan = st_lsm6dsx_gyro_channels, 394 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 395 }, 396 }, 397 .odr_table = { 398 [ST_LSM6DSX_ID_ACC] = { 399 .reg = { 400 .addr = 0x10, 401 .mask = GENMASK(7, 4), 402 }, 403 .odr_avl[0] = { 12500, 0x01 }, 404 .odr_avl[1] = { 26000, 0x02 }, 405 .odr_avl[2] = { 52000, 0x03 }, 406 .odr_avl[3] = { 104000, 0x04 }, 407 .odr_avl[4] = { 208000, 0x05 }, 408 .odr_avl[5] = { 416000, 0x06 }, 409 .odr_len = 6, 410 }, 411 [ST_LSM6DSX_ID_GYRO] = { 412 .reg = { 413 .addr = 0x11, 414 .mask = GENMASK(7, 4), 415 }, 416 .odr_avl[0] = { 12500, 0x01 }, 417 .odr_avl[1] = { 26000, 0x02 }, 418 .odr_avl[2] = { 52000, 0x03 }, 419 .odr_avl[3] = { 104000, 0x04 }, 420 .odr_avl[4] = { 208000, 0x05 }, 421 .odr_avl[5] = { 416000, 0x06 }, 422 .odr_len = 6, 423 }, 424 }, 425 .fs_table = { 426 [ST_LSM6DSX_ID_ACC] = { 427 .reg = { 428 .addr = 0x10, 429 .mask = GENMASK(3, 2), 430 }, 431 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 432 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 433 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 434 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 435 .fs_len = 4, 436 }, 437 [ST_LSM6DSX_ID_GYRO] = { 438 .reg = { 439 .addr = 0x11, 440 .mask = GENMASK(3, 2), 441 }, 442 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 443 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 444 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 445 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 446 .fs_len = 4, 447 }, 448 }, 449 .irq_config = { 450 .irq1 = { 451 .addr = 0x0d, 452 .mask = BIT(3), 453 }, 454 .irq2 = { 455 .addr = 0x0e, 456 .mask = BIT(3), 457 }, 458 .lir = { 459 .addr = 0x58, 460 .mask = BIT(0), 461 }, 462 .irq1_func = { 463 .addr = 0x5e, 464 .mask = BIT(5), 465 }, 466 .irq2_func = { 467 .addr = 0x5f, 468 .mask = BIT(5), 469 }, 470 .hla = { 471 .addr = 0x12, 472 .mask = BIT(5), 473 }, 474 .od = { 475 .addr = 0x12, 476 .mask = BIT(4), 477 }, 478 }, 479 .decimator = { 480 [ST_LSM6DSX_ID_ACC] = { 481 .addr = 0x08, 482 .mask = GENMASK(2, 0), 483 }, 484 [ST_LSM6DSX_ID_GYRO] = { 485 .addr = 0x08, 486 .mask = GENMASK(5, 3), 487 }, 488 }, 489 .fifo_ops = { 490 .update_fifo = st_lsm6dsx_update_fifo, 491 .read_fifo = st_lsm6dsx_read_fifo, 492 .fifo_th = { 493 .addr = 0x06, 494 .mask = GENMASK(11, 0), 495 }, 496 .fifo_diff = { 497 .addr = 0x3a, 498 .mask = GENMASK(11, 0), 499 }, 500 .max_size = 682, 501 .th_wl = 3, /* 1LSB = 2B */ 502 }, 503 .ts_settings = { 504 .timer_en = { 505 .addr = 0x58, 506 .mask = BIT(7), 507 }, 508 .hr_timer = { 509 .addr = 0x5c, 510 .mask = BIT(4), 511 }, 512 .fifo_en = { 513 .addr = 0x07, 514 .mask = BIT(7), 515 }, 516 .decimator = { 517 .addr = 0x09, 518 .mask = GENMASK(5, 3), 519 }, 520 }, 521 .event_settings = { 522 .wakeup_reg = { 523 .addr = 0x5B, 524 .mask = GENMASK(5, 0), 525 }, 526 .wakeup_src_reg = 0x1b, 527 .wakeup_src_status_mask = BIT(3), 528 .wakeup_src_z_mask = BIT(0), 529 .wakeup_src_y_mask = BIT(1), 530 .wakeup_src_x_mask = BIT(2), 531 }, 532 }, 533 { 534 .reset = { 535 .addr = 0x12, 536 .mask = BIT(0), 537 }, 538 .boot = { 539 .addr = 0x12, 540 .mask = BIT(7), 541 }, 542 .bdu = { 543 .addr = 0x12, 544 .mask = BIT(6), 545 }, 546 .id = { 547 { 548 .hw_id = ST_LSM6DSL_ID, 549 .name = ST_LSM6DSL_DEV_NAME, 550 .wai = 0x6a, 551 }, { 552 .hw_id = ST_LSM6DSM_ID, 553 .name = ST_LSM6DSM_DEV_NAME, 554 .wai = 0x6a, 555 }, { 556 .hw_id = ST_ISM330DLC_ID, 557 .name = ST_ISM330DLC_DEV_NAME, 558 .wai = 0x6a, 559 }, { 560 .hw_id = ST_LSM6DS3TRC_ID, 561 .name = ST_LSM6DS3TRC_DEV_NAME, 562 .wai = 0x6a, 563 }, 564 }, 565 .channels = { 566 [ST_LSM6DSX_ID_ACC] = { 567 .chan = st_lsm6dsx_acc_channels, 568 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 569 }, 570 [ST_LSM6DSX_ID_GYRO] = { 571 .chan = st_lsm6dsx_gyro_channels, 572 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 573 }, 574 }, 575 .odr_table = { 576 [ST_LSM6DSX_ID_ACC] = { 577 .reg = { 578 .addr = 0x10, 579 .mask = GENMASK(7, 4), 580 }, 581 .odr_avl[0] = { 12500, 0x01 }, 582 .odr_avl[1] = { 26000, 0x02 }, 583 .odr_avl[2] = { 52000, 0x03 }, 584 .odr_avl[3] = { 104000, 0x04 }, 585 .odr_avl[4] = { 208000, 0x05 }, 586 .odr_avl[5] = { 416000, 0x06 }, 587 .odr_len = 6, 588 }, 589 [ST_LSM6DSX_ID_GYRO] = { 590 .reg = { 591 .addr = 0x11, 592 .mask = GENMASK(7, 4), 593 }, 594 .odr_avl[0] = { 12500, 0x01 }, 595 .odr_avl[1] = { 26000, 0x02 }, 596 .odr_avl[2] = { 52000, 0x03 }, 597 .odr_avl[3] = { 104000, 0x04 }, 598 .odr_avl[4] = { 208000, 0x05 }, 599 .odr_avl[5] = { 416000, 0x06 }, 600 .odr_len = 6, 601 }, 602 }, 603 .fs_table = { 604 [ST_LSM6DSX_ID_ACC] = { 605 .reg = { 606 .addr = 0x10, 607 .mask = GENMASK(3, 2), 608 }, 609 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 610 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 611 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 612 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 613 .fs_len = 4, 614 }, 615 [ST_LSM6DSX_ID_GYRO] = { 616 .reg = { 617 .addr = 0x11, 618 .mask = GENMASK(3, 2), 619 }, 620 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 621 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 622 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 623 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 624 .fs_len = 4, 625 }, 626 }, 627 .irq_config = { 628 .irq1 = { 629 .addr = 0x0d, 630 .mask = BIT(3), 631 }, 632 .irq2 = { 633 .addr = 0x0e, 634 .mask = BIT(3), 635 }, 636 .lir = { 637 .addr = 0x58, 638 .mask = BIT(0), 639 }, 640 .irq1_func = { 641 .addr = 0x5e, 642 .mask = BIT(5), 643 }, 644 .irq2_func = { 645 .addr = 0x5f, 646 .mask = BIT(5), 647 }, 648 .hla = { 649 .addr = 0x12, 650 .mask = BIT(5), 651 }, 652 .od = { 653 .addr = 0x12, 654 .mask = BIT(4), 655 }, 656 }, 657 .decimator = { 658 [ST_LSM6DSX_ID_ACC] = { 659 .addr = 0x08, 660 .mask = GENMASK(2, 0), 661 }, 662 [ST_LSM6DSX_ID_GYRO] = { 663 .addr = 0x08, 664 .mask = GENMASK(5, 3), 665 }, 666 [ST_LSM6DSX_ID_EXT0] = { 667 .addr = 0x09, 668 .mask = GENMASK(2, 0), 669 }, 670 }, 671 .fifo_ops = { 672 .update_fifo = st_lsm6dsx_update_fifo, 673 .read_fifo = st_lsm6dsx_read_fifo, 674 .fifo_th = { 675 .addr = 0x06, 676 .mask = GENMASK(10, 0), 677 }, 678 .fifo_diff = { 679 .addr = 0x3a, 680 .mask = GENMASK(10, 0), 681 }, 682 .max_size = 682, 683 .th_wl = 3, /* 1LSB = 2B */ 684 }, 685 .ts_settings = { 686 .timer_en = { 687 .addr = 0x19, 688 .mask = BIT(5), 689 }, 690 .hr_timer = { 691 .addr = 0x5c, 692 .mask = BIT(4), 693 }, 694 .fifo_en = { 695 .addr = 0x07, 696 .mask = BIT(7), 697 }, 698 .decimator = { 699 .addr = 0x09, 700 .mask = GENMASK(5, 3), 701 }, 702 }, 703 .shub_settings = { 704 .page_mux = { 705 .addr = 0x01, 706 .mask = BIT(7), 707 }, 708 .master_en = { 709 .addr = 0x1a, 710 .mask = BIT(0), 711 }, 712 .pullup_en = { 713 .addr = 0x1a, 714 .mask = BIT(3), 715 }, 716 .aux_sens = { 717 .addr = 0x04, 718 .mask = GENMASK(5, 4), 719 }, 720 .wr_once = { 721 .addr = 0x07, 722 .mask = BIT(5), 723 }, 724 .emb_func = { 725 .addr = 0x19, 726 .mask = BIT(2), 727 }, 728 .num_ext_dev = 1, 729 .shub_out = { 730 .addr = 0x2e, 731 }, 732 .slv0_addr = 0x02, 733 .dw_slv0_addr = 0x0e, 734 .pause = 0x7, 735 }, 736 .event_settings = { 737 .enable_reg = { 738 .addr = 0x58, 739 .mask = BIT(7), 740 }, 741 .wakeup_reg = { 742 .addr = 0x5B, 743 .mask = GENMASK(5, 0), 744 }, 745 .wakeup_src_reg = 0x1b, 746 .wakeup_src_status_mask = BIT(3), 747 .wakeup_src_z_mask = BIT(0), 748 .wakeup_src_y_mask = BIT(1), 749 .wakeup_src_x_mask = BIT(2), 750 }, 751 }, 752 { 753 .reset = { 754 .addr = 0x12, 755 .mask = BIT(0), 756 }, 757 .boot = { 758 .addr = 0x12, 759 .mask = BIT(7), 760 }, 761 .bdu = { 762 .addr = 0x12, 763 .mask = BIT(6), 764 }, 765 .id = { 766 { 767 .hw_id = ST_LSM6DSR_ID, 768 .name = ST_LSM6DSR_DEV_NAME, 769 .wai = 0x6b, 770 }, { 771 .hw_id = ST_ISM330DHCX_ID, 772 .name = ST_ISM330DHCX_DEV_NAME, 773 .wai = 0x6b, 774 }, { 775 .hw_id = ST_LSM6DSRX_ID, 776 .name = ST_LSM6DSRX_DEV_NAME, 777 .wai = 0x6b, 778 }, { 779 .hw_id = ST_LSM6DSO_ID, 780 .name = ST_LSM6DSO_DEV_NAME, 781 .wai = 0x6c, 782 }, { 783 .hw_id = ST_LSM6DSOX_ID, 784 .name = ST_LSM6DSOX_DEV_NAME, 785 .wai = 0x6c, 786 }, { 787 .hw_id = ST_LSM6DST_ID, 788 .name = ST_LSM6DST_DEV_NAME, 789 .wai = 0x6d, 790 }, { 791 .hw_id = ST_ASM330LHHX_ID, 792 .name = ST_ASM330LHHX_DEV_NAME, 793 .wai = 0x6b, 794 }, 795 }, 796 .channels = { 797 [ST_LSM6DSX_ID_ACC] = { 798 .chan = st_lsm6dsx_acc_channels, 799 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 800 }, 801 [ST_LSM6DSX_ID_GYRO] = { 802 .chan = st_lsm6dsx_gyro_channels, 803 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 804 }, 805 }, 806 .drdy_mask = { 807 .addr = 0x13, 808 .mask = BIT(3), 809 }, 810 .odr_table = { 811 [ST_LSM6DSX_ID_ACC] = { 812 .reg = { 813 .addr = 0x10, 814 .mask = GENMASK(7, 4), 815 }, 816 .odr_avl[0] = { 12500, 0x01 }, 817 .odr_avl[1] = { 26000, 0x02 }, 818 .odr_avl[2] = { 52000, 0x03 }, 819 .odr_avl[3] = { 104000, 0x04 }, 820 .odr_avl[4] = { 208000, 0x05 }, 821 .odr_avl[5] = { 416000, 0x06 }, 822 .odr_avl[6] = { 833000, 0x07 }, 823 .odr_len = 7, 824 }, 825 [ST_LSM6DSX_ID_GYRO] = { 826 .reg = { 827 .addr = 0x11, 828 .mask = GENMASK(7, 4), 829 }, 830 .odr_avl[0] = { 12500, 0x01 }, 831 .odr_avl[1] = { 26000, 0x02 }, 832 .odr_avl[2] = { 52000, 0x03 }, 833 .odr_avl[3] = { 104000, 0x04 }, 834 .odr_avl[4] = { 208000, 0x05 }, 835 .odr_avl[5] = { 416000, 0x06 }, 836 .odr_avl[6] = { 833000, 0x07 }, 837 .odr_len = 7, 838 }, 839 }, 840 .fs_table = { 841 [ST_LSM6DSX_ID_ACC] = { 842 .reg = { 843 .addr = 0x10, 844 .mask = GENMASK(3, 2), 845 }, 846 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 847 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 848 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 849 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 850 .fs_len = 4, 851 }, 852 [ST_LSM6DSX_ID_GYRO] = { 853 .reg = { 854 .addr = 0x11, 855 .mask = GENMASK(3, 2), 856 }, 857 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 858 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 859 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 860 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 861 .fs_len = 4, 862 }, 863 }, 864 .irq_config = { 865 .irq1 = { 866 .addr = 0x0d, 867 .mask = BIT(3), 868 }, 869 .irq2 = { 870 .addr = 0x0e, 871 .mask = BIT(3), 872 }, 873 .lir = { 874 .addr = 0x56, 875 .mask = BIT(0), 876 }, 877 .clear_on_read = { 878 .addr = 0x56, 879 .mask = BIT(6), 880 }, 881 .irq1_func = { 882 .addr = 0x5e, 883 .mask = BIT(5), 884 }, 885 .irq2_func = { 886 .addr = 0x5f, 887 .mask = BIT(5), 888 }, 889 .hla = { 890 .addr = 0x12, 891 .mask = BIT(5), 892 }, 893 .od = { 894 .addr = 0x12, 895 .mask = BIT(4), 896 }, 897 }, 898 .batch = { 899 [ST_LSM6DSX_ID_ACC] = { 900 .addr = 0x09, 901 .mask = GENMASK(3, 0), 902 }, 903 [ST_LSM6DSX_ID_GYRO] = { 904 .addr = 0x09, 905 .mask = GENMASK(7, 4), 906 }, 907 }, 908 .fifo_ops = { 909 .update_fifo = st_lsm6dsx_update_fifo, 910 .read_fifo = st_lsm6dsx_read_tagged_fifo, 911 .fifo_th = { 912 .addr = 0x07, 913 .mask = GENMASK(8, 0), 914 }, 915 .fifo_diff = { 916 .addr = 0x3a, 917 .mask = GENMASK(9, 0), 918 }, 919 .max_size = 512, 920 .th_wl = 1, 921 }, 922 .ts_settings = { 923 .timer_en = { 924 .addr = 0x19, 925 .mask = BIT(5), 926 }, 927 .decimator = { 928 .addr = 0x0a, 929 .mask = GENMASK(7, 6), 930 }, 931 .freq_fine = 0x63, 932 }, 933 .shub_settings = { 934 .page_mux = { 935 .addr = 0x01, 936 .mask = BIT(6), 937 }, 938 .master_en = { 939 .sec_page = true, 940 .addr = 0x14, 941 .mask = BIT(2), 942 }, 943 .pullup_en = { 944 .sec_page = true, 945 .addr = 0x14, 946 .mask = BIT(3), 947 }, 948 .aux_sens = { 949 .addr = 0x14, 950 .mask = GENMASK(1, 0), 951 }, 952 .wr_once = { 953 .addr = 0x14, 954 .mask = BIT(6), 955 }, 956 .num_ext_dev = 3, 957 .shub_out = { 958 .sec_page = true, 959 .addr = 0x02, 960 }, 961 .slv0_addr = 0x15, 962 .dw_slv0_addr = 0x21, 963 .batch_en = BIT(3), 964 }, 965 .event_settings = { 966 .enable_reg = { 967 .addr = 0x58, 968 .mask = BIT(7), 969 }, 970 .wakeup_reg = { 971 .addr = 0x5b, 972 .mask = GENMASK(5, 0), 973 }, 974 .wakeup_src_reg = 0x1b, 975 .wakeup_src_status_mask = BIT(3), 976 .wakeup_src_z_mask = BIT(0), 977 .wakeup_src_y_mask = BIT(1), 978 .wakeup_src_x_mask = BIT(2), 979 }, 980 }, 981 { 982 .reset = { 983 .addr = 0x12, 984 .mask = BIT(0), 985 }, 986 .boot = { 987 .addr = 0x12, 988 .mask = BIT(7), 989 }, 990 .bdu = { 991 .addr = 0x12, 992 .mask = BIT(6), 993 }, 994 .id = { 995 { 996 .hw_id = ST_ASM330LHH_ID, 997 .name = ST_ASM330LHH_DEV_NAME, 998 .wai = 0x6b, 999 }, { 1000 .hw_id = ST_LSM6DSOP_ID, 1001 .name = ST_LSM6DSOP_DEV_NAME, 1002 .wai = 0x6c, 1003 }, 1004 }, 1005 .channels = { 1006 [ST_LSM6DSX_ID_ACC] = { 1007 .chan = st_lsm6dsx_acc_channels, 1008 .len = ARRAY_SIZE(st_lsm6dsx_acc_channels), 1009 }, 1010 [ST_LSM6DSX_ID_GYRO] = { 1011 .chan = st_lsm6dsx_gyro_channels, 1012 .len = ARRAY_SIZE(st_lsm6dsx_gyro_channels), 1013 }, 1014 }, 1015 .drdy_mask = { 1016 .addr = 0x13, 1017 .mask = BIT(3), 1018 }, 1019 .odr_table = { 1020 [ST_LSM6DSX_ID_ACC] = { 1021 .reg = { 1022 .addr = 0x10, 1023 .mask = GENMASK(7, 4), 1024 }, 1025 .odr_avl[0] = { 12500, 0x01 }, 1026 .odr_avl[1] = { 26000, 0x02 }, 1027 .odr_avl[2] = { 52000, 0x03 }, 1028 .odr_avl[3] = { 104000, 0x04 }, 1029 .odr_avl[4] = { 208000, 0x05 }, 1030 .odr_avl[5] = { 416000, 0x06 }, 1031 .odr_avl[6] = { 833000, 0x07 }, 1032 .odr_len = 7, 1033 }, 1034 [ST_LSM6DSX_ID_GYRO] = { 1035 .reg = { 1036 .addr = 0x11, 1037 .mask = GENMASK(7, 4), 1038 }, 1039 .odr_avl[0] = { 12500, 0x01 }, 1040 .odr_avl[1] = { 26000, 0x02 }, 1041 .odr_avl[2] = { 52000, 0x03 }, 1042 .odr_avl[3] = { 104000, 0x04 }, 1043 .odr_avl[4] = { 208000, 0x05 }, 1044 .odr_avl[5] = { 416000, 0x06 }, 1045 .odr_avl[6] = { 833000, 0x07 }, 1046 .odr_len = 7, 1047 }, 1048 }, 1049 .fs_table = { 1050 [ST_LSM6DSX_ID_ACC] = { 1051 .reg = { 1052 .addr = 0x10, 1053 .mask = GENMASK(3, 2), 1054 }, 1055 .fs_avl[0] = { IIO_G_TO_M_S_2(61000), 0x0 }, 1056 .fs_avl[1] = { IIO_G_TO_M_S_2(122000), 0x2 }, 1057 .fs_avl[2] = { IIO_G_TO_M_S_2(244000), 0x3 }, 1058 .fs_avl[3] = { IIO_G_TO_M_S_2(488000), 0x1 }, 1059 .fs_len = 4, 1060 }, 1061 [ST_LSM6DSX_ID_GYRO] = { 1062 .reg = { 1063 .addr = 0x11, 1064 .mask = GENMASK(3, 2), 1065 }, 1066 .fs_avl[0] = { IIO_DEGREE_TO_RAD(8750000), 0x0 }, 1067 .fs_avl[1] = { IIO_DEGREE_TO_RAD(17500000), 0x1 }, 1068 .fs_avl[2] = { IIO_DEGREE_TO_RAD(35000000), 0x2 }, 1069 .fs_avl[3] = { IIO_DEGREE_TO_RAD(70000000), 0x3 }, 1070 .fs_len = 4, 1071 }, 1072 }, 1073 .irq_config = { 1074 .irq1 = { 1075 .addr = 0x0d, 1076 .mask = BIT(3), 1077 }, 1078 .irq2 = { 1079 .addr = 0x0e, 1080 .mask = BIT(3), 1081 }, 1082 .lir = { 1083 .addr = 0x56, 1084 .mask = BIT(0), 1085 }, 1086 .clear_on_read = { 1087 .addr = 0x56, 1088 .mask = BIT(6), 1089 }, 1090 .irq1_func = { 1091 .addr = 0x5e, 1092 .mask = BIT(5), 1093 }, 1094 .irq2_func = { 1095 .addr = 0x5f, 1096 .mask = BIT(5), 1097 }, 1098 .hla = { 1099 .addr = 0x12, 1100 .mask = BIT(5), 1101 }, 1102 .od = { 1103 .addr = 0x12, 1104 .mask = BIT(4), 1105 }, 1106 }, 1107 .batch = { 1108 [ST_LSM6DSX_ID_ACC] = { 1109 .addr = 0x09, 1110 .mask = GENMASK(3, 0), 1111 }, 1112 [ST_LSM6DSX_ID_GYRO] = { 1113 .addr = 0x09, 1114 .mask = GENMASK(7, 4), 1115 }, 1116 }, 1117 .fifo_ops = { 1118 .update_fifo = st_lsm6dsx_update_fifo, 1119 .read_fifo = st_lsm6dsx_read_tagged_fifo, 1120 .fifo_th = { 1121 .addr = 0x07, 1122 .mask = GENMASK(8, 0), 1123 }, 1124 .fifo_diff = { 1125 .addr = 0x3a, 1126 .mask = GENMASK(9, 0), 1127 }, 1128 .max_size = 512, 1129 .th_wl = 1, 1130 }, 1131 .ts_settings = { 1132 .timer_en = { 1133 .addr = 0x19, 1134 .mask = BIT(5), 1135 }, 1136 .decimator = { 1137 .addr = 0x0a, 1138 .mask = GENMASK(7, 6), 1139 }, 1140 .freq_fine = 0x63, 1141 }, 1142 .event_settings = { 1143 .enable_reg = { 1144 .addr = 0x58, 1145 .mask = BIT(7), 1146 }, 1147 .wakeup_reg = { 1148 .addr = 0x5B, 1149 .mask = GENMASK(5, 0), 1150 }, 1151 .wakeup_src_reg = 0x1b, 1152 .wakeup_src_status_mask = BIT(3), 1153 .wakeup_src_z_mask = BIT(0), 1154 .wakeup_src_y_mask = BIT(1), 1155 .wakeup_src_x_mask = BIT(2), 1156 }, 1157 }, 1158 }; 1159 1160 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable) 1161 { 1162 const struct st_lsm6dsx_shub_settings *hub_settings; 1163 unsigned int data; 1164 int err; 1165 1166 hub_settings = &hw->settings->shub_settings; 1167 data = ST_LSM6DSX_SHIFT_VAL(enable, hub_settings->page_mux.mask); 1168 err = regmap_update_bits(hw->regmap, hub_settings->page_mux.addr, 1169 hub_settings->page_mux.mask, data); 1170 usleep_range(100, 150); 1171 1172 return err; 1173 } 1174 1175 static int st_lsm6dsx_check_whoami(struct st_lsm6dsx_hw *hw, int id, 1176 const char **name) 1177 { 1178 int err, i, j, data; 1179 1180 for (i = 0; i < ARRAY_SIZE(st_lsm6dsx_sensor_settings); i++) { 1181 for (j = 0; j < ST_LSM6DSX_MAX_ID; j++) { 1182 if (st_lsm6dsx_sensor_settings[i].id[j].name && 1183 id == st_lsm6dsx_sensor_settings[i].id[j].hw_id) 1184 break; 1185 } 1186 if (j < ST_LSM6DSX_MAX_ID) 1187 break; 1188 } 1189 1190 if (i == ARRAY_SIZE(st_lsm6dsx_sensor_settings)) { 1191 dev_err(hw->dev, "unsupported hw id [%02x]\n", id); 1192 return -ENODEV; 1193 } 1194 1195 err = regmap_read(hw->regmap, ST_LSM6DSX_REG_WHOAMI_ADDR, &data); 1196 if (err < 0) { 1197 dev_err(hw->dev, "failed to read whoami register\n"); 1198 return err; 1199 } 1200 1201 if (data != st_lsm6dsx_sensor_settings[i].id[j].wai) { 1202 dev_err(hw->dev, "unsupported whoami [%02x]\n", data); 1203 return -ENODEV; 1204 } 1205 1206 *name = st_lsm6dsx_sensor_settings[i].id[j].name; 1207 hw->settings = &st_lsm6dsx_sensor_settings[i]; 1208 1209 return 0; 1210 } 1211 1212 static int st_lsm6dsx_set_full_scale(struct st_lsm6dsx_sensor *sensor, 1213 u32 gain) 1214 { 1215 const struct st_lsm6dsx_fs_table_entry *fs_table; 1216 unsigned int data; 1217 int i, err; 1218 1219 fs_table = &sensor->hw->settings->fs_table[sensor->id]; 1220 for (i = 0; i < fs_table->fs_len; i++) { 1221 if (fs_table->fs_avl[i].gain == gain) 1222 break; 1223 } 1224 1225 if (i == fs_table->fs_len) 1226 return -EINVAL; 1227 1228 data = ST_LSM6DSX_SHIFT_VAL(fs_table->fs_avl[i].val, 1229 fs_table->reg.mask); 1230 err = st_lsm6dsx_update_bits_locked(sensor->hw, fs_table->reg.addr, 1231 fs_table->reg.mask, data); 1232 if (err < 0) 1233 return err; 1234 1235 sensor->gain = gain; 1236 1237 return 0; 1238 } 1239 1240 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val) 1241 { 1242 const struct st_lsm6dsx_odr_table_entry *odr_table; 1243 int i; 1244 1245 odr_table = &sensor->hw->settings->odr_table[sensor->id]; 1246 for (i = 0; i < odr_table->odr_len; i++) { 1247 /* 1248 * ext devices can run at different odr respect to 1249 * accel sensor 1250 */ 1251 if (odr_table->odr_avl[i].milli_hz >= odr) 1252 break; 1253 } 1254 1255 if (i == odr_table->odr_len) 1256 return -EINVAL; 1257 1258 *val = odr_table->odr_avl[i].val; 1259 return odr_table->odr_avl[i].milli_hz; 1260 } 1261 1262 static int 1263 st_lsm6dsx_check_odr_dependency(struct st_lsm6dsx_hw *hw, u32 odr, 1264 enum st_lsm6dsx_sensor_id id) 1265 { 1266 struct st_lsm6dsx_sensor *ref = iio_priv(hw->iio_devs[id]); 1267 1268 if (odr > 0) { 1269 if (hw->enable_mask & BIT(id)) 1270 return max_t(u32, ref->odr, odr); 1271 else 1272 return odr; 1273 } else { 1274 return (hw->enable_mask & BIT(id)) ? ref->odr : 0; 1275 } 1276 } 1277 1278 static int 1279 st_lsm6dsx_set_odr(struct st_lsm6dsx_sensor *sensor, u32 req_odr) 1280 { 1281 struct st_lsm6dsx_sensor *ref_sensor = sensor; 1282 struct st_lsm6dsx_hw *hw = sensor->hw; 1283 const struct st_lsm6dsx_reg *reg; 1284 unsigned int data; 1285 u8 val = 0; 1286 int err; 1287 1288 switch (sensor->id) { 1289 case ST_LSM6DSX_ID_GYRO: 1290 break; 1291 case ST_LSM6DSX_ID_EXT0: 1292 case ST_LSM6DSX_ID_EXT1: 1293 case ST_LSM6DSX_ID_EXT2: 1294 case ST_LSM6DSX_ID_ACC: { 1295 u32 odr; 1296 int i; 1297 1298 /* 1299 * i2c embedded controller relies on the accelerometer sensor as 1300 * bus read/write trigger so we need to enable accel device 1301 * at odr = max(accel_odr, ext_odr) in order to properly 1302 * communicate with i2c slave devices 1303 */ 1304 ref_sensor = iio_priv(hw->iio_devs[ST_LSM6DSX_ID_ACC]); 1305 for (i = ST_LSM6DSX_ID_ACC; i < ST_LSM6DSX_ID_MAX; i++) { 1306 if (!hw->iio_devs[i] || i == sensor->id) 1307 continue; 1308 1309 odr = st_lsm6dsx_check_odr_dependency(hw, req_odr, i); 1310 if (odr != req_odr) 1311 /* device already configured */ 1312 return 0; 1313 } 1314 break; 1315 } 1316 default: /* should never occur */ 1317 return -EINVAL; 1318 } 1319 1320 if (req_odr > 0) { 1321 err = st_lsm6dsx_check_odr(ref_sensor, req_odr, &val); 1322 if (err < 0) 1323 return err; 1324 } 1325 1326 reg = &hw->settings->odr_table[ref_sensor->id].reg; 1327 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask); 1328 return st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); 1329 } 1330 1331 static int 1332 __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 1333 bool enable) 1334 { 1335 struct st_lsm6dsx_hw *hw = sensor->hw; 1336 u32 odr = enable ? sensor->odr : 0; 1337 int err; 1338 1339 err = st_lsm6dsx_set_odr(sensor, odr); 1340 if (err < 0) 1341 return err; 1342 1343 if (enable) 1344 hw->enable_mask |= BIT(sensor->id); 1345 else 1346 hw->enable_mask &= ~BIT(sensor->id); 1347 1348 return 0; 1349 } 1350 1351 static int 1352 st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable) 1353 { 1354 struct st_lsm6dsx_hw *hw = sensor->hw; 1355 1356 if (sensor->id == ST_LSM6DSX_ID_GYRO || enable) 1357 return 0; 1358 1359 return hw->enable_event; 1360 } 1361 1362 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 1363 bool enable) 1364 { 1365 if (st_lsm6dsx_check_events(sensor, enable)) 1366 return 0; 1367 1368 return __st_lsm6dsx_sensor_set_enable(sensor, enable); 1369 } 1370 1371 static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx_sensor *sensor, 1372 u8 addr, int *val) 1373 { 1374 struct st_lsm6dsx_hw *hw = sensor->hw; 1375 int err, delay; 1376 __le16 data; 1377 1378 err = st_lsm6dsx_sensor_set_enable(sensor, true); 1379 if (err < 0) 1380 return err; 1381 1382 /* 1383 * we need to wait for sensor settling time before 1384 * reading data in order to avoid corrupted samples 1385 */ 1386 delay = 1000000000 / sensor->odr; 1387 usleep_range(3 * delay, 4 * delay); 1388 1389 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data)); 1390 if (err < 0) 1391 return err; 1392 1393 if (!hw->enable_event) { 1394 err = st_lsm6dsx_sensor_set_enable(sensor, false); 1395 if (err < 0) 1396 return err; 1397 } 1398 1399 *val = (s16)le16_to_cpu(data); 1400 1401 return IIO_VAL_INT; 1402 } 1403 1404 static int st_lsm6dsx_read_raw(struct iio_dev *iio_dev, 1405 struct iio_chan_spec const *ch, 1406 int *val, int *val2, long mask) 1407 { 1408 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1409 int ret; 1410 1411 switch (mask) { 1412 case IIO_CHAN_INFO_RAW: 1413 ret = iio_device_claim_direct_mode(iio_dev); 1414 if (ret) 1415 break; 1416 1417 ret = st_lsm6dsx_read_oneshot(sensor, ch->address, val); 1418 iio_device_release_direct_mode(iio_dev); 1419 break; 1420 case IIO_CHAN_INFO_SAMP_FREQ: 1421 *val = sensor->odr / 1000; 1422 *val2 = (sensor->odr % 1000) * 1000; 1423 ret = IIO_VAL_INT_PLUS_MICRO; 1424 break; 1425 case IIO_CHAN_INFO_SCALE: 1426 *val = 0; 1427 *val2 = sensor->gain; 1428 ret = IIO_VAL_INT_PLUS_NANO; 1429 break; 1430 default: 1431 ret = -EINVAL; 1432 break; 1433 } 1434 1435 return ret; 1436 } 1437 1438 static int st_lsm6dsx_write_raw(struct iio_dev *iio_dev, 1439 struct iio_chan_spec const *chan, 1440 int val, int val2, long mask) 1441 { 1442 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1443 int err; 1444 1445 err = iio_device_claim_direct_mode(iio_dev); 1446 if (err) 1447 return err; 1448 1449 switch (mask) { 1450 case IIO_CHAN_INFO_SCALE: 1451 err = st_lsm6dsx_set_full_scale(sensor, val2); 1452 break; 1453 case IIO_CHAN_INFO_SAMP_FREQ: { 1454 u8 data; 1455 1456 val = val * 1000 + val2 / 1000; 1457 val = st_lsm6dsx_check_odr(sensor, val, &data); 1458 if (val < 0) 1459 err = val; 1460 else 1461 sensor->odr = val; 1462 break; 1463 } 1464 default: 1465 err = -EINVAL; 1466 break; 1467 } 1468 1469 iio_device_release_direct_mode(iio_dev); 1470 1471 return err; 1472 } 1473 1474 static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, int state) 1475 { 1476 const struct st_lsm6dsx_reg *reg; 1477 unsigned int data; 1478 int err; 1479 1480 if (!hw->settings->irq_config.irq1_func.addr) 1481 return -ENOTSUPP; 1482 1483 reg = &hw->settings->event_settings.enable_reg; 1484 if (reg->addr) { 1485 data = ST_LSM6DSX_SHIFT_VAL(state, reg->mask); 1486 err = st_lsm6dsx_update_bits_locked(hw, reg->addr, 1487 reg->mask, data); 1488 if (err < 0) 1489 return err; 1490 } 1491 1492 /* Enable wakeup interrupt */ 1493 data = ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask); 1494 return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr, 1495 hw->irq_routing->mask, data); 1496 } 1497 1498 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev, 1499 const struct iio_chan_spec *chan, 1500 enum iio_event_type type, 1501 enum iio_event_direction dir, 1502 enum iio_event_info info, 1503 int *val, int *val2) 1504 { 1505 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1506 struct st_lsm6dsx_hw *hw = sensor->hw; 1507 1508 if (type != IIO_EV_TYPE_THRESH) 1509 return -EINVAL; 1510 1511 *val2 = 0; 1512 *val = hw->event_threshold; 1513 1514 return IIO_VAL_INT; 1515 } 1516 1517 static int 1518 st_lsm6dsx_write_event(struct iio_dev *iio_dev, 1519 const struct iio_chan_spec *chan, 1520 enum iio_event_type type, 1521 enum iio_event_direction dir, 1522 enum iio_event_info info, 1523 int val, int val2) 1524 { 1525 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1526 struct st_lsm6dsx_hw *hw = sensor->hw; 1527 const struct st_lsm6dsx_reg *reg; 1528 unsigned int data; 1529 int err; 1530 1531 if (type != IIO_EV_TYPE_THRESH) 1532 return -EINVAL; 1533 1534 if (val < 0 || val > 31) 1535 return -EINVAL; 1536 1537 reg = &hw->settings->event_settings.wakeup_reg; 1538 data = ST_LSM6DSX_SHIFT_VAL(val, reg->mask); 1539 err = st_lsm6dsx_update_bits_locked(hw, reg->addr, 1540 reg->mask, data); 1541 if (err < 0) 1542 return -EINVAL; 1543 1544 hw->event_threshold = val; 1545 1546 return 0; 1547 } 1548 1549 static int 1550 st_lsm6dsx_read_event_config(struct iio_dev *iio_dev, 1551 const struct iio_chan_spec *chan, 1552 enum iio_event_type type, 1553 enum iio_event_direction dir) 1554 { 1555 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1556 struct st_lsm6dsx_hw *hw = sensor->hw; 1557 1558 if (type != IIO_EV_TYPE_THRESH) 1559 return -EINVAL; 1560 1561 return !!(hw->enable_event & BIT(chan->channel2)); 1562 } 1563 1564 static int 1565 st_lsm6dsx_write_event_config(struct iio_dev *iio_dev, 1566 const struct iio_chan_spec *chan, 1567 enum iio_event_type type, 1568 enum iio_event_direction dir, int state) 1569 { 1570 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1571 struct st_lsm6dsx_hw *hw = sensor->hw; 1572 u8 enable_event; 1573 int err; 1574 1575 if (type != IIO_EV_TYPE_THRESH) 1576 return -EINVAL; 1577 1578 if (state) { 1579 enable_event = hw->enable_event | BIT(chan->channel2); 1580 1581 /* do not enable events if they are already enabled */ 1582 if (hw->enable_event) 1583 goto out; 1584 } else { 1585 enable_event = hw->enable_event & ~BIT(chan->channel2); 1586 1587 /* only turn off sensor if no events is enabled */ 1588 if (enable_event) 1589 goto out; 1590 } 1591 1592 /* stop here if no changes have been made */ 1593 if (hw->enable_event == enable_event) 1594 return 0; 1595 1596 err = st_lsm6dsx_event_setup(hw, state); 1597 if (err < 0) 1598 return err; 1599 1600 mutex_lock(&hw->conf_lock); 1601 if (enable_event || !(hw->fifo_mask & BIT(sensor->id))) 1602 err = __st_lsm6dsx_sensor_set_enable(sensor, state); 1603 mutex_unlock(&hw->conf_lock); 1604 if (err < 0) 1605 return err; 1606 1607 out: 1608 hw->enable_event = enable_event; 1609 1610 return 0; 1611 } 1612 1613 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val) 1614 { 1615 struct st_lsm6dsx_sensor *sensor = iio_priv(iio_dev); 1616 struct st_lsm6dsx_hw *hw = sensor->hw; 1617 int err; 1618 1619 val = clamp_val(val, 1, hw->settings->fifo_ops.max_size); 1620 1621 mutex_lock(&hw->conf_lock); 1622 1623 err = st_lsm6dsx_update_watermark(sensor, val); 1624 1625 mutex_unlock(&hw->conf_lock); 1626 1627 if (err < 0) 1628 return err; 1629 1630 sensor->watermark = val; 1631 1632 return 0; 1633 } 1634 1635 static ssize_t 1636 st_lsm6dsx_sysfs_sampling_frequency_avail(struct device *dev, 1637 struct device_attribute *attr, 1638 char *buf) 1639 { 1640 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev)); 1641 const struct st_lsm6dsx_odr_table_entry *odr_table; 1642 int i, len = 0; 1643 1644 odr_table = &sensor->hw->settings->odr_table[sensor->id]; 1645 for (i = 0; i < odr_table->odr_len; i++) 1646 len += scnprintf(buf + len, PAGE_SIZE - len, "%d.%03d ", 1647 odr_table->odr_avl[i].milli_hz / 1000, 1648 odr_table->odr_avl[i].milli_hz % 1000); 1649 buf[len - 1] = '\n'; 1650 1651 return len; 1652 } 1653 1654 static ssize_t st_lsm6dsx_sysfs_scale_avail(struct device *dev, 1655 struct device_attribute *attr, 1656 char *buf) 1657 { 1658 struct st_lsm6dsx_sensor *sensor = iio_priv(dev_to_iio_dev(dev)); 1659 const struct st_lsm6dsx_fs_table_entry *fs_table; 1660 struct st_lsm6dsx_hw *hw = sensor->hw; 1661 int i, len = 0; 1662 1663 fs_table = &hw->settings->fs_table[sensor->id]; 1664 for (i = 0; i < fs_table->fs_len; i++) 1665 len += scnprintf(buf + len, PAGE_SIZE - len, "0.%09u ", 1666 fs_table->fs_avl[i].gain); 1667 buf[len - 1] = '\n'; 1668 1669 return len; 1670 } 1671 1672 static int st_lsm6dsx_write_raw_get_fmt(struct iio_dev *indio_dev, 1673 struct iio_chan_spec const *chan, 1674 long mask) 1675 { 1676 switch (mask) { 1677 case IIO_CHAN_INFO_SCALE: 1678 switch (chan->type) { 1679 case IIO_ANGL_VEL: 1680 case IIO_ACCEL: 1681 return IIO_VAL_INT_PLUS_NANO; 1682 default: 1683 return IIO_VAL_INT_PLUS_MICRO; 1684 } 1685 default: 1686 return IIO_VAL_INT_PLUS_MICRO; 1687 } 1688 } 1689 1690 static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(st_lsm6dsx_sysfs_sampling_frequency_avail); 1691 static IIO_DEVICE_ATTR(in_accel_scale_available, 0444, 1692 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 1693 static IIO_DEVICE_ATTR(in_anglvel_scale_available, 0444, 1694 st_lsm6dsx_sysfs_scale_avail, NULL, 0); 1695 1696 static struct attribute *st_lsm6dsx_acc_attributes[] = { 1697 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 1698 &iio_dev_attr_in_accel_scale_available.dev_attr.attr, 1699 NULL, 1700 }; 1701 1702 static const struct attribute_group st_lsm6dsx_acc_attribute_group = { 1703 .attrs = st_lsm6dsx_acc_attributes, 1704 }; 1705 1706 static const struct iio_info st_lsm6dsx_acc_info = { 1707 .attrs = &st_lsm6dsx_acc_attribute_group, 1708 .read_raw = st_lsm6dsx_read_raw, 1709 .write_raw = st_lsm6dsx_write_raw, 1710 .read_event_value = st_lsm6dsx_read_event, 1711 .write_event_value = st_lsm6dsx_write_event, 1712 .read_event_config = st_lsm6dsx_read_event_config, 1713 .write_event_config = st_lsm6dsx_write_event_config, 1714 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 1715 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt, 1716 }; 1717 1718 static struct attribute *st_lsm6dsx_gyro_attributes[] = { 1719 &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 1720 &iio_dev_attr_in_anglvel_scale_available.dev_attr.attr, 1721 NULL, 1722 }; 1723 1724 static const struct attribute_group st_lsm6dsx_gyro_attribute_group = { 1725 .attrs = st_lsm6dsx_gyro_attributes, 1726 }; 1727 1728 static const struct iio_info st_lsm6dsx_gyro_info = { 1729 .attrs = &st_lsm6dsx_gyro_attribute_group, 1730 .read_raw = st_lsm6dsx_read_raw, 1731 .write_raw = st_lsm6dsx_write_raw, 1732 .hwfifo_set_watermark = st_lsm6dsx_set_watermark, 1733 .write_raw_get_fmt = st_lsm6dsx_write_raw_get_fmt, 1734 }; 1735 1736 static int st_lsm6dsx_get_drdy_pin(struct st_lsm6dsx_hw *hw, int *drdy_pin) 1737 { 1738 struct device *dev = hw->dev; 1739 1740 if (!dev_fwnode(dev)) 1741 return -EINVAL; 1742 1743 return device_property_read_u32(dev, "st,drdy-int-pin", drdy_pin); 1744 } 1745 1746 static int 1747 st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, 1748 const struct st_lsm6dsx_reg **drdy_reg) 1749 { 1750 int err = 0, drdy_pin; 1751 1752 if (st_lsm6dsx_get_drdy_pin(hw, &drdy_pin) < 0) { 1753 struct st_sensors_platform_data *pdata; 1754 struct device *dev = hw->dev; 1755 1756 pdata = (struct st_sensors_platform_data *)dev->platform_data; 1757 drdy_pin = pdata ? pdata->drdy_int_pin : 1; 1758 } 1759 1760 switch (drdy_pin) { 1761 case 1: 1762 hw->irq_routing = &hw->settings->irq_config.irq1_func; 1763 *drdy_reg = &hw->settings->irq_config.irq1; 1764 break; 1765 case 2: 1766 hw->irq_routing = &hw->settings->irq_config.irq2_func; 1767 *drdy_reg = &hw->settings->irq_config.irq2; 1768 break; 1769 default: 1770 dev_err(hw->dev, "unsupported data ready pin\n"); 1771 err = -EINVAL; 1772 break; 1773 } 1774 1775 return err; 1776 } 1777 1778 static int st_lsm6dsx_init_shub(struct st_lsm6dsx_hw *hw) 1779 { 1780 const struct st_lsm6dsx_shub_settings *hub_settings; 1781 struct st_sensors_platform_data *pdata; 1782 struct device *dev = hw->dev; 1783 unsigned int data; 1784 int err = 0; 1785 1786 hub_settings = &hw->settings->shub_settings; 1787 1788 pdata = (struct st_sensors_platform_data *)dev->platform_data; 1789 if ((dev_fwnode(dev) && device_property_read_bool(dev, "st,pullups")) || 1790 (pdata && pdata->pullups)) { 1791 if (hub_settings->pullup_en.sec_page) { 1792 err = st_lsm6dsx_set_page(hw, true); 1793 if (err < 0) 1794 return err; 1795 } 1796 1797 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->pullup_en.mask); 1798 err = regmap_update_bits(hw->regmap, 1799 hub_settings->pullup_en.addr, 1800 hub_settings->pullup_en.mask, data); 1801 1802 if (hub_settings->pullup_en.sec_page) 1803 st_lsm6dsx_set_page(hw, false); 1804 1805 if (err < 0) 1806 return err; 1807 } 1808 1809 if (hub_settings->aux_sens.addr) { 1810 /* configure aux sensors */ 1811 err = st_lsm6dsx_set_page(hw, true); 1812 if (err < 0) 1813 return err; 1814 1815 data = ST_LSM6DSX_SHIFT_VAL(3, hub_settings->aux_sens.mask); 1816 err = regmap_update_bits(hw->regmap, 1817 hub_settings->aux_sens.addr, 1818 hub_settings->aux_sens.mask, data); 1819 1820 st_lsm6dsx_set_page(hw, false); 1821 1822 if (err < 0) 1823 return err; 1824 } 1825 1826 if (hub_settings->emb_func.addr) { 1827 data = ST_LSM6DSX_SHIFT_VAL(1, hub_settings->emb_func.mask); 1828 err = regmap_update_bits(hw->regmap, 1829 hub_settings->emb_func.addr, 1830 hub_settings->emb_func.mask, data); 1831 } 1832 1833 return err; 1834 } 1835 1836 static int st_lsm6dsx_init_hw_timer(struct st_lsm6dsx_hw *hw) 1837 { 1838 const struct st_lsm6dsx_hw_ts_settings *ts_settings; 1839 int err, val; 1840 1841 ts_settings = &hw->settings->ts_settings; 1842 /* enable hw timestamp generation if necessary */ 1843 if (ts_settings->timer_en.addr) { 1844 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->timer_en.mask); 1845 err = regmap_update_bits(hw->regmap, 1846 ts_settings->timer_en.addr, 1847 ts_settings->timer_en.mask, val); 1848 if (err < 0) 1849 return err; 1850 } 1851 1852 /* enable high resolution for hw ts timer if necessary */ 1853 if (ts_settings->hr_timer.addr) { 1854 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->hr_timer.mask); 1855 err = regmap_update_bits(hw->regmap, 1856 ts_settings->hr_timer.addr, 1857 ts_settings->hr_timer.mask, val); 1858 if (err < 0) 1859 return err; 1860 } 1861 1862 /* enable ts queueing in FIFO if necessary */ 1863 if (ts_settings->fifo_en.addr) { 1864 val = ST_LSM6DSX_SHIFT_VAL(1, ts_settings->fifo_en.mask); 1865 err = regmap_update_bits(hw->regmap, 1866 ts_settings->fifo_en.addr, 1867 ts_settings->fifo_en.mask, val); 1868 if (err < 0) 1869 return err; 1870 } 1871 1872 /* calibrate timestamp sensitivity */ 1873 hw->ts_gain = ST_LSM6DSX_TS_SENSITIVITY; 1874 if (ts_settings->freq_fine) { 1875 err = regmap_read(hw->regmap, ts_settings->freq_fine, &val); 1876 if (err < 0) 1877 return err; 1878 1879 /* 1880 * linearize the AN5192 formula: 1881 * 1 / (1 + x) ~= 1 - x (Taylor’s Series) 1882 * ttrim[s] = 1 / (40000 * (1 + 0.0015 * val)) 1883 * ttrim[ns] ~= 25000 - 37.5 * val 1884 * ttrim[ns] ~= 25000 - (37500 * val) / 1000 1885 */ 1886 hw->ts_gain -= ((s8)val * 37500) / 1000; 1887 } 1888 1889 return 0; 1890 } 1891 1892 static int st_lsm6dsx_reset_device(struct st_lsm6dsx_hw *hw) 1893 { 1894 const struct st_lsm6dsx_reg *reg; 1895 int err; 1896 1897 /* 1898 * flush hw FIFO before device reset in order to avoid 1899 * possible races on interrupt line 1. If the first interrupt 1900 * line is asserted during hw reset the device will work in 1901 * I3C-only mode (if it is supported) 1902 */ 1903 err = st_lsm6dsx_flush_fifo(hw); 1904 if (err < 0 && err != -ENOTSUPP) 1905 return err; 1906 1907 /* device sw reset */ 1908 reg = &hw->settings->reset; 1909 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1910 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1911 if (err < 0) 1912 return err; 1913 1914 msleep(50); 1915 1916 /* reload trimming parameter */ 1917 reg = &hw->settings->boot; 1918 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1919 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1920 if (err < 0) 1921 return err; 1922 1923 msleep(50); 1924 1925 return 0; 1926 } 1927 1928 static int st_lsm6dsx_init_device(struct st_lsm6dsx_hw *hw) 1929 { 1930 const struct st_lsm6dsx_reg *reg; 1931 int err; 1932 1933 err = st_lsm6dsx_reset_device(hw); 1934 if (err < 0) 1935 return err; 1936 1937 /* enable Block Data Update */ 1938 reg = &hw->settings->bdu; 1939 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1940 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1941 if (err < 0) 1942 return err; 1943 1944 /* enable FIFO watermak interrupt */ 1945 err = st_lsm6dsx_get_drdy_reg(hw, ®); 1946 if (err < 0) 1947 return err; 1948 1949 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1950 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1951 if (err < 0) 1952 return err; 1953 1954 /* enable Latched interrupts for device events */ 1955 if (hw->settings->irq_config.lir.addr) { 1956 reg = &hw->settings->irq_config.lir; 1957 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1958 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1959 if (err < 0) 1960 return err; 1961 1962 /* enable clear on read for latched interrupts */ 1963 if (hw->settings->irq_config.clear_on_read.addr) { 1964 reg = &hw->settings->irq_config.clear_on_read; 1965 err = regmap_update_bits(hw->regmap, 1966 reg->addr, reg->mask, 1967 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1968 if (err < 0) 1969 return err; 1970 } 1971 } 1972 1973 /* enable drdy-mas if available */ 1974 if (hw->settings->drdy_mask.addr) { 1975 reg = &hw->settings->drdy_mask; 1976 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 1977 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 1978 if (err < 0) 1979 return err; 1980 } 1981 1982 err = st_lsm6dsx_init_shub(hw); 1983 if (err < 0) 1984 return err; 1985 1986 return st_lsm6dsx_init_hw_timer(hw); 1987 } 1988 1989 static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw, 1990 enum st_lsm6dsx_sensor_id id, 1991 const char *name) 1992 { 1993 struct st_lsm6dsx_sensor *sensor; 1994 struct iio_dev *iio_dev; 1995 1996 iio_dev = devm_iio_device_alloc(hw->dev, sizeof(*sensor)); 1997 if (!iio_dev) 1998 return NULL; 1999 2000 iio_dev->modes = INDIO_DIRECT_MODE; 2001 iio_dev->available_scan_masks = st_lsm6dsx_available_scan_masks; 2002 iio_dev->channels = hw->settings->channels[id].chan; 2003 iio_dev->num_channels = hw->settings->channels[id].len; 2004 2005 sensor = iio_priv(iio_dev); 2006 sensor->id = id; 2007 sensor->hw = hw; 2008 sensor->odr = hw->settings->odr_table[id].odr_avl[0].milli_hz; 2009 sensor->gain = hw->settings->fs_table[id].fs_avl[0].gain; 2010 sensor->watermark = 1; 2011 2012 switch (id) { 2013 case ST_LSM6DSX_ID_ACC: 2014 iio_dev->info = &st_lsm6dsx_acc_info; 2015 scnprintf(sensor->name, sizeof(sensor->name), "%s_accel", 2016 name); 2017 break; 2018 case ST_LSM6DSX_ID_GYRO: 2019 iio_dev->info = &st_lsm6dsx_gyro_info; 2020 scnprintf(sensor->name, sizeof(sensor->name), "%s_gyro", 2021 name); 2022 break; 2023 default: 2024 return NULL; 2025 } 2026 iio_dev->name = sensor->name; 2027 2028 return iio_dev; 2029 } 2030 2031 static bool 2032 st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw) 2033 { 2034 const struct st_lsm6dsx_event_settings *event_settings; 2035 int err, data; 2036 s64 timestamp; 2037 2038 if (!hw->enable_event) 2039 return false; 2040 2041 event_settings = &hw->settings->event_settings; 2042 err = st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg, 2043 &data, sizeof(data)); 2044 if (err < 0) 2045 return false; 2046 2047 timestamp = iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]); 2048 if ((data & hw->settings->event_settings.wakeup_src_z_mask) && 2049 (hw->enable_event & BIT(IIO_MOD_Z))) 2050 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2051 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2052 0, 2053 IIO_MOD_Z, 2054 IIO_EV_TYPE_THRESH, 2055 IIO_EV_DIR_EITHER), 2056 timestamp); 2057 2058 if ((data & hw->settings->event_settings.wakeup_src_y_mask) && 2059 (hw->enable_event & BIT(IIO_MOD_Y))) 2060 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2061 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2062 0, 2063 IIO_MOD_Y, 2064 IIO_EV_TYPE_THRESH, 2065 IIO_EV_DIR_EITHER), 2066 timestamp); 2067 2068 if ((data & hw->settings->event_settings.wakeup_src_x_mask) && 2069 (hw->enable_event & BIT(IIO_MOD_X))) 2070 iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], 2071 IIO_MOD_EVENT_CODE(IIO_ACCEL, 2072 0, 2073 IIO_MOD_X, 2074 IIO_EV_TYPE_THRESH, 2075 IIO_EV_DIR_EITHER), 2076 timestamp); 2077 2078 return data & event_settings->wakeup_src_status_mask; 2079 } 2080 2081 static irqreturn_t st_lsm6dsx_handler_thread(int irq, void *private) 2082 { 2083 struct st_lsm6dsx_hw *hw = private; 2084 int fifo_len = 0, len; 2085 bool event; 2086 2087 event = st_lsm6dsx_report_motion_event(hw); 2088 2089 if (!hw->settings->fifo_ops.read_fifo) 2090 return event ? IRQ_HANDLED : IRQ_NONE; 2091 2092 /* 2093 * If we are using edge IRQs, new samples can arrive while 2094 * processing current interrupt since there are no hw 2095 * guarantees the irq line stays "low" long enough to properly 2096 * detect the new interrupt. In this case the new sample will 2097 * be missed. 2098 * Polling FIFO status register allow us to read new 2099 * samples even if the interrupt arrives while processing 2100 * previous data and the timeslot where the line is "low" is 2101 * too short to be properly detected. 2102 */ 2103 do { 2104 mutex_lock(&hw->fifo_lock); 2105 len = hw->settings->fifo_ops.read_fifo(hw); 2106 mutex_unlock(&hw->fifo_lock); 2107 2108 if (len > 0) 2109 fifo_len += len; 2110 } while (len > 0); 2111 2112 return fifo_len || event ? IRQ_HANDLED : IRQ_NONE; 2113 } 2114 2115 static int st_lsm6dsx_irq_setup(struct st_lsm6dsx_hw *hw) 2116 { 2117 struct st_sensors_platform_data *pdata; 2118 const struct st_lsm6dsx_reg *reg; 2119 struct device *dev = hw->dev; 2120 unsigned long irq_type; 2121 bool irq_active_low; 2122 int err; 2123 2124 irq_type = irqd_get_trigger_type(irq_get_irq_data(hw->irq)); 2125 2126 switch (irq_type) { 2127 case IRQF_TRIGGER_HIGH: 2128 case IRQF_TRIGGER_RISING: 2129 irq_active_low = false; 2130 break; 2131 case IRQF_TRIGGER_LOW: 2132 case IRQF_TRIGGER_FALLING: 2133 irq_active_low = true; 2134 break; 2135 default: 2136 dev_info(hw->dev, "mode %lx unsupported\n", irq_type); 2137 return -EINVAL; 2138 } 2139 2140 reg = &hw->settings->irq_config.hla; 2141 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2142 ST_LSM6DSX_SHIFT_VAL(irq_active_low, 2143 reg->mask)); 2144 if (err < 0) 2145 return err; 2146 2147 pdata = (struct st_sensors_platform_data *)dev->platform_data; 2148 if ((dev_fwnode(dev) && device_property_read_bool(dev, "drive-open-drain")) || 2149 (pdata && pdata->open_drain)) { 2150 reg = &hw->settings->irq_config.od; 2151 err = regmap_update_bits(hw->regmap, reg->addr, reg->mask, 2152 ST_LSM6DSX_SHIFT_VAL(1, reg->mask)); 2153 if (err < 0) 2154 return err; 2155 2156 irq_type |= IRQF_SHARED; 2157 } 2158 2159 err = devm_request_threaded_irq(hw->dev, hw->irq, 2160 NULL, 2161 st_lsm6dsx_handler_thread, 2162 irq_type | IRQF_ONESHOT, 2163 "lsm6dsx", hw); 2164 if (err) { 2165 dev_err(hw->dev, "failed to request trigger irq %d\n", 2166 hw->irq); 2167 return err; 2168 } 2169 2170 return 0; 2171 } 2172 2173 static int st_lsm6dsx_init_regulators(struct device *dev) 2174 { 2175 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 2176 int err; 2177 2178 /* vdd-vddio power regulators */ 2179 hw->regulators[0].supply = "vdd"; 2180 hw->regulators[1].supply = "vddio"; 2181 err = devm_regulator_bulk_get(dev, ARRAY_SIZE(hw->regulators), 2182 hw->regulators); 2183 if (err) 2184 return dev_err_probe(dev, err, "failed to get regulators\n"); 2185 2186 err = regulator_bulk_enable(ARRAY_SIZE(hw->regulators), 2187 hw->regulators); 2188 if (err) { 2189 dev_err(dev, "failed to enable regulators: %d\n", err); 2190 return err; 2191 } 2192 2193 msleep(50); 2194 2195 return 0; 2196 } 2197 2198 static void st_lsm6dsx_chip_uninit(void *data) 2199 { 2200 struct st_lsm6dsx_hw *hw = data; 2201 2202 regulator_bulk_disable(ARRAY_SIZE(hw->regulators), hw->regulators); 2203 } 2204 2205 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id, 2206 struct regmap *regmap) 2207 { 2208 struct st_sensors_platform_data *pdata = dev->platform_data; 2209 const struct st_lsm6dsx_shub_settings *hub_settings; 2210 struct st_lsm6dsx_hw *hw; 2211 const char *name = NULL; 2212 int i, err; 2213 2214 hw = devm_kzalloc(dev, sizeof(*hw), GFP_KERNEL); 2215 if (!hw) 2216 return -ENOMEM; 2217 2218 dev_set_drvdata(dev, (void *)hw); 2219 2220 mutex_init(&hw->fifo_lock); 2221 mutex_init(&hw->conf_lock); 2222 mutex_init(&hw->page_lock); 2223 2224 err = st_lsm6dsx_init_regulators(dev); 2225 if (err) 2226 return err; 2227 2228 err = devm_add_action_or_reset(dev, st_lsm6dsx_chip_uninit, hw); 2229 if (err) 2230 return err; 2231 2232 hw->buff = devm_kzalloc(dev, ST_LSM6DSX_BUFF_SIZE, GFP_KERNEL); 2233 if (!hw->buff) 2234 return -ENOMEM; 2235 2236 hw->dev = dev; 2237 hw->irq = irq; 2238 hw->regmap = regmap; 2239 2240 err = st_lsm6dsx_check_whoami(hw, hw_id, &name); 2241 if (err < 0) 2242 return err; 2243 2244 for (i = 0; i < ST_LSM6DSX_ID_EXT0; i++) { 2245 hw->iio_devs[i] = st_lsm6dsx_alloc_iiodev(hw, i, name); 2246 if (!hw->iio_devs[i]) 2247 return -ENOMEM; 2248 } 2249 2250 err = st_lsm6dsx_init_device(hw); 2251 if (err < 0) 2252 return err; 2253 2254 hub_settings = &hw->settings->shub_settings; 2255 if (hub_settings->master_en.addr && 2256 (!dev_fwnode(dev) || 2257 !device_property_read_bool(dev, "st,disable-sensor-hub"))) { 2258 err = st_lsm6dsx_shub_probe(hw, name); 2259 if (err < 0) 2260 return err; 2261 } 2262 2263 if (hw->irq > 0) { 2264 err = st_lsm6dsx_irq_setup(hw); 2265 if (err < 0) 2266 return err; 2267 2268 err = st_lsm6dsx_fifo_setup(hw); 2269 if (err < 0) 2270 return err; 2271 } 2272 2273 err = iio_read_mount_matrix(hw->dev, &hw->orientation); 2274 if (err) 2275 return err; 2276 2277 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2278 if (!hw->iio_devs[i]) 2279 continue; 2280 2281 err = devm_iio_device_register(hw->dev, hw->iio_devs[i]); 2282 if (err) 2283 return err; 2284 } 2285 2286 if ((dev_fwnode(dev) && device_property_read_bool(dev, "wakeup-source")) || 2287 (pdata && pdata->wakeup_source)) 2288 device_init_wakeup(dev, true); 2289 2290 return 0; 2291 } 2292 EXPORT_SYMBOL_NS(st_lsm6dsx_probe, IIO_LSM6DSX); 2293 2294 static int st_lsm6dsx_suspend(struct device *dev) 2295 { 2296 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 2297 struct st_lsm6dsx_sensor *sensor; 2298 int i, err = 0; 2299 2300 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2301 if (!hw->iio_devs[i]) 2302 continue; 2303 2304 sensor = iio_priv(hw->iio_devs[i]); 2305 if (!(hw->enable_mask & BIT(sensor->id))) 2306 continue; 2307 2308 if (device_may_wakeup(dev) && 2309 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) { 2310 /* Enable wake from IRQ */ 2311 enable_irq_wake(hw->irq); 2312 continue; 2313 } 2314 2315 if (sensor->id == ST_LSM6DSX_ID_EXT0 || 2316 sensor->id == ST_LSM6DSX_ID_EXT1 || 2317 sensor->id == ST_LSM6DSX_ID_EXT2) 2318 err = st_lsm6dsx_shub_set_enable(sensor, false); 2319 else 2320 err = st_lsm6dsx_sensor_set_enable(sensor, false); 2321 if (err < 0) 2322 return err; 2323 2324 hw->suspend_mask |= BIT(sensor->id); 2325 } 2326 2327 if (hw->fifo_mask) 2328 err = st_lsm6dsx_flush_fifo(hw); 2329 2330 return err; 2331 } 2332 2333 static int st_lsm6dsx_resume(struct device *dev) 2334 { 2335 struct st_lsm6dsx_hw *hw = dev_get_drvdata(dev); 2336 struct st_lsm6dsx_sensor *sensor; 2337 int i, err = 0; 2338 2339 for (i = 0; i < ST_LSM6DSX_ID_MAX; i++) { 2340 if (!hw->iio_devs[i]) 2341 continue; 2342 2343 sensor = iio_priv(hw->iio_devs[i]); 2344 if (device_may_wakeup(dev) && 2345 sensor->id == ST_LSM6DSX_ID_ACC && hw->enable_event) 2346 disable_irq_wake(hw->irq); 2347 2348 if (!(hw->suspend_mask & BIT(sensor->id))) 2349 continue; 2350 2351 if (sensor->id == ST_LSM6DSX_ID_EXT0 || 2352 sensor->id == ST_LSM6DSX_ID_EXT1 || 2353 sensor->id == ST_LSM6DSX_ID_EXT2) 2354 err = st_lsm6dsx_shub_set_enable(sensor, true); 2355 else 2356 err = st_lsm6dsx_sensor_set_enable(sensor, true); 2357 if (err < 0) 2358 return err; 2359 2360 hw->suspend_mask &= ~BIT(sensor->id); 2361 } 2362 2363 if (hw->fifo_mask) 2364 err = st_lsm6dsx_resume_fifo(hw); 2365 2366 return err; 2367 } 2368 2369 EXPORT_NS_SIMPLE_DEV_PM_OPS(st_lsm6dsx_pm_ops, st_lsm6dsx_suspend, 2370 st_lsm6dsx_resume, IIO_LSM6DSX); 2371 2372 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo.bianconi@st.com>"); 2373 MODULE_AUTHOR("Denis Ciocca <denis.ciocca@st.com>"); 2374 MODULE_DESCRIPTION("STMicroelectronics st_lsm6dsx driver"); 2375 MODULE_LICENSE("GPL v2"); 2376