1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * STMicroelectronics st_lsm6dsx sensor driver 4 * 5 * Copyright 2016 STMicroelectronics Inc. 6 * 7 * Lorenzo Bianconi <lorenzo.bianconi@st.com> 8 * Denis Ciocca <denis.ciocca@st.com> 9 */ 10 11 #ifndef ST_LSM6DSX_H 12 #define ST_LSM6DSX_H 13 14 #include <linux/device.h> 15 #include <linux/iio/iio.h> 16 17 #define ST_LSM6DS3_DEV_NAME "lsm6ds3" 18 #define ST_LSM6DS3H_DEV_NAME "lsm6ds3h" 19 #define ST_LSM6DSL_DEV_NAME "lsm6dsl" 20 #define ST_LSM6DSM_DEV_NAME "lsm6dsm" 21 #define ST_ISM330DLC_DEV_NAME "ism330dlc" 22 #define ST_LSM6DSO_DEV_NAME "lsm6dso" 23 #define ST_ASM330LHH_DEV_NAME "asm330lhh" 24 #define ST_LSM6DSOX_DEV_NAME "lsm6dsox" 25 #define ST_LSM6DSR_DEV_NAME "lsm6dsr" 26 #define ST_LSM6DS3TRC_DEV_NAME "lsm6ds3tr-c" 27 #define ST_ISM330DHCX_DEV_NAME "ism330dhcx" 28 #define ST_LSM9DS1_DEV_NAME "lsm9ds1-imu" 29 #define ST_LSM6DS0_DEV_NAME "lsm6ds0" 30 #define ST_LSM6DSRX_DEV_NAME "lsm6dsrx" 31 32 enum st_lsm6dsx_hw_id { 33 ST_LSM6DS3_ID, 34 ST_LSM6DS3H_ID, 35 ST_LSM6DSL_ID, 36 ST_LSM6DSM_ID, 37 ST_ISM330DLC_ID, 38 ST_LSM6DSO_ID, 39 ST_ASM330LHH_ID, 40 ST_LSM6DSOX_ID, 41 ST_LSM6DSR_ID, 42 ST_LSM6DS3TRC_ID, 43 ST_ISM330DHCX_ID, 44 ST_LSM9DS1_ID, 45 ST_LSM6DS0_ID, 46 ST_LSM6DSRX_ID, 47 ST_LSM6DSX_MAX_ID, 48 }; 49 50 #define ST_LSM6DSX_BUFF_SIZE 512 51 #define ST_LSM6DSX_CHAN_SIZE 2 52 #define ST_LSM6DSX_SAMPLE_SIZE 6 53 #define ST_LSM6DSX_TAG_SIZE 1 54 #define ST_LSM6DSX_TAGGED_SAMPLE_SIZE (ST_LSM6DSX_SAMPLE_SIZE + \ 55 ST_LSM6DSX_TAG_SIZE) 56 #define ST_LSM6DSX_MAX_WORD_LEN ((32 / ST_LSM6DSX_SAMPLE_SIZE) * \ 57 ST_LSM6DSX_SAMPLE_SIZE) 58 #define ST_LSM6DSX_MAX_TAGGED_WORD_LEN ((32 / ST_LSM6DSX_TAGGED_SAMPLE_SIZE) \ 59 * ST_LSM6DSX_TAGGED_SAMPLE_SIZE) 60 #define ST_LSM6DSX_SHIFT_VAL(val, mask) (((val) << __ffs(mask)) & (mask)) 61 62 #define ST_LSM6DSX_CHANNEL_ACC(chan_type, addr, mod, scan_idx) \ 63 { \ 64 .type = chan_type, \ 65 .address = addr, \ 66 .modified = 1, \ 67 .channel2 = mod, \ 68 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 69 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 70 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 71 .scan_index = scan_idx, \ 72 .scan_type = { \ 73 .sign = 's', \ 74 .realbits = 16, \ 75 .storagebits = 16, \ 76 .endianness = IIO_LE, \ 77 }, \ 78 .event_spec = &st_lsm6dsx_event, \ 79 .num_event_specs = 1, \ 80 } 81 82 #define ST_LSM6DSX_CHANNEL(chan_type, addr, mod, scan_idx) \ 83 { \ 84 .type = chan_type, \ 85 .address = addr, \ 86 .modified = 1, \ 87 .channel2 = mod, \ 88 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 89 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 90 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 91 .scan_index = scan_idx, \ 92 .scan_type = { \ 93 .sign = 's', \ 94 .realbits = 16, \ 95 .storagebits = 16, \ 96 .endianness = IIO_LE, \ 97 }, \ 98 } 99 100 struct st_lsm6dsx_reg { 101 u8 addr; 102 u8 mask; 103 }; 104 105 struct st_lsm6dsx_sensor; 106 struct st_lsm6dsx_hw; 107 108 struct st_lsm6dsx_odr { 109 u32 milli_hz; 110 u8 val; 111 }; 112 113 #define ST_LSM6DSX_ODR_LIST_SIZE 6 114 struct st_lsm6dsx_odr_table_entry { 115 struct st_lsm6dsx_reg reg; 116 117 struct st_lsm6dsx_odr odr_avl[ST_LSM6DSX_ODR_LIST_SIZE]; 118 int odr_len; 119 }; 120 121 struct st_lsm6dsx_fs { 122 u32 gain; 123 u8 val; 124 }; 125 126 #define ST_LSM6DSX_FS_LIST_SIZE 4 127 struct st_lsm6dsx_fs_table_entry { 128 struct st_lsm6dsx_reg reg; 129 130 struct st_lsm6dsx_fs fs_avl[ST_LSM6DSX_FS_LIST_SIZE]; 131 int fs_len; 132 }; 133 134 /** 135 * struct st_lsm6dsx_fifo_ops - ST IMU FIFO settings 136 * @update_fifo: Update FIFO configuration callback. 137 * @read_fifo: Read FIFO callback. 138 * @fifo_th: FIFO threshold register info (addr + mask). 139 * @fifo_diff: FIFO diff status register info (addr + mask). 140 * @th_wl: FIFO threshold word length. 141 */ 142 struct st_lsm6dsx_fifo_ops { 143 int (*update_fifo)(struct st_lsm6dsx_sensor *sensor, bool enable); 144 int (*read_fifo)(struct st_lsm6dsx_hw *hw); 145 struct { 146 u8 addr; 147 u16 mask; 148 } fifo_th; 149 struct { 150 u8 addr; 151 u16 mask; 152 } fifo_diff; 153 u8 th_wl; 154 }; 155 156 /** 157 * struct st_lsm6dsx_hw_ts_settings - ST IMU hw timer settings 158 * @timer_en: Hw timer enable register info (addr + mask). 159 * @hr_timer: Hw timer resolution register info (addr + mask). 160 * @fifo_en: Hw timer FIFO enable register info (addr + mask). 161 * @decimator: Hw timer FIFO decimator register info (addr + mask). 162 * @freq_fine: Difference in % of ODR with respect to the typical. 163 */ 164 struct st_lsm6dsx_hw_ts_settings { 165 struct st_lsm6dsx_reg timer_en; 166 struct st_lsm6dsx_reg hr_timer; 167 struct st_lsm6dsx_reg fifo_en; 168 struct st_lsm6dsx_reg decimator; 169 u8 freq_fine; 170 }; 171 172 /** 173 * struct st_lsm6dsx_shub_settings - ST IMU hw i2c controller settings 174 * @page_mux: register page mux info (addr + mask). 175 * @master_en: master config register info (addr + mask). 176 * @pullup_en: i2c controller pull-up register info (addr + mask). 177 * @aux_sens: aux sensor register info (addr + mask). 178 * @wr_once: write_once register info (addr + mask). 179 * @shub_out: sensor hub first output register info. 180 * @slv0_addr: slave0 address in secondary page. 181 * @dw_slv0_addr: slave0 write register address in secondary page. 182 * @batch_en: Enable/disable FIFO batching. 183 */ 184 struct st_lsm6dsx_shub_settings { 185 struct st_lsm6dsx_reg page_mux; 186 struct st_lsm6dsx_reg master_en; 187 struct st_lsm6dsx_reg pullup_en; 188 struct st_lsm6dsx_reg aux_sens; 189 struct st_lsm6dsx_reg wr_once; 190 u8 shub_out; 191 u8 slv0_addr; 192 u8 dw_slv0_addr; 193 u8 batch_en; 194 }; 195 196 struct st_lsm6dsx_event_settings { 197 struct st_lsm6dsx_reg enable_reg; 198 struct st_lsm6dsx_reg wakeup_reg; 199 u8 wakeup_src_reg; 200 u8 wakeup_src_status_mask; 201 u8 wakeup_src_z_mask; 202 u8 wakeup_src_y_mask; 203 u8 wakeup_src_x_mask; 204 }; 205 206 enum st_lsm6dsx_ext_sensor_id { 207 ST_LSM6DSX_ID_MAGN, 208 }; 209 210 /** 211 * struct st_lsm6dsx_ext_dev_settings - i2c controller slave settings 212 * @i2c_addr: I2c slave address list. 213 * @wai: Wai address info. 214 * @id: external sensor id. 215 * @odr: Output data rate of the sensor [Hz]. 216 * @gain: Configured sensor sensitivity. 217 * @temp_comp: Temperature compensation register info (addr + mask). 218 * @pwr_table: Power on register info (addr + mask). 219 * @off_canc: Offset cancellation register info (addr + mask). 220 * @bdu: Block data update register info (addr + mask). 221 * @out: Output register info. 222 */ 223 struct st_lsm6dsx_ext_dev_settings { 224 u8 i2c_addr[2]; 225 struct { 226 u8 addr; 227 u8 val; 228 } wai; 229 enum st_lsm6dsx_ext_sensor_id id; 230 struct st_lsm6dsx_odr_table_entry odr_table; 231 struct st_lsm6dsx_fs_table_entry fs_table; 232 struct st_lsm6dsx_reg temp_comp; 233 struct { 234 struct st_lsm6dsx_reg reg; 235 u8 off_val; 236 u8 on_val; 237 } pwr_table; 238 struct st_lsm6dsx_reg off_canc; 239 struct st_lsm6dsx_reg bdu; 240 struct { 241 u8 addr; 242 u8 len; 243 } out; 244 }; 245 246 /** 247 * struct st_lsm6dsx_settings - ST IMU sensor settings 248 * @wai: Sensor WhoAmI default value. 249 * @reset: register address for reset. 250 * @boot: register address for boot. 251 * @bdu: register address for Block Data Update. 252 * @max_fifo_size: Sensor max fifo length in FIFO words. 253 * @id: List of hw id/device name supported by the driver configuration. 254 * @channels: IIO channels supported by the device. 255 * @irq_config: interrupts related registers. 256 * @drdy_mask: register info for data-ready mask (addr + mask). 257 * @odr_table: Hw sensors odr table (Hz + val). 258 * @fs_table: Hw sensors gain table (gain + val). 259 * @decimator: List of decimator register info (addr + mask). 260 * @batch: List of FIFO batching register info (addr + mask). 261 * @fifo_ops: Sensor hw FIFO parameters. 262 * @ts_settings: Hw timer related settings. 263 * @shub_settings: i2c controller related settings. 264 */ 265 struct st_lsm6dsx_settings { 266 u8 wai; 267 struct st_lsm6dsx_reg reset; 268 struct st_lsm6dsx_reg boot; 269 struct st_lsm6dsx_reg bdu; 270 u16 max_fifo_size; 271 struct { 272 enum st_lsm6dsx_hw_id hw_id; 273 const char *name; 274 } id[ST_LSM6DSX_MAX_ID]; 275 struct { 276 const struct iio_chan_spec *chan; 277 int len; 278 } channels[2]; 279 struct { 280 struct st_lsm6dsx_reg irq1; 281 struct st_lsm6dsx_reg irq2; 282 struct st_lsm6dsx_reg irq1_func; 283 struct st_lsm6dsx_reg irq2_func; 284 struct st_lsm6dsx_reg lir; 285 struct st_lsm6dsx_reg clear_on_read; 286 struct st_lsm6dsx_reg hla; 287 struct st_lsm6dsx_reg od; 288 } irq_config; 289 struct st_lsm6dsx_reg drdy_mask; 290 struct st_lsm6dsx_odr_table_entry odr_table[2]; 291 struct st_lsm6dsx_fs_table_entry fs_table[2]; 292 struct st_lsm6dsx_reg decimator[ST_LSM6DSX_MAX_ID]; 293 struct st_lsm6dsx_reg batch[ST_LSM6DSX_MAX_ID]; 294 struct st_lsm6dsx_fifo_ops fifo_ops; 295 struct st_lsm6dsx_hw_ts_settings ts_settings; 296 struct st_lsm6dsx_shub_settings shub_settings; 297 struct st_lsm6dsx_event_settings event_settings; 298 }; 299 300 enum st_lsm6dsx_sensor_id { 301 ST_LSM6DSX_ID_GYRO, 302 ST_LSM6DSX_ID_ACC, 303 ST_LSM6DSX_ID_EXT0, 304 ST_LSM6DSX_ID_EXT1, 305 ST_LSM6DSX_ID_EXT2, 306 ST_LSM6DSX_ID_MAX, 307 }; 308 309 enum st_lsm6dsx_fifo_mode { 310 ST_LSM6DSX_FIFO_BYPASS = 0x0, 311 ST_LSM6DSX_FIFO_CONT = 0x6, 312 }; 313 314 /** 315 * struct st_lsm6dsx_sensor - ST IMU sensor instance 316 * @name: Sensor name. 317 * @id: Sensor identifier. 318 * @hw: Pointer to instance of struct st_lsm6dsx_hw. 319 * @gain: Configured sensor sensitivity. 320 * @odr: Output data rate of the sensor [Hz]. 321 * @watermark: Sensor watermark level. 322 * @sip: Number of samples in a given pattern. 323 * @decimator: FIFO decimation factor. 324 * @ts_ref: Sensor timestamp reference for hw one. 325 * @ext_info: Sensor settings if it is connected to i2c controller 326 */ 327 struct st_lsm6dsx_sensor { 328 char name[32]; 329 enum st_lsm6dsx_sensor_id id; 330 struct st_lsm6dsx_hw *hw; 331 332 u32 gain; 333 u32 odr; 334 335 u16 watermark; 336 u8 sip; 337 u8 decimator; 338 s64 ts_ref; 339 340 struct { 341 const struct st_lsm6dsx_ext_dev_settings *settings; 342 u8 addr; 343 } ext_info; 344 }; 345 346 /** 347 * struct st_lsm6dsx_hw - ST IMU MEMS hw instance 348 * @dev: Pointer to instance of struct device (I2C or SPI). 349 * @regmap: Register map of the device. 350 * @irq: Device interrupt line (I2C or SPI). 351 * @fifo_lock: Mutex to prevent concurrent access to the hw FIFO. 352 * @conf_lock: Mutex to prevent concurrent FIFO configuration update. 353 * @page_lock: Mutex to prevent concurrent memory page configuration. 354 * @fifo_mode: FIFO operating mode supported by the device. 355 * @suspend_mask: Suspended sensor bitmask. 356 * @enable_mask: Enabled sensor bitmask. 357 * @ts_gain: Hw timestamp rate after internal calibration. 358 * @ts_sip: Total number of timestamp samples in a given pattern. 359 * @sip: Total number of samples (acc/gyro/ts) in a given pattern. 360 * @buff: Device read buffer. 361 * @irq_routing: pointer to interrupt routing configuration. 362 * @event_threshold: wakeup event threshold. 363 * @enable_event: enabled event bitmask. 364 * @iio_devs: Pointers to acc/gyro iio_dev instances. 365 * @settings: Pointer to the specific sensor settings in use. 366 */ 367 struct st_lsm6dsx_hw { 368 struct device *dev; 369 struct regmap *regmap; 370 int irq; 371 372 struct mutex fifo_lock; 373 struct mutex conf_lock; 374 struct mutex page_lock; 375 376 enum st_lsm6dsx_fifo_mode fifo_mode; 377 u8 suspend_mask; 378 u8 enable_mask; 379 s64 ts_gain; 380 u8 ts_sip; 381 u8 sip; 382 383 const struct st_lsm6dsx_reg *irq_routing; 384 u8 event_threshold; 385 u8 enable_event; 386 387 u8 *buff; 388 389 struct iio_dev *iio_devs[ST_LSM6DSX_ID_MAX]; 390 391 const struct st_lsm6dsx_settings *settings; 392 }; 393 394 static const struct iio_event_spec st_lsm6dsx_event = { 395 .type = IIO_EV_TYPE_THRESH, 396 .dir = IIO_EV_DIR_EITHER, 397 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 398 BIT(IIO_EV_INFO_ENABLE) 399 }; 400 401 static const unsigned long st_lsm6dsx_available_scan_masks[] = {0x7, 0x0}; 402 extern const struct dev_pm_ops st_lsm6dsx_pm_ops; 403 404 int st_lsm6dsx_probe(struct device *dev, int irq, int hw_id, 405 struct regmap *regmap); 406 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, 407 bool enable); 408 int st_lsm6dsx_fifo_setup(struct st_lsm6dsx_hw *hw); 409 int st_lsm6dsx_set_watermark(struct iio_dev *iio_dev, unsigned int val); 410 int st_lsm6dsx_update_watermark(struct st_lsm6dsx_sensor *sensor, 411 u16 watermark); 412 int st_lsm6dsx_update_fifo(struct st_lsm6dsx_sensor *sensor, bool enable); 413 int st_lsm6dsx_flush_fifo(struct st_lsm6dsx_hw *hw); 414 int st_lsm6dsx_set_fifo_mode(struct st_lsm6dsx_hw *hw, 415 enum st_lsm6dsx_fifo_mode fifo_mode); 416 int st_lsm6dsx_read_fifo(struct st_lsm6dsx_hw *hw); 417 int st_lsm6dsx_read_tagged_fifo(struct st_lsm6dsx_hw *hw); 418 int st_lsm6dsx_check_odr(struct st_lsm6dsx_sensor *sensor, u32 odr, u8 *val); 419 int st_lsm6dsx_shub_probe(struct st_lsm6dsx_hw *hw, const char *name); 420 int st_lsm6dsx_shub_set_enable(struct st_lsm6dsx_sensor *sensor, bool enable); 421 int st_lsm6dsx_set_page(struct st_lsm6dsx_hw *hw, bool enable); 422 423 static inline int 424 st_lsm6dsx_update_bits_locked(struct st_lsm6dsx_hw *hw, unsigned int addr, 425 unsigned int mask, unsigned int val) 426 { 427 int err; 428 429 mutex_lock(&hw->page_lock); 430 err = regmap_update_bits(hw->regmap, addr, mask, val); 431 mutex_unlock(&hw->page_lock); 432 433 return err; 434 } 435 436 static inline int 437 st_lsm6dsx_read_locked(struct st_lsm6dsx_hw *hw, unsigned int addr, 438 void *val, unsigned int len) 439 { 440 int err; 441 442 mutex_lock(&hw->page_lock); 443 err = regmap_bulk_read(hw->regmap, addr, val, len); 444 mutex_unlock(&hw->page_lock); 445 446 return err; 447 } 448 449 static inline int 450 st_lsm6dsx_write_locked(struct st_lsm6dsx_hw *hw, unsigned int addr, 451 unsigned int val) 452 { 453 int err; 454 455 mutex_lock(&hw->page_lock); 456 err = regmap_write(hw->regmap, addr, val); 457 mutex_unlock(&hw->page_lock); 458 459 return err; 460 } 461 462 #endif /* ST_LSM6DSX_H */ 463