1 /* 2 * Copyright (C) 2012 Invensense, Inc. 3 * 4 * This software is licensed under the terms of the GNU General Public 5 * License version 2, as published by the Free Software Foundation, and 6 * may be copied, distributed, and modified under those terms. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/slab.h> 16 #include <linux/i2c.h> 17 #include <linux/err.h> 18 #include <linux/delay.h> 19 #include <linux/sysfs.h> 20 #include <linux/jiffies.h> 21 #include <linux/irq.h> 22 #include <linux/interrupt.h> 23 #include <linux/kfifo.h> 24 #include <linux/spinlock.h> 25 #include <linux/iio/iio.h> 26 #include <linux/acpi.h> 27 #include "inv_mpu_iio.h" 28 29 /* 30 * this is the gyro scale translated from dynamic range plus/minus 31 * {250, 500, 1000, 2000} to rad/s 32 */ 33 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724}; 34 35 /* 36 * this is the accel scale translated from dynamic range plus/minus 37 * {2, 4, 8, 16} to m/s^2 38 */ 39 static const int accel_scale[] = {598, 1196, 2392, 4785}; 40 41 static const struct inv_mpu6050_reg_map reg_set_6500 = { 42 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 43 .lpf = INV_MPU6050_REG_CONFIG, 44 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 45 .fifo_en = INV_MPU6050_REG_FIFO_EN, 46 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 47 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 48 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 49 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 50 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 51 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 52 .temperature = INV_MPU6050_REG_TEMPERATURE, 53 .int_enable = INV_MPU6050_REG_INT_ENABLE, 54 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 55 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 56 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 57 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 58 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 59 }; 60 61 static const struct inv_mpu6050_reg_map reg_set_6050 = { 62 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 63 .lpf = INV_MPU6050_REG_CONFIG, 64 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 65 .fifo_en = INV_MPU6050_REG_FIFO_EN, 66 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 67 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 68 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 69 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 70 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 71 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 72 .temperature = INV_MPU6050_REG_TEMPERATURE, 73 .int_enable = INV_MPU6050_REG_INT_ENABLE, 74 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 75 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 76 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 77 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET, 78 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 79 }; 80 81 static const struct inv_mpu6050_chip_config chip_config_6050 = { 82 .fsr = INV_MPU6050_FSR_2000DPS, 83 .lpf = INV_MPU6050_FILTER_20HZ, 84 .fifo_rate = INV_MPU6050_INIT_FIFO_RATE, 85 .gyro_fifo_enable = false, 86 .accl_fifo_enable = false, 87 .accl_fs = INV_MPU6050_FS_02G, 88 }; 89 90 /* Indexed by enum inv_devices */ 91 static const struct inv_mpu6050_hw hw_info[] = { 92 { 93 .whoami = INV_MPU6050_WHOAMI_VALUE, 94 .name = "MPU6050", 95 .reg = ®_set_6050, 96 .config = &chip_config_6050, 97 }, 98 { 99 .whoami = INV_MPU6500_WHOAMI_VALUE, 100 .name = "MPU6500", 101 .reg = ®_set_6500, 102 .config = &chip_config_6050, 103 }, 104 { 105 .whoami = INV_MPU6000_WHOAMI_VALUE, 106 .name = "MPU6000", 107 .reg = ®_set_6050, 108 .config = &chip_config_6050, 109 }, 110 { 111 .whoami = INV_MPU9150_WHOAMI_VALUE, 112 .name = "MPU9150", 113 .reg = ®_set_6050, 114 .config = &chip_config_6050, 115 }, 116 { 117 .whoami = INV_MPU9250_WHOAMI_VALUE, 118 .name = "MPU9250", 119 .reg = ®_set_6500, 120 .config = &chip_config_6050, 121 }, 122 { 123 .whoami = INV_ICM20608_WHOAMI_VALUE, 124 .name = "ICM20608", 125 .reg = ®_set_6500, 126 .config = &chip_config_6050, 127 }, 128 }; 129 130 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask) 131 { 132 unsigned int d, mgmt_1; 133 int result; 134 /* 135 * switch clock needs to be careful. Only when gyro is on, can 136 * clock source be switched to gyro. Otherwise, it must be set to 137 * internal clock 138 */ 139 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) { 140 result = regmap_read(st->map, st->reg->pwr_mgmt_1, &mgmt_1); 141 if (result) 142 return result; 143 144 mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK; 145 } 146 147 if ((mask == INV_MPU6050_BIT_PWR_GYRO_STBY) && (!en)) { 148 /* 149 * turning off gyro requires switch to internal clock first. 150 * Then turn off gyro engine 151 */ 152 mgmt_1 |= INV_CLK_INTERNAL; 153 result = regmap_write(st->map, st->reg->pwr_mgmt_1, mgmt_1); 154 if (result) 155 return result; 156 } 157 158 result = regmap_read(st->map, st->reg->pwr_mgmt_2, &d); 159 if (result) 160 return result; 161 if (en) 162 d &= ~mask; 163 else 164 d |= mask; 165 result = regmap_write(st->map, st->reg->pwr_mgmt_2, d); 166 if (result) 167 return result; 168 169 if (en) { 170 /* Wait for output stabilize */ 171 msleep(INV_MPU6050_TEMP_UP_TIME); 172 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) { 173 /* switch internal clock to PLL */ 174 mgmt_1 |= INV_CLK_PLL; 175 result = regmap_write(st->map, 176 st->reg->pwr_mgmt_1, mgmt_1); 177 if (result) 178 return result; 179 } 180 } 181 182 return 0; 183 } 184 185 int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on) 186 { 187 int result = 0; 188 189 if (power_on) { 190 /* Already under indio-dev->mlock mutex */ 191 if (!st->powerup_count) 192 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 0); 193 if (!result) 194 st->powerup_count++; 195 } else { 196 st->powerup_count--; 197 if (!st->powerup_count) 198 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 199 INV_MPU6050_BIT_SLEEP); 200 } 201 202 if (result) 203 return result; 204 205 if (power_on) 206 usleep_range(INV_MPU6050_REG_UP_TIME_MIN, 207 INV_MPU6050_REG_UP_TIME_MAX); 208 209 return 0; 210 } 211 EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg); 212 213 /** 214 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO. 215 * 216 * Initial configuration: 217 * FSR: ± 2000DPS 218 * DLPF: 20Hz 219 * FIFO rate: 50Hz 220 * Clock source: Gyro PLL 221 */ 222 static int inv_mpu6050_init_config(struct iio_dev *indio_dev) 223 { 224 int result; 225 u8 d; 226 struct inv_mpu6050_state *st = iio_priv(indio_dev); 227 228 result = inv_mpu6050_set_power_itg(st, true); 229 if (result) 230 return result; 231 d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT); 232 result = regmap_write(st->map, st->reg->gyro_config, d); 233 if (result) 234 return result; 235 236 d = INV_MPU6050_FILTER_20HZ; 237 result = regmap_write(st->map, st->reg->lpf, d); 238 if (result) 239 return result; 240 241 d = INV_MPU6050_ONE_K_HZ / INV_MPU6050_INIT_FIFO_RATE - 1; 242 result = regmap_write(st->map, st->reg->sample_rate_div, d); 243 if (result) 244 return result; 245 246 d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 247 result = regmap_write(st->map, st->reg->accl_config, d); 248 if (result) 249 return result; 250 251 memcpy(&st->chip_config, hw_info[st->chip_type].config, 252 sizeof(struct inv_mpu6050_chip_config)); 253 result = inv_mpu6050_set_power_itg(st, false); 254 255 return result; 256 } 257 258 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg, 259 int axis, int val) 260 { 261 int ind, result; 262 __be16 d = cpu_to_be16(val); 263 264 ind = (axis - IIO_MOD_X) * 2; 265 result = regmap_bulk_write(st->map, reg + ind, (u8 *)&d, 2); 266 if (result) 267 return -EINVAL; 268 269 return 0; 270 } 271 272 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg, 273 int axis, int *val) 274 { 275 int ind, result; 276 __be16 d; 277 278 ind = (axis - IIO_MOD_X) * 2; 279 result = regmap_bulk_read(st->map, reg + ind, (u8 *)&d, 2); 280 if (result) 281 return -EINVAL; 282 *val = (short)be16_to_cpup(&d); 283 284 return IIO_VAL_INT; 285 } 286 287 static int 288 inv_mpu6050_read_raw(struct iio_dev *indio_dev, 289 struct iio_chan_spec const *chan, 290 int *val, int *val2, long mask) 291 { 292 struct inv_mpu6050_state *st = iio_priv(indio_dev); 293 int ret = 0; 294 295 switch (mask) { 296 case IIO_CHAN_INFO_RAW: 297 { 298 int result; 299 300 ret = IIO_VAL_INT; 301 result = 0; 302 mutex_lock(&indio_dev->mlock); 303 if (!st->chip_config.enable) { 304 result = inv_mpu6050_set_power_itg(st, true); 305 if (result) 306 goto error_read_raw; 307 } 308 /* when enable is on, power is already on */ 309 switch (chan->type) { 310 case IIO_ANGL_VEL: 311 if (!st->chip_config.gyro_fifo_enable || 312 !st->chip_config.enable) { 313 result = inv_mpu6050_switch_engine(st, true, 314 INV_MPU6050_BIT_PWR_GYRO_STBY); 315 if (result) 316 goto error_read_raw; 317 } 318 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro, 319 chan->channel2, val); 320 if (!st->chip_config.gyro_fifo_enable || 321 !st->chip_config.enable) { 322 result = inv_mpu6050_switch_engine(st, false, 323 INV_MPU6050_BIT_PWR_GYRO_STBY); 324 if (result) 325 goto error_read_raw; 326 } 327 break; 328 case IIO_ACCEL: 329 if (!st->chip_config.accl_fifo_enable || 330 !st->chip_config.enable) { 331 result = inv_mpu6050_switch_engine(st, true, 332 INV_MPU6050_BIT_PWR_ACCL_STBY); 333 if (result) 334 goto error_read_raw; 335 } 336 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl, 337 chan->channel2, val); 338 if (!st->chip_config.accl_fifo_enable || 339 !st->chip_config.enable) { 340 result = inv_mpu6050_switch_engine(st, false, 341 INV_MPU6050_BIT_PWR_ACCL_STBY); 342 if (result) 343 goto error_read_raw; 344 } 345 break; 346 case IIO_TEMP: 347 /* wait for stablization */ 348 msleep(INV_MPU6050_SENSOR_UP_TIME); 349 ret = inv_mpu6050_sensor_show(st, st->reg->temperature, 350 IIO_MOD_X, val); 351 break; 352 default: 353 ret = -EINVAL; 354 break; 355 } 356 error_read_raw: 357 if (!st->chip_config.enable) 358 result |= inv_mpu6050_set_power_itg(st, false); 359 mutex_unlock(&indio_dev->mlock); 360 if (result) 361 return result; 362 363 return ret; 364 } 365 case IIO_CHAN_INFO_SCALE: 366 switch (chan->type) { 367 case IIO_ANGL_VEL: 368 *val = 0; 369 *val2 = gyro_scale_6050[st->chip_config.fsr]; 370 371 return IIO_VAL_INT_PLUS_NANO; 372 case IIO_ACCEL: 373 *val = 0; 374 *val2 = accel_scale[st->chip_config.accl_fs]; 375 376 return IIO_VAL_INT_PLUS_MICRO; 377 case IIO_TEMP: 378 *val = 0; 379 *val2 = INV_MPU6050_TEMP_SCALE; 380 381 return IIO_VAL_INT_PLUS_MICRO; 382 default: 383 return -EINVAL; 384 } 385 case IIO_CHAN_INFO_OFFSET: 386 switch (chan->type) { 387 case IIO_TEMP: 388 *val = INV_MPU6050_TEMP_OFFSET; 389 390 return IIO_VAL_INT; 391 default: 392 return -EINVAL; 393 } 394 case IIO_CHAN_INFO_CALIBBIAS: 395 switch (chan->type) { 396 case IIO_ANGL_VEL: 397 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset, 398 chan->channel2, val); 399 return IIO_VAL_INT; 400 case IIO_ACCEL: 401 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset, 402 chan->channel2, val); 403 return IIO_VAL_INT; 404 405 default: 406 return -EINVAL; 407 } 408 default: 409 return -EINVAL; 410 } 411 } 412 413 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val) 414 { 415 int result, i; 416 u8 d; 417 418 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) { 419 if (gyro_scale_6050[i] == val) { 420 d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT); 421 result = regmap_write(st->map, st->reg->gyro_config, d); 422 if (result) 423 return result; 424 425 st->chip_config.fsr = i; 426 return 0; 427 } 428 } 429 430 return -EINVAL; 431 } 432 433 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev, 434 struct iio_chan_spec const *chan, long mask) 435 { 436 switch (mask) { 437 case IIO_CHAN_INFO_SCALE: 438 switch (chan->type) { 439 case IIO_ANGL_VEL: 440 return IIO_VAL_INT_PLUS_NANO; 441 default: 442 return IIO_VAL_INT_PLUS_MICRO; 443 } 444 default: 445 return IIO_VAL_INT_PLUS_MICRO; 446 } 447 448 return -EINVAL; 449 } 450 451 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val) 452 { 453 int result, i; 454 u8 d; 455 456 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) { 457 if (accel_scale[i] == val) { 458 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 459 result = regmap_write(st->map, st->reg->accl_config, d); 460 if (result) 461 return result; 462 463 st->chip_config.accl_fs = i; 464 return 0; 465 } 466 } 467 468 return -EINVAL; 469 } 470 471 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, 472 struct iio_chan_spec const *chan, 473 int val, int val2, long mask) 474 { 475 struct inv_mpu6050_state *st = iio_priv(indio_dev); 476 int result; 477 478 mutex_lock(&indio_dev->mlock); 479 /* 480 * we should only update scale when the chip is disabled, i.e. 481 * not running 482 */ 483 if (st->chip_config.enable) { 484 result = -EBUSY; 485 goto error_write_raw; 486 } 487 result = inv_mpu6050_set_power_itg(st, true); 488 if (result) 489 goto error_write_raw; 490 491 switch (mask) { 492 case IIO_CHAN_INFO_SCALE: 493 switch (chan->type) { 494 case IIO_ANGL_VEL: 495 result = inv_mpu6050_write_gyro_scale(st, val2); 496 break; 497 case IIO_ACCEL: 498 result = inv_mpu6050_write_accel_scale(st, val2); 499 break; 500 default: 501 result = -EINVAL; 502 break; 503 } 504 break; 505 case IIO_CHAN_INFO_CALIBBIAS: 506 switch (chan->type) { 507 case IIO_ANGL_VEL: 508 result = inv_mpu6050_sensor_set(st, 509 st->reg->gyro_offset, 510 chan->channel2, val); 511 break; 512 case IIO_ACCEL: 513 result = inv_mpu6050_sensor_set(st, 514 st->reg->accl_offset, 515 chan->channel2, val); 516 break; 517 default: 518 result = -EINVAL; 519 } 520 default: 521 result = -EINVAL; 522 break; 523 } 524 525 error_write_raw: 526 result |= inv_mpu6050_set_power_itg(st, false); 527 mutex_unlock(&indio_dev->mlock); 528 529 return result; 530 } 531 532 /** 533 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate. 534 * 535 * Based on the Nyquist principle, the sampling rate must 536 * exceed twice of the bandwidth of the signal, or there 537 * would be alising. This function basically search for the 538 * correct low pass parameters based on the fifo rate, e.g, 539 * sampling frequency. 540 */ 541 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate) 542 { 543 const int hz[] = {188, 98, 42, 20, 10, 5}; 544 const int d[] = {INV_MPU6050_FILTER_188HZ, INV_MPU6050_FILTER_98HZ, 545 INV_MPU6050_FILTER_42HZ, INV_MPU6050_FILTER_20HZ, 546 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ}; 547 int i, h, result; 548 u8 data; 549 550 h = (rate >> 1); 551 i = 0; 552 while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1)) 553 i++; 554 data = d[i]; 555 result = regmap_write(st->map, st->reg->lpf, data); 556 if (result) 557 return result; 558 st->chip_config.lpf = data; 559 560 return 0; 561 } 562 563 /** 564 * inv_mpu6050_fifo_rate_store() - Set fifo rate. 565 */ 566 static ssize_t 567 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr, 568 const char *buf, size_t count) 569 { 570 s32 fifo_rate; 571 u8 d; 572 int result; 573 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 574 struct inv_mpu6050_state *st = iio_priv(indio_dev); 575 576 if (kstrtoint(buf, 10, &fifo_rate)) 577 return -EINVAL; 578 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE || 579 fifo_rate > INV_MPU6050_MAX_FIFO_RATE) 580 return -EINVAL; 581 if (fifo_rate == st->chip_config.fifo_rate) 582 return count; 583 584 mutex_lock(&indio_dev->mlock); 585 if (st->chip_config.enable) { 586 result = -EBUSY; 587 goto fifo_rate_fail; 588 } 589 result = inv_mpu6050_set_power_itg(st, true); 590 if (result) 591 goto fifo_rate_fail; 592 593 d = INV_MPU6050_ONE_K_HZ / fifo_rate - 1; 594 result = regmap_write(st->map, st->reg->sample_rate_div, d); 595 if (result) 596 goto fifo_rate_fail; 597 st->chip_config.fifo_rate = fifo_rate; 598 599 result = inv_mpu6050_set_lpf(st, fifo_rate); 600 if (result) 601 goto fifo_rate_fail; 602 603 fifo_rate_fail: 604 result |= inv_mpu6050_set_power_itg(st, false); 605 mutex_unlock(&indio_dev->mlock); 606 if (result) 607 return result; 608 609 return count; 610 } 611 612 /** 613 * inv_fifo_rate_show() - Get the current sampling rate. 614 */ 615 static ssize_t 616 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr, 617 char *buf) 618 { 619 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 620 621 return sprintf(buf, "%d\n", st->chip_config.fifo_rate); 622 } 623 624 /** 625 * inv_attr_show() - calling this function will show current 626 * parameters. 627 * 628 * Deprecated in favor of IIO mounting matrix API. 629 * 630 * See inv_get_mount_matrix() 631 */ 632 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr, 633 char *buf) 634 { 635 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 636 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 637 s8 *m; 638 639 switch (this_attr->address) { 640 /* 641 * In MPU6050, the two matrix are the same because gyro and accel 642 * are integrated in one chip 643 */ 644 case ATTR_GYRO_MATRIX: 645 case ATTR_ACCL_MATRIX: 646 m = st->plat_data.orientation; 647 648 return sprintf(buf, "%d, %d, %d; %d, %d, %d; %d, %d, %d\n", 649 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]); 650 default: 651 return -EINVAL; 652 } 653 } 654 655 /** 656 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense 657 * MPU6050 device. 658 * @indio_dev: The IIO device 659 * @trig: The new trigger 660 * 661 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050 662 * device, -EINVAL otherwise. 663 */ 664 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev, 665 struct iio_trigger *trig) 666 { 667 struct inv_mpu6050_state *st = iio_priv(indio_dev); 668 669 if (st->trig != trig) 670 return -EINVAL; 671 672 return 0; 673 } 674 675 static const struct iio_mount_matrix * 676 inv_get_mount_matrix(const struct iio_dev *indio_dev, 677 const struct iio_chan_spec *chan) 678 { 679 return &((struct inv_mpu6050_state *)iio_priv(indio_dev))->orientation; 680 } 681 682 static const struct iio_chan_spec_ext_info inv_ext_info[] = { 683 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix), 684 { }, 685 }; 686 687 #define INV_MPU6050_CHAN(_type, _channel2, _index) \ 688 { \ 689 .type = _type, \ 690 .modified = 1, \ 691 .channel2 = _channel2, \ 692 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 693 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 694 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 695 .scan_index = _index, \ 696 .scan_type = { \ 697 .sign = 's', \ 698 .realbits = 16, \ 699 .storagebits = 16, \ 700 .shift = 0, \ 701 .endianness = IIO_BE, \ 702 }, \ 703 .ext_info = inv_ext_info, \ 704 } 705 706 static const struct iio_chan_spec inv_mpu_channels[] = { 707 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP), 708 /* 709 * Note that temperature should only be via polled reading only, 710 * not the final scan elements output. 711 */ 712 { 713 .type = IIO_TEMP, 714 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) 715 | BIT(IIO_CHAN_INFO_OFFSET) 716 | BIT(IIO_CHAN_INFO_SCALE), 717 .scan_index = -1, 718 }, 719 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 720 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 721 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 722 723 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 724 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 725 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 726 }; 727 728 /* constant IIO attribute */ 729 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500"); 730 static IIO_CONST_ATTR(in_anglvel_scale_available, 731 "0.000133090 0.000266181 0.000532362 0.001064724"); 732 static IIO_CONST_ATTR(in_accel_scale_available, 733 "0.000598 0.001196 0.002392 0.004785"); 734 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show, 735 inv_mpu6050_fifo_rate_store); 736 737 /* Deprecated: kept for userspace backward compatibility. */ 738 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL, 739 ATTR_GYRO_MATRIX); 740 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL, 741 ATTR_ACCL_MATRIX); 742 743 static struct attribute *inv_attributes[] = { 744 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */ 745 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */ 746 &iio_dev_attr_sampling_frequency.dev_attr.attr, 747 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 748 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 749 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr, 750 NULL, 751 }; 752 753 static const struct attribute_group inv_attribute_group = { 754 .attrs = inv_attributes 755 }; 756 757 static const struct iio_info mpu_info = { 758 .driver_module = THIS_MODULE, 759 .read_raw = &inv_mpu6050_read_raw, 760 .write_raw = &inv_mpu6050_write_raw, 761 .write_raw_get_fmt = &inv_write_raw_get_fmt, 762 .attrs = &inv_attribute_group, 763 .validate_trigger = inv_mpu6050_validate_trigger, 764 }; 765 766 /** 767 * inv_check_and_setup_chip() - check and setup chip. 768 */ 769 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st) 770 { 771 int result; 772 unsigned int regval; 773 774 st->hw = &hw_info[st->chip_type]; 775 st->reg = hw_info[st->chip_type].reg; 776 777 /* reset to make sure previous state are not there */ 778 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 779 INV_MPU6050_BIT_H_RESET); 780 if (result) 781 return result; 782 msleep(INV_MPU6050_POWER_UP_TIME); 783 784 /* check chip self-identification */ 785 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val); 786 if (result) 787 return result; 788 if (regval != st->hw->whoami) { 789 dev_warn(regmap_get_device(st->map), 790 "whoami mismatch got %#02x expected %#02hhx for %s\n", 791 regval, st->hw->whoami, st->hw->name); 792 } 793 794 /* 795 * toggle power state. After reset, the sleep bit could be on 796 * or off depending on the OTP settings. Toggling power would 797 * make it in a definite state as well as making the hardware 798 * state align with the software state 799 */ 800 result = inv_mpu6050_set_power_itg(st, false); 801 if (result) 802 return result; 803 result = inv_mpu6050_set_power_itg(st, true); 804 if (result) 805 return result; 806 807 result = inv_mpu6050_switch_engine(st, false, 808 INV_MPU6050_BIT_PWR_ACCL_STBY); 809 if (result) 810 return result; 811 result = inv_mpu6050_switch_engine(st, false, 812 INV_MPU6050_BIT_PWR_GYRO_STBY); 813 if (result) 814 return result; 815 816 return 0; 817 } 818 819 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, 820 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type) 821 { 822 struct inv_mpu6050_state *st; 823 struct iio_dev *indio_dev; 824 struct inv_mpu6050_platform_data *pdata; 825 struct device *dev = regmap_get_device(regmap); 826 int result; 827 828 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 829 if (!indio_dev) 830 return -ENOMEM; 831 832 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS); 833 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) { 834 dev_err(dev, "Bad invensense chip_type=%d name=%s\n", 835 chip_type, name); 836 return -ENODEV; 837 } 838 st = iio_priv(indio_dev); 839 st->chip_type = chip_type; 840 st->powerup_count = 0; 841 st->irq = irq; 842 st->map = regmap; 843 844 pdata = dev_get_platdata(dev); 845 if (!pdata) { 846 result = of_iio_read_mount_matrix(dev, "mount-matrix", 847 &st->orientation); 848 if (result) { 849 dev_err(dev, "Failed to retrieve mounting matrix %d\n", 850 result); 851 return result; 852 } 853 } else { 854 st->plat_data = *pdata; 855 } 856 857 /* power is turned on inside check chip type*/ 858 result = inv_check_and_setup_chip(st); 859 if (result) 860 return result; 861 862 if (inv_mpu_bus_setup) 863 inv_mpu_bus_setup(indio_dev); 864 865 result = inv_mpu6050_init_config(indio_dev); 866 if (result) { 867 dev_err(dev, "Could not initialize device.\n"); 868 return result; 869 } 870 871 dev_set_drvdata(dev, indio_dev); 872 indio_dev->dev.parent = dev; 873 /* name will be NULL when enumerated via ACPI */ 874 if (name) 875 indio_dev->name = name; 876 else 877 indio_dev->name = dev_name(dev); 878 indio_dev->channels = inv_mpu_channels; 879 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 880 881 indio_dev->info = &mpu_info; 882 indio_dev->modes = INDIO_BUFFER_TRIGGERED; 883 884 result = iio_triggered_buffer_setup(indio_dev, 885 inv_mpu6050_irq_handler, 886 inv_mpu6050_read_fifo, 887 NULL); 888 if (result) { 889 dev_err(dev, "configure buffer fail %d\n", result); 890 return result; 891 } 892 result = inv_mpu6050_probe_trigger(indio_dev); 893 if (result) { 894 dev_err(dev, "trigger probe fail %d\n", result); 895 goto out_unreg_ring; 896 } 897 898 INIT_KFIFO(st->timestamps); 899 spin_lock_init(&st->time_stamp_lock); 900 result = iio_device_register(indio_dev); 901 if (result) { 902 dev_err(dev, "IIO register fail %d\n", result); 903 goto out_remove_trigger; 904 } 905 906 return 0; 907 908 out_remove_trigger: 909 inv_mpu6050_remove_trigger(st); 910 out_unreg_ring: 911 iio_triggered_buffer_cleanup(indio_dev); 912 return result; 913 } 914 EXPORT_SYMBOL_GPL(inv_mpu_core_probe); 915 916 int inv_mpu_core_remove(struct device *dev) 917 { 918 struct iio_dev *indio_dev = dev_get_drvdata(dev); 919 920 iio_device_unregister(indio_dev); 921 inv_mpu6050_remove_trigger(iio_priv(indio_dev)); 922 iio_triggered_buffer_cleanup(indio_dev); 923 924 return 0; 925 } 926 EXPORT_SYMBOL_GPL(inv_mpu_core_remove); 927 928 #ifdef CONFIG_PM_SLEEP 929 930 static int inv_mpu_resume(struct device *dev) 931 { 932 return inv_mpu6050_set_power_itg(iio_priv(dev_get_drvdata(dev)), true); 933 } 934 935 static int inv_mpu_suspend(struct device *dev) 936 { 937 return inv_mpu6050_set_power_itg(iio_priv(dev_get_drvdata(dev)), false); 938 } 939 #endif /* CONFIG_PM_SLEEP */ 940 941 SIMPLE_DEV_PM_OPS(inv_mpu_pmops, inv_mpu_suspend, inv_mpu_resume); 942 EXPORT_SYMBOL_GPL(inv_mpu_pmops); 943 944 MODULE_AUTHOR("Invensense Corporation"); 945 MODULE_DESCRIPTION("Invensense device MPU6050 driver"); 946 MODULE_LICENSE("GPL"); 947