1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Invensense, Inc. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/slab.h> 8 #include <linux/i2c.h> 9 #include <linux/err.h> 10 #include <linux/delay.h> 11 #include <linux/sysfs.h> 12 #include <linux/jiffies.h> 13 #include <linux/irq.h> 14 #include <linux/interrupt.h> 15 #include <linux/iio/iio.h> 16 #include <linux/acpi.h> 17 #include <linux/platform_device.h> 18 #include <linux/regulator/consumer.h> 19 #include <linux/pm.h> 20 #include <linux/pm_runtime.h> 21 #include "inv_mpu_iio.h" 22 #include "inv_mpu_magn.h" 23 24 /* 25 * this is the gyro scale translated from dynamic range plus/minus 26 * {250, 500, 1000, 2000} to rad/s 27 */ 28 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724}; 29 30 /* 31 * this is the accel scale translated from dynamic range plus/minus 32 * {2, 4, 8, 16} to m/s^2 33 */ 34 static const int accel_scale[] = {598, 1196, 2392, 4785}; 35 36 static const struct inv_mpu6050_reg_map reg_set_icm20602 = { 37 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 38 .lpf = INV_MPU6050_REG_CONFIG, 39 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2, 40 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 41 .fifo_en = INV_MPU6050_REG_FIFO_EN, 42 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 43 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 44 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 45 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 46 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 47 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 48 .temperature = INV_MPU6050_REG_TEMPERATURE, 49 .int_enable = INV_MPU6050_REG_INT_ENABLE, 50 .int_status = INV_MPU6050_REG_INT_STATUS, 51 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 52 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 53 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 54 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 55 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 56 .i2c_if = INV_ICM20602_REG_I2C_IF, 57 }; 58 59 static const struct inv_mpu6050_reg_map reg_set_6500 = { 60 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 61 .lpf = INV_MPU6050_REG_CONFIG, 62 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2, 63 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 64 .fifo_en = INV_MPU6050_REG_FIFO_EN, 65 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 66 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 67 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 68 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 69 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 70 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 71 .temperature = INV_MPU6050_REG_TEMPERATURE, 72 .int_enable = INV_MPU6050_REG_INT_ENABLE, 73 .int_status = INV_MPU6050_REG_INT_STATUS, 74 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 75 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 76 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 77 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 78 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 79 .i2c_if = 0, 80 }; 81 82 static const struct inv_mpu6050_reg_map reg_set_6050 = { 83 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 84 .lpf = INV_MPU6050_REG_CONFIG, 85 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 86 .fifo_en = INV_MPU6050_REG_FIFO_EN, 87 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 88 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 89 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 90 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 91 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 92 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 93 .temperature = INV_MPU6050_REG_TEMPERATURE, 94 .int_enable = INV_MPU6050_REG_INT_ENABLE, 95 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 96 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 97 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 98 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET, 99 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 100 .i2c_if = 0, 101 }; 102 103 static const struct inv_mpu6050_chip_config chip_config_6050 = { 104 .clk = INV_CLK_INTERNAL, 105 .fsr = INV_MPU6050_FSR_2000DPS, 106 .lpf = INV_MPU6050_FILTER_20HZ, 107 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50), 108 .gyro_en = true, 109 .accl_en = true, 110 .temp_en = true, 111 .magn_en = false, 112 .gyro_fifo_enable = false, 113 .accl_fifo_enable = false, 114 .temp_fifo_enable = false, 115 .magn_fifo_enable = false, 116 .accl_fs = INV_MPU6050_FS_02G, 117 .user_ctrl = 0, 118 }; 119 120 static const struct inv_mpu6050_chip_config chip_config_6500 = { 121 .clk = INV_CLK_PLL, 122 .fsr = INV_MPU6050_FSR_2000DPS, 123 .lpf = INV_MPU6050_FILTER_20HZ, 124 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50), 125 .gyro_en = true, 126 .accl_en = true, 127 .temp_en = true, 128 .magn_en = false, 129 .gyro_fifo_enable = false, 130 .accl_fifo_enable = false, 131 .temp_fifo_enable = false, 132 .magn_fifo_enable = false, 133 .accl_fs = INV_MPU6050_FS_02G, 134 .user_ctrl = 0, 135 }; 136 137 /* Indexed by enum inv_devices */ 138 static const struct inv_mpu6050_hw hw_info[] = { 139 { 140 .whoami = INV_MPU6050_WHOAMI_VALUE, 141 .name = "MPU6050", 142 .reg = ®_set_6050, 143 .config = &chip_config_6050, 144 .fifo_size = 1024, 145 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 146 }, 147 { 148 .whoami = INV_MPU6500_WHOAMI_VALUE, 149 .name = "MPU6500", 150 .reg = ®_set_6500, 151 .config = &chip_config_6500, 152 .fifo_size = 512, 153 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 154 }, 155 { 156 .whoami = INV_MPU6515_WHOAMI_VALUE, 157 .name = "MPU6515", 158 .reg = ®_set_6500, 159 .config = &chip_config_6500, 160 .fifo_size = 512, 161 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 162 }, 163 { 164 .whoami = INV_MPU6880_WHOAMI_VALUE, 165 .name = "MPU6880", 166 .reg = ®_set_6500, 167 .config = &chip_config_6500, 168 .fifo_size = 4096, 169 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 170 }, 171 { 172 .whoami = INV_MPU6000_WHOAMI_VALUE, 173 .name = "MPU6000", 174 .reg = ®_set_6050, 175 .config = &chip_config_6050, 176 .fifo_size = 1024, 177 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 178 }, 179 { 180 .whoami = INV_MPU9150_WHOAMI_VALUE, 181 .name = "MPU9150", 182 .reg = ®_set_6050, 183 .config = &chip_config_6050, 184 .fifo_size = 1024, 185 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 186 }, 187 { 188 .whoami = INV_MPU9250_WHOAMI_VALUE, 189 .name = "MPU9250", 190 .reg = ®_set_6500, 191 .config = &chip_config_6500, 192 .fifo_size = 512, 193 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 194 }, 195 { 196 .whoami = INV_MPU9255_WHOAMI_VALUE, 197 .name = "MPU9255", 198 .reg = ®_set_6500, 199 .config = &chip_config_6500, 200 .fifo_size = 512, 201 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 202 }, 203 { 204 .whoami = INV_ICM20608_WHOAMI_VALUE, 205 .name = "ICM20608", 206 .reg = ®_set_6500, 207 .config = &chip_config_6500, 208 .fifo_size = 512, 209 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 210 }, 211 { 212 .whoami = INV_ICM20609_WHOAMI_VALUE, 213 .name = "ICM20609", 214 .reg = ®_set_6500, 215 .config = &chip_config_6500, 216 .fifo_size = 4 * 1024, 217 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 218 }, 219 { 220 .whoami = INV_ICM20689_WHOAMI_VALUE, 221 .name = "ICM20689", 222 .reg = ®_set_6500, 223 .config = &chip_config_6500, 224 .fifo_size = 4 * 1024, 225 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 226 }, 227 { 228 .whoami = INV_ICM20602_WHOAMI_VALUE, 229 .name = "ICM20602", 230 .reg = ®_set_icm20602, 231 .config = &chip_config_6500, 232 .fifo_size = 1008, 233 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 234 }, 235 { 236 .whoami = INV_ICM20690_WHOAMI_VALUE, 237 .name = "ICM20690", 238 .reg = ®_set_6500, 239 .config = &chip_config_6500, 240 .fifo_size = 1024, 241 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 242 }, 243 { 244 .whoami = INV_IAM20680_WHOAMI_VALUE, 245 .name = "IAM20680", 246 .reg = ®_set_6500, 247 .config = &chip_config_6500, 248 .fifo_size = 512, 249 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 250 }, 251 }; 252 253 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep, 254 int clock, int temp_dis) 255 { 256 u8 val; 257 258 if (clock < 0) 259 clock = st->chip_config.clk; 260 if (temp_dis < 0) 261 temp_dis = !st->chip_config.temp_en; 262 263 val = clock & INV_MPU6050_BIT_CLK_MASK; 264 if (temp_dis) 265 val |= INV_MPU6050_BIT_TEMP_DIS; 266 if (sleep) 267 val |= INV_MPU6050_BIT_SLEEP; 268 269 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val); 270 return regmap_write(st->map, st->reg->pwr_mgmt_1, val); 271 } 272 273 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st, 274 unsigned int clock) 275 { 276 int ret; 277 278 switch (st->chip_type) { 279 case INV_MPU6050: 280 case INV_MPU6000: 281 case INV_MPU9150: 282 /* old chips: switch clock manually */ 283 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1); 284 if (ret) 285 return ret; 286 st->chip_config.clk = clock; 287 break; 288 default: 289 /* automatic clock switching, nothing to do */ 290 break; 291 } 292 293 return 0; 294 } 295 296 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, 297 unsigned int mask) 298 { 299 unsigned int sleep; 300 u8 pwr_mgmt2, user_ctrl; 301 int ret; 302 303 /* delete useless requests */ 304 if (mask & INV_MPU6050_SENSOR_ACCL && en == st->chip_config.accl_en) 305 mask &= ~INV_MPU6050_SENSOR_ACCL; 306 if (mask & INV_MPU6050_SENSOR_GYRO && en == st->chip_config.gyro_en) 307 mask &= ~INV_MPU6050_SENSOR_GYRO; 308 if (mask & INV_MPU6050_SENSOR_TEMP && en == st->chip_config.temp_en) 309 mask &= ~INV_MPU6050_SENSOR_TEMP; 310 if (mask & INV_MPU6050_SENSOR_MAGN && en == st->chip_config.magn_en) 311 mask &= ~INV_MPU6050_SENSOR_MAGN; 312 if (mask == 0) 313 return 0; 314 315 /* turn on/off temperature sensor */ 316 if (mask & INV_MPU6050_SENSOR_TEMP) { 317 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, -1, !en); 318 if (ret) 319 return ret; 320 st->chip_config.temp_en = en; 321 } 322 323 /* update user_crtl for driving magnetometer */ 324 if (mask & INV_MPU6050_SENSOR_MAGN) { 325 user_ctrl = st->chip_config.user_ctrl; 326 if (en) 327 user_ctrl |= INV_MPU6050_BIT_I2C_MST_EN; 328 else 329 user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN; 330 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); 331 if (ret) 332 return ret; 333 st->chip_config.user_ctrl = user_ctrl; 334 st->chip_config.magn_en = en; 335 } 336 337 /* manage accel & gyro engines */ 338 if (mask & (INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO)) { 339 /* compute power management 2 current value */ 340 pwr_mgmt2 = 0; 341 if (!st->chip_config.accl_en) 342 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY; 343 if (!st->chip_config.gyro_en) 344 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY; 345 346 /* update to new requested value */ 347 if (mask & INV_MPU6050_SENSOR_ACCL) { 348 if (en) 349 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_ACCL_STBY; 350 else 351 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY; 352 } 353 if (mask & INV_MPU6050_SENSOR_GYRO) { 354 if (en) 355 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_GYRO_STBY; 356 else 357 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY; 358 } 359 360 /* switch clock to internal when turning gyro off */ 361 if (mask & INV_MPU6050_SENSOR_GYRO && !en) { 362 ret = inv_mpu6050_clock_switch(st, INV_CLK_INTERNAL); 363 if (ret) 364 return ret; 365 } 366 367 /* update sensors engine */ 368 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_2: 0x%x\n", 369 pwr_mgmt2); 370 ret = regmap_write(st->map, st->reg->pwr_mgmt_2, pwr_mgmt2); 371 if (ret) 372 return ret; 373 if (mask & INV_MPU6050_SENSOR_ACCL) 374 st->chip_config.accl_en = en; 375 if (mask & INV_MPU6050_SENSOR_GYRO) 376 st->chip_config.gyro_en = en; 377 378 /* compute required time to have sensors stabilized */ 379 sleep = 0; 380 if (en) { 381 if (mask & INV_MPU6050_SENSOR_ACCL) { 382 if (sleep < INV_MPU6050_ACCEL_UP_TIME) 383 sleep = INV_MPU6050_ACCEL_UP_TIME; 384 } 385 if (mask & INV_MPU6050_SENSOR_GYRO) { 386 if (sleep < INV_MPU6050_GYRO_UP_TIME) 387 sleep = INV_MPU6050_GYRO_UP_TIME; 388 } 389 } else { 390 if (mask & INV_MPU6050_SENSOR_GYRO) { 391 if (sleep < INV_MPU6050_GYRO_DOWN_TIME) 392 sleep = INV_MPU6050_GYRO_DOWN_TIME; 393 } 394 } 395 if (sleep) 396 msleep(sleep); 397 398 /* switch clock to PLL when turning gyro on */ 399 if (mask & INV_MPU6050_SENSOR_GYRO && en) { 400 ret = inv_mpu6050_clock_switch(st, INV_CLK_PLL); 401 if (ret) 402 return ret; 403 } 404 } 405 406 return 0; 407 } 408 409 static int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, 410 bool power_on) 411 { 412 int result; 413 414 result = inv_mpu6050_pwr_mgmt_1_write(st, !power_on, -1, -1); 415 if (result) 416 return result; 417 418 if (power_on) 419 usleep_range(INV_MPU6050_REG_UP_TIME_MIN, 420 INV_MPU6050_REG_UP_TIME_MAX); 421 422 return 0; 423 } 424 425 static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st, 426 enum inv_mpu6050_fsr_e val) 427 { 428 unsigned int gyro_shift; 429 u8 data; 430 431 switch (st->chip_type) { 432 case INV_ICM20690: 433 gyro_shift = INV_ICM20690_GYRO_CONFIG_FSR_SHIFT; 434 break; 435 default: 436 gyro_shift = INV_MPU6050_GYRO_CONFIG_FSR_SHIFT; 437 break; 438 } 439 440 data = val << gyro_shift; 441 return regmap_write(st->map, st->reg->gyro_config, data); 442 } 443 444 /* 445 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent 446 * 447 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope 448 * MPU6500 and above have a dedicated register for accelerometer 449 */ 450 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st, 451 enum inv_mpu6050_filter_e val) 452 { 453 int result; 454 455 result = regmap_write(st->map, st->reg->lpf, val); 456 if (result) 457 return result; 458 459 /* set accel lpf */ 460 switch (st->chip_type) { 461 case INV_MPU6050: 462 case INV_MPU6000: 463 case INV_MPU9150: 464 /* old chips, nothing to do */ 465 return 0; 466 case INV_ICM20689: 467 case INV_ICM20690: 468 /* set FIFO size to maximum value */ 469 val |= INV_ICM20689_BITS_FIFO_SIZE_MAX; 470 break; 471 default: 472 break; 473 } 474 475 return regmap_write(st->map, st->reg->accel_lpf, val); 476 } 477 478 /* 479 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO. 480 * 481 * Initial configuration: 482 * FSR: ± 2000DPS 483 * DLPF: 20Hz 484 * FIFO rate: 50Hz 485 * Clock source: Gyro PLL 486 */ 487 static int inv_mpu6050_init_config(struct iio_dev *indio_dev) 488 { 489 int result; 490 u8 d; 491 struct inv_mpu6050_state *st = iio_priv(indio_dev); 492 493 result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr); 494 if (result) 495 return result; 496 497 result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf); 498 if (result) 499 return result; 500 501 d = st->chip_config.divider; 502 result = regmap_write(st->map, st->reg->sample_rate_div, d); 503 if (result) 504 return result; 505 506 d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 507 result = regmap_write(st->map, st->reg->accl_config, d); 508 if (result) 509 return result; 510 511 result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask); 512 if (result) 513 return result; 514 515 /* 516 * Internal chip period is 1ms (1kHz). 517 * Let's use at the beginning the theorical value before measuring 518 * with interrupt timestamps. 519 */ 520 st->chip_period = NSEC_PER_MSEC; 521 522 /* magn chip init, noop if not present in the chip */ 523 result = inv_mpu_magn_probe(st); 524 if (result) 525 return result; 526 527 return 0; 528 } 529 530 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg, 531 int axis, int val) 532 { 533 int ind, result; 534 __be16 d = cpu_to_be16(val); 535 536 ind = (axis - IIO_MOD_X) * 2; 537 result = regmap_bulk_write(st->map, reg + ind, &d, sizeof(d)); 538 if (result) 539 return -EINVAL; 540 541 return 0; 542 } 543 544 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg, 545 int axis, int *val) 546 { 547 int ind, result; 548 __be16 d; 549 550 ind = (axis - IIO_MOD_X) * 2; 551 result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d)); 552 if (result) 553 return -EINVAL; 554 *val = (short)be16_to_cpup(&d); 555 556 return IIO_VAL_INT; 557 } 558 559 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev, 560 struct iio_chan_spec const *chan, 561 int *val) 562 { 563 struct inv_mpu6050_state *st = iio_priv(indio_dev); 564 struct device *pdev = regmap_get_device(st->map); 565 unsigned int freq_hz, period_us, min_sleep_us, max_sleep_us; 566 int result; 567 int ret; 568 569 /* compute sample period */ 570 freq_hz = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 571 period_us = 1000000 / freq_hz; 572 573 result = pm_runtime_resume_and_get(pdev); 574 if (result) 575 return result; 576 577 switch (chan->type) { 578 case IIO_ANGL_VEL: 579 if (!st->chip_config.gyro_en) { 580 result = inv_mpu6050_switch_engine(st, true, 581 INV_MPU6050_SENSOR_GYRO); 582 if (result) 583 goto error_power_off; 584 /* need to wait 2 periods to have first valid sample */ 585 min_sleep_us = 2 * period_us; 586 max_sleep_us = 2 * (period_us + period_us / 2); 587 usleep_range(min_sleep_us, max_sleep_us); 588 } 589 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro, 590 chan->channel2, val); 591 break; 592 case IIO_ACCEL: 593 if (!st->chip_config.accl_en) { 594 result = inv_mpu6050_switch_engine(st, true, 595 INV_MPU6050_SENSOR_ACCL); 596 if (result) 597 goto error_power_off; 598 /* wait 1 period for first sample availability */ 599 min_sleep_us = period_us; 600 max_sleep_us = period_us + period_us / 2; 601 usleep_range(min_sleep_us, max_sleep_us); 602 } 603 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl, 604 chan->channel2, val); 605 break; 606 case IIO_TEMP: 607 /* temperature sensor work only with accel and/or gyro */ 608 if (!st->chip_config.accl_en && !st->chip_config.gyro_en) { 609 result = -EBUSY; 610 goto error_power_off; 611 } 612 if (!st->chip_config.temp_en) { 613 result = inv_mpu6050_switch_engine(st, true, 614 INV_MPU6050_SENSOR_TEMP); 615 if (result) 616 goto error_power_off; 617 /* wait 1 period for first sample availability */ 618 min_sleep_us = period_us; 619 max_sleep_us = period_us + period_us / 2; 620 usleep_range(min_sleep_us, max_sleep_us); 621 } 622 ret = inv_mpu6050_sensor_show(st, st->reg->temperature, 623 IIO_MOD_X, val); 624 break; 625 case IIO_MAGN: 626 if (!st->chip_config.magn_en) { 627 result = inv_mpu6050_switch_engine(st, true, 628 INV_MPU6050_SENSOR_MAGN); 629 if (result) 630 goto error_power_off; 631 /* frequency is limited for magnetometer */ 632 if (freq_hz > INV_MPU_MAGN_FREQ_HZ_MAX) { 633 freq_hz = INV_MPU_MAGN_FREQ_HZ_MAX; 634 period_us = 1000000 / freq_hz; 635 } 636 /* need to wait 2 periods to have first valid sample */ 637 min_sleep_us = 2 * period_us; 638 max_sleep_us = 2 * (period_us + period_us / 2); 639 usleep_range(min_sleep_us, max_sleep_us); 640 } 641 ret = inv_mpu_magn_read(st, chan->channel2, val); 642 break; 643 default: 644 ret = -EINVAL; 645 break; 646 } 647 648 pm_runtime_mark_last_busy(pdev); 649 pm_runtime_put_autosuspend(pdev); 650 651 return ret; 652 653 error_power_off: 654 pm_runtime_put_autosuspend(pdev); 655 return result; 656 } 657 658 static int 659 inv_mpu6050_read_raw(struct iio_dev *indio_dev, 660 struct iio_chan_spec const *chan, 661 int *val, int *val2, long mask) 662 { 663 struct inv_mpu6050_state *st = iio_priv(indio_dev); 664 int ret = 0; 665 666 switch (mask) { 667 case IIO_CHAN_INFO_RAW: 668 ret = iio_device_claim_direct_mode(indio_dev); 669 if (ret) 670 return ret; 671 mutex_lock(&st->lock); 672 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val); 673 mutex_unlock(&st->lock); 674 iio_device_release_direct_mode(indio_dev); 675 return ret; 676 case IIO_CHAN_INFO_SCALE: 677 switch (chan->type) { 678 case IIO_ANGL_VEL: 679 mutex_lock(&st->lock); 680 *val = 0; 681 *val2 = gyro_scale_6050[st->chip_config.fsr]; 682 mutex_unlock(&st->lock); 683 684 return IIO_VAL_INT_PLUS_NANO; 685 case IIO_ACCEL: 686 mutex_lock(&st->lock); 687 *val = 0; 688 *val2 = accel_scale[st->chip_config.accl_fs]; 689 mutex_unlock(&st->lock); 690 691 return IIO_VAL_INT_PLUS_MICRO; 692 case IIO_TEMP: 693 *val = st->hw->temp.scale / 1000000; 694 *val2 = st->hw->temp.scale % 1000000; 695 return IIO_VAL_INT_PLUS_MICRO; 696 case IIO_MAGN: 697 return inv_mpu_magn_get_scale(st, chan, val, val2); 698 default: 699 return -EINVAL; 700 } 701 case IIO_CHAN_INFO_OFFSET: 702 switch (chan->type) { 703 case IIO_TEMP: 704 *val = st->hw->temp.offset; 705 return IIO_VAL_INT; 706 default: 707 return -EINVAL; 708 } 709 case IIO_CHAN_INFO_CALIBBIAS: 710 switch (chan->type) { 711 case IIO_ANGL_VEL: 712 mutex_lock(&st->lock); 713 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset, 714 chan->channel2, val); 715 mutex_unlock(&st->lock); 716 return IIO_VAL_INT; 717 case IIO_ACCEL: 718 mutex_lock(&st->lock); 719 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset, 720 chan->channel2, val); 721 mutex_unlock(&st->lock); 722 return IIO_VAL_INT; 723 724 default: 725 return -EINVAL; 726 } 727 default: 728 return -EINVAL; 729 } 730 } 731 732 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val, 733 int val2) 734 { 735 int result, i; 736 737 if (val != 0) 738 return -EINVAL; 739 740 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) { 741 if (gyro_scale_6050[i] == val2) { 742 result = inv_mpu6050_set_gyro_fsr(st, i); 743 if (result) 744 return result; 745 746 st->chip_config.fsr = i; 747 return 0; 748 } 749 } 750 751 return -EINVAL; 752 } 753 754 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev, 755 struct iio_chan_spec const *chan, long mask) 756 { 757 switch (mask) { 758 case IIO_CHAN_INFO_SCALE: 759 switch (chan->type) { 760 case IIO_ANGL_VEL: 761 return IIO_VAL_INT_PLUS_NANO; 762 default: 763 return IIO_VAL_INT_PLUS_MICRO; 764 } 765 default: 766 return IIO_VAL_INT_PLUS_MICRO; 767 } 768 769 return -EINVAL; 770 } 771 772 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val, 773 int val2) 774 { 775 int result, i; 776 u8 d; 777 778 if (val != 0) 779 return -EINVAL; 780 781 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) { 782 if (accel_scale[i] == val2) { 783 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 784 result = regmap_write(st->map, st->reg->accl_config, d); 785 if (result) 786 return result; 787 788 st->chip_config.accl_fs = i; 789 return 0; 790 } 791 } 792 793 return -EINVAL; 794 } 795 796 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, 797 struct iio_chan_spec const *chan, 798 int val, int val2, long mask) 799 { 800 struct inv_mpu6050_state *st = iio_priv(indio_dev); 801 struct device *pdev = regmap_get_device(st->map); 802 int result; 803 804 /* 805 * we should only update scale when the chip is disabled, i.e. 806 * not running 807 */ 808 result = iio_device_claim_direct_mode(indio_dev); 809 if (result) 810 return result; 811 812 mutex_lock(&st->lock); 813 result = pm_runtime_resume_and_get(pdev); 814 if (result) 815 goto error_write_raw_unlock; 816 817 switch (mask) { 818 case IIO_CHAN_INFO_SCALE: 819 switch (chan->type) { 820 case IIO_ANGL_VEL: 821 result = inv_mpu6050_write_gyro_scale(st, val, val2); 822 break; 823 case IIO_ACCEL: 824 result = inv_mpu6050_write_accel_scale(st, val, val2); 825 break; 826 default: 827 result = -EINVAL; 828 break; 829 } 830 break; 831 case IIO_CHAN_INFO_CALIBBIAS: 832 switch (chan->type) { 833 case IIO_ANGL_VEL: 834 result = inv_mpu6050_sensor_set(st, 835 st->reg->gyro_offset, 836 chan->channel2, val); 837 break; 838 case IIO_ACCEL: 839 result = inv_mpu6050_sensor_set(st, 840 st->reg->accl_offset, 841 chan->channel2, val); 842 break; 843 default: 844 result = -EINVAL; 845 break; 846 } 847 break; 848 default: 849 result = -EINVAL; 850 break; 851 } 852 853 pm_runtime_mark_last_busy(pdev); 854 pm_runtime_put_autosuspend(pdev); 855 error_write_raw_unlock: 856 mutex_unlock(&st->lock); 857 iio_device_release_direct_mode(indio_dev); 858 859 return result; 860 } 861 862 /* 863 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate. 864 * 865 * Based on the Nyquist principle, the bandwidth of the low 866 * pass filter must not exceed the signal sampling rate divided 867 * by 2, or there would be aliasing. 868 * This function basically search for the correct low pass 869 * parameters based on the fifo rate, e.g, sampling frequency. 870 * 871 * lpf is set automatically when setting sampling rate to avoid any aliases. 872 */ 873 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate) 874 { 875 static const int hz[] = {400, 200, 90, 40, 20, 10}; 876 static const int d[] = { 877 INV_MPU6050_FILTER_200HZ, INV_MPU6050_FILTER_100HZ, 878 INV_MPU6050_FILTER_45HZ, INV_MPU6050_FILTER_20HZ, 879 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ 880 }; 881 int i, result; 882 u8 data; 883 884 data = INV_MPU6050_FILTER_5HZ; 885 for (i = 0; i < ARRAY_SIZE(hz); ++i) { 886 if (rate >= hz[i]) { 887 data = d[i]; 888 break; 889 } 890 } 891 result = inv_mpu6050_set_lpf_regs(st, data); 892 if (result) 893 return result; 894 st->chip_config.lpf = data; 895 896 return 0; 897 } 898 899 /* 900 * inv_mpu6050_fifo_rate_store() - Set fifo rate. 901 */ 902 static ssize_t 903 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr, 904 const char *buf, size_t count) 905 { 906 int fifo_rate; 907 u8 d; 908 int result; 909 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 910 struct inv_mpu6050_state *st = iio_priv(indio_dev); 911 struct device *pdev = regmap_get_device(st->map); 912 913 if (kstrtoint(buf, 10, &fifo_rate)) 914 return -EINVAL; 915 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE || 916 fifo_rate > INV_MPU6050_MAX_FIFO_RATE) 917 return -EINVAL; 918 919 /* compute the chip sample rate divider */ 920 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate); 921 /* compute back the fifo rate to handle truncation cases */ 922 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d); 923 924 mutex_lock(&st->lock); 925 if (d == st->chip_config.divider) { 926 result = 0; 927 goto fifo_rate_fail_unlock; 928 } 929 result = pm_runtime_resume_and_get(pdev); 930 if (result) 931 goto fifo_rate_fail_unlock; 932 933 result = regmap_write(st->map, st->reg->sample_rate_div, d); 934 if (result) 935 goto fifo_rate_fail_power_off; 936 st->chip_config.divider = d; 937 938 result = inv_mpu6050_set_lpf(st, fifo_rate); 939 if (result) 940 goto fifo_rate_fail_power_off; 941 942 /* update rate for magn, noop if not present in chip */ 943 result = inv_mpu_magn_set_rate(st, fifo_rate); 944 if (result) 945 goto fifo_rate_fail_power_off; 946 947 pm_runtime_mark_last_busy(pdev); 948 fifo_rate_fail_power_off: 949 pm_runtime_put_autosuspend(pdev); 950 fifo_rate_fail_unlock: 951 mutex_unlock(&st->lock); 952 if (result) 953 return result; 954 955 return count; 956 } 957 958 /* 959 * inv_fifo_rate_show() - Get the current sampling rate. 960 */ 961 static ssize_t 962 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr, 963 char *buf) 964 { 965 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 966 unsigned fifo_rate; 967 968 mutex_lock(&st->lock); 969 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 970 mutex_unlock(&st->lock); 971 972 return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate); 973 } 974 975 /* 976 * inv_attr_show() - calling this function will show current 977 * parameters. 978 * 979 * Deprecated in favor of IIO mounting matrix API. 980 * 981 * See inv_get_mount_matrix() 982 */ 983 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr, 984 char *buf) 985 { 986 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 987 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 988 s8 *m; 989 990 switch (this_attr->address) { 991 /* 992 * In MPU6050, the two matrix are the same because gyro and accel 993 * are integrated in one chip 994 */ 995 case ATTR_GYRO_MATRIX: 996 case ATTR_ACCL_MATRIX: 997 m = st->plat_data.orientation; 998 999 return scnprintf(buf, PAGE_SIZE, 1000 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n", 1001 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]); 1002 default: 1003 return -EINVAL; 1004 } 1005 } 1006 1007 /** 1008 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense 1009 * MPU6050 device. 1010 * @indio_dev: The IIO device 1011 * @trig: The new trigger 1012 * 1013 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050 1014 * device, -EINVAL otherwise. 1015 */ 1016 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev, 1017 struct iio_trigger *trig) 1018 { 1019 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1020 1021 if (st->trig != trig) 1022 return -EINVAL; 1023 1024 return 0; 1025 } 1026 1027 static const struct iio_mount_matrix * 1028 inv_get_mount_matrix(const struct iio_dev *indio_dev, 1029 const struct iio_chan_spec *chan) 1030 { 1031 struct inv_mpu6050_state *data = iio_priv(indio_dev); 1032 const struct iio_mount_matrix *matrix; 1033 1034 if (chan->type == IIO_MAGN) 1035 matrix = &data->magn_orient; 1036 else 1037 matrix = &data->orientation; 1038 1039 return matrix; 1040 } 1041 1042 static const struct iio_chan_spec_ext_info inv_ext_info[] = { 1043 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix), 1044 { } 1045 }; 1046 1047 #define INV_MPU6050_CHAN(_type, _channel2, _index) \ 1048 { \ 1049 .type = _type, \ 1050 .modified = 1, \ 1051 .channel2 = _channel2, \ 1052 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 1053 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 1054 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 1055 .scan_index = _index, \ 1056 .scan_type = { \ 1057 .sign = 's', \ 1058 .realbits = 16, \ 1059 .storagebits = 16, \ 1060 .shift = 0, \ 1061 .endianness = IIO_BE, \ 1062 }, \ 1063 .ext_info = inv_ext_info, \ 1064 } 1065 1066 #define INV_MPU6050_TEMP_CHAN(_index) \ 1067 { \ 1068 .type = IIO_TEMP, \ 1069 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \ 1070 | BIT(IIO_CHAN_INFO_OFFSET) \ 1071 | BIT(IIO_CHAN_INFO_SCALE), \ 1072 .scan_index = _index, \ 1073 .scan_type = { \ 1074 .sign = 's', \ 1075 .realbits = 16, \ 1076 .storagebits = 16, \ 1077 .shift = 0, \ 1078 .endianness = IIO_BE, \ 1079 }, \ 1080 } 1081 1082 static const struct iio_chan_spec inv_mpu_channels[] = { 1083 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP), 1084 1085 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1086 1087 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1088 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1089 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1090 1091 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1092 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1093 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1094 }; 1095 1096 #define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL \ 1097 (BIT(INV_MPU6050_SCAN_ACCL_X) \ 1098 | BIT(INV_MPU6050_SCAN_ACCL_Y) \ 1099 | BIT(INV_MPU6050_SCAN_ACCL_Z)) 1100 1101 #define INV_MPU6050_SCAN_MASK_3AXIS_GYRO \ 1102 (BIT(INV_MPU6050_SCAN_GYRO_X) \ 1103 | BIT(INV_MPU6050_SCAN_GYRO_Y) \ 1104 | BIT(INV_MPU6050_SCAN_GYRO_Z)) 1105 1106 #define INV_MPU6050_SCAN_MASK_TEMP (BIT(INV_MPU6050_SCAN_TEMP)) 1107 1108 static const unsigned long inv_mpu_scan_masks[] = { 1109 /* 3-axis accel */ 1110 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL, 1111 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1112 /* 3-axis gyro */ 1113 INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1114 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1115 /* 6-axis accel + gyro */ 1116 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1117 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1118 | INV_MPU6050_SCAN_MASK_TEMP, 1119 0, 1120 }; 1121 1122 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \ 1123 { \ 1124 .type = IIO_MAGN, \ 1125 .modified = 1, \ 1126 .channel2 = _chan2, \ 1127 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \ 1128 BIT(IIO_CHAN_INFO_RAW), \ 1129 .scan_index = _index, \ 1130 .scan_type = { \ 1131 .sign = 's', \ 1132 .realbits = _bits, \ 1133 .storagebits = 16, \ 1134 .shift = 0, \ 1135 .endianness = IIO_BE, \ 1136 }, \ 1137 .ext_info = inv_ext_info, \ 1138 } 1139 1140 static const struct iio_chan_spec inv_mpu9150_channels[] = { 1141 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP), 1142 1143 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1144 1145 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1146 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1147 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1148 1149 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1150 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1151 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1152 1153 /* Magnetometer resolution is 13 bits */ 1154 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X), 1155 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y), 1156 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z), 1157 }; 1158 1159 static const struct iio_chan_spec inv_mpu9250_channels[] = { 1160 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP), 1161 1162 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1163 1164 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1165 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1166 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1167 1168 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1169 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1170 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1171 1172 /* Magnetometer resolution is 16 bits */ 1173 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X), 1174 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y), 1175 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z), 1176 }; 1177 1178 #define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN \ 1179 (BIT(INV_MPU9X50_SCAN_MAGN_X) \ 1180 | BIT(INV_MPU9X50_SCAN_MAGN_Y) \ 1181 | BIT(INV_MPU9X50_SCAN_MAGN_Z)) 1182 1183 static const unsigned long inv_mpu9x50_scan_masks[] = { 1184 /* 3-axis accel */ 1185 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL, 1186 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1187 /* 3-axis gyro */ 1188 INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1189 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1190 /* 3-axis magn */ 1191 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1192 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP, 1193 /* 6-axis accel + gyro */ 1194 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1195 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1196 | INV_MPU6050_SCAN_MASK_TEMP, 1197 /* 6-axis accel + magn */ 1198 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1199 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1200 | INV_MPU6050_SCAN_MASK_TEMP, 1201 /* 6-axis gyro + magn */ 1202 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1203 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1204 | INV_MPU6050_SCAN_MASK_TEMP, 1205 /* 9-axis accel + gyro + magn */ 1206 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1207 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1208 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1209 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1210 | INV_MPU6050_SCAN_MASK_TEMP, 1211 0, 1212 }; 1213 1214 static const unsigned long inv_icm20602_scan_masks[] = { 1215 /* 3-axis accel + temp (mandatory) */ 1216 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1217 /* 3-axis gyro + temp (mandatory) */ 1218 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1219 /* 6-axis accel + gyro + temp (mandatory) */ 1220 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1221 | INV_MPU6050_SCAN_MASK_TEMP, 1222 0, 1223 }; 1224 1225 /* 1226 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and 1227 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the 1228 * low-pass filter. Specifically, each of these sampling rates are about twice 1229 * the bandwidth of a corresponding low-pass filter, which should eliminate 1230 * aliasing following the Nyquist principle. By picking a frequency different 1231 * from these, the user risks aliasing effects. 1232 */ 1233 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500"); 1234 static IIO_CONST_ATTR(in_anglvel_scale_available, 1235 "0.000133090 0.000266181 0.000532362 0.001064724"); 1236 static IIO_CONST_ATTR(in_accel_scale_available, 1237 "0.000598 0.001196 0.002392 0.004785"); 1238 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show, 1239 inv_mpu6050_fifo_rate_store); 1240 1241 /* Deprecated: kept for userspace backward compatibility. */ 1242 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL, 1243 ATTR_GYRO_MATRIX); 1244 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL, 1245 ATTR_ACCL_MATRIX); 1246 1247 static struct attribute *inv_attributes[] = { 1248 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */ 1249 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */ 1250 &iio_dev_attr_sampling_frequency.dev_attr.attr, 1251 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 1252 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 1253 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr, 1254 NULL, 1255 }; 1256 1257 static const struct attribute_group inv_attribute_group = { 1258 .attrs = inv_attributes 1259 }; 1260 1261 static int inv_mpu6050_reg_access(struct iio_dev *indio_dev, 1262 unsigned int reg, 1263 unsigned int writeval, 1264 unsigned int *readval) 1265 { 1266 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1267 int ret; 1268 1269 mutex_lock(&st->lock); 1270 if (readval) 1271 ret = regmap_read(st->map, reg, readval); 1272 else 1273 ret = regmap_write(st->map, reg, writeval); 1274 mutex_unlock(&st->lock); 1275 1276 return ret; 1277 } 1278 1279 static const struct iio_info mpu_info = { 1280 .read_raw = &inv_mpu6050_read_raw, 1281 .write_raw = &inv_mpu6050_write_raw, 1282 .write_raw_get_fmt = &inv_write_raw_get_fmt, 1283 .attrs = &inv_attribute_group, 1284 .validate_trigger = inv_mpu6050_validate_trigger, 1285 .debugfs_reg_access = &inv_mpu6050_reg_access, 1286 }; 1287 1288 /* 1289 * inv_check_and_setup_chip() - check and setup chip. 1290 */ 1291 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st) 1292 { 1293 int result; 1294 unsigned int regval, mask; 1295 int i; 1296 1297 st->hw = &hw_info[st->chip_type]; 1298 st->reg = hw_info[st->chip_type].reg; 1299 memcpy(&st->chip_config, hw_info[st->chip_type].config, 1300 sizeof(st->chip_config)); 1301 1302 /* check chip self-identification */ 1303 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val); 1304 if (result) 1305 return result; 1306 if (regval != st->hw->whoami) { 1307 /* check whoami against all possible values */ 1308 for (i = 0; i < INV_NUM_PARTS; ++i) { 1309 if (regval == hw_info[i].whoami) { 1310 dev_warn(regmap_get_device(st->map), 1311 "whoami mismatch got 0x%02x (%s) expected 0x%02x (%s)\n", 1312 regval, hw_info[i].name, 1313 st->hw->whoami, st->hw->name); 1314 break; 1315 } 1316 } 1317 if (i >= INV_NUM_PARTS) { 1318 dev_err(regmap_get_device(st->map), 1319 "invalid whoami 0x%02x expected 0x%02x (%s)\n", 1320 regval, st->hw->whoami, st->hw->name); 1321 return -ENODEV; 1322 } 1323 } 1324 1325 /* reset to make sure previous state are not there */ 1326 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 1327 INV_MPU6050_BIT_H_RESET); 1328 if (result) 1329 return result; 1330 msleep(INV_MPU6050_POWER_UP_TIME); 1331 switch (st->chip_type) { 1332 case INV_MPU6000: 1333 case INV_MPU6500: 1334 case INV_MPU6515: 1335 case INV_MPU6880: 1336 case INV_MPU9250: 1337 case INV_MPU9255: 1338 /* reset signal path (required for spi connection) */ 1339 regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST | 1340 INV_MPU6050_BIT_GYRO_RST; 1341 result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET, 1342 regval); 1343 if (result) 1344 return result; 1345 msleep(INV_MPU6050_POWER_UP_TIME); 1346 break; 1347 default: 1348 break; 1349 } 1350 1351 /* 1352 * Turn power on. After reset, the sleep bit could be on 1353 * or off depending on the OTP settings. Turning power on 1354 * make it in a definite state as well as making the hardware 1355 * state align with the software state 1356 */ 1357 result = inv_mpu6050_set_power_itg(st, true); 1358 if (result) 1359 return result; 1360 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO | 1361 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN; 1362 result = inv_mpu6050_switch_engine(st, false, mask); 1363 if (result) 1364 goto error_power_off; 1365 1366 return 0; 1367 1368 error_power_off: 1369 inv_mpu6050_set_power_itg(st, false); 1370 return result; 1371 } 1372 1373 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st) 1374 { 1375 int result; 1376 1377 result = regulator_enable(st->vddio_supply); 1378 if (result) { 1379 dev_err(regmap_get_device(st->map), 1380 "Failed to enable vddio regulator: %d\n", result); 1381 } else { 1382 /* Give the device a little bit of time to start up. */ 1383 usleep_range(3000, 5000); 1384 } 1385 1386 return result; 1387 } 1388 1389 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st) 1390 { 1391 int result; 1392 1393 result = regulator_disable(st->vddio_supply); 1394 if (result) 1395 dev_err(regmap_get_device(st->map), 1396 "Failed to disable vddio regulator: %d\n", result); 1397 1398 return result; 1399 } 1400 1401 static void inv_mpu_core_disable_regulator_action(void *_data) 1402 { 1403 struct inv_mpu6050_state *st = _data; 1404 int result; 1405 1406 result = regulator_disable(st->vdd_supply); 1407 if (result) 1408 dev_err(regmap_get_device(st->map), 1409 "Failed to disable vdd regulator: %d\n", result); 1410 1411 inv_mpu_core_disable_regulator_vddio(st); 1412 } 1413 1414 static void inv_mpu_pm_disable(void *data) 1415 { 1416 struct device *dev = data; 1417 1418 pm_runtime_disable(dev); 1419 } 1420 1421 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, 1422 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type) 1423 { 1424 struct inv_mpu6050_state *st; 1425 struct iio_dev *indio_dev; 1426 struct inv_mpu6050_platform_data *pdata; 1427 struct device *dev = regmap_get_device(regmap); 1428 int result; 1429 struct irq_data *desc; 1430 int irq_type; 1431 1432 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 1433 if (!indio_dev) 1434 return -ENOMEM; 1435 1436 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS); 1437 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) { 1438 dev_err(dev, "Bad invensense chip_type=%d name=%s\n", 1439 chip_type, name); 1440 return -ENODEV; 1441 } 1442 st = iio_priv(indio_dev); 1443 mutex_init(&st->lock); 1444 st->chip_type = chip_type; 1445 st->irq = irq; 1446 st->map = regmap; 1447 1448 pdata = dev_get_platdata(dev); 1449 if (!pdata) { 1450 result = iio_read_mount_matrix(dev, &st->orientation); 1451 if (result) { 1452 dev_err(dev, "Failed to retrieve mounting matrix %d\n", 1453 result); 1454 return result; 1455 } 1456 } else { 1457 st->plat_data = *pdata; 1458 } 1459 1460 if (irq > 0) { 1461 desc = irq_get_irq_data(irq); 1462 if (!desc) { 1463 dev_err(dev, "Could not find IRQ %d\n", irq); 1464 return -EINVAL; 1465 } 1466 1467 irq_type = irqd_get_trigger_type(desc); 1468 if (!irq_type) 1469 irq_type = IRQF_TRIGGER_RISING; 1470 } else { 1471 /* Doesn't really matter, use the default */ 1472 irq_type = IRQF_TRIGGER_RISING; 1473 } 1474 1475 if (irq_type & IRQF_TRIGGER_RISING) // rising or both-edge 1476 st->irq_mask = INV_MPU6050_ACTIVE_HIGH; 1477 else if (irq_type == IRQF_TRIGGER_FALLING) 1478 st->irq_mask = INV_MPU6050_ACTIVE_LOW; 1479 else if (irq_type == IRQF_TRIGGER_HIGH) 1480 st->irq_mask = INV_MPU6050_ACTIVE_HIGH | 1481 INV_MPU6050_LATCH_INT_EN; 1482 else if (irq_type == IRQF_TRIGGER_LOW) 1483 st->irq_mask = INV_MPU6050_ACTIVE_LOW | 1484 INV_MPU6050_LATCH_INT_EN; 1485 else { 1486 dev_err(dev, "Invalid interrupt type 0x%x specified\n", 1487 irq_type); 1488 return -EINVAL; 1489 } 1490 1491 st->vdd_supply = devm_regulator_get(dev, "vdd"); 1492 if (IS_ERR(st->vdd_supply)) 1493 return dev_err_probe(dev, PTR_ERR(st->vdd_supply), 1494 "Failed to get vdd regulator\n"); 1495 1496 st->vddio_supply = devm_regulator_get(dev, "vddio"); 1497 if (IS_ERR(st->vddio_supply)) 1498 return dev_err_probe(dev, PTR_ERR(st->vddio_supply), 1499 "Failed to get vddio regulator\n"); 1500 1501 result = regulator_enable(st->vdd_supply); 1502 if (result) { 1503 dev_err(dev, "Failed to enable vdd regulator: %d\n", result); 1504 return result; 1505 } 1506 msleep(INV_MPU6050_POWER_UP_TIME); 1507 1508 result = inv_mpu_core_enable_regulator_vddio(st); 1509 if (result) { 1510 regulator_disable(st->vdd_supply); 1511 return result; 1512 } 1513 1514 result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action, 1515 st); 1516 if (result) { 1517 dev_err(dev, "Failed to setup regulator cleanup action %d\n", 1518 result); 1519 return result; 1520 } 1521 1522 /* fill magnetometer orientation */ 1523 result = inv_mpu_magn_set_orient(st); 1524 if (result) 1525 return result; 1526 1527 /* power is turned on inside check chip type*/ 1528 result = inv_check_and_setup_chip(st); 1529 if (result) 1530 return result; 1531 1532 result = inv_mpu6050_init_config(indio_dev); 1533 if (result) { 1534 dev_err(dev, "Could not initialize device.\n"); 1535 goto error_power_off; 1536 } 1537 1538 dev_set_drvdata(dev, indio_dev); 1539 /* name will be NULL when enumerated via ACPI */ 1540 if (name) 1541 indio_dev->name = name; 1542 else 1543 indio_dev->name = dev_name(dev); 1544 1545 /* requires parent device set in indio_dev */ 1546 if (inv_mpu_bus_setup) { 1547 result = inv_mpu_bus_setup(indio_dev); 1548 if (result) 1549 goto error_power_off; 1550 } 1551 1552 /* chip init is done, turning on runtime power management */ 1553 result = pm_runtime_set_active(dev); 1554 if (result) 1555 goto error_power_off; 1556 pm_runtime_get_noresume(dev); 1557 pm_runtime_enable(dev); 1558 pm_runtime_set_autosuspend_delay(dev, INV_MPU6050_SUSPEND_DELAY_MS); 1559 pm_runtime_use_autosuspend(dev); 1560 pm_runtime_put(dev); 1561 result = devm_add_action_or_reset(dev, inv_mpu_pm_disable, dev); 1562 if (result) 1563 return result; 1564 1565 switch (chip_type) { 1566 case INV_MPU9150: 1567 indio_dev->channels = inv_mpu9150_channels; 1568 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels); 1569 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks; 1570 break; 1571 case INV_MPU9250: 1572 case INV_MPU9255: 1573 indio_dev->channels = inv_mpu9250_channels; 1574 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels); 1575 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks; 1576 break; 1577 case INV_ICM20602: 1578 indio_dev->channels = inv_mpu_channels; 1579 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1580 indio_dev->available_scan_masks = inv_icm20602_scan_masks; 1581 break; 1582 default: 1583 indio_dev->channels = inv_mpu_channels; 1584 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1585 indio_dev->available_scan_masks = inv_mpu_scan_masks; 1586 break; 1587 } 1588 /* 1589 * Use magnetometer inside the chip only if there is no i2c 1590 * auxiliary device in use. Otherwise Going back to 6-axis only. 1591 */ 1592 if (st->magn_disabled) { 1593 indio_dev->channels = inv_mpu_channels; 1594 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1595 indio_dev->available_scan_masks = inv_mpu_scan_masks; 1596 } 1597 1598 indio_dev->info = &mpu_info; 1599 1600 if (irq > 0) { 1601 /* 1602 * The driver currently only supports buffered capture with its 1603 * own trigger. So no IRQ, no trigger, no buffer 1604 */ 1605 result = devm_iio_triggered_buffer_setup(dev, indio_dev, 1606 iio_pollfunc_store_time, 1607 inv_mpu6050_read_fifo, 1608 NULL); 1609 if (result) { 1610 dev_err(dev, "configure buffer fail %d\n", result); 1611 return result; 1612 } 1613 1614 result = inv_mpu6050_probe_trigger(indio_dev, irq_type); 1615 if (result) { 1616 dev_err(dev, "trigger probe fail %d\n", result); 1617 return result; 1618 } 1619 } 1620 1621 result = devm_iio_device_register(dev, indio_dev); 1622 if (result) { 1623 dev_err(dev, "IIO register fail %d\n", result); 1624 return result; 1625 } 1626 1627 return 0; 1628 1629 error_power_off: 1630 inv_mpu6050_set_power_itg(st, false); 1631 return result; 1632 } 1633 EXPORT_SYMBOL_GPL(inv_mpu_core_probe); 1634 1635 static int __maybe_unused inv_mpu_resume(struct device *dev) 1636 { 1637 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1638 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1639 int result; 1640 1641 mutex_lock(&st->lock); 1642 result = inv_mpu_core_enable_regulator_vddio(st); 1643 if (result) 1644 goto out_unlock; 1645 1646 result = inv_mpu6050_set_power_itg(st, true); 1647 if (result) 1648 goto out_unlock; 1649 1650 pm_runtime_disable(dev); 1651 pm_runtime_set_active(dev); 1652 pm_runtime_enable(dev); 1653 1654 result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors); 1655 if (result) 1656 goto out_unlock; 1657 1658 if (iio_buffer_enabled(indio_dev)) 1659 result = inv_mpu6050_prepare_fifo(st, true); 1660 1661 out_unlock: 1662 mutex_unlock(&st->lock); 1663 1664 return result; 1665 } 1666 1667 static int __maybe_unused inv_mpu_suspend(struct device *dev) 1668 { 1669 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1670 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1671 int result; 1672 1673 mutex_lock(&st->lock); 1674 1675 st->suspended_sensors = 0; 1676 if (pm_runtime_suspended(dev)) { 1677 result = 0; 1678 goto out_unlock; 1679 } 1680 1681 if (iio_buffer_enabled(indio_dev)) { 1682 result = inv_mpu6050_prepare_fifo(st, false); 1683 if (result) 1684 goto out_unlock; 1685 } 1686 1687 if (st->chip_config.accl_en) 1688 st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL; 1689 if (st->chip_config.gyro_en) 1690 st->suspended_sensors |= INV_MPU6050_SENSOR_GYRO; 1691 if (st->chip_config.temp_en) 1692 st->suspended_sensors |= INV_MPU6050_SENSOR_TEMP; 1693 if (st->chip_config.magn_en) 1694 st->suspended_sensors |= INV_MPU6050_SENSOR_MAGN; 1695 result = inv_mpu6050_switch_engine(st, false, st->suspended_sensors); 1696 if (result) 1697 goto out_unlock; 1698 1699 result = inv_mpu6050_set_power_itg(st, false); 1700 if (result) 1701 goto out_unlock; 1702 1703 inv_mpu_core_disable_regulator_vddio(st); 1704 out_unlock: 1705 mutex_unlock(&st->lock); 1706 1707 return result; 1708 } 1709 1710 static int __maybe_unused inv_mpu_runtime_suspend(struct device *dev) 1711 { 1712 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev)); 1713 unsigned int sensors; 1714 int ret; 1715 1716 mutex_lock(&st->lock); 1717 1718 sensors = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO | 1719 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN; 1720 ret = inv_mpu6050_switch_engine(st, false, sensors); 1721 if (ret) 1722 goto out_unlock; 1723 1724 ret = inv_mpu6050_set_power_itg(st, false); 1725 if (ret) 1726 goto out_unlock; 1727 1728 inv_mpu_core_disable_regulator_vddio(st); 1729 1730 out_unlock: 1731 mutex_unlock(&st->lock); 1732 return ret; 1733 } 1734 1735 static int __maybe_unused inv_mpu_runtime_resume(struct device *dev) 1736 { 1737 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev)); 1738 int ret; 1739 1740 ret = inv_mpu_core_enable_regulator_vddio(st); 1741 if (ret) 1742 return ret; 1743 1744 return inv_mpu6050_set_power_itg(st, true); 1745 } 1746 1747 const struct dev_pm_ops inv_mpu_pmops = { 1748 SET_SYSTEM_SLEEP_PM_OPS(inv_mpu_suspend, inv_mpu_resume) 1749 SET_RUNTIME_PM_OPS(inv_mpu_runtime_suspend, inv_mpu_runtime_resume, NULL) 1750 }; 1751 EXPORT_SYMBOL_GPL(inv_mpu_pmops); 1752 1753 MODULE_AUTHOR("Invensense Corporation"); 1754 MODULE_DESCRIPTION("Invensense device MPU6050 driver"); 1755 MODULE_LICENSE("GPL"); 1756