1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Invensense, Inc. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/slab.h> 8 #include <linux/i2c.h> 9 #include <linux/err.h> 10 #include <linux/delay.h> 11 #include <linux/sysfs.h> 12 #include <linux/jiffies.h> 13 #include <linux/irq.h> 14 #include <linux/interrupt.h> 15 #include <linux/iio/iio.h> 16 #include <linux/acpi.h> 17 #include <linux/platform_device.h> 18 #include <linux/regulator/consumer.h> 19 #include <linux/pm.h> 20 #include <linux/pm_runtime.h> 21 #include "inv_mpu_iio.h" 22 #include "inv_mpu_magn.h" 23 24 /* 25 * this is the gyro scale translated from dynamic range plus/minus 26 * {250, 500, 1000, 2000} to rad/s 27 */ 28 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724}; 29 30 /* 31 * this is the accel scale translated from dynamic range plus/minus 32 * {2, 4, 8, 16} to m/s^2 33 */ 34 static const int accel_scale[] = {598, 1196, 2392, 4785}; 35 36 static const struct inv_mpu6050_reg_map reg_set_icm20602 = { 37 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 38 .lpf = INV_MPU6050_REG_CONFIG, 39 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2, 40 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 41 .fifo_en = INV_MPU6050_REG_FIFO_EN, 42 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 43 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 44 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 45 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 46 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 47 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 48 .temperature = INV_MPU6050_REG_TEMPERATURE, 49 .int_enable = INV_MPU6050_REG_INT_ENABLE, 50 .int_status = INV_MPU6050_REG_INT_STATUS, 51 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 52 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 53 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 54 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 55 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 56 .i2c_if = INV_ICM20602_REG_I2C_IF, 57 }; 58 59 static const struct inv_mpu6050_reg_map reg_set_6500 = { 60 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 61 .lpf = INV_MPU6050_REG_CONFIG, 62 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2, 63 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 64 .fifo_en = INV_MPU6050_REG_FIFO_EN, 65 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 66 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 67 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 68 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 69 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 70 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 71 .temperature = INV_MPU6050_REG_TEMPERATURE, 72 .int_enable = INV_MPU6050_REG_INT_ENABLE, 73 .int_status = INV_MPU6050_REG_INT_STATUS, 74 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 75 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 76 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 77 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 78 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 79 .i2c_if = 0, 80 }; 81 82 static const struct inv_mpu6050_reg_map reg_set_6050 = { 83 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 84 .lpf = INV_MPU6050_REG_CONFIG, 85 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 86 .fifo_en = INV_MPU6050_REG_FIFO_EN, 87 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 88 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 89 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 90 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 91 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 92 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 93 .temperature = INV_MPU6050_REG_TEMPERATURE, 94 .int_enable = INV_MPU6050_REG_INT_ENABLE, 95 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 96 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 97 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 98 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET, 99 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 100 .i2c_if = 0, 101 }; 102 103 static const struct inv_mpu6050_chip_config chip_config_6050 = { 104 .clk = INV_CLK_INTERNAL, 105 .fsr = INV_MPU6050_FSR_2000DPS, 106 .lpf = INV_MPU6050_FILTER_20HZ, 107 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50), 108 .gyro_en = true, 109 .accl_en = true, 110 .temp_en = true, 111 .magn_en = false, 112 .gyro_fifo_enable = false, 113 .accl_fifo_enable = false, 114 .temp_fifo_enable = false, 115 .magn_fifo_enable = false, 116 .accl_fs = INV_MPU6050_FS_02G, 117 .user_ctrl = 0, 118 }; 119 120 static const struct inv_mpu6050_chip_config chip_config_6500 = { 121 .clk = INV_CLK_PLL, 122 .fsr = INV_MPU6050_FSR_2000DPS, 123 .lpf = INV_MPU6050_FILTER_20HZ, 124 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50), 125 .gyro_en = true, 126 .accl_en = true, 127 .temp_en = true, 128 .magn_en = false, 129 .gyro_fifo_enable = false, 130 .accl_fifo_enable = false, 131 .temp_fifo_enable = false, 132 .magn_fifo_enable = false, 133 .accl_fs = INV_MPU6050_FS_02G, 134 .user_ctrl = 0, 135 }; 136 137 /* Indexed by enum inv_devices */ 138 static const struct inv_mpu6050_hw hw_info[] = { 139 { 140 .whoami = INV_MPU6050_WHOAMI_VALUE, 141 .name = "MPU6050", 142 .reg = ®_set_6050, 143 .config = &chip_config_6050, 144 .fifo_size = 1024, 145 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 146 }, 147 { 148 .whoami = INV_MPU6500_WHOAMI_VALUE, 149 .name = "MPU6500", 150 .reg = ®_set_6500, 151 .config = &chip_config_6500, 152 .fifo_size = 512, 153 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 154 }, 155 { 156 .whoami = INV_MPU6515_WHOAMI_VALUE, 157 .name = "MPU6515", 158 .reg = ®_set_6500, 159 .config = &chip_config_6500, 160 .fifo_size = 512, 161 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 162 }, 163 { 164 .whoami = INV_MPU6000_WHOAMI_VALUE, 165 .name = "MPU6000", 166 .reg = ®_set_6050, 167 .config = &chip_config_6050, 168 .fifo_size = 1024, 169 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 170 }, 171 { 172 .whoami = INV_MPU9150_WHOAMI_VALUE, 173 .name = "MPU9150", 174 .reg = ®_set_6050, 175 .config = &chip_config_6050, 176 .fifo_size = 1024, 177 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 178 }, 179 { 180 .whoami = INV_MPU9250_WHOAMI_VALUE, 181 .name = "MPU9250", 182 .reg = ®_set_6500, 183 .config = &chip_config_6500, 184 .fifo_size = 512, 185 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 186 }, 187 { 188 .whoami = INV_MPU9255_WHOAMI_VALUE, 189 .name = "MPU9255", 190 .reg = ®_set_6500, 191 .config = &chip_config_6500, 192 .fifo_size = 512, 193 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 194 }, 195 { 196 .whoami = INV_ICM20608_WHOAMI_VALUE, 197 .name = "ICM20608", 198 .reg = ®_set_6500, 199 .config = &chip_config_6500, 200 .fifo_size = 512, 201 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 202 }, 203 { 204 .whoami = INV_ICM20609_WHOAMI_VALUE, 205 .name = "ICM20609", 206 .reg = ®_set_6500, 207 .config = &chip_config_6500, 208 .fifo_size = 4 * 1024, 209 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 210 }, 211 { 212 .whoami = INV_ICM20689_WHOAMI_VALUE, 213 .name = "ICM20689", 214 .reg = ®_set_6500, 215 .config = &chip_config_6500, 216 .fifo_size = 4 * 1024, 217 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 218 }, 219 { 220 .whoami = INV_ICM20602_WHOAMI_VALUE, 221 .name = "ICM20602", 222 .reg = ®_set_icm20602, 223 .config = &chip_config_6500, 224 .fifo_size = 1008, 225 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 226 }, 227 { 228 .whoami = INV_ICM20690_WHOAMI_VALUE, 229 .name = "ICM20690", 230 .reg = ®_set_6500, 231 .config = &chip_config_6500, 232 .fifo_size = 1024, 233 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 234 }, 235 { 236 .whoami = INV_IAM20680_WHOAMI_VALUE, 237 .name = "IAM20680", 238 .reg = ®_set_6500, 239 .config = &chip_config_6500, 240 .fifo_size = 512, 241 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 242 }, 243 }; 244 245 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep, 246 int clock, int temp_dis) 247 { 248 u8 val; 249 250 if (clock < 0) 251 clock = st->chip_config.clk; 252 if (temp_dis < 0) 253 temp_dis = !st->chip_config.temp_en; 254 255 val = clock & INV_MPU6050_BIT_CLK_MASK; 256 if (temp_dis) 257 val |= INV_MPU6050_BIT_TEMP_DIS; 258 if (sleep) 259 val |= INV_MPU6050_BIT_SLEEP; 260 261 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val); 262 return regmap_write(st->map, st->reg->pwr_mgmt_1, val); 263 } 264 265 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st, 266 unsigned int clock) 267 { 268 int ret; 269 270 switch (st->chip_type) { 271 case INV_MPU6050: 272 case INV_MPU6000: 273 case INV_MPU9150: 274 /* old chips: switch clock manually */ 275 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1); 276 if (ret) 277 return ret; 278 st->chip_config.clk = clock; 279 break; 280 default: 281 /* automatic clock switching, nothing to do */ 282 break; 283 } 284 285 return 0; 286 } 287 288 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, 289 unsigned int mask) 290 { 291 unsigned int sleep; 292 u8 pwr_mgmt2, user_ctrl; 293 int ret; 294 295 /* delete useless requests */ 296 if (mask & INV_MPU6050_SENSOR_ACCL && en == st->chip_config.accl_en) 297 mask &= ~INV_MPU6050_SENSOR_ACCL; 298 if (mask & INV_MPU6050_SENSOR_GYRO && en == st->chip_config.gyro_en) 299 mask &= ~INV_MPU6050_SENSOR_GYRO; 300 if (mask & INV_MPU6050_SENSOR_TEMP && en == st->chip_config.temp_en) 301 mask &= ~INV_MPU6050_SENSOR_TEMP; 302 if (mask & INV_MPU6050_SENSOR_MAGN && en == st->chip_config.magn_en) 303 mask &= ~INV_MPU6050_SENSOR_MAGN; 304 if (mask == 0) 305 return 0; 306 307 /* turn on/off temperature sensor */ 308 if (mask & INV_MPU6050_SENSOR_TEMP) { 309 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, -1, !en); 310 if (ret) 311 return ret; 312 st->chip_config.temp_en = en; 313 } 314 315 /* update user_crtl for driving magnetometer */ 316 if (mask & INV_MPU6050_SENSOR_MAGN) { 317 user_ctrl = st->chip_config.user_ctrl; 318 if (en) 319 user_ctrl |= INV_MPU6050_BIT_I2C_MST_EN; 320 else 321 user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN; 322 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); 323 if (ret) 324 return ret; 325 st->chip_config.user_ctrl = user_ctrl; 326 st->chip_config.magn_en = en; 327 } 328 329 /* manage accel & gyro engines */ 330 if (mask & (INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO)) { 331 /* compute power management 2 current value */ 332 pwr_mgmt2 = 0; 333 if (!st->chip_config.accl_en) 334 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY; 335 if (!st->chip_config.gyro_en) 336 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY; 337 338 /* update to new requested value */ 339 if (mask & INV_MPU6050_SENSOR_ACCL) { 340 if (en) 341 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_ACCL_STBY; 342 else 343 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY; 344 } 345 if (mask & INV_MPU6050_SENSOR_GYRO) { 346 if (en) 347 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_GYRO_STBY; 348 else 349 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY; 350 } 351 352 /* switch clock to internal when turning gyro off */ 353 if (mask & INV_MPU6050_SENSOR_GYRO && !en) { 354 ret = inv_mpu6050_clock_switch(st, INV_CLK_INTERNAL); 355 if (ret) 356 return ret; 357 } 358 359 /* update sensors engine */ 360 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_2: 0x%x\n", 361 pwr_mgmt2); 362 ret = regmap_write(st->map, st->reg->pwr_mgmt_2, pwr_mgmt2); 363 if (ret) 364 return ret; 365 if (mask & INV_MPU6050_SENSOR_ACCL) 366 st->chip_config.accl_en = en; 367 if (mask & INV_MPU6050_SENSOR_GYRO) 368 st->chip_config.gyro_en = en; 369 370 /* compute required time to have sensors stabilized */ 371 sleep = 0; 372 if (en) { 373 if (mask & INV_MPU6050_SENSOR_ACCL) { 374 if (sleep < INV_MPU6050_ACCEL_UP_TIME) 375 sleep = INV_MPU6050_ACCEL_UP_TIME; 376 } 377 if (mask & INV_MPU6050_SENSOR_GYRO) { 378 if (sleep < INV_MPU6050_GYRO_UP_TIME) 379 sleep = INV_MPU6050_GYRO_UP_TIME; 380 } 381 } else { 382 if (mask & INV_MPU6050_SENSOR_GYRO) { 383 if (sleep < INV_MPU6050_GYRO_DOWN_TIME) 384 sleep = INV_MPU6050_GYRO_DOWN_TIME; 385 } 386 } 387 if (sleep) 388 msleep(sleep); 389 390 /* switch clock to PLL when turning gyro on */ 391 if (mask & INV_MPU6050_SENSOR_GYRO && en) { 392 ret = inv_mpu6050_clock_switch(st, INV_CLK_PLL); 393 if (ret) 394 return ret; 395 } 396 } 397 398 return 0; 399 } 400 401 static int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, 402 bool power_on) 403 { 404 int result; 405 406 result = inv_mpu6050_pwr_mgmt_1_write(st, !power_on, -1, -1); 407 if (result) 408 return result; 409 410 if (power_on) 411 usleep_range(INV_MPU6050_REG_UP_TIME_MIN, 412 INV_MPU6050_REG_UP_TIME_MAX); 413 414 return 0; 415 } 416 417 static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st, 418 enum inv_mpu6050_fsr_e val) 419 { 420 unsigned int gyro_shift; 421 u8 data; 422 423 switch (st->chip_type) { 424 case INV_ICM20690: 425 gyro_shift = INV_ICM20690_GYRO_CONFIG_FSR_SHIFT; 426 break; 427 default: 428 gyro_shift = INV_MPU6050_GYRO_CONFIG_FSR_SHIFT; 429 break; 430 } 431 432 data = val << gyro_shift; 433 return regmap_write(st->map, st->reg->gyro_config, data); 434 } 435 436 /* 437 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent 438 * 439 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope 440 * MPU6500 and above have a dedicated register for accelerometer 441 */ 442 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st, 443 enum inv_mpu6050_filter_e val) 444 { 445 int result; 446 447 result = regmap_write(st->map, st->reg->lpf, val); 448 if (result) 449 return result; 450 451 /* set accel lpf */ 452 switch (st->chip_type) { 453 case INV_MPU6050: 454 case INV_MPU6000: 455 case INV_MPU9150: 456 /* old chips, nothing to do */ 457 return 0; 458 case INV_ICM20689: 459 case INV_ICM20690: 460 /* set FIFO size to maximum value */ 461 val |= INV_ICM20689_BITS_FIFO_SIZE_MAX; 462 break; 463 default: 464 break; 465 } 466 467 return regmap_write(st->map, st->reg->accel_lpf, val); 468 } 469 470 /* 471 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO. 472 * 473 * Initial configuration: 474 * FSR: ± 2000DPS 475 * DLPF: 20Hz 476 * FIFO rate: 50Hz 477 * Clock source: Gyro PLL 478 */ 479 static int inv_mpu6050_init_config(struct iio_dev *indio_dev) 480 { 481 int result; 482 u8 d; 483 struct inv_mpu6050_state *st = iio_priv(indio_dev); 484 485 result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr); 486 if (result) 487 return result; 488 489 result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf); 490 if (result) 491 return result; 492 493 d = st->chip_config.divider; 494 result = regmap_write(st->map, st->reg->sample_rate_div, d); 495 if (result) 496 return result; 497 498 d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 499 result = regmap_write(st->map, st->reg->accl_config, d); 500 if (result) 501 return result; 502 503 result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask); 504 if (result) 505 return result; 506 507 /* 508 * Internal chip period is 1ms (1kHz). 509 * Let's use at the beginning the theorical value before measuring 510 * with interrupt timestamps. 511 */ 512 st->chip_period = NSEC_PER_MSEC; 513 514 /* magn chip init, noop if not present in the chip */ 515 result = inv_mpu_magn_probe(st); 516 if (result) 517 return result; 518 519 return 0; 520 } 521 522 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg, 523 int axis, int val) 524 { 525 int ind, result; 526 __be16 d = cpu_to_be16(val); 527 528 ind = (axis - IIO_MOD_X) * 2; 529 result = regmap_bulk_write(st->map, reg + ind, &d, sizeof(d)); 530 if (result) 531 return -EINVAL; 532 533 return 0; 534 } 535 536 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg, 537 int axis, int *val) 538 { 539 int ind, result; 540 __be16 d; 541 542 ind = (axis - IIO_MOD_X) * 2; 543 result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d)); 544 if (result) 545 return -EINVAL; 546 *val = (short)be16_to_cpup(&d); 547 548 return IIO_VAL_INT; 549 } 550 551 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev, 552 struct iio_chan_spec const *chan, 553 int *val) 554 { 555 struct inv_mpu6050_state *st = iio_priv(indio_dev); 556 struct device *pdev = regmap_get_device(st->map); 557 unsigned int freq_hz, period_us, min_sleep_us, max_sleep_us; 558 int result; 559 int ret; 560 561 /* compute sample period */ 562 freq_hz = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 563 period_us = 1000000 / freq_hz; 564 565 result = pm_runtime_get_sync(pdev); 566 if (result < 0) { 567 pm_runtime_put_noidle(pdev); 568 return result; 569 } 570 571 switch (chan->type) { 572 case IIO_ANGL_VEL: 573 if (!st->chip_config.gyro_en) { 574 result = inv_mpu6050_switch_engine(st, true, 575 INV_MPU6050_SENSOR_GYRO); 576 if (result) 577 goto error_power_off; 578 /* need to wait 2 periods to have first valid sample */ 579 min_sleep_us = 2 * period_us; 580 max_sleep_us = 2 * (period_us + period_us / 2); 581 usleep_range(min_sleep_us, max_sleep_us); 582 } 583 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro, 584 chan->channel2, val); 585 break; 586 case IIO_ACCEL: 587 if (!st->chip_config.accl_en) { 588 result = inv_mpu6050_switch_engine(st, true, 589 INV_MPU6050_SENSOR_ACCL); 590 if (result) 591 goto error_power_off; 592 /* wait 1 period for first sample availability */ 593 min_sleep_us = period_us; 594 max_sleep_us = period_us + period_us / 2; 595 usleep_range(min_sleep_us, max_sleep_us); 596 } 597 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl, 598 chan->channel2, val); 599 break; 600 case IIO_TEMP: 601 /* temperature sensor work only with accel and/or gyro */ 602 if (!st->chip_config.accl_en && !st->chip_config.gyro_en) { 603 result = -EBUSY; 604 goto error_power_off; 605 } 606 if (!st->chip_config.temp_en) { 607 result = inv_mpu6050_switch_engine(st, true, 608 INV_MPU6050_SENSOR_TEMP); 609 if (result) 610 goto error_power_off; 611 /* wait 1 period for first sample availability */ 612 min_sleep_us = period_us; 613 max_sleep_us = period_us + period_us / 2; 614 usleep_range(min_sleep_us, max_sleep_us); 615 } 616 ret = inv_mpu6050_sensor_show(st, st->reg->temperature, 617 IIO_MOD_X, val); 618 break; 619 case IIO_MAGN: 620 if (!st->chip_config.magn_en) { 621 result = inv_mpu6050_switch_engine(st, true, 622 INV_MPU6050_SENSOR_MAGN); 623 if (result) 624 goto error_power_off; 625 /* frequency is limited for magnetometer */ 626 if (freq_hz > INV_MPU_MAGN_FREQ_HZ_MAX) { 627 freq_hz = INV_MPU_MAGN_FREQ_HZ_MAX; 628 period_us = 1000000 / freq_hz; 629 } 630 /* need to wait 2 periods to have first valid sample */ 631 min_sleep_us = 2 * period_us; 632 max_sleep_us = 2 * (period_us + period_us / 2); 633 usleep_range(min_sleep_us, max_sleep_us); 634 } 635 ret = inv_mpu_magn_read(st, chan->channel2, val); 636 break; 637 default: 638 ret = -EINVAL; 639 break; 640 } 641 642 pm_runtime_mark_last_busy(pdev); 643 pm_runtime_put_autosuspend(pdev); 644 645 return ret; 646 647 error_power_off: 648 pm_runtime_put_autosuspend(pdev); 649 return result; 650 } 651 652 static int 653 inv_mpu6050_read_raw(struct iio_dev *indio_dev, 654 struct iio_chan_spec const *chan, 655 int *val, int *val2, long mask) 656 { 657 struct inv_mpu6050_state *st = iio_priv(indio_dev); 658 int ret = 0; 659 660 switch (mask) { 661 case IIO_CHAN_INFO_RAW: 662 ret = iio_device_claim_direct_mode(indio_dev); 663 if (ret) 664 return ret; 665 mutex_lock(&st->lock); 666 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val); 667 mutex_unlock(&st->lock); 668 iio_device_release_direct_mode(indio_dev); 669 return ret; 670 case IIO_CHAN_INFO_SCALE: 671 switch (chan->type) { 672 case IIO_ANGL_VEL: 673 mutex_lock(&st->lock); 674 *val = 0; 675 *val2 = gyro_scale_6050[st->chip_config.fsr]; 676 mutex_unlock(&st->lock); 677 678 return IIO_VAL_INT_PLUS_NANO; 679 case IIO_ACCEL: 680 mutex_lock(&st->lock); 681 *val = 0; 682 *val2 = accel_scale[st->chip_config.accl_fs]; 683 mutex_unlock(&st->lock); 684 685 return IIO_VAL_INT_PLUS_MICRO; 686 case IIO_TEMP: 687 *val = st->hw->temp.scale / 1000000; 688 *val2 = st->hw->temp.scale % 1000000; 689 return IIO_VAL_INT_PLUS_MICRO; 690 case IIO_MAGN: 691 return inv_mpu_magn_get_scale(st, chan, val, val2); 692 default: 693 return -EINVAL; 694 } 695 case IIO_CHAN_INFO_OFFSET: 696 switch (chan->type) { 697 case IIO_TEMP: 698 *val = st->hw->temp.offset; 699 return IIO_VAL_INT; 700 default: 701 return -EINVAL; 702 } 703 case IIO_CHAN_INFO_CALIBBIAS: 704 switch (chan->type) { 705 case IIO_ANGL_VEL: 706 mutex_lock(&st->lock); 707 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset, 708 chan->channel2, val); 709 mutex_unlock(&st->lock); 710 return IIO_VAL_INT; 711 case IIO_ACCEL: 712 mutex_lock(&st->lock); 713 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset, 714 chan->channel2, val); 715 mutex_unlock(&st->lock); 716 return IIO_VAL_INT; 717 718 default: 719 return -EINVAL; 720 } 721 default: 722 return -EINVAL; 723 } 724 } 725 726 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val) 727 { 728 int result, i; 729 730 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) { 731 if (gyro_scale_6050[i] == val) { 732 result = inv_mpu6050_set_gyro_fsr(st, i); 733 if (result) 734 return result; 735 736 st->chip_config.fsr = i; 737 return 0; 738 } 739 } 740 741 return -EINVAL; 742 } 743 744 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev, 745 struct iio_chan_spec const *chan, long mask) 746 { 747 switch (mask) { 748 case IIO_CHAN_INFO_SCALE: 749 switch (chan->type) { 750 case IIO_ANGL_VEL: 751 return IIO_VAL_INT_PLUS_NANO; 752 default: 753 return IIO_VAL_INT_PLUS_MICRO; 754 } 755 default: 756 return IIO_VAL_INT_PLUS_MICRO; 757 } 758 759 return -EINVAL; 760 } 761 762 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val) 763 { 764 int result, i; 765 u8 d; 766 767 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) { 768 if (accel_scale[i] == val) { 769 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 770 result = regmap_write(st->map, st->reg->accl_config, d); 771 if (result) 772 return result; 773 774 st->chip_config.accl_fs = i; 775 return 0; 776 } 777 } 778 779 return -EINVAL; 780 } 781 782 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, 783 struct iio_chan_spec const *chan, 784 int val, int val2, long mask) 785 { 786 struct inv_mpu6050_state *st = iio_priv(indio_dev); 787 struct device *pdev = regmap_get_device(st->map); 788 int result; 789 790 /* 791 * we should only update scale when the chip is disabled, i.e. 792 * not running 793 */ 794 result = iio_device_claim_direct_mode(indio_dev); 795 if (result) 796 return result; 797 798 mutex_lock(&st->lock); 799 result = pm_runtime_get_sync(pdev); 800 if (result < 0) { 801 pm_runtime_put_noidle(pdev); 802 goto error_write_raw_unlock; 803 } 804 805 switch (mask) { 806 case IIO_CHAN_INFO_SCALE: 807 switch (chan->type) { 808 case IIO_ANGL_VEL: 809 result = inv_mpu6050_write_gyro_scale(st, val2); 810 break; 811 case IIO_ACCEL: 812 result = inv_mpu6050_write_accel_scale(st, val2); 813 break; 814 default: 815 result = -EINVAL; 816 break; 817 } 818 break; 819 case IIO_CHAN_INFO_CALIBBIAS: 820 switch (chan->type) { 821 case IIO_ANGL_VEL: 822 result = inv_mpu6050_sensor_set(st, 823 st->reg->gyro_offset, 824 chan->channel2, val); 825 break; 826 case IIO_ACCEL: 827 result = inv_mpu6050_sensor_set(st, 828 st->reg->accl_offset, 829 chan->channel2, val); 830 break; 831 default: 832 result = -EINVAL; 833 break; 834 } 835 break; 836 default: 837 result = -EINVAL; 838 break; 839 } 840 841 pm_runtime_mark_last_busy(pdev); 842 pm_runtime_put_autosuspend(pdev); 843 error_write_raw_unlock: 844 mutex_unlock(&st->lock); 845 iio_device_release_direct_mode(indio_dev); 846 847 return result; 848 } 849 850 /* 851 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate. 852 * 853 * Based on the Nyquist principle, the bandwidth of the low 854 * pass filter must not exceed the signal sampling rate divided 855 * by 2, or there would be aliasing. 856 * This function basically search for the correct low pass 857 * parameters based on the fifo rate, e.g, sampling frequency. 858 * 859 * lpf is set automatically when setting sampling rate to avoid any aliases. 860 */ 861 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate) 862 { 863 static const int hz[] = {400, 200, 90, 40, 20, 10}; 864 static const int d[] = { 865 INV_MPU6050_FILTER_200HZ, INV_MPU6050_FILTER_100HZ, 866 INV_MPU6050_FILTER_45HZ, INV_MPU6050_FILTER_20HZ, 867 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ 868 }; 869 int i, result; 870 u8 data; 871 872 data = INV_MPU6050_FILTER_5HZ; 873 for (i = 0; i < ARRAY_SIZE(hz); ++i) { 874 if (rate >= hz[i]) { 875 data = d[i]; 876 break; 877 } 878 } 879 result = inv_mpu6050_set_lpf_regs(st, data); 880 if (result) 881 return result; 882 st->chip_config.lpf = data; 883 884 return 0; 885 } 886 887 /* 888 * inv_mpu6050_fifo_rate_store() - Set fifo rate. 889 */ 890 static ssize_t 891 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr, 892 const char *buf, size_t count) 893 { 894 int fifo_rate; 895 u8 d; 896 int result; 897 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 898 struct inv_mpu6050_state *st = iio_priv(indio_dev); 899 struct device *pdev = regmap_get_device(st->map); 900 901 if (kstrtoint(buf, 10, &fifo_rate)) 902 return -EINVAL; 903 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE || 904 fifo_rate > INV_MPU6050_MAX_FIFO_RATE) 905 return -EINVAL; 906 907 /* compute the chip sample rate divider */ 908 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate); 909 /* compute back the fifo rate to handle truncation cases */ 910 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d); 911 912 mutex_lock(&st->lock); 913 if (d == st->chip_config.divider) { 914 result = 0; 915 goto fifo_rate_fail_unlock; 916 } 917 result = pm_runtime_get_sync(pdev); 918 if (result < 0) { 919 pm_runtime_put_noidle(pdev); 920 goto fifo_rate_fail_unlock; 921 } 922 923 result = regmap_write(st->map, st->reg->sample_rate_div, d); 924 if (result) 925 goto fifo_rate_fail_power_off; 926 st->chip_config.divider = d; 927 928 result = inv_mpu6050_set_lpf(st, fifo_rate); 929 if (result) 930 goto fifo_rate_fail_power_off; 931 932 /* update rate for magn, noop if not present in chip */ 933 result = inv_mpu_magn_set_rate(st, fifo_rate); 934 if (result) 935 goto fifo_rate_fail_power_off; 936 937 pm_runtime_mark_last_busy(pdev); 938 fifo_rate_fail_power_off: 939 pm_runtime_put_autosuspend(pdev); 940 fifo_rate_fail_unlock: 941 mutex_unlock(&st->lock); 942 if (result) 943 return result; 944 945 return count; 946 } 947 948 /* 949 * inv_fifo_rate_show() - Get the current sampling rate. 950 */ 951 static ssize_t 952 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr, 953 char *buf) 954 { 955 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 956 unsigned fifo_rate; 957 958 mutex_lock(&st->lock); 959 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 960 mutex_unlock(&st->lock); 961 962 return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate); 963 } 964 965 /* 966 * inv_attr_show() - calling this function will show current 967 * parameters. 968 * 969 * Deprecated in favor of IIO mounting matrix API. 970 * 971 * See inv_get_mount_matrix() 972 */ 973 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr, 974 char *buf) 975 { 976 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 977 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 978 s8 *m; 979 980 switch (this_attr->address) { 981 /* 982 * In MPU6050, the two matrix are the same because gyro and accel 983 * are integrated in one chip 984 */ 985 case ATTR_GYRO_MATRIX: 986 case ATTR_ACCL_MATRIX: 987 m = st->plat_data.orientation; 988 989 return scnprintf(buf, PAGE_SIZE, 990 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n", 991 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]); 992 default: 993 return -EINVAL; 994 } 995 } 996 997 /** 998 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense 999 * MPU6050 device. 1000 * @indio_dev: The IIO device 1001 * @trig: The new trigger 1002 * 1003 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050 1004 * device, -EINVAL otherwise. 1005 */ 1006 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev, 1007 struct iio_trigger *trig) 1008 { 1009 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1010 1011 if (st->trig != trig) 1012 return -EINVAL; 1013 1014 return 0; 1015 } 1016 1017 static const struct iio_mount_matrix * 1018 inv_get_mount_matrix(const struct iio_dev *indio_dev, 1019 const struct iio_chan_spec *chan) 1020 { 1021 struct inv_mpu6050_state *data = iio_priv(indio_dev); 1022 const struct iio_mount_matrix *matrix; 1023 1024 if (chan->type == IIO_MAGN) 1025 matrix = &data->magn_orient; 1026 else 1027 matrix = &data->orientation; 1028 1029 return matrix; 1030 } 1031 1032 static const struct iio_chan_spec_ext_info inv_ext_info[] = { 1033 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix), 1034 { } 1035 }; 1036 1037 #define INV_MPU6050_CHAN(_type, _channel2, _index) \ 1038 { \ 1039 .type = _type, \ 1040 .modified = 1, \ 1041 .channel2 = _channel2, \ 1042 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 1043 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 1044 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 1045 .scan_index = _index, \ 1046 .scan_type = { \ 1047 .sign = 's', \ 1048 .realbits = 16, \ 1049 .storagebits = 16, \ 1050 .shift = 0, \ 1051 .endianness = IIO_BE, \ 1052 }, \ 1053 .ext_info = inv_ext_info, \ 1054 } 1055 1056 #define INV_MPU6050_TEMP_CHAN(_index) \ 1057 { \ 1058 .type = IIO_TEMP, \ 1059 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \ 1060 | BIT(IIO_CHAN_INFO_OFFSET) \ 1061 | BIT(IIO_CHAN_INFO_SCALE), \ 1062 .scan_index = _index, \ 1063 .scan_type = { \ 1064 .sign = 's', \ 1065 .realbits = 16, \ 1066 .storagebits = 16, \ 1067 .shift = 0, \ 1068 .endianness = IIO_BE, \ 1069 }, \ 1070 } 1071 1072 static const struct iio_chan_spec inv_mpu_channels[] = { 1073 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP), 1074 1075 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1076 1077 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1078 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1079 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1080 1081 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1082 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1083 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1084 }; 1085 1086 #define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL \ 1087 (BIT(INV_MPU6050_SCAN_ACCL_X) \ 1088 | BIT(INV_MPU6050_SCAN_ACCL_Y) \ 1089 | BIT(INV_MPU6050_SCAN_ACCL_Z)) 1090 1091 #define INV_MPU6050_SCAN_MASK_3AXIS_GYRO \ 1092 (BIT(INV_MPU6050_SCAN_GYRO_X) \ 1093 | BIT(INV_MPU6050_SCAN_GYRO_Y) \ 1094 | BIT(INV_MPU6050_SCAN_GYRO_Z)) 1095 1096 #define INV_MPU6050_SCAN_MASK_TEMP (BIT(INV_MPU6050_SCAN_TEMP)) 1097 1098 static const unsigned long inv_mpu_scan_masks[] = { 1099 /* 3-axis accel */ 1100 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL, 1101 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1102 /* 3-axis gyro */ 1103 INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1104 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1105 /* 6-axis accel + gyro */ 1106 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1107 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1108 | INV_MPU6050_SCAN_MASK_TEMP, 1109 0, 1110 }; 1111 1112 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \ 1113 { \ 1114 .type = IIO_MAGN, \ 1115 .modified = 1, \ 1116 .channel2 = _chan2, \ 1117 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \ 1118 BIT(IIO_CHAN_INFO_RAW), \ 1119 .scan_index = _index, \ 1120 .scan_type = { \ 1121 .sign = 's', \ 1122 .realbits = _bits, \ 1123 .storagebits = 16, \ 1124 .shift = 0, \ 1125 .endianness = IIO_BE, \ 1126 }, \ 1127 .ext_info = inv_ext_info, \ 1128 } 1129 1130 static const struct iio_chan_spec inv_mpu9150_channels[] = { 1131 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP), 1132 1133 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1134 1135 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1136 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1137 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1138 1139 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1140 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1141 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1142 1143 /* Magnetometer resolution is 13 bits */ 1144 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X), 1145 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y), 1146 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z), 1147 }; 1148 1149 static const struct iio_chan_spec inv_mpu9250_channels[] = { 1150 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP), 1151 1152 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1153 1154 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1155 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1156 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1157 1158 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1159 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1160 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1161 1162 /* Magnetometer resolution is 16 bits */ 1163 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X), 1164 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y), 1165 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z), 1166 }; 1167 1168 #define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN \ 1169 (BIT(INV_MPU9X50_SCAN_MAGN_X) \ 1170 | BIT(INV_MPU9X50_SCAN_MAGN_Y) \ 1171 | BIT(INV_MPU9X50_SCAN_MAGN_Z)) 1172 1173 static const unsigned long inv_mpu9x50_scan_masks[] = { 1174 /* 3-axis accel */ 1175 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL, 1176 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1177 /* 3-axis gyro */ 1178 INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1179 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1180 /* 3-axis magn */ 1181 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1182 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP, 1183 /* 6-axis accel + gyro */ 1184 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1185 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1186 | INV_MPU6050_SCAN_MASK_TEMP, 1187 /* 6-axis accel + magn */ 1188 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1189 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1190 | INV_MPU6050_SCAN_MASK_TEMP, 1191 /* 6-axis gyro + magn */ 1192 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1193 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1194 | INV_MPU6050_SCAN_MASK_TEMP, 1195 /* 9-axis accel + gyro + magn */ 1196 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1197 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1198 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1199 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1200 | INV_MPU6050_SCAN_MASK_TEMP, 1201 0, 1202 }; 1203 1204 static const unsigned long inv_icm20602_scan_masks[] = { 1205 /* 3-axis accel + temp (mandatory) */ 1206 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1207 /* 3-axis gyro + temp (mandatory) */ 1208 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1209 /* 6-axis accel + gyro + temp (mandatory) */ 1210 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1211 | INV_MPU6050_SCAN_MASK_TEMP, 1212 0, 1213 }; 1214 1215 /* 1216 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and 1217 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the 1218 * low-pass filter. Specifically, each of these sampling rates are about twice 1219 * the bandwidth of a corresponding low-pass filter, which should eliminate 1220 * aliasing following the Nyquist principle. By picking a frequency different 1221 * from these, the user risks aliasing effects. 1222 */ 1223 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500"); 1224 static IIO_CONST_ATTR(in_anglvel_scale_available, 1225 "0.000133090 0.000266181 0.000532362 0.001064724"); 1226 static IIO_CONST_ATTR(in_accel_scale_available, 1227 "0.000598 0.001196 0.002392 0.004785"); 1228 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show, 1229 inv_mpu6050_fifo_rate_store); 1230 1231 /* Deprecated: kept for userspace backward compatibility. */ 1232 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL, 1233 ATTR_GYRO_MATRIX); 1234 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL, 1235 ATTR_ACCL_MATRIX); 1236 1237 static struct attribute *inv_attributes[] = { 1238 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */ 1239 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */ 1240 &iio_dev_attr_sampling_frequency.dev_attr.attr, 1241 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 1242 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 1243 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr, 1244 NULL, 1245 }; 1246 1247 static const struct attribute_group inv_attribute_group = { 1248 .attrs = inv_attributes 1249 }; 1250 1251 static int inv_mpu6050_reg_access(struct iio_dev *indio_dev, 1252 unsigned int reg, 1253 unsigned int writeval, 1254 unsigned int *readval) 1255 { 1256 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1257 int ret; 1258 1259 mutex_lock(&st->lock); 1260 if (readval) 1261 ret = regmap_read(st->map, reg, readval); 1262 else 1263 ret = regmap_write(st->map, reg, writeval); 1264 mutex_unlock(&st->lock); 1265 1266 return ret; 1267 } 1268 1269 static const struct iio_info mpu_info = { 1270 .read_raw = &inv_mpu6050_read_raw, 1271 .write_raw = &inv_mpu6050_write_raw, 1272 .write_raw_get_fmt = &inv_write_raw_get_fmt, 1273 .attrs = &inv_attribute_group, 1274 .validate_trigger = inv_mpu6050_validate_trigger, 1275 .debugfs_reg_access = &inv_mpu6050_reg_access, 1276 }; 1277 1278 /* 1279 * inv_check_and_setup_chip() - check and setup chip. 1280 */ 1281 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st) 1282 { 1283 int result; 1284 unsigned int regval, mask; 1285 int i; 1286 1287 st->hw = &hw_info[st->chip_type]; 1288 st->reg = hw_info[st->chip_type].reg; 1289 memcpy(&st->chip_config, hw_info[st->chip_type].config, 1290 sizeof(st->chip_config)); 1291 1292 /* check chip self-identification */ 1293 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val); 1294 if (result) 1295 return result; 1296 if (regval != st->hw->whoami) { 1297 /* check whoami against all possible values */ 1298 for (i = 0; i < INV_NUM_PARTS; ++i) { 1299 if (regval == hw_info[i].whoami) { 1300 dev_warn(regmap_get_device(st->map), 1301 "whoami mismatch got %#02x (%s)" 1302 "expected %#02hhx (%s)\n", 1303 regval, hw_info[i].name, 1304 st->hw->whoami, st->hw->name); 1305 break; 1306 } 1307 } 1308 if (i >= INV_NUM_PARTS) { 1309 dev_err(regmap_get_device(st->map), 1310 "invalid whoami %#02x expected %#02hhx (%s)\n", 1311 regval, st->hw->whoami, st->hw->name); 1312 return -ENODEV; 1313 } 1314 } 1315 1316 /* reset to make sure previous state are not there */ 1317 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 1318 INV_MPU6050_BIT_H_RESET); 1319 if (result) 1320 return result; 1321 msleep(INV_MPU6050_POWER_UP_TIME); 1322 switch (st->chip_type) { 1323 case INV_MPU6000: 1324 case INV_MPU6500: 1325 case INV_MPU6515: 1326 case INV_MPU9250: 1327 case INV_MPU9255: 1328 /* reset signal path (required for spi connection) */ 1329 regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST | 1330 INV_MPU6050_BIT_GYRO_RST; 1331 result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET, 1332 regval); 1333 if (result) 1334 return result; 1335 msleep(INV_MPU6050_POWER_UP_TIME); 1336 break; 1337 default: 1338 break; 1339 } 1340 1341 /* 1342 * Turn power on. After reset, the sleep bit could be on 1343 * or off depending on the OTP settings. Turning power on 1344 * make it in a definite state as well as making the hardware 1345 * state align with the software state 1346 */ 1347 result = inv_mpu6050_set_power_itg(st, true); 1348 if (result) 1349 return result; 1350 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO | 1351 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN; 1352 result = inv_mpu6050_switch_engine(st, false, mask); 1353 if (result) 1354 goto error_power_off; 1355 1356 return 0; 1357 1358 error_power_off: 1359 inv_mpu6050_set_power_itg(st, false); 1360 return result; 1361 } 1362 1363 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st) 1364 { 1365 int result; 1366 1367 result = regulator_enable(st->vddio_supply); 1368 if (result) { 1369 dev_err(regmap_get_device(st->map), 1370 "Failed to enable vddio regulator: %d\n", result); 1371 } else { 1372 /* Give the device a little bit of time to start up. */ 1373 usleep_range(3000, 5000); 1374 } 1375 1376 return result; 1377 } 1378 1379 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st) 1380 { 1381 int result; 1382 1383 result = regulator_disable(st->vddio_supply); 1384 if (result) 1385 dev_err(regmap_get_device(st->map), 1386 "Failed to disable vddio regulator: %d\n", result); 1387 1388 return result; 1389 } 1390 1391 static void inv_mpu_core_disable_regulator_action(void *_data) 1392 { 1393 struct inv_mpu6050_state *st = _data; 1394 int result; 1395 1396 result = regulator_disable(st->vdd_supply); 1397 if (result) 1398 dev_err(regmap_get_device(st->map), 1399 "Failed to disable vdd regulator: %d\n", result); 1400 1401 inv_mpu_core_disable_regulator_vddio(st); 1402 } 1403 1404 static void inv_mpu_pm_disable(void *data) 1405 { 1406 struct device *dev = data; 1407 1408 pm_runtime_put_sync_suspend(dev); 1409 pm_runtime_disable(dev); 1410 } 1411 1412 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, 1413 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type) 1414 { 1415 struct inv_mpu6050_state *st; 1416 struct iio_dev *indio_dev; 1417 struct inv_mpu6050_platform_data *pdata; 1418 struct device *dev = regmap_get_device(regmap); 1419 int result; 1420 struct irq_data *desc; 1421 int irq_type; 1422 1423 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 1424 if (!indio_dev) 1425 return -ENOMEM; 1426 1427 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS); 1428 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) { 1429 dev_err(dev, "Bad invensense chip_type=%d name=%s\n", 1430 chip_type, name); 1431 return -ENODEV; 1432 } 1433 st = iio_priv(indio_dev); 1434 mutex_init(&st->lock); 1435 st->chip_type = chip_type; 1436 st->irq = irq; 1437 st->map = regmap; 1438 1439 pdata = dev_get_platdata(dev); 1440 if (!pdata) { 1441 result = iio_read_mount_matrix(dev, "mount-matrix", 1442 &st->orientation); 1443 if (result) { 1444 dev_err(dev, "Failed to retrieve mounting matrix %d\n", 1445 result); 1446 return result; 1447 } 1448 } else { 1449 st->plat_data = *pdata; 1450 } 1451 1452 desc = irq_get_irq_data(irq); 1453 if (!desc) { 1454 dev_err(dev, "Could not find IRQ %d\n", irq); 1455 return -EINVAL; 1456 } 1457 1458 irq_type = irqd_get_trigger_type(desc); 1459 if (!irq_type) 1460 irq_type = IRQF_TRIGGER_RISING; 1461 if (irq_type & IRQF_TRIGGER_RISING) // rising or both-edge 1462 st->irq_mask = INV_MPU6050_ACTIVE_HIGH; 1463 else if (irq_type == IRQF_TRIGGER_FALLING) 1464 st->irq_mask = INV_MPU6050_ACTIVE_LOW; 1465 else if (irq_type == IRQF_TRIGGER_HIGH) 1466 st->irq_mask = INV_MPU6050_ACTIVE_HIGH | 1467 INV_MPU6050_LATCH_INT_EN; 1468 else if (irq_type == IRQF_TRIGGER_LOW) 1469 st->irq_mask = INV_MPU6050_ACTIVE_LOW | 1470 INV_MPU6050_LATCH_INT_EN; 1471 else { 1472 dev_err(dev, "Invalid interrupt type 0x%x specified\n", 1473 irq_type); 1474 return -EINVAL; 1475 } 1476 1477 st->vdd_supply = devm_regulator_get(dev, "vdd"); 1478 if (IS_ERR(st->vdd_supply)) 1479 return dev_err_probe(dev, PTR_ERR(st->vdd_supply), 1480 "Failed to get vdd regulator\n"); 1481 1482 st->vddio_supply = devm_regulator_get(dev, "vddio"); 1483 if (IS_ERR(st->vddio_supply)) 1484 return dev_err_probe(dev, PTR_ERR(st->vddio_supply), 1485 "Failed to get vddio regulator\n"); 1486 1487 result = regulator_enable(st->vdd_supply); 1488 if (result) { 1489 dev_err(dev, "Failed to enable vdd regulator: %d\n", result); 1490 return result; 1491 } 1492 msleep(INV_MPU6050_POWER_UP_TIME); 1493 1494 result = inv_mpu_core_enable_regulator_vddio(st); 1495 if (result) { 1496 regulator_disable(st->vdd_supply); 1497 return result; 1498 } 1499 1500 result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action, 1501 st); 1502 if (result) { 1503 dev_err(dev, "Failed to setup regulator cleanup action %d\n", 1504 result); 1505 return result; 1506 } 1507 1508 /* fill magnetometer orientation */ 1509 result = inv_mpu_magn_set_orient(st); 1510 if (result) 1511 return result; 1512 1513 /* power is turned on inside check chip type*/ 1514 result = inv_check_and_setup_chip(st); 1515 if (result) 1516 return result; 1517 1518 result = inv_mpu6050_init_config(indio_dev); 1519 if (result) { 1520 dev_err(dev, "Could not initialize device.\n"); 1521 goto error_power_off; 1522 } 1523 1524 dev_set_drvdata(dev, indio_dev); 1525 /* name will be NULL when enumerated via ACPI */ 1526 if (name) 1527 indio_dev->name = name; 1528 else 1529 indio_dev->name = dev_name(dev); 1530 1531 /* requires parent device set in indio_dev */ 1532 if (inv_mpu_bus_setup) { 1533 result = inv_mpu_bus_setup(indio_dev); 1534 if (result) 1535 goto error_power_off; 1536 } 1537 1538 /* chip init is done, turning on runtime power management */ 1539 result = pm_runtime_set_active(dev); 1540 if (result) 1541 goto error_power_off; 1542 pm_runtime_get_noresume(dev); 1543 pm_runtime_enable(dev); 1544 pm_runtime_set_autosuspend_delay(dev, INV_MPU6050_SUSPEND_DELAY_MS); 1545 pm_runtime_use_autosuspend(dev); 1546 pm_runtime_put(dev); 1547 result = devm_add_action_or_reset(dev, inv_mpu_pm_disable, dev); 1548 if (result) 1549 return result; 1550 1551 switch (chip_type) { 1552 case INV_MPU9150: 1553 indio_dev->channels = inv_mpu9150_channels; 1554 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels); 1555 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks; 1556 break; 1557 case INV_MPU9250: 1558 case INV_MPU9255: 1559 indio_dev->channels = inv_mpu9250_channels; 1560 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels); 1561 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks; 1562 break; 1563 case INV_ICM20602: 1564 indio_dev->channels = inv_mpu_channels; 1565 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1566 indio_dev->available_scan_masks = inv_icm20602_scan_masks; 1567 break; 1568 default: 1569 indio_dev->channels = inv_mpu_channels; 1570 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1571 indio_dev->available_scan_masks = inv_mpu_scan_masks; 1572 break; 1573 } 1574 /* 1575 * Use magnetometer inside the chip only if there is no i2c 1576 * auxiliary device in use. Otherwise Going back to 6-axis only. 1577 */ 1578 if (st->magn_disabled) { 1579 indio_dev->channels = inv_mpu_channels; 1580 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1581 indio_dev->available_scan_masks = inv_mpu_scan_masks; 1582 } 1583 1584 indio_dev->info = &mpu_info; 1585 indio_dev->modes = INDIO_BUFFER_TRIGGERED; 1586 1587 result = devm_iio_triggered_buffer_setup(dev, indio_dev, 1588 iio_pollfunc_store_time, 1589 inv_mpu6050_read_fifo, 1590 NULL); 1591 if (result) { 1592 dev_err(dev, "configure buffer fail %d\n", result); 1593 return result; 1594 } 1595 result = inv_mpu6050_probe_trigger(indio_dev, irq_type); 1596 if (result) { 1597 dev_err(dev, "trigger probe fail %d\n", result); 1598 return result; 1599 } 1600 1601 result = devm_iio_device_register(dev, indio_dev); 1602 if (result) { 1603 dev_err(dev, "IIO register fail %d\n", result); 1604 return result; 1605 } 1606 1607 return 0; 1608 1609 error_power_off: 1610 inv_mpu6050_set_power_itg(st, false); 1611 return result; 1612 } 1613 EXPORT_SYMBOL_GPL(inv_mpu_core_probe); 1614 1615 static int __maybe_unused inv_mpu_resume(struct device *dev) 1616 { 1617 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1618 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1619 int result; 1620 1621 mutex_lock(&st->lock); 1622 result = inv_mpu_core_enable_regulator_vddio(st); 1623 if (result) 1624 goto out_unlock; 1625 1626 result = inv_mpu6050_set_power_itg(st, true); 1627 if (result) 1628 goto out_unlock; 1629 1630 pm_runtime_disable(dev); 1631 pm_runtime_set_active(dev); 1632 pm_runtime_enable(dev); 1633 1634 result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors); 1635 if (result) 1636 goto out_unlock; 1637 1638 if (iio_buffer_enabled(indio_dev)) 1639 result = inv_mpu6050_prepare_fifo(st, true); 1640 1641 out_unlock: 1642 mutex_unlock(&st->lock); 1643 1644 return result; 1645 } 1646 1647 static int __maybe_unused inv_mpu_suspend(struct device *dev) 1648 { 1649 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1650 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1651 int result; 1652 1653 mutex_lock(&st->lock); 1654 1655 st->suspended_sensors = 0; 1656 if (pm_runtime_suspended(dev)) { 1657 result = 0; 1658 goto out_unlock; 1659 } 1660 1661 if (iio_buffer_enabled(indio_dev)) { 1662 result = inv_mpu6050_prepare_fifo(st, false); 1663 if (result) 1664 goto out_unlock; 1665 } 1666 1667 if (st->chip_config.accl_en) 1668 st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL; 1669 if (st->chip_config.gyro_en) 1670 st->suspended_sensors |= INV_MPU6050_SENSOR_GYRO; 1671 if (st->chip_config.temp_en) 1672 st->suspended_sensors |= INV_MPU6050_SENSOR_TEMP; 1673 if (st->chip_config.magn_en) 1674 st->suspended_sensors |= INV_MPU6050_SENSOR_MAGN; 1675 result = inv_mpu6050_switch_engine(st, false, st->suspended_sensors); 1676 if (result) 1677 goto out_unlock; 1678 1679 result = inv_mpu6050_set_power_itg(st, false); 1680 if (result) 1681 goto out_unlock; 1682 1683 inv_mpu_core_disable_regulator_vddio(st); 1684 out_unlock: 1685 mutex_unlock(&st->lock); 1686 1687 return result; 1688 } 1689 1690 static int __maybe_unused inv_mpu_runtime_suspend(struct device *dev) 1691 { 1692 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev)); 1693 unsigned int sensors; 1694 int ret; 1695 1696 mutex_lock(&st->lock); 1697 1698 sensors = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO | 1699 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN; 1700 ret = inv_mpu6050_switch_engine(st, false, sensors); 1701 if (ret) 1702 goto out_unlock; 1703 1704 ret = inv_mpu6050_set_power_itg(st, false); 1705 if (ret) 1706 goto out_unlock; 1707 1708 inv_mpu_core_disable_regulator_vddio(st); 1709 1710 out_unlock: 1711 mutex_unlock(&st->lock); 1712 return ret; 1713 } 1714 1715 static int __maybe_unused inv_mpu_runtime_resume(struct device *dev) 1716 { 1717 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev)); 1718 int ret; 1719 1720 ret = inv_mpu_core_enable_regulator_vddio(st); 1721 if (ret) 1722 return ret; 1723 1724 return inv_mpu6050_set_power_itg(st, true); 1725 } 1726 1727 const struct dev_pm_ops inv_mpu_pmops = { 1728 SET_SYSTEM_SLEEP_PM_OPS(inv_mpu_suspend, inv_mpu_resume) 1729 SET_RUNTIME_PM_OPS(inv_mpu_runtime_suspend, inv_mpu_runtime_resume, NULL) 1730 }; 1731 EXPORT_SYMBOL_GPL(inv_mpu_pmops); 1732 1733 MODULE_AUTHOR("Invensense Corporation"); 1734 MODULE_DESCRIPTION("Invensense device MPU6050 driver"); 1735 MODULE_LICENSE("GPL"); 1736