1 /* 2 * Copyright (C) 2012 Invensense, Inc. 3 * 4 * This software is licensed under the terms of the GNU General Public 5 * License version 2, as published by the Free Software Foundation, and 6 * may be copied, distributed, and modified under those terms. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/slab.h> 16 #include <linux/i2c.h> 17 #include <linux/err.h> 18 #include <linux/delay.h> 19 #include <linux/sysfs.h> 20 #include <linux/jiffies.h> 21 #include <linux/irq.h> 22 #include <linux/interrupt.h> 23 #include <linux/kfifo.h> 24 #include <linux/spinlock.h> 25 #include <linux/iio/iio.h> 26 #include <linux/acpi.h> 27 #include "inv_mpu_iio.h" 28 29 /* 30 * this is the gyro scale translated from dynamic range plus/minus 31 * {250, 500, 1000, 2000} to rad/s 32 */ 33 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724}; 34 35 /* 36 * this is the accel scale translated from dynamic range plus/minus 37 * {2, 4, 8, 16} to m/s^2 38 */ 39 static const int accel_scale[] = {598, 1196, 2392, 4785}; 40 41 static const struct inv_mpu6050_reg_map reg_set_6500 = { 42 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 43 .lpf = INV_MPU6050_REG_CONFIG, 44 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 45 .fifo_en = INV_MPU6050_REG_FIFO_EN, 46 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 47 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 48 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 49 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 50 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 51 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 52 .temperature = INV_MPU6050_REG_TEMPERATURE, 53 .int_enable = INV_MPU6050_REG_INT_ENABLE, 54 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 55 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 56 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 57 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 58 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 59 }; 60 61 static const struct inv_mpu6050_reg_map reg_set_6050 = { 62 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 63 .lpf = INV_MPU6050_REG_CONFIG, 64 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 65 .fifo_en = INV_MPU6050_REG_FIFO_EN, 66 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 67 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 68 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 69 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 70 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 71 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 72 .temperature = INV_MPU6050_REG_TEMPERATURE, 73 .int_enable = INV_MPU6050_REG_INT_ENABLE, 74 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 75 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 76 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 77 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET, 78 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 79 }; 80 81 static const struct inv_mpu6050_chip_config chip_config_6050 = { 82 .fsr = INV_MPU6050_FSR_2000DPS, 83 .lpf = INV_MPU6050_FILTER_20HZ, 84 .fifo_rate = INV_MPU6050_INIT_FIFO_RATE, 85 .gyro_fifo_enable = false, 86 .accl_fifo_enable = false, 87 .accl_fs = INV_MPU6050_FS_02G, 88 }; 89 90 /* Indexed by enum inv_devices */ 91 static const struct inv_mpu6050_hw hw_info[] = { 92 { 93 .whoami = INV_MPU6050_WHOAMI_VALUE, 94 .name = "MPU6050", 95 .reg = ®_set_6050, 96 .config = &chip_config_6050, 97 }, 98 { 99 .whoami = INV_MPU6500_WHOAMI_VALUE, 100 .name = "MPU6500", 101 .reg = ®_set_6500, 102 .config = &chip_config_6050, 103 }, 104 { 105 .whoami = INV_MPU6000_WHOAMI_VALUE, 106 .name = "MPU6000", 107 .reg = ®_set_6050, 108 .config = &chip_config_6050, 109 }, 110 { 111 .whoami = INV_MPU9150_WHOAMI_VALUE, 112 .name = "MPU9150", 113 .reg = ®_set_6050, 114 .config = &chip_config_6050, 115 }, 116 }; 117 118 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask) 119 { 120 unsigned int d, mgmt_1; 121 int result; 122 /* 123 * switch clock needs to be careful. Only when gyro is on, can 124 * clock source be switched to gyro. Otherwise, it must be set to 125 * internal clock 126 */ 127 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) { 128 result = regmap_read(st->map, st->reg->pwr_mgmt_1, &mgmt_1); 129 if (result) 130 return result; 131 132 mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK; 133 } 134 135 if ((mask == INV_MPU6050_BIT_PWR_GYRO_STBY) && (!en)) { 136 /* 137 * turning off gyro requires switch to internal clock first. 138 * Then turn off gyro engine 139 */ 140 mgmt_1 |= INV_CLK_INTERNAL; 141 result = regmap_write(st->map, st->reg->pwr_mgmt_1, mgmt_1); 142 if (result) 143 return result; 144 } 145 146 result = regmap_read(st->map, st->reg->pwr_mgmt_2, &d); 147 if (result) 148 return result; 149 if (en) 150 d &= ~mask; 151 else 152 d |= mask; 153 result = regmap_write(st->map, st->reg->pwr_mgmt_2, d); 154 if (result) 155 return result; 156 157 if (en) { 158 /* Wait for output stabilize */ 159 msleep(INV_MPU6050_TEMP_UP_TIME); 160 if (mask == INV_MPU6050_BIT_PWR_GYRO_STBY) { 161 /* switch internal clock to PLL */ 162 mgmt_1 |= INV_CLK_PLL; 163 result = regmap_write(st->map, 164 st->reg->pwr_mgmt_1, mgmt_1); 165 if (result) 166 return result; 167 } 168 } 169 170 return 0; 171 } 172 173 int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on) 174 { 175 int result = 0; 176 177 if (power_on) { 178 /* Already under indio-dev->mlock mutex */ 179 if (!st->powerup_count) 180 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 0); 181 if (!result) 182 st->powerup_count++; 183 } else { 184 st->powerup_count--; 185 if (!st->powerup_count) 186 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 187 INV_MPU6050_BIT_SLEEP); 188 } 189 190 if (result) 191 return result; 192 193 if (power_on) 194 usleep_range(INV_MPU6050_REG_UP_TIME_MIN, 195 INV_MPU6050_REG_UP_TIME_MAX); 196 197 return 0; 198 } 199 EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg); 200 201 /** 202 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO. 203 * 204 * Initial configuration: 205 * FSR: ± 2000DPS 206 * DLPF: 20Hz 207 * FIFO rate: 50Hz 208 * Clock source: Gyro PLL 209 */ 210 static int inv_mpu6050_init_config(struct iio_dev *indio_dev) 211 { 212 int result; 213 u8 d; 214 struct inv_mpu6050_state *st = iio_priv(indio_dev); 215 216 result = inv_mpu6050_set_power_itg(st, true); 217 if (result) 218 return result; 219 d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT); 220 result = regmap_write(st->map, st->reg->gyro_config, d); 221 if (result) 222 return result; 223 224 d = INV_MPU6050_FILTER_20HZ; 225 result = regmap_write(st->map, st->reg->lpf, d); 226 if (result) 227 return result; 228 229 d = INV_MPU6050_ONE_K_HZ / INV_MPU6050_INIT_FIFO_RATE - 1; 230 result = regmap_write(st->map, st->reg->sample_rate_div, d); 231 if (result) 232 return result; 233 234 d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 235 result = regmap_write(st->map, st->reg->accl_config, d); 236 if (result) 237 return result; 238 239 memcpy(&st->chip_config, hw_info[st->chip_type].config, 240 sizeof(struct inv_mpu6050_chip_config)); 241 result = inv_mpu6050_set_power_itg(st, false); 242 243 return result; 244 } 245 246 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg, 247 int axis, int val) 248 { 249 int ind, result; 250 __be16 d = cpu_to_be16(val); 251 252 ind = (axis - IIO_MOD_X) * 2; 253 result = regmap_bulk_write(st->map, reg + ind, (u8 *)&d, 2); 254 if (result) 255 return -EINVAL; 256 257 return 0; 258 } 259 260 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg, 261 int axis, int *val) 262 { 263 int ind, result; 264 __be16 d; 265 266 ind = (axis - IIO_MOD_X) * 2; 267 result = regmap_bulk_read(st->map, reg + ind, (u8 *)&d, 2); 268 if (result) 269 return -EINVAL; 270 *val = (short)be16_to_cpup(&d); 271 272 return IIO_VAL_INT; 273 } 274 275 static int 276 inv_mpu6050_read_raw(struct iio_dev *indio_dev, 277 struct iio_chan_spec const *chan, 278 int *val, int *val2, long mask) 279 { 280 struct inv_mpu6050_state *st = iio_priv(indio_dev); 281 int ret = 0; 282 283 switch (mask) { 284 case IIO_CHAN_INFO_RAW: 285 { 286 int result; 287 288 ret = IIO_VAL_INT; 289 result = 0; 290 mutex_lock(&indio_dev->mlock); 291 if (!st->chip_config.enable) { 292 result = inv_mpu6050_set_power_itg(st, true); 293 if (result) 294 goto error_read_raw; 295 } 296 /* when enable is on, power is already on */ 297 switch (chan->type) { 298 case IIO_ANGL_VEL: 299 if (!st->chip_config.gyro_fifo_enable || 300 !st->chip_config.enable) { 301 result = inv_mpu6050_switch_engine(st, true, 302 INV_MPU6050_BIT_PWR_GYRO_STBY); 303 if (result) 304 goto error_read_raw; 305 } 306 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro, 307 chan->channel2, val); 308 if (!st->chip_config.gyro_fifo_enable || 309 !st->chip_config.enable) { 310 result = inv_mpu6050_switch_engine(st, false, 311 INV_MPU6050_BIT_PWR_GYRO_STBY); 312 if (result) 313 goto error_read_raw; 314 } 315 break; 316 case IIO_ACCEL: 317 if (!st->chip_config.accl_fifo_enable || 318 !st->chip_config.enable) { 319 result = inv_mpu6050_switch_engine(st, true, 320 INV_MPU6050_BIT_PWR_ACCL_STBY); 321 if (result) 322 goto error_read_raw; 323 } 324 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl, 325 chan->channel2, val); 326 if (!st->chip_config.accl_fifo_enable || 327 !st->chip_config.enable) { 328 result = inv_mpu6050_switch_engine(st, false, 329 INV_MPU6050_BIT_PWR_ACCL_STBY); 330 if (result) 331 goto error_read_raw; 332 } 333 break; 334 case IIO_TEMP: 335 /* wait for stablization */ 336 msleep(INV_MPU6050_SENSOR_UP_TIME); 337 ret = inv_mpu6050_sensor_show(st, st->reg->temperature, 338 IIO_MOD_X, val); 339 break; 340 default: 341 ret = -EINVAL; 342 break; 343 } 344 error_read_raw: 345 if (!st->chip_config.enable) 346 result |= inv_mpu6050_set_power_itg(st, false); 347 mutex_unlock(&indio_dev->mlock); 348 if (result) 349 return result; 350 351 return ret; 352 } 353 case IIO_CHAN_INFO_SCALE: 354 switch (chan->type) { 355 case IIO_ANGL_VEL: 356 *val = 0; 357 *val2 = gyro_scale_6050[st->chip_config.fsr]; 358 359 return IIO_VAL_INT_PLUS_NANO; 360 case IIO_ACCEL: 361 *val = 0; 362 *val2 = accel_scale[st->chip_config.accl_fs]; 363 364 return IIO_VAL_INT_PLUS_MICRO; 365 case IIO_TEMP: 366 *val = 0; 367 *val2 = INV_MPU6050_TEMP_SCALE; 368 369 return IIO_VAL_INT_PLUS_MICRO; 370 default: 371 return -EINVAL; 372 } 373 case IIO_CHAN_INFO_OFFSET: 374 switch (chan->type) { 375 case IIO_TEMP: 376 *val = INV_MPU6050_TEMP_OFFSET; 377 378 return IIO_VAL_INT; 379 default: 380 return -EINVAL; 381 } 382 case IIO_CHAN_INFO_CALIBBIAS: 383 switch (chan->type) { 384 case IIO_ANGL_VEL: 385 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset, 386 chan->channel2, val); 387 return IIO_VAL_INT; 388 case IIO_ACCEL: 389 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset, 390 chan->channel2, val); 391 return IIO_VAL_INT; 392 393 default: 394 return -EINVAL; 395 } 396 default: 397 return -EINVAL; 398 } 399 } 400 401 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val) 402 { 403 int result, i; 404 u8 d; 405 406 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) { 407 if (gyro_scale_6050[i] == val) { 408 d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT); 409 result = regmap_write(st->map, st->reg->gyro_config, d); 410 if (result) 411 return result; 412 413 st->chip_config.fsr = i; 414 return 0; 415 } 416 } 417 418 return -EINVAL; 419 } 420 421 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev, 422 struct iio_chan_spec const *chan, long mask) 423 { 424 switch (mask) { 425 case IIO_CHAN_INFO_SCALE: 426 switch (chan->type) { 427 case IIO_ANGL_VEL: 428 return IIO_VAL_INT_PLUS_NANO; 429 default: 430 return IIO_VAL_INT_PLUS_MICRO; 431 } 432 default: 433 return IIO_VAL_INT_PLUS_MICRO; 434 } 435 436 return -EINVAL; 437 } 438 439 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val) 440 { 441 int result, i; 442 u8 d; 443 444 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) { 445 if (accel_scale[i] == val) { 446 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 447 result = regmap_write(st->map, st->reg->accl_config, d); 448 if (result) 449 return result; 450 451 st->chip_config.accl_fs = i; 452 return 0; 453 } 454 } 455 456 return -EINVAL; 457 } 458 459 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, 460 struct iio_chan_spec const *chan, 461 int val, int val2, long mask) 462 { 463 struct inv_mpu6050_state *st = iio_priv(indio_dev); 464 int result; 465 466 mutex_lock(&indio_dev->mlock); 467 /* 468 * we should only update scale when the chip is disabled, i.e. 469 * not running 470 */ 471 if (st->chip_config.enable) { 472 result = -EBUSY; 473 goto error_write_raw; 474 } 475 result = inv_mpu6050_set_power_itg(st, true); 476 if (result) 477 goto error_write_raw; 478 479 switch (mask) { 480 case IIO_CHAN_INFO_SCALE: 481 switch (chan->type) { 482 case IIO_ANGL_VEL: 483 result = inv_mpu6050_write_gyro_scale(st, val2); 484 break; 485 case IIO_ACCEL: 486 result = inv_mpu6050_write_accel_scale(st, val2); 487 break; 488 default: 489 result = -EINVAL; 490 break; 491 } 492 break; 493 case IIO_CHAN_INFO_CALIBBIAS: 494 switch (chan->type) { 495 case IIO_ANGL_VEL: 496 result = inv_mpu6050_sensor_set(st, 497 st->reg->gyro_offset, 498 chan->channel2, val); 499 break; 500 case IIO_ACCEL: 501 result = inv_mpu6050_sensor_set(st, 502 st->reg->accl_offset, 503 chan->channel2, val); 504 break; 505 default: 506 result = -EINVAL; 507 } 508 default: 509 result = -EINVAL; 510 break; 511 } 512 513 error_write_raw: 514 result |= inv_mpu6050_set_power_itg(st, false); 515 mutex_unlock(&indio_dev->mlock); 516 517 return result; 518 } 519 520 /** 521 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate. 522 * 523 * Based on the Nyquist principle, the sampling rate must 524 * exceed twice of the bandwidth of the signal, or there 525 * would be alising. This function basically search for the 526 * correct low pass parameters based on the fifo rate, e.g, 527 * sampling frequency. 528 */ 529 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate) 530 { 531 const int hz[] = {188, 98, 42, 20, 10, 5}; 532 const int d[] = {INV_MPU6050_FILTER_188HZ, INV_MPU6050_FILTER_98HZ, 533 INV_MPU6050_FILTER_42HZ, INV_MPU6050_FILTER_20HZ, 534 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ}; 535 int i, h, result; 536 u8 data; 537 538 h = (rate >> 1); 539 i = 0; 540 while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1)) 541 i++; 542 data = d[i]; 543 result = regmap_write(st->map, st->reg->lpf, data); 544 if (result) 545 return result; 546 st->chip_config.lpf = data; 547 548 return 0; 549 } 550 551 /** 552 * inv_mpu6050_fifo_rate_store() - Set fifo rate. 553 */ 554 static ssize_t 555 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr, 556 const char *buf, size_t count) 557 { 558 s32 fifo_rate; 559 u8 d; 560 int result; 561 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 562 struct inv_mpu6050_state *st = iio_priv(indio_dev); 563 564 if (kstrtoint(buf, 10, &fifo_rate)) 565 return -EINVAL; 566 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE || 567 fifo_rate > INV_MPU6050_MAX_FIFO_RATE) 568 return -EINVAL; 569 if (fifo_rate == st->chip_config.fifo_rate) 570 return count; 571 572 mutex_lock(&indio_dev->mlock); 573 if (st->chip_config.enable) { 574 result = -EBUSY; 575 goto fifo_rate_fail; 576 } 577 result = inv_mpu6050_set_power_itg(st, true); 578 if (result) 579 goto fifo_rate_fail; 580 581 d = INV_MPU6050_ONE_K_HZ / fifo_rate - 1; 582 result = regmap_write(st->map, st->reg->sample_rate_div, d); 583 if (result) 584 goto fifo_rate_fail; 585 st->chip_config.fifo_rate = fifo_rate; 586 587 result = inv_mpu6050_set_lpf(st, fifo_rate); 588 if (result) 589 goto fifo_rate_fail; 590 591 fifo_rate_fail: 592 result |= inv_mpu6050_set_power_itg(st, false); 593 mutex_unlock(&indio_dev->mlock); 594 if (result) 595 return result; 596 597 return count; 598 } 599 600 /** 601 * inv_fifo_rate_show() - Get the current sampling rate. 602 */ 603 static ssize_t 604 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr, 605 char *buf) 606 { 607 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 608 609 return sprintf(buf, "%d\n", st->chip_config.fifo_rate); 610 } 611 612 /** 613 * inv_attr_show() - calling this function will show current 614 * parameters. 615 * 616 * Deprecated in favor of IIO mounting matrix API. 617 * 618 * See inv_get_mount_matrix() 619 */ 620 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr, 621 char *buf) 622 { 623 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 624 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 625 s8 *m; 626 627 switch (this_attr->address) { 628 /* 629 * In MPU6050, the two matrix are the same because gyro and accel 630 * are integrated in one chip 631 */ 632 case ATTR_GYRO_MATRIX: 633 case ATTR_ACCL_MATRIX: 634 m = st->plat_data.orientation; 635 636 return sprintf(buf, "%d, %d, %d; %d, %d, %d; %d, %d, %d\n", 637 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]); 638 default: 639 return -EINVAL; 640 } 641 } 642 643 /** 644 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense 645 * MPU6050 device. 646 * @indio_dev: The IIO device 647 * @trig: The new trigger 648 * 649 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050 650 * device, -EINVAL otherwise. 651 */ 652 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev, 653 struct iio_trigger *trig) 654 { 655 struct inv_mpu6050_state *st = iio_priv(indio_dev); 656 657 if (st->trig != trig) 658 return -EINVAL; 659 660 return 0; 661 } 662 663 static const struct iio_mount_matrix * 664 inv_get_mount_matrix(const struct iio_dev *indio_dev, 665 const struct iio_chan_spec *chan) 666 { 667 return &((struct inv_mpu6050_state *)iio_priv(indio_dev))->orientation; 668 } 669 670 static const struct iio_chan_spec_ext_info inv_ext_info[] = { 671 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix), 672 { }, 673 }; 674 675 #define INV_MPU6050_CHAN(_type, _channel2, _index) \ 676 { \ 677 .type = _type, \ 678 .modified = 1, \ 679 .channel2 = _channel2, \ 680 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 681 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 682 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 683 .scan_index = _index, \ 684 .scan_type = { \ 685 .sign = 's', \ 686 .realbits = 16, \ 687 .storagebits = 16, \ 688 .shift = 0, \ 689 .endianness = IIO_BE, \ 690 }, \ 691 .ext_info = inv_ext_info, \ 692 } 693 694 static const struct iio_chan_spec inv_mpu_channels[] = { 695 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP), 696 /* 697 * Note that temperature should only be via polled reading only, 698 * not the final scan elements output. 699 */ 700 { 701 .type = IIO_TEMP, 702 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) 703 | BIT(IIO_CHAN_INFO_OFFSET) 704 | BIT(IIO_CHAN_INFO_SCALE), 705 .scan_index = -1, 706 }, 707 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 708 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 709 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 710 711 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 712 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 713 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 714 }; 715 716 /* constant IIO attribute */ 717 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500"); 718 static IIO_CONST_ATTR(in_anglvel_scale_available, 719 "0.000133090 0.000266181 0.000532362 0.001064724"); 720 static IIO_CONST_ATTR(in_accel_scale_available, 721 "0.000598 0.001196 0.002392 0.004785"); 722 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show, 723 inv_mpu6050_fifo_rate_store); 724 725 /* Deprecated: kept for userspace backward compatibility. */ 726 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL, 727 ATTR_GYRO_MATRIX); 728 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL, 729 ATTR_ACCL_MATRIX); 730 731 static struct attribute *inv_attributes[] = { 732 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */ 733 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */ 734 &iio_dev_attr_sampling_frequency.dev_attr.attr, 735 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 736 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 737 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr, 738 NULL, 739 }; 740 741 static const struct attribute_group inv_attribute_group = { 742 .attrs = inv_attributes 743 }; 744 745 static const struct iio_info mpu_info = { 746 .driver_module = THIS_MODULE, 747 .read_raw = &inv_mpu6050_read_raw, 748 .write_raw = &inv_mpu6050_write_raw, 749 .write_raw_get_fmt = &inv_write_raw_get_fmt, 750 .attrs = &inv_attribute_group, 751 .validate_trigger = inv_mpu6050_validate_trigger, 752 }; 753 754 /** 755 * inv_check_and_setup_chip() - check and setup chip. 756 */ 757 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st) 758 { 759 int result; 760 unsigned int regval; 761 762 st->hw = &hw_info[st->chip_type]; 763 st->reg = hw_info[st->chip_type].reg; 764 765 /* reset to make sure previous state are not there */ 766 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 767 INV_MPU6050_BIT_H_RESET); 768 if (result) 769 return result; 770 msleep(INV_MPU6050_POWER_UP_TIME); 771 772 /* check chip self-identification */ 773 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val); 774 if (result) 775 return result; 776 if (regval != st->hw->whoami) { 777 dev_warn(regmap_get_device(st->map), 778 "whoami mismatch got %#02x expected %#02hhx for %s\n", 779 regval, st->hw->whoami, st->hw->name); 780 } 781 782 /* 783 * toggle power state. After reset, the sleep bit could be on 784 * or off depending on the OTP settings. Toggling power would 785 * make it in a definite state as well as making the hardware 786 * state align with the software state 787 */ 788 result = inv_mpu6050_set_power_itg(st, false); 789 if (result) 790 return result; 791 result = inv_mpu6050_set_power_itg(st, true); 792 if (result) 793 return result; 794 795 result = inv_mpu6050_switch_engine(st, false, 796 INV_MPU6050_BIT_PWR_ACCL_STBY); 797 if (result) 798 return result; 799 result = inv_mpu6050_switch_engine(st, false, 800 INV_MPU6050_BIT_PWR_GYRO_STBY); 801 if (result) 802 return result; 803 804 return 0; 805 } 806 807 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, 808 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type) 809 { 810 struct inv_mpu6050_state *st; 811 struct iio_dev *indio_dev; 812 struct inv_mpu6050_platform_data *pdata; 813 struct device *dev = regmap_get_device(regmap); 814 int result; 815 816 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 817 if (!indio_dev) 818 return -ENOMEM; 819 820 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS); 821 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) { 822 dev_err(dev, "Bad invensense chip_type=%d name=%s\n", 823 chip_type, name); 824 return -ENODEV; 825 } 826 st = iio_priv(indio_dev); 827 st->chip_type = chip_type; 828 st->powerup_count = 0; 829 st->irq = irq; 830 st->map = regmap; 831 832 pdata = dev_get_platdata(dev); 833 if (!pdata) { 834 result = of_iio_read_mount_matrix(dev, "mount-matrix", 835 &st->orientation); 836 if (result) { 837 dev_err(dev, "Failed to retrieve mounting matrix %d\n", 838 result); 839 return result; 840 } 841 } else { 842 st->plat_data = *pdata; 843 } 844 845 /* power is turned on inside check chip type*/ 846 result = inv_check_and_setup_chip(st); 847 if (result) 848 return result; 849 850 if (inv_mpu_bus_setup) 851 inv_mpu_bus_setup(indio_dev); 852 853 result = inv_mpu6050_init_config(indio_dev); 854 if (result) { 855 dev_err(dev, "Could not initialize device.\n"); 856 return result; 857 } 858 859 dev_set_drvdata(dev, indio_dev); 860 indio_dev->dev.parent = dev; 861 /* name will be NULL when enumerated via ACPI */ 862 if (name) 863 indio_dev->name = name; 864 else 865 indio_dev->name = dev_name(dev); 866 indio_dev->channels = inv_mpu_channels; 867 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 868 869 indio_dev->info = &mpu_info; 870 indio_dev->modes = INDIO_BUFFER_TRIGGERED; 871 872 result = iio_triggered_buffer_setup(indio_dev, 873 inv_mpu6050_irq_handler, 874 inv_mpu6050_read_fifo, 875 NULL); 876 if (result) { 877 dev_err(dev, "configure buffer fail %d\n", result); 878 return result; 879 } 880 result = inv_mpu6050_probe_trigger(indio_dev); 881 if (result) { 882 dev_err(dev, "trigger probe fail %d\n", result); 883 goto out_unreg_ring; 884 } 885 886 INIT_KFIFO(st->timestamps); 887 spin_lock_init(&st->time_stamp_lock); 888 result = iio_device_register(indio_dev); 889 if (result) { 890 dev_err(dev, "IIO register fail %d\n", result); 891 goto out_remove_trigger; 892 } 893 894 return 0; 895 896 out_remove_trigger: 897 inv_mpu6050_remove_trigger(st); 898 out_unreg_ring: 899 iio_triggered_buffer_cleanup(indio_dev); 900 return result; 901 } 902 EXPORT_SYMBOL_GPL(inv_mpu_core_probe); 903 904 int inv_mpu_core_remove(struct device *dev) 905 { 906 struct iio_dev *indio_dev = dev_get_drvdata(dev); 907 908 iio_device_unregister(indio_dev); 909 inv_mpu6050_remove_trigger(iio_priv(indio_dev)); 910 iio_triggered_buffer_cleanup(indio_dev); 911 912 return 0; 913 } 914 EXPORT_SYMBOL_GPL(inv_mpu_core_remove); 915 916 #ifdef CONFIG_PM_SLEEP 917 918 static int inv_mpu_resume(struct device *dev) 919 { 920 return inv_mpu6050_set_power_itg(iio_priv(dev_get_drvdata(dev)), true); 921 } 922 923 static int inv_mpu_suspend(struct device *dev) 924 { 925 return inv_mpu6050_set_power_itg(iio_priv(dev_get_drvdata(dev)), false); 926 } 927 #endif /* CONFIG_PM_SLEEP */ 928 929 SIMPLE_DEV_PM_OPS(inv_mpu_pmops, inv_mpu_suspend, inv_mpu_resume); 930 EXPORT_SYMBOL_GPL(inv_mpu_pmops); 931 932 MODULE_AUTHOR("Invensense Corporation"); 933 MODULE_DESCRIPTION("Invensense device MPU6050 driver"); 934 MODULE_LICENSE("GPL"); 935