1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2012 Invensense, Inc. 4 */ 5 6 #include <linux/module.h> 7 #include <linux/slab.h> 8 #include <linux/i2c.h> 9 #include <linux/err.h> 10 #include <linux/delay.h> 11 #include <linux/sysfs.h> 12 #include <linux/jiffies.h> 13 #include <linux/irq.h> 14 #include <linux/interrupt.h> 15 #include <linux/iio/iio.h> 16 #include <linux/acpi.h> 17 #include <linux/platform_device.h> 18 #include <linux/regulator/consumer.h> 19 #include <linux/pm.h> 20 #include <linux/pm_runtime.h> 21 #include "inv_mpu_iio.h" 22 #include "inv_mpu_magn.h" 23 24 /* 25 * this is the gyro scale translated from dynamic range plus/minus 26 * {250, 500, 1000, 2000} to rad/s 27 */ 28 static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724}; 29 30 /* 31 * this is the accel scale translated from dynamic range plus/minus 32 * {2, 4, 8, 16} to m/s^2 33 */ 34 static const int accel_scale[] = {598, 1196, 2392, 4785}; 35 36 static const struct inv_mpu6050_reg_map reg_set_icm20602 = { 37 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 38 .lpf = INV_MPU6050_REG_CONFIG, 39 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2, 40 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 41 .fifo_en = INV_MPU6050_REG_FIFO_EN, 42 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 43 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 44 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 45 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 46 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 47 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 48 .temperature = INV_MPU6050_REG_TEMPERATURE, 49 .int_enable = INV_MPU6050_REG_INT_ENABLE, 50 .int_status = INV_MPU6050_REG_INT_STATUS, 51 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 52 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 53 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 54 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 55 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 56 .i2c_if = INV_ICM20602_REG_I2C_IF, 57 }; 58 59 static const struct inv_mpu6050_reg_map reg_set_6500 = { 60 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 61 .lpf = INV_MPU6050_REG_CONFIG, 62 .accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2, 63 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 64 .fifo_en = INV_MPU6050_REG_FIFO_EN, 65 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 66 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 67 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 68 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 69 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 70 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 71 .temperature = INV_MPU6050_REG_TEMPERATURE, 72 .int_enable = INV_MPU6050_REG_INT_ENABLE, 73 .int_status = INV_MPU6050_REG_INT_STATUS, 74 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 75 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 76 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 77 .accl_offset = INV_MPU6500_REG_ACCEL_OFFSET, 78 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 79 .i2c_if = 0, 80 }; 81 82 static const struct inv_mpu6050_reg_map reg_set_6050 = { 83 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV, 84 .lpf = INV_MPU6050_REG_CONFIG, 85 .user_ctrl = INV_MPU6050_REG_USER_CTRL, 86 .fifo_en = INV_MPU6050_REG_FIFO_EN, 87 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG, 88 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG, 89 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H, 90 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W, 91 .raw_gyro = INV_MPU6050_REG_RAW_GYRO, 92 .raw_accl = INV_MPU6050_REG_RAW_ACCEL, 93 .temperature = INV_MPU6050_REG_TEMPERATURE, 94 .int_enable = INV_MPU6050_REG_INT_ENABLE, 95 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1, 96 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2, 97 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG, 98 .accl_offset = INV_MPU6050_REG_ACCEL_OFFSET, 99 .gyro_offset = INV_MPU6050_REG_GYRO_OFFSET, 100 .i2c_if = 0, 101 }; 102 103 static const struct inv_mpu6050_chip_config chip_config_6050 = { 104 .clk = INV_CLK_INTERNAL, 105 .fsr = INV_MPU6050_FSR_2000DPS, 106 .lpf = INV_MPU6050_FILTER_20HZ, 107 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50), 108 .gyro_en = true, 109 .accl_en = true, 110 .temp_en = true, 111 .magn_en = false, 112 .gyro_fifo_enable = false, 113 .accl_fifo_enable = false, 114 .temp_fifo_enable = false, 115 .magn_fifo_enable = false, 116 .accl_fs = INV_MPU6050_FS_02G, 117 .user_ctrl = 0, 118 }; 119 120 static const struct inv_mpu6050_chip_config chip_config_6500 = { 121 .clk = INV_CLK_PLL, 122 .fsr = INV_MPU6050_FSR_2000DPS, 123 .lpf = INV_MPU6050_FILTER_20HZ, 124 .divider = INV_MPU6050_FIFO_RATE_TO_DIVIDER(50), 125 .gyro_en = true, 126 .accl_en = true, 127 .temp_en = true, 128 .magn_en = false, 129 .gyro_fifo_enable = false, 130 .accl_fifo_enable = false, 131 .temp_fifo_enable = false, 132 .magn_fifo_enable = false, 133 .accl_fs = INV_MPU6050_FS_02G, 134 .user_ctrl = 0, 135 }; 136 137 /* Indexed by enum inv_devices */ 138 static const struct inv_mpu6050_hw hw_info[] = { 139 { 140 .whoami = INV_MPU6050_WHOAMI_VALUE, 141 .name = "MPU6050", 142 .reg = ®_set_6050, 143 .config = &chip_config_6050, 144 .fifo_size = 1024, 145 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 146 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME}, 147 }, 148 { 149 .whoami = INV_MPU6500_WHOAMI_VALUE, 150 .name = "MPU6500", 151 .reg = ®_set_6500, 152 .config = &chip_config_6500, 153 .fifo_size = 512, 154 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 155 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 156 }, 157 { 158 .whoami = INV_MPU6515_WHOAMI_VALUE, 159 .name = "MPU6515", 160 .reg = ®_set_6500, 161 .config = &chip_config_6500, 162 .fifo_size = 512, 163 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 164 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 165 }, 166 { 167 .whoami = INV_MPU6880_WHOAMI_VALUE, 168 .name = "MPU6880", 169 .reg = ®_set_6500, 170 .config = &chip_config_6500, 171 .fifo_size = 4096, 172 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 173 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 174 }, 175 { 176 .whoami = INV_MPU6000_WHOAMI_VALUE, 177 .name = "MPU6000", 178 .reg = ®_set_6050, 179 .config = &chip_config_6050, 180 .fifo_size = 1024, 181 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 182 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME}, 183 }, 184 { 185 .whoami = INV_MPU9150_WHOAMI_VALUE, 186 .name = "MPU9150", 187 .reg = ®_set_6050, 188 .config = &chip_config_6050, 189 .fifo_size = 1024, 190 .temp = {INV_MPU6050_TEMP_OFFSET, INV_MPU6050_TEMP_SCALE}, 191 .startup_time = {INV_MPU6050_GYRO_STARTUP_TIME, INV_MPU6050_ACCEL_STARTUP_TIME}, 192 }, 193 { 194 .whoami = INV_MPU9250_WHOAMI_VALUE, 195 .name = "MPU9250", 196 .reg = ®_set_6500, 197 .config = &chip_config_6500, 198 .fifo_size = 512, 199 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 200 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 201 }, 202 { 203 .whoami = INV_MPU9255_WHOAMI_VALUE, 204 .name = "MPU9255", 205 .reg = ®_set_6500, 206 .config = &chip_config_6500, 207 .fifo_size = 512, 208 .temp = {INV_MPU6500_TEMP_OFFSET, INV_MPU6500_TEMP_SCALE}, 209 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 210 }, 211 { 212 .whoami = INV_ICM20608_WHOAMI_VALUE, 213 .name = "ICM20608", 214 .reg = ®_set_6500, 215 .config = &chip_config_6500, 216 .fifo_size = 512, 217 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 218 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 219 }, 220 { 221 .whoami = INV_ICM20608D_WHOAMI_VALUE, 222 .name = "ICM20608D", 223 .reg = ®_set_6500, 224 .config = &chip_config_6500, 225 .fifo_size = 512, 226 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 227 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 228 }, 229 { 230 .whoami = INV_ICM20609_WHOAMI_VALUE, 231 .name = "ICM20609", 232 .reg = ®_set_6500, 233 .config = &chip_config_6500, 234 .fifo_size = 4 * 1024, 235 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 236 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 237 }, 238 { 239 .whoami = INV_ICM20689_WHOAMI_VALUE, 240 .name = "ICM20689", 241 .reg = ®_set_6500, 242 .config = &chip_config_6500, 243 .fifo_size = 4 * 1024, 244 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 245 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 246 }, 247 { 248 .whoami = INV_ICM20600_WHOAMI_VALUE, 249 .name = "ICM20600", 250 .reg = ®_set_icm20602, 251 .config = &chip_config_6500, 252 .fifo_size = 1008, 253 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 254 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME}, 255 }, 256 { 257 .whoami = INV_ICM20602_WHOAMI_VALUE, 258 .name = "ICM20602", 259 .reg = ®_set_icm20602, 260 .config = &chip_config_6500, 261 .fifo_size = 1008, 262 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 263 .startup_time = {INV_ICM20602_GYRO_STARTUP_TIME, INV_ICM20602_ACCEL_STARTUP_TIME}, 264 }, 265 { 266 .whoami = INV_ICM20690_WHOAMI_VALUE, 267 .name = "ICM20690", 268 .reg = ®_set_6500, 269 .config = &chip_config_6500, 270 .fifo_size = 1024, 271 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 272 .startup_time = {INV_ICM20690_GYRO_STARTUP_TIME, INV_ICM20690_ACCEL_STARTUP_TIME}, 273 }, 274 { 275 .whoami = INV_IAM20680_WHOAMI_VALUE, 276 .name = "IAM20680", 277 .reg = ®_set_6500, 278 .config = &chip_config_6500, 279 .fifo_size = 512, 280 .temp = {INV_ICM20608_TEMP_OFFSET, INV_ICM20608_TEMP_SCALE}, 281 .startup_time = {INV_MPU6500_GYRO_STARTUP_TIME, INV_MPU6500_ACCEL_STARTUP_TIME}, 282 }, 283 }; 284 285 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep, 286 int clock, int temp_dis) 287 { 288 u8 val; 289 290 if (clock < 0) 291 clock = st->chip_config.clk; 292 if (temp_dis < 0) 293 temp_dis = !st->chip_config.temp_en; 294 295 val = clock & INV_MPU6050_BIT_CLK_MASK; 296 if (temp_dis) 297 val |= INV_MPU6050_BIT_TEMP_DIS; 298 if (sleep) 299 val |= INV_MPU6050_BIT_SLEEP; 300 301 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val); 302 return regmap_write(st->map, st->reg->pwr_mgmt_1, val); 303 } 304 305 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st, 306 unsigned int clock) 307 { 308 int ret; 309 310 switch (st->chip_type) { 311 case INV_MPU6050: 312 case INV_MPU6000: 313 case INV_MPU9150: 314 /* old chips: switch clock manually */ 315 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, clock, -1); 316 if (ret) 317 return ret; 318 st->chip_config.clk = clock; 319 break; 320 default: 321 /* automatic clock switching, nothing to do */ 322 break; 323 } 324 325 return 0; 326 } 327 328 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, 329 unsigned int mask) 330 { 331 unsigned int sleep; 332 u8 pwr_mgmt2, user_ctrl; 333 int ret; 334 335 /* delete useless requests */ 336 if (mask & INV_MPU6050_SENSOR_ACCL && en == st->chip_config.accl_en) 337 mask &= ~INV_MPU6050_SENSOR_ACCL; 338 if (mask & INV_MPU6050_SENSOR_GYRO && en == st->chip_config.gyro_en) 339 mask &= ~INV_MPU6050_SENSOR_GYRO; 340 if (mask & INV_MPU6050_SENSOR_TEMP && en == st->chip_config.temp_en) 341 mask &= ~INV_MPU6050_SENSOR_TEMP; 342 if (mask & INV_MPU6050_SENSOR_MAGN && en == st->chip_config.magn_en) 343 mask &= ~INV_MPU6050_SENSOR_MAGN; 344 if (mask == 0) 345 return 0; 346 347 /* turn on/off temperature sensor */ 348 if (mask & INV_MPU6050_SENSOR_TEMP) { 349 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, -1, !en); 350 if (ret) 351 return ret; 352 st->chip_config.temp_en = en; 353 } 354 355 /* update user_crtl for driving magnetometer */ 356 if (mask & INV_MPU6050_SENSOR_MAGN) { 357 user_ctrl = st->chip_config.user_ctrl; 358 if (en) 359 user_ctrl |= INV_MPU6050_BIT_I2C_MST_EN; 360 else 361 user_ctrl &= ~INV_MPU6050_BIT_I2C_MST_EN; 362 ret = regmap_write(st->map, st->reg->user_ctrl, user_ctrl); 363 if (ret) 364 return ret; 365 st->chip_config.user_ctrl = user_ctrl; 366 st->chip_config.magn_en = en; 367 } 368 369 /* manage accel & gyro engines */ 370 if (mask & (INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO)) { 371 /* compute power management 2 current value */ 372 pwr_mgmt2 = 0; 373 if (!st->chip_config.accl_en) 374 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY; 375 if (!st->chip_config.gyro_en) 376 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY; 377 378 /* update to new requested value */ 379 if (mask & INV_MPU6050_SENSOR_ACCL) { 380 if (en) 381 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_ACCL_STBY; 382 else 383 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_ACCL_STBY; 384 } 385 if (mask & INV_MPU6050_SENSOR_GYRO) { 386 if (en) 387 pwr_mgmt2 &= ~INV_MPU6050_BIT_PWR_GYRO_STBY; 388 else 389 pwr_mgmt2 |= INV_MPU6050_BIT_PWR_GYRO_STBY; 390 } 391 392 /* switch clock to internal when turning gyro off */ 393 if (mask & INV_MPU6050_SENSOR_GYRO && !en) { 394 ret = inv_mpu6050_clock_switch(st, INV_CLK_INTERNAL); 395 if (ret) 396 return ret; 397 } 398 399 /* update sensors engine */ 400 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_2: 0x%x\n", 401 pwr_mgmt2); 402 ret = regmap_write(st->map, st->reg->pwr_mgmt_2, pwr_mgmt2); 403 if (ret) 404 return ret; 405 if (mask & INV_MPU6050_SENSOR_ACCL) 406 st->chip_config.accl_en = en; 407 if (mask & INV_MPU6050_SENSOR_GYRO) 408 st->chip_config.gyro_en = en; 409 410 /* compute required time to have sensors stabilized */ 411 sleep = 0; 412 if (en) { 413 if (mask & INV_MPU6050_SENSOR_ACCL) { 414 if (sleep < st->hw->startup_time.accel) 415 sleep = st->hw->startup_time.accel; 416 } 417 if (mask & INV_MPU6050_SENSOR_GYRO) { 418 if (sleep < st->hw->startup_time.gyro) 419 sleep = st->hw->startup_time.gyro; 420 } 421 } else { 422 if (mask & INV_MPU6050_SENSOR_GYRO) { 423 if (sleep < INV_MPU6050_GYRO_DOWN_TIME) 424 sleep = INV_MPU6050_GYRO_DOWN_TIME; 425 } 426 } 427 if (sleep) 428 msleep(sleep); 429 430 /* switch clock to PLL when turning gyro on */ 431 if (mask & INV_MPU6050_SENSOR_GYRO && en) { 432 ret = inv_mpu6050_clock_switch(st, INV_CLK_PLL); 433 if (ret) 434 return ret; 435 } 436 } 437 438 return 0; 439 } 440 441 static int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, 442 bool power_on) 443 { 444 int result; 445 446 result = inv_mpu6050_pwr_mgmt_1_write(st, !power_on, -1, -1); 447 if (result) 448 return result; 449 450 if (power_on) 451 usleep_range(INV_MPU6050_REG_UP_TIME_MIN, 452 INV_MPU6050_REG_UP_TIME_MAX); 453 454 return 0; 455 } 456 457 static int inv_mpu6050_set_gyro_fsr(struct inv_mpu6050_state *st, 458 enum inv_mpu6050_fsr_e val) 459 { 460 unsigned int gyro_shift; 461 u8 data; 462 463 switch (st->chip_type) { 464 case INV_ICM20690: 465 gyro_shift = INV_ICM20690_GYRO_CONFIG_FSR_SHIFT; 466 break; 467 default: 468 gyro_shift = INV_MPU6050_GYRO_CONFIG_FSR_SHIFT; 469 break; 470 } 471 472 data = val << gyro_shift; 473 return regmap_write(st->map, st->reg->gyro_config, data); 474 } 475 476 /* 477 * inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent 478 * 479 * MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope 480 * MPU6500 and above have a dedicated register for accelerometer 481 */ 482 static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st, 483 enum inv_mpu6050_filter_e val) 484 { 485 int result; 486 487 result = regmap_write(st->map, st->reg->lpf, val); 488 if (result) 489 return result; 490 491 /* set accel lpf */ 492 switch (st->chip_type) { 493 case INV_MPU6050: 494 case INV_MPU6000: 495 case INV_MPU9150: 496 /* old chips, nothing to do */ 497 return 0; 498 case INV_ICM20689: 499 case INV_ICM20690: 500 /* set FIFO size to maximum value */ 501 val |= INV_ICM20689_BITS_FIFO_SIZE_MAX; 502 break; 503 default: 504 break; 505 } 506 507 return regmap_write(st->map, st->reg->accel_lpf, val); 508 } 509 510 /* 511 * inv_mpu6050_init_config() - Initialize hardware, disable FIFO. 512 * 513 * Initial configuration: 514 * FSR: ± 2000DPS 515 * DLPF: 20Hz 516 * FIFO rate: 50Hz 517 * Clock source: Gyro PLL 518 */ 519 static int inv_mpu6050_init_config(struct iio_dev *indio_dev) 520 { 521 int result; 522 u8 d; 523 struct inv_mpu6050_state *st = iio_priv(indio_dev); 524 525 result = inv_mpu6050_set_gyro_fsr(st, st->chip_config.fsr); 526 if (result) 527 return result; 528 529 result = inv_mpu6050_set_lpf_regs(st, st->chip_config.lpf); 530 if (result) 531 return result; 532 533 d = st->chip_config.divider; 534 result = regmap_write(st->map, st->reg->sample_rate_div, d); 535 if (result) 536 return result; 537 538 d = (st->chip_config.accl_fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 539 result = regmap_write(st->map, st->reg->accl_config, d); 540 if (result) 541 return result; 542 543 result = regmap_write(st->map, st->reg->int_pin_cfg, st->irq_mask); 544 if (result) 545 return result; 546 547 /* 548 * Internal chip period is 1ms (1kHz). 549 * Let's use at the beginning the theorical value before measuring 550 * with interrupt timestamps. 551 */ 552 st->chip_period = NSEC_PER_MSEC; 553 554 /* magn chip init, noop if not present in the chip */ 555 result = inv_mpu_magn_probe(st); 556 if (result) 557 return result; 558 559 return 0; 560 } 561 562 static int inv_mpu6050_sensor_set(struct inv_mpu6050_state *st, int reg, 563 int axis, int val) 564 { 565 int ind, result; 566 __be16 d = cpu_to_be16(val); 567 568 ind = (axis - IIO_MOD_X) * 2; 569 result = regmap_bulk_write(st->map, reg + ind, &d, sizeof(d)); 570 if (result) 571 return -EINVAL; 572 573 return 0; 574 } 575 576 static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg, 577 int axis, int *val) 578 { 579 int ind, result; 580 __be16 d; 581 582 ind = (axis - IIO_MOD_X) * 2; 583 result = regmap_bulk_read(st->map, reg + ind, &d, sizeof(d)); 584 if (result) 585 return -EINVAL; 586 *val = (short)be16_to_cpup(&d); 587 588 return IIO_VAL_INT; 589 } 590 591 static int inv_mpu6050_read_channel_data(struct iio_dev *indio_dev, 592 struct iio_chan_spec const *chan, 593 int *val) 594 { 595 struct inv_mpu6050_state *st = iio_priv(indio_dev); 596 struct device *pdev = regmap_get_device(st->map); 597 unsigned int freq_hz, period_us, min_sleep_us, max_sleep_us; 598 int result; 599 int ret; 600 601 /* compute sample period */ 602 freq_hz = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 603 period_us = 1000000 / freq_hz; 604 605 result = pm_runtime_resume_and_get(pdev); 606 if (result) 607 return result; 608 609 switch (chan->type) { 610 case IIO_ANGL_VEL: 611 if (!st->chip_config.gyro_en) { 612 result = inv_mpu6050_switch_engine(st, true, 613 INV_MPU6050_SENSOR_GYRO); 614 if (result) 615 goto error_power_off; 616 /* need to wait 2 periods to have first valid sample */ 617 min_sleep_us = 2 * period_us; 618 max_sleep_us = 2 * (period_us + period_us / 2); 619 usleep_range(min_sleep_us, max_sleep_us); 620 } 621 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro, 622 chan->channel2, val); 623 break; 624 case IIO_ACCEL: 625 if (!st->chip_config.accl_en) { 626 result = inv_mpu6050_switch_engine(st, true, 627 INV_MPU6050_SENSOR_ACCL); 628 if (result) 629 goto error_power_off; 630 /* wait 1 period for first sample availability */ 631 min_sleep_us = period_us; 632 max_sleep_us = period_us + period_us / 2; 633 usleep_range(min_sleep_us, max_sleep_us); 634 } 635 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl, 636 chan->channel2, val); 637 break; 638 case IIO_TEMP: 639 /* temperature sensor work only with accel and/or gyro */ 640 if (!st->chip_config.accl_en && !st->chip_config.gyro_en) { 641 result = -EBUSY; 642 goto error_power_off; 643 } 644 if (!st->chip_config.temp_en) { 645 result = inv_mpu6050_switch_engine(st, true, 646 INV_MPU6050_SENSOR_TEMP); 647 if (result) 648 goto error_power_off; 649 /* wait 1 period for first sample availability */ 650 min_sleep_us = period_us; 651 max_sleep_us = period_us + period_us / 2; 652 usleep_range(min_sleep_us, max_sleep_us); 653 } 654 ret = inv_mpu6050_sensor_show(st, st->reg->temperature, 655 IIO_MOD_X, val); 656 break; 657 case IIO_MAGN: 658 if (!st->chip_config.magn_en) { 659 result = inv_mpu6050_switch_engine(st, true, 660 INV_MPU6050_SENSOR_MAGN); 661 if (result) 662 goto error_power_off; 663 /* frequency is limited for magnetometer */ 664 if (freq_hz > INV_MPU_MAGN_FREQ_HZ_MAX) { 665 freq_hz = INV_MPU_MAGN_FREQ_HZ_MAX; 666 period_us = 1000000 / freq_hz; 667 } 668 /* need to wait 2 periods to have first valid sample */ 669 min_sleep_us = 2 * period_us; 670 max_sleep_us = 2 * (period_us + period_us / 2); 671 usleep_range(min_sleep_us, max_sleep_us); 672 } 673 ret = inv_mpu_magn_read(st, chan->channel2, val); 674 break; 675 default: 676 ret = -EINVAL; 677 break; 678 } 679 680 pm_runtime_mark_last_busy(pdev); 681 pm_runtime_put_autosuspend(pdev); 682 683 return ret; 684 685 error_power_off: 686 pm_runtime_put_autosuspend(pdev); 687 return result; 688 } 689 690 static int 691 inv_mpu6050_read_raw(struct iio_dev *indio_dev, 692 struct iio_chan_spec const *chan, 693 int *val, int *val2, long mask) 694 { 695 struct inv_mpu6050_state *st = iio_priv(indio_dev); 696 int ret = 0; 697 698 switch (mask) { 699 case IIO_CHAN_INFO_RAW: 700 ret = iio_device_claim_direct_mode(indio_dev); 701 if (ret) 702 return ret; 703 mutex_lock(&st->lock); 704 ret = inv_mpu6050_read_channel_data(indio_dev, chan, val); 705 mutex_unlock(&st->lock); 706 iio_device_release_direct_mode(indio_dev); 707 return ret; 708 case IIO_CHAN_INFO_SCALE: 709 switch (chan->type) { 710 case IIO_ANGL_VEL: 711 mutex_lock(&st->lock); 712 *val = 0; 713 *val2 = gyro_scale_6050[st->chip_config.fsr]; 714 mutex_unlock(&st->lock); 715 716 return IIO_VAL_INT_PLUS_NANO; 717 case IIO_ACCEL: 718 mutex_lock(&st->lock); 719 *val = 0; 720 *val2 = accel_scale[st->chip_config.accl_fs]; 721 mutex_unlock(&st->lock); 722 723 return IIO_VAL_INT_PLUS_MICRO; 724 case IIO_TEMP: 725 *val = st->hw->temp.scale / 1000000; 726 *val2 = st->hw->temp.scale % 1000000; 727 return IIO_VAL_INT_PLUS_MICRO; 728 case IIO_MAGN: 729 return inv_mpu_magn_get_scale(st, chan, val, val2); 730 default: 731 return -EINVAL; 732 } 733 case IIO_CHAN_INFO_OFFSET: 734 switch (chan->type) { 735 case IIO_TEMP: 736 *val = st->hw->temp.offset; 737 return IIO_VAL_INT; 738 default: 739 return -EINVAL; 740 } 741 case IIO_CHAN_INFO_CALIBBIAS: 742 switch (chan->type) { 743 case IIO_ANGL_VEL: 744 mutex_lock(&st->lock); 745 ret = inv_mpu6050_sensor_show(st, st->reg->gyro_offset, 746 chan->channel2, val); 747 mutex_unlock(&st->lock); 748 return IIO_VAL_INT; 749 case IIO_ACCEL: 750 mutex_lock(&st->lock); 751 ret = inv_mpu6050_sensor_show(st, st->reg->accl_offset, 752 chan->channel2, val); 753 mutex_unlock(&st->lock); 754 return IIO_VAL_INT; 755 756 default: 757 return -EINVAL; 758 } 759 default: 760 return -EINVAL; 761 } 762 } 763 764 static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val, 765 int val2) 766 { 767 int result, i; 768 769 if (val != 0) 770 return -EINVAL; 771 772 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) { 773 if (gyro_scale_6050[i] == val2) { 774 result = inv_mpu6050_set_gyro_fsr(st, i); 775 if (result) 776 return result; 777 778 st->chip_config.fsr = i; 779 return 0; 780 } 781 } 782 783 return -EINVAL; 784 } 785 786 static int inv_write_raw_get_fmt(struct iio_dev *indio_dev, 787 struct iio_chan_spec const *chan, long mask) 788 { 789 switch (mask) { 790 case IIO_CHAN_INFO_SCALE: 791 switch (chan->type) { 792 case IIO_ANGL_VEL: 793 return IIO_VAL_INT_PLUS_NANO; 794 default: 795 return IIO_VAL_INT_PLUS_MICRO; 796 } 797 default: 798 return IIO_VAL_INT_PLUS_MICRO; 799 } 800 801 return -EINVAL; 802 } 803 804 static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val, 805 int val2) 806 { 807 int result, i; 808 u8 d; 809 810 if (val != 0) 811 return -EINVAL; 812 813 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) { 814 if (accel_scale[i] == val2) { 815 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 816 result = regmap_write(st->map, st->reg->accl_config, d); 817 if (result) 818 return result; 819 820 st->chip_config.accl_fs = i; 821 return 0; 822 } 823 } 824 825 return -EINVAL; 826 } 827 828 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, 829 struct iio_chan_spec const *chan, 830 int val, int val2, long mask) 831 { 832 struct inv_mpu6050_state *st = iio_priv(indio_dev); 833 struct device *pdev = regmap_get_device(st->map); 834 int result; 835 836 /* 837 * we should only update scale when the chip is disabled, i.e. 838 * not running 839 */ 840 result = iio_device_claim_direct_mode(indio_dev); 841 if (result) 842 return result; 843 844 mutex_lock(&st->lock); 845 result = pm_runtime_resume_and_get(pdev); 846 if (result) 847 goto error_write_raw_unlock; 848 849 switch (mask) { 850 case IIO_CHAN_INFO_SCALE: 851 switch (chan->type) { 852 case IIO_ANGL_VEL: 853 result = inv_mpu6050_write_gyro_scale(st, val, val2); 854 break; 855 case IIO_ACCEL: 856 result = inv_mpu6050_write_accel_scale(st, val, val2); 857 break; 858 default: 859 result = -EINVAL; 860 break; 861 } 862 break; 863 case IIO_CHAN_INFO_CALIBBIAS: 864 switch (chan->type) { 865 case IIO_ANGL_VEL: 866 result = inv_mpu6050_sensor_set(st, 867 st->reg->gyro_offset, 868 chan->channel2, val); 869 break; 870 case IIO_ACCEL: 871 result = inv_mpu6050_sensor_set(st, 872 st->reg->accl_offset, 873 chan->channel2, val); 874 break; 875 default: 876 result = -EINVAL; 877 break; 878 } 879 break; 880 default: 881 result = -EINVAL; 882 break; 883 } 884 885 pm_runtime_mark_last_busy(pdev); 886 pm_runtime_put_autosuspend(pdev); 887 error_write_raw_unlock: 888 mutex_unlock(&st->lock); 889 iio_device_release_direct_mode(indio_dev); 890 891 return result; 892 } 893 894 /* 895 * inv_mpu6050_set_lpf() - set low pass filer based on fifo rate. 896 * 897 * Based on the Nyquist principle, the bandwidth of the low 898 * pass filter must not exceed the signal sampling rate divided 899 * by 2, or there would be aliasing. 900 * This function basically search for the correct low pass 901 * parameters based on the fifo rate, e.g, sampling frequency. 902 * 903 * lpf is set automatically when setting sampling rate to avoid any aliases. 904 */ 905 static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate) 906 { 907 static const int hz[] = {400, 200, 90, 40, 20, 10}; 908 static const int d[] = { 909 INV_MPU6050_FILTER_200HZ, INV_MPU6050_FILTER_100HZ, 910 INV_MPU6050_FILTER_45HZ, INV_MPU6050_FILTER_20HZ, 911 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ 912 }; 913 int i, result; 914 u8 data; 915 916 data = INV_MPU6050_FILTER_5HZ; 917 for (i = 0; i < ARRAY_SIZE(hz); ++i) { 918 if (rate >= hz[i]) { 919 data = d[i]; 920 break; 921 } 922 } 923 result = inv_mpu6050_set_lpf_regs(st, data); 924 if (result) 925 return result; 926 st->chip_config.lpf = data; 927 928 return 0; 929 } 930 931 /* 932 * inv_mpu6050_fifo_rate_store() - Set fifo rate. 933 */ 934 static ssize_t 935 inv_mpu6050_fifo_rate_store(struct device *dev, struct device_attribute *attr, 936 const char *buf, size_t count) 937 { 938 int fifo_rate; 939 u8 d; 940 int result; 941 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 942 struct inv_mpu6050_state *st = iio_priv(indio_dev); 943 struct device *pdev = regmap_get_device(st->map); 944 945 if (kstrtoint(buf, 10, &fifo_rate)) 946 return -EINVAL; 947 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE || 948 fifo_rate > INV_MPU6050_MAX_FIFO_RATE) 949 return -EINVAL; 950 951 /* compute the chip sample rate divider */ 952 d = INV_MPU6050_FIFO_RATE_TO_DIVIDER(fifo_rate); 953 /* compute back the fifo rate to handle truncation cases */ 954 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(d); 955 956 mutex_lock(&st->lock); 957 if (d == st->chip_config.divider) { 958 result = 0; 959 goto fifo_rate_fail_unlock; 960 } 961 result = pm_runtime_resume_and_get(pdev); 962 if (result) 963 goto fifo_rate_fail_unlock; 964 965 result = regmap_write(st->map, st->reg->sample_rate_div, d); 966 if (result) 967 goto fifo_rate_fail_power_off; 968 st->chip_config.divider = d; 969 970 result = inv_mpu6050_set_lpf(st, fifo_rate); 971 if (result) 972 goto fifo_rate_fail_power_off; 973 974 /* update rate for magn, noop if not present in chip */ 975 result = inv_mpu_magn_set_rate(st, fifo_rate); 976 if (result) 977 goto fifo_rate_fail_power_off; 978 979 pm_runtime_mark_last_busy(pdev); 980 fifo_rate_fail_power_off: 981 pm_runtime_put_autosuspend(pdev); 982 fifo_rate_fail_unlock: 983 mutex_unlock(&st->lock); 984 if (result) 985 return result; 986 987 return count; 988 } 989 990 /* 991 * inv_fifo_rate_show() - Get the current sampling rate. 992 */ 993 static ssize_t 994 inv_fifo_rate_show(struct device *dev, struct device_attribute *attr, 995 char *buf) 996 { 997 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 998 unsigned fifo_rate; 999 1000 mutex_lock(&st->lock); 1001 fifo_rate = INV_MPU6050_DIVIDER_TO_FIFO_RATE(st->chip_config.divider); 1002 mutex_unlock(&st->lock); 1003 1004 return scnprintf(buf, PAGE_SIZE, "%u\n", fifo_rate); 1005 } 1006 1007 /* 1008 * inv_attr_show() - calling this function will show current 1009 * parameters. 1010 * 1011 * Deprecated in favor of IIO mounting matrix API. 1012 * 1013 * See inv_get_mount_matrix() 1014 */ 1015 static ssize_t inv_attr_show(struct device *dev, struct device_attribute *attr, 1016 char *buf) 1017 { 1018 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev)); 1019 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 1020 s8 *m; 1021 1022 switch (this_attr->address) { 1023 /* 1024 * In MPU6050, the two matrix are the same because gyro and accel 1025 * are integrated in one chip 1026 */ 1027 case ATTR_GYRO_MATRIX: 1028 case ATTR_ACCL_MATRIX: 1029 m = st->plat_data.orientation; 1030 1031 return scnprintf(buf, PAGE_SIZE, 1032 "%d, %d, %d; %d, %d, %d; %d, %d, %d\n", 1033 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]); 1034 default: 1035 return -EINVAL; 1036 } 1037 } 1038 1039 /** 1040 * inv_mpu6050_validate_trigger() - validate_trigger callback for invensense 1041 * MPU6050 device. 1042 * @indio_dev: The IIO device 1043 * @trig: The new trigger 1044 * 1045 * Returns: 0 if the 'trig' matches the trigger registered by the MPU6050 1046 * device, -EINVAL otherwise. 1047 */ 1048 static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev, 1049 struct iio_trigger *trig) 1050 { 1051 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1052 1053 if (st->trig != trig) 1054 return -EINVAL; 1055 1056 return 0; 1057 } 1058 1059 static const struct iio_mount_matrix * 1060 inv_get_mount_matrix(const struct iio_dev *indio_dev, 1061 const struct iio_chan_spec *chan) 1062 { 1063 struct inv_mpu6050_state *data = iio_priv(indio_dev); 1064 const struct iio_mount_matrix *matrix; 1065 1066 if (chan->type == IIO_MAGN) 1067 matrix = &data->magn_orient; 1068 else 1069 matrix = &data->orientation; 1070 1071 return matrix; 1072 } 1073 1074 static const struct iio_chan_spec_ext_info inv_ext_info[] = { 1075 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, inv_get_mount_matrix), 1076 { } 1077 }; 1078 1079 #define INV_MPU6050_CHAN(_type, _channel2, _index) \ 1080 { \ 1081 .type = _type, \ 1082 .modified = 1, \ 1083 .channel2 = _channel2, \ 1084 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 1085 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 1086 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 1087 .scan_index = _index, \ 1088 .scan_type = { \ 1089 .sign = 's', \ 1090 .realbits = 16, \ 1091 .storagebits = 16, \ 1092 .shift = 0, \ 1093 .endianness = IIO_BE, \ 1094 }, \ 1095 .ext_info = inv_ext_info, \ 1096 } 1097 1098 #define INV_MPU6050_TEMP_CHAN(_index) \ 1099 { \ 1100 .type = IIO_TEMP, \ 1101 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \ 1102 | BIT(IIO_CHAN_INFO_OFFSET) \ 1103 | BIT(IIO_CHAN_INFO_SCALE), \ 1104 .scan_index = _index, \ 1105 .scan_type = { \ 1106 .sign = 's', \ 1107 .realbits = 16, \ 1108 .storagebits = 16, \ 1109 .shift = 0, \ 1110 .endianness = IIO_BE, \ 1111 }, \ 1112 } 1113 1114 static const struct iio_chan_spec inv_mpu_channels[] = { 1115 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP), 1116 1117 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1118 1119 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1120 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1121 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1122 1123 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1124 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1125 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1126 }; 1127 1128 #define INV_MPU6050_SCAN_MASK_3AXIS_ACCEL \ 1129 (BIT(INV_MPU6050_SCAN_ACCL_X) \ 1130 | BIT(INV_MPU6050_SCAN_ACCL_Y) \ 1131 | BIT(INV_MPU6050_SCAN_ACCL_Z)) 1132 1133 #define INV_MPU6050_SCAN_MASK_3AXIS_GYRO \ 1134 (BIT(INV_MPU6050_SCAN_GYRO_X) \ 1135 | BIT(INV_MPU6050_SCAN_GYRO_Y) \ 1136 | BIT(INV_MPU6050_SCAN_GYRO_Z)) 1137 1138 #define INV_MPU6050_SCAN_MASK_TEMP (BIT(INV_MPU6050_SCAN_TEMP)) 1139 1140 static const unsigned long inv_mpu_scan_masks[] = { 1141 /* 3-axis accel */ 1142 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL, 1143 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1144 /* 3-axis gyro */ 1145 INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1146 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1147 /* 6-axis accel + gyro */ 1148 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1149 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1150 | INV_MPU6050_SCAN_MASK_TEMP, 1151 0, 1152 }; 1153 1154 #define INV_MPU9X50_MAGN_CHAN(_chan2, _bits, _index) \ 1155 { \ 1156 .type = IIO_MAGN, \ 1157 .modified = 1, \ 1158 .channel2 = _chan2, \ 1159 .info_mask_separate = BIT(IIO_CHAN_INFO_SCALE) | \ 1160 BIT(IIO_CHAN_INFO_RAW), \ 1161 .scan_index = _index, \ 1162 .scan_type = { \ 1163 .sign = 's', \ 1164 .realbits = _bits, \ 1165 .storagebits = 16, \ 1166 .shift = 0, \ 1167 .endianness = IIO_BE, \ 1168 }, \ 1169 .ext_info = inv_ext_info, \ 1170 } 1171 1172 static const struct iio_chan_spec inv_mpu9150_channels[] = { 1173 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP), 1174 1175 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1176 1177 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1178 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1179 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1180 1181 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1182 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1183 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1184 1185 /* Magnetometer resolution is 13 bits */ 1186 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 13, INV_MPU9X50_SCAN_MAGN_X), 1187 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 13, INV_MPU9X50_SCAN_MAGN_Y), 1188 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 13, INV_MPU9X50_SCAN_MAGN_Z), 1189 }; 1190 1191 static const struct iio_chan_spec inv_mpu9250_channels[] = { 1192 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU9X50_SCAN_TIMESTAMP), 1193 1194 INV_MPU6050_TEMP_CHAN(INV_MPU6050_SCAN_TEMP), 1195 1196 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X), 1197 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y), 1198 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z), 1199 1200 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X), 1201 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y), 1202 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z), 1203 1204 /* Magnetometer resolution is 16 bits */ 1205 INV_MPU9X50_MAGN_CHAN(IIO_MOD_X, 16, INV_MPU9X50_SCAN_MAGN_X), 1206 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Y, 16, INV_MPU9X50_SCAN_MAGN_Y), 1207 INV_MPU9X50_MAGN_CHAN(IIO_MOD_Z, 16, INV_MPU9X50_SCAN_MAGN_Z), 1208 }; 1209 1210 #define INV_MPU9X50_SCAN_MASK_3AXIS_MAGN \ 1211 (BIT(INV_MPU9X50_SCAN_MAGN_X) \ 1212 | BIT(INV_MPU9X50_SCAN_MAGN_Y) \ 1213 | BIT(INV_MPU9X50_SCAN_MAGN_Z)) 1214 1215 static const unsigned long inv_mpu9x50_scan_masks[] = { 1216 /* 3-axis accel */ 1217 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL, 1218 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1219 /* 3-axis gyro */ 1220 INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1221 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1222 /* 3-axis magn */ 1223 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1224 INV_MPU9X50_SCAN_MASK_3AXIS_MAGN | INV_MPU6050_SCAN_MASK_TEMP, 1225 /* 6-axis accel + gyro */ 1226 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO, 1227 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1228 | INV_MPU6050_SCAN_MASK_TEMP, 1229 /* 6-axis accel + magn */ 1230 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1231 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1232 | INV_MPU6050_SCAN_MASK_TEMP, 1233 /* 6-axis gyro + magn */ 1234 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1235 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1236 | INV_MPU6050_SCAN_MASK_TEMP, 1237 /* 9-axis accel + gyro + magn */ 1238 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1239 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN, 1240 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1241 | INV_MPU9X50_SCAN_MASK_3AXIS_MAGN 1242 | INV_MPU6050_SCAN_MASK_TEMP, 1243 0, 1244 }; 1245 1246 static const unsigned long inv_icm20602_scan_masks[] = { 1247 /* 3-axis accel + temp (mandatory) */ 1248 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_TEMP, 1249 /* 3-axis gyro + temp (mandatory) */ 1250 INV_MPU6050_SCAN_MASK_3AXIS_GYRO | INV_MPU6050_SCAN_MASK_TEMP, 1251 /* 6-axis accel + gyro + temp (mandatory) */ 1252 INV_MPU6050_SCAN_MASK_3AXIS_ACCEL | INV_MPU6050_SCAN_MASK_3AXIS_GYRO 1253 | INV_MPU6050_SCAN_MASK_TEMP, 1254 0, 1255 }; 1256 1257 /* 1258 * The user can choose any frequency between INV_MPU6050_MIN_FIFO_RATE and 1259 * INV_MPU6050_MAX_FIFO_RATE, but only these frequencies are matched by the 1260 * low-pass filter. Specifically, each of these sampling rates are about twice 1261 * the bandwidth of a corresponding low-pass filter, which should eliminate 1262 * aliasing following the Nyquist principle. By picking a frequency different 1263 * from these, the user risks aliasing effects. 1264 */ 1265 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500"); 1266 static IIO_CONST_ATTR(in_anglvel_scale_available, 1267 "0.000133090 0.000266181 0.000532362 0.001064724"); 1268 static IIO_CONST_ATTR(in_accel_scale_available, 1269 "0.000598 0.001196 0.002392 0.004785"); 1270 static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show, 1271 inv_mpu6050_fifo_rate_store); 1272 1273 /* Deprecated: kept for userspace backward compatibility. */ 1274 static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL, 1275 ATTR_GYRO_MATRIX); 1276 static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL, 1277 ATTR_ACCL_MATRIX); 1278 1279 static struct attribute *inv_attributes[] = { 1280 &iio_dev_attr_in_gyro_matrix.dev_attr.attr, /* deprecated */ 1281 &iio_dev_attr_in_accel_matrix.dev_attr.attr, /* deprecated */ 1282 &iio_dev_attr_sampling_frequency.dev_attr.attr, 1283 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 1284 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 1285 &iio_const_attr_in_anglvel_scale_available.dev_attr.attr, 1286 NULL, 1287 }; 1288 1289 static const struct attribute_group inv_attribute_group = { 1290 .attrs = inv_attributes 1291 }; 1292 1293 static int inv_mpu6050_reg_access(struct iio_dev *indio_dev, 1294 unsigned int reg, 1295 unsigned int writeval, 1296 unsigned int *readval) 1297 { 1298 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1299 int ret; 1300 1301 mutex_lock(&st->lock); 1302 if (readval) 1303 ret = regmap_read(st->map, reg, readval); 1304 else 1305 ret = regmap_write(st->map, reg, writeval); 1306 mutex_unlock(&st->lock); 1307 1308 return ret; 1309 } 1310 1311 static const struct iio_info mpu_info = { 1312 .read_raw = &inv_mpu6050_read_raw, 1313 .write_raw = &inv_mpu6050_write_raw, 1314 .write_raw_get_fmt = &inv_write_raw_get_fmt, 1315 .attrs = &inv_attribute_group, 1316 .validate_trigger = inv_mpu6050_validate_trigger, 1317 .debugfs_reg_access = &inv_mpu6050_reg_access, 1318 }; 1319 1320 /* 1321 * inv_check_and_setup_chip() - check and setup chip. 1322 */ 1323 static int inv_check_and_setup_chip(struct inv_mpu6050_state *st) 1324 { 1325 int result; 1326 unsigned int regval, mask; 1327 int i; 1328 1329 st->hw = &hw_info[st->chip_type]; 1330 st->reg = hw_info[st->chip_type].reg; 1331 memcpy(&st->chip_config, hw_info[st->chip_type].config, 1332 sizeof(st->chip_config)); 1333 1334 /* check chip self-identification */ 1335 result = regmap_read(st->map, INV_MPU6050_REG_WHOAMI, ®val); 1336 if (result) 1337 return result; 1338 if (regval != st->hw->whoami) { 1339 /* check whoami against all possible values */ 1340 for (i = 0; i < INV_NUM_PARTS; ++i) { 1341 if (regval == hw_info[i].whoami) { 1342 dev_warn(regmap_get_device(st->map), 1343 "whoami mismatch got 0x%02x (%s) expected 0x%02x (%s)\n", 1344 regval, hw_info[i].name, 1345 st->hw->whoami, st->hw->name); 1346 break; 1347 } 1348 } 1349 if (i >= INV_NUM_PARTS) { 1350 dev_err(regmap_get_device(st->map), 1351 "invalid whoami 0x%02x expected 0x%02x (%s)\n", 1352 regval, st->hw->whoami, st->hw->name); 1353 return -ENODEV; 1354 } 1355 } 1356 1357 /* reset to make sure previous state are not there */ 1358 result = regmap_write(st->map, st->reg->pwr_mgmt_1, 1359 INV_MPU6050_BIT_H_RESET); 1360 if (result) 1361 return result; 1362 msleep(INV_MPU6050_POWER_UP_TIME); 1363 switch (st->chip_type) { 1364 case INV_MPU6000: 1365 case INV_MPU6500: 1366 case INV_MPU6515: 1367 case INV_MPU6880: 1368 case INV_MPU9250: 1369 case INV_MPU9255: 1370 /* reset signal path (required for spi connection) */ 1371 regval = INV_MPU6050_BIT_TEMP_RST | INV_MPU6050_BIT_ACCEL_RST | 1372 INV_MPU6050_BIT_GYRO_RST; 1373 result = regmap_write(st->map, INV_MPU6050_REG_SIGNAL_PATH_RESET, 1374 regval); 1375 if (result) 1376 return result; 1377 msleep(INV_MPU6050_POWER_UP_TIME); 1378 break; 1379 default: 1380 break; 1381 } 1382 1383 /* 1384 * Turn power on. After reset, the sleep bit could be on 1385 * or off depending on the OTP settings. Turning power on 1386 * make it in a definite state as well as making the hardware 1387 * state align with the software state 1388 */ 1389 result = inv_mpu6050_set_power_itg(st, true); 1390 if (result) 1391 return result; 1392 mask = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO | 1393 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN; 1394 result = inv_mpu6050_switch_engine(st, false, mask); 1395 if (result) 1396 goto error_power_off; 1397 1398 return 0; 1399 1400 error_power_off: 1401 inv_mpu6050_set_power_itg(st, false); 1402 return result; 1403 } 1404 1405 static int inv_mpu_core_enable_regulator_vddio(struct inv_mpu6050_state *st) 1406 { 1407 int result; 1408 1409 result = regulator_enable(st->vddio_supply); 1410 if (result) { 1411 dev_err(regmap_get_device(st->map), 1412 "Failed to enable vddio regulator: %d\n", result); 1413 } else { 1414 /* Give the device a little bit of time to start up. */ 1415 usleep_range(3000, 5000); 1416 } 1417 1418 return result; 1419 } 1420 1421 static int inv_mpu_core_disable_regulator_vddio(struct inv_mpu6050_state *st) 1422 { 1423 int result; 1424 1425 result = regulator_disable(st->vddio_supply); 1426 if (result) 1427 dev_err(regmap_get_device(st->map), 1428 "Failed to disable vddio regulator: %d\n", result); 1429 1430 return result; 1431 } 1432 1433 static void inv_mpu_core_disable_regulator_action(void *_data) 1434 { 1435 struct inv_mpu6050_state *st = _data; 1436 int result; 1437 1438 result = regulator_disable(st->vdd_supply); 1439 if (result) 1440 dev_err(regmap_get_device(st->map), 1441 "Failed to disable vdd regulator: %d\n", result); 1442 1443 inv_mpu_core_disable_regulator_vddio(st); 1444 } 1445 1446 static void inv_mpu_pm_disable(void *data) 1447 { 1448 struct device *dev = data; 1449 1450 pm_runtime_disable(dev); 1451 } 1452 1453 int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, 1454 int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type) 1455 { 1456 struct inv_mpu6050_state *st; 1457 struct iio_dev *indio_dev; 1458 struct inv_mpu6050_platform_data *pdata; 1459 struct device *dev = regmap_get_device(regmap); 1460 int result; 1461 struct irq_data *desc; 1462 int irq_type; 1463 1464 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 1465 if (!indio_dev) 1466 return -ENOMEM; 1467 1468 BUILD_BUG_ON(ARRAY_SIZE(hw_info) != INV_NUM_PARTS); 1469 if (chip_type < 0 || chip_type >= INV_NUM_PARTS) { 1470 dev_err(dev, "Bad invensense chip_type=%d name=%s\n", 1471 chip_type, name); 1472 return -ENODEV; 1473 } 1474 st = iio_priv(indio_dev); 1475 mutex_init(&st->lock); 1476 st->chip_type = chip_type; 1477 st->irq = irq; 1478 st->map = regmap; 1479 1480 pdata = dev_get_platdata(dev); 1481 if (!pdata) { 1482 result = iio_read_mount_matrix(dev, &st->orientation); 1483 if (result) { 1484 dev_err(dev, "Failed to retrieve mounting matrix %d\n", 1485 result); 1486 return result; 1487 } 1488 } else { 1489 st->plat_data = *pdata; 1490 } 1491 1492 if (irq > 0) { 1493 desc = irq_get_irq_data(irq); 1494 if (!desc) { 1495 dev_err(dev, "Could not find IRQ %d\n", irq); 1496 return -EINVAL; 1497 } 1498 1499 irq_type = irqd_get_trigger_type(desc); 1500 if (!irq_type) 1501 irq_type = IRQF_TRIGGER_RISING; 1502 } else { 1503 /* Doesn't really matter, use the default */ 1504 irq_type = IRQF_TRIGGER_RISING; 1505 } 1506 1507 if (irq_type & IRQF_TRIGGER_RISING) // rising or both-edge 1508 st->irq_mask = INV_MPU6050_ACTIVE_HIGH; 1509 else if (irq_type == IRQF_TRIGGER_FALLING) 1510 st->irq_mask = INV_MPU6050_ACTIVE_LOW; 1511 else if (irq_type == IRQF_TRIGGER_HIGH) 1512 st->irq_mask = INV_MPU6050_ACTIVE_HIGH | 1513 INV_MPU6050_LATCH_INT_EN; 1514 else if (irq_type == IRQF_TRIGGER_LOW) 1515 st->irq_mask = INV_MPU6050_ACTIVE_LOW | 1516 INV_MPU6050_LATCH_INT_EN; 1517 else { 1518 dev_err(dev, "Invalid interrupt type 0x%x specified\n", 1519 irq_type); 1520 return -EINVAL; 1521 } 1522 1523 st->vdd_supply = devm_regulator_get(dev, "vdd"); 1524 if (IS_ERR(st->vdd_supply)) 1525 return dev_err_probe(dev, PTR_ERR(st->vdd_supply), 1526 "Failed to get vdd regulator\n"); 1527 1528 st->vddio_supply = devm_regulator_get(dev, "vddio"); 1529 if (IS_ERR(st->vddio_supply)) 1530 return dev_err_probe(dev, PTR_ERR(st->vddio_supply), 1531 "Failed to get vddio regulator\n"); 1532 1533 result = regulator_enable(st->vdd_supply); 1534 if (result) { 1535 dev_err(dev, "Failed to enable vdd regulator: %d\n", result); 1536 return result; 1537 } 1538 msleep(INV_MPU6050_POWER_UP_TIME); 1539 1540 result = inv_mpu_core_enable_regulator_vddio(st); 1541 if (result) { 1542 regulator_disable(st->vdd_supply); 1543 return result; 1544 } 1545 1546 result = devm_add_action_or_reset(dev, inv_mpu_core_disable_regulator_action, 1547 st); 1548 if (result) { 1549 dev_err(dev, "Failed to setup regulator cleanup action %d\n", 1550 result); 1551 return result; 1552 } 1553 1554 /* fill magnetometer orientation */ 1555 result = inv_mpu_magn_set_orient(st); 1556 if (result) 1557 return result; 1558 1559 /* power is turned on inside check chip type*/ 1560 result = inv_check_and_setup_chip(st); 1561 if (result) 1562 return result; 1563 1564 result = inv_mpu6050_init_config(indio_dev); 1565 if (result) { 1566 dev_err(dev, "Could not initialize device.\n"); 1567 goto error_power_off; 1568 } 1569 1570 dev_set_drvdata(dev, indio_dev); 1571 /* name will be NULL when enumerated via ACPI */ 1572 if (name) 1573 indio_dev->name = name; 1574 else 1575 indio_dev->name = dev_name(dev); 1576 1577 /* requires parent device set in indio_dev */ 1578 if (inv_mpu_bus_setup) { 1579 result = inv_mpu_bus_setup(indio_dev); 1580 if (result) 1581 goto error_power_off; 1582 } 1583 1584 /* chip init is done, turning on runtime power management */ 1585 result = pm_runtime_set_active(dev); 1586 if (result) 1587 goto error_power_off; 1588 pm_runtime_get_noresume(dev); 1589 pm_runtime_enable(dev); 1590 pm_runtime_set_autosuspend_delay(dev, INV_MPU6050_SUSPEND_DELAY_MS); 1591 pm_runtime_use_autosuspend(dev); 1592 pm_runtime_put(dev); 1593 result = devm_add_action_or_reset(dev, inv_mpu_pm_disable, dev); 1594 if (result) 1595 return result; 1596 1597 switch (chip_type) { 1598 case INV_MPU9150: 1599 indio_dev->channels = inv_mpu9150_channels; 1600 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9150_channels); 1601 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks; 1602 break; 1603 case INV_MPU9250: 1604 case INV_MPU9255: 1605 indio_dev->channels = inv_mpu9250_channels; 1606 indio_dev->num_channels = ARRAY_SIZE(inv_mpu9250_channels); 1607 indio_dev->available_scan_masks = inv_mpu9x50_scan_masks; 1608 break; 1609 case INV_ICM20600: 1610 case INV_ICM20602: 1611 indio_dev->channels = inv_mpu_channels; 1612 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1613 indio_dev->available_scan_masks = inv_icm20602_scan_masks; 1614 break; 1615 default: 1616 indio_dev->channels = inv_mpu_channels; 1617 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1618 indio_dev->available_scan_masks = inv_mpu_scan_masks; 1619 break; 1620 } 1621 /* 1622 * Use magnetometer inside the chip only if there is no i2c 1623 * auxiliary device in use. Otherwise Going back to 6-axis only. 1624 */ 1625 if (st->magn_disabled) { 1626 indio_dev->channels = inv_mpu_channels; 1627 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 1628 indio_dev->available_scan_masks = inv_mpu_scan_masks; 1629 } 1630 1631 indio_dev->info = &mpu_info; 1632 1633 if (irq > 0) { 1634 /* 1635 * The driver currently only supports buffered capture with its 1636 * own trigger. So no IRQ, no trigger, no buffer 1637 */ 1638 result = devm_iio_triggered_buffer_setup(dev, indio_dev, 1639 iio_pollfunc_store_time, 1640 inv_mpu6050_read_fifo, 1641 NULL); 1642 if (result) { 1643 dev_err(dev, "configure buffer fail %d\n", result); 1644 return result; 1645 } 1646 1647 result = inv_mpu6050_probe_trigger(indio_dev, irq_type); 1648 if (result) { 1649 dev_err(dev, "trigger probe fail %d\n", result); 1650 return result; 1651 } 1652 } 1653 1654 result = devm_iio_device_register(dev, indio_dev); 1655 if (result) { 1656 dev_err(dev, "IIO register fail %d\n", result); 1657 return result; 1658 } 1659 1660 return 0; 1661 1662 error_power_off: 1663 inv_mpu6050_set_power_itg(st, false); 1664 return result; 1665 } 1666 EXPORT_SYMBOL_NS_GPL(inv_mpu_core_probe, IIO_MPU6050); 1667 1668 static int inv_mpu_resume(struct device *dev) 1669 { 1670 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1671 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1672 int result; 1673 1674 mutex_lock(&st->lock); 1675 result = inv_mpu_core_enable_regulator_vddio(st); 1676 if (result) 1677 goto out_unlock; 1678 1679 result = inv_mpu6050_set_power_itg(st, true); 1680 if (result) 1681 goto out_unlock; 1682 1683 pm_runtime_disable(dev); 1684 pm_runtime_set_active(dev); 1685 pm_runtime_enable(dev); 1686 1687 result = inv_mpu6050_switch_engine(st, true, st->suspended_sensors); 1688 if (result) 1689 goto out_unlock; 1690 1691 if (iio_buffer_enabled(indio_dev)) 1692 result = inv_mpu6050_prepare_fifo(st, true); 1693 1694 out_unlock: 1695 mutex_unlock(&st->lock); 1696 1697 return result; 1698 } 1699 1700 static int inv_mpu_suspend(struct device *dev) 1701 { 1702 struct iio_dev *indio_dev = dev_get_drvdata(dev); 1703 struct inv_mpu6050_state *st = iio_priv(indio_dev); 1704 int result; 1705 1706 mutex_lock(&st->lock); 1707 1708 st->suspended_sensors = 0; 1709 if (pm_runtime_suspended(dev)) { 1710 result = 0; 1711 goto out_unlock; 1712 } 1713 1714 if (iio_buffer_enabled(indio_dev)) { 1715 result = inv_mpu6050_prepare_fifo(st, false); 1716 if (result) 1717 goto out_unlock; 1718 } 1719 1720 if (st->chip_config.accl_en) 1721 st->suspended_sensors |= INV_MPU6050_SENSOR_ACCL; 1722 if (st->chip_config.gyro_en) 1723 st->suspended_sensors |= INV_MPU6050_SENSOR_GYRO; 1724 if (st->chip_config.temp_en) 1725 st->suspended_sensors |= INV_MPU6050_SENSOR_TEMP; 1726 if (st->chip_config.magn_en) 1727 st->suspended_sensors |= INV_MPU6050_SENSOR_MAGN; 1728 result = inv_mpu6050_switch_engine(st, false, st->suspended_sensors); 1729 if (result) 1730 goto out_unlock; 1731 1732 result = inv_mpu6050_set_power_itg(st, false); 1733 if (result) 1734 goto out_unlock; 1735 1736 inv_mpu_core_disable_regulator_vddio(st); 1737 out_unlock: 1738 mutex_unlock(&st->lock); 1739 1740 return result; 1741 } 1742 1743 static int inv_mpu_runtime_suspend(struct device *dev) 1744 { 1745 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev)); 1746 unsigned int sensors; 1747 int ret; 1748 1749 mutex_lock(&st->lock); 1750 1751 sensors = INV_MPU6050_SENSOR_ACCL | INV_MPU6050_SENSOR_GYRO | 1752 INV_MPU6050_SENSOR_TEMP | INV_MPU6050_SENSOR_MAGN; 1753 ret = inv_mpu6050_switch_engine(st, false, sensors); 1754 if (ret) 1755 goto out_unlock; 1756 1757 ret = inv_mpu6050_set_power_itg(st, false); 1758 if (ret) 1759 goto out_unlock; 1760 1761 inv_mpu_core_disable_regulator_vddio(st); 1762 1763 out_unlock: 1764 mutex_unlock(&st->lock); 1765 return ret; 1766 } 1767 1768 static int inv_mpu_runtime_resume(struct device *dev) 1769 { 1770 struct inv_mpu6050_state *st = iio_priv(dev_get_drvdata(dev)); 1771 int ret; 1772 1773 ret = inv_mpu_core_enable_regulator_vddio(st); 1774 if (ret) 1775 return ret; 1776 1777 return inv_mpu6050_set_power_itg(st, true); 1778 } 1779 1780 EXPORT_NS_GPL_DEV_PM_OPS(inv_mpu_pmops, IIO_MPU6050) = { 1781 SYSTEM_SLEEP_PM_OPS(inv_mpu_suspend, inv_mpu_resume) 1782 RUNTIME_PM_OPS(inv_mpu_runtime_suspend, inv_mpu_runtime_resume, NULL) 1783 }; 1784 1785 MODULE_AUTHOR("Invensense Corporation"); 1786 MODULE_DESCRIPTION("Invensense device MPU6050 driver"); 1787 MODULE_LICENSE("GPL"); 1788