1a095fadbSJean-Baptiste Maneyrol // SPDX-License-Identifier: GPL-2.0-or-later
2a095fadbSJean-Baptiste Maneyrol /*
3a095fadbSJean-Baptiste Maneyrol  * Copyright (C) 2020 Invensense, Inc.
4a095fadbSJean-Baptiste Maneyrol  */
5a095fadbSJean-Baptiste Maneyrol 
6a095fadbSJean-Baptiste Maneyrol #include <linux/kernel.h>
7a095fadbSJean-Baptiste Maneyrol #include <linux/device.h>
8a095fadbSJean-Baptiste Maneyrol #include <linux/mutex.h>
9a095fadbSJean-Baptiste Maneyrol #include <linux/pm_runtime.h>
10a095fadbSJean-Baptiste Maneyrol #include <linux/regmap.h>
11a095fadbSJean-Baptiste Maneyrol #include <linux/delay.h>
12a095fadbSJean-Baptiste Maneyrol #include <linux/math64.h>
13*d99ff463SJean-Baptiste Maneyrol 
147f85e42aSJean-Baptiste Maneyrol #include <linux/iio/buffer.h>
15*d99ff463SJean-Baptiste Maneyrol #include <linux/iio/common/inv_icm42600_timestamp.h>
16*d99ff463SJean-Baptiste Maneyrol #include <linux/iio/iio.h>
177f85e42aSJean-Baptiste Maneyrol #include <linux/iio/kfifo_buf.h>
18a095fadbSJean-Baptiste Maneyrol 
19a095fadbSJean-Baptiste Maneyrol #include "inv_icm42600.h"
20bc3eb020SJean-Baptiste Maneyrol #include "inv_icm42600_temp.h"
217f85e42aSJean-Baptiste Maneyrol #include "inv_icm42600_buffer.h"
22a095fadbSJean-Baptiste Maneyrol 
23a095fadbSJean-Baptiste Maneyrol #define INV_ICM42600_GYRO_CHAN(_modifier, _index, _ext_info)		\
24a095fadbSJean-Baptiste Maneyrol 	{								\
25a095fadbSJean-Baptiste Maneyrol 		.type = IIO_ANGL_VEL,					\
26a095fadbSJean-Baptiste Maneyrol 		.modified = 1,						\
27a095fadbSJean-Baptiste Maneyrol 		.channel2 = _modifier,					\
28a095fadbSJean-Baptiste Maneyrol 		.info_mask_separate =					\
29a095fadbSJean-Baptiste Maneyrol 			BIT(IIO_CHAN_INFO_RAW) |			\
30a095fadbSJean-Baptiste Maneyrol 			BIT(IIO_CHAN_INFO_CALIBBIAS),			\
31a095fadbSJean-Baptiste Maneyrol 		.info_mask_shared_by_type =				\
32a095fadbSJean-Baptiste Maneyrol 			BIT(IIO_CHAN_INFO_SCALE),			\
33a095fadbSJean-Baptiste Maneyrol 		.info_mask_shared_by_type_available =			\
34a095fadbSJean-Baptiste Maneyrol 			BIT(IIO_CHAN_INFO_SCALE) |			\
35a095fadbSJean-Baptiste Maneyrol 			BIT(IIO_CHAN_INFO_CALIBBIAS),			\
36a095fadbSJean-Baptiste Maneyrol 		.info_mask_shared_by_all =				\
37a095fadbSJean-Baptiste Maneyrol 			BIT(IIO_CHAN_INFO_SAMP_FREQ),			\
38a095fadbSJean-Baptiste Maneyrol 		.info_mask_shared_by_all_available =			\
39a095fadbSJean-Baptiste Maneyrol 			BIT(IIO_CHAN_INFO_SAMP_FREQ),			\
40a095fadbSJean-Baptiste Maneyrol 		.scan_index = _index,					\
41a095fadbSJean-Baptiste Maneyrol 		.scan_type = {						\
42a095fadbSJean-Baptiste Maneyrol 			.sign = 's',					\
43a095fadbSJean-Baptiste Maneyrol 			.realbits = 16,					\
44a095fadbSJean-Baptiste Maneyrol 			.storagebits = 16,				\
45a095fadbSJean-Baptiste Maneyrol 			.endianness = IIO_BE,				\
46a095fadbSJean-Baptiste Maneyrol 		},							\
47a095fadbSJean-Baptiste Maneyrol 		.ext_info = _ext_info,					\
48a095fadbSJean-Baptiste Maneyrol 	}
49a095fadbSJean-Baptiste Maneyrol 
50a095fadbSJean-Baptiste Maneyrol enum inv_icm42600_gyro_scan {
51a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_GYRO_SCAN_X,
52a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_GYRO_SCAN_Y,
53a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_GYRO_SCAN_Z,
54bc3eb020SJean-Baptiste Maneyrol 	INV_ICM42600_GYRO_SCAN_TEMP,
55ec74ae9fSJean-Baptiste Maneyrol 	INV_ICM42600_GYRO_SCAN_TIMESTAMP,
56a095fadbSJean-Baptiste Maneyrol };
57a095fadbSJean-Baptiste Maneyrol 
58a095fadbSJean-Baptiste Maneyrol static const struct iio_chan_spec_ext_info inv_icm42600_gyro_ext_infos[] = {
59a095fadbSJean-Baptiste Maneyrol 	IIO_MOUNT_MATRIX(IIO_SHARED_BY_ALL, inv_icm42600_get_mount_matrix),
60a095fadbSJean-Baptiste Maneyrol 	{},
61a095fadbSJean-Baptiste Maneyrol };
62a095fadbSJean-Baptiste Maneyrol 
63a095fadbSJean-Baptiste Maneyrol static const struct iio_chan_spec inv_icm42600_gyro_channels[] = {
64a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_GYRO_CHAN(IIO_MOD_X, INV_ICM42600_GYRO_SCAN_X,
65a095fadbSJean-Baptiste Maneyrol 			       inv_icm42600_gyro_ext_infos),
66a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_GYRO_CHAN(IIO_MOD_Y, INV_ICM42600_GYRO_SCAN_Y,
67a095fadbSJean-Baptiste Maneyrol 			       inv_icm42600_gyro_ext_infos),
68a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_GYRO_CHAN(IIO_MOD_Z, INV_ICM42600_GYRO_SCAN_Z,
69a095fadbSJean-Baptiste Maneyrol 			       inv_icm42600_gyro_ext_infos),
70bc3eb020SJean-Baptiste Maneyrol 	INV_ICM42600_TEMP_CHAN(INV_ICM42600_GYRO_SCAN_TEMP),
71ec74ae9fSJean-Baptiste Maneyrol 	IIO_CHAN_SOFT_TIMESTAMP(INV_ICM42600_GYRO_SCAN_TIMESTAMP),
72a095fadbSJean-Baptiste Maneyrol };
73a095fadbSJean-Baptiste Maneyrol 
747f85e42aSJean-Baptiste Maneyrol /*
75ec74ae9fSJean-Baptiste Maneyrol  * IIO buffer data: size must be a power of 2 and timestamp aligned
76ec74ae9fSJean-Baptiste Maneyrol  * 16 bytes: 6 bytes angular velocity, 2 bytes temperature, 8 bytes timestamp
777f85e42aSJean-Baptiste Maneyrol  */
787f85e42aSJean-Baptiste Maneyrol struct inv_icm42600_gyro_buffer {
797f85e42aSJean-Baptiste Maneyrol 	struct inv_icm42600_fifo_sensor_data gyro;
807f85e42aSJean-Baptiste Maneyrol 	int16_t temp;
81ec74ae9fSJean-Baptiste Maneyrol 	int64_t timestamp __aligned(8);
827f85e42aSJean-Baptiste Maneyrol };
837f85e42aSJean-Baptiste Maneyrol 
847f85e42aSJean-Baptiste Maneyrol #define INV_ICM42600_SCAN_MASK_GYRO_3AXIS				\
857f85e42aSJean-Baptiste Maneyrol 	(BIT(INV_ICM42600_GYRO_SCAN_X) |				\
867f85e42aSJean-Baptiste Maneyrol 	BIT(INV_ICM42600_GYRO_SCAN_Y) |					\
877f85e42aSJean-Baptiste Maneyrol 	BIT(INV_ICM42600_GYRO_SCAN_Z))
887f85e42aSJean-Baptiste Maneyrol 
897f85e42aSJean-Baptiste Maneyrol #define INV_ICM42600_SCAN_MASK_TEMP	BIT(INV_ICM42600_GYRO_SCAN_TEMP)
907f85e42aSJean-Baptiste Maneyrol 
917f85e42aSJean-Baptiste Maneyrol static const unsigned long inv_icm42600_gyro_scan_masks[] = {
927f85e42aSJean-Baptiste Maneyrol 	/* 3-axis gyro + temperature */
937f85e42aSJean-Baptiste Maneyrol 	INV_ICM42600_SCAN_MASK_GYRO_3AXIS | INV_ICM42600_SCAN_MASK_TEMP,
947f85e42aSJean-Baptiste Maneyrol 	0,
957f85e42aSJean-Baptiste Maneyrol };
967f85e42aSJean-Baptiste Maneyrol 
977f85e42aSJean-Baptiste Maneyrol /* enable gyroscope sensor and FIFO write */
987f85e42aSJean-Baptiste Maneyrol static int inv_icm42600_gyro_update_scan_mode(struct iio_dev *indio_dev,
997f85e42aSJean-Baptiste Maneyrol 					      const unsigned long *scan_mask)
1007f85e42aSJean-Baptiste Maneyrol {
1017f85e42aSJean-Baptiste Maneyrol 	struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
102ec74ae9fSJean-Baptiste Maneyrol 	struct inv_icm42600_timestamp *ts = iio_priv(indio_dev);
1037f85e42aSJean-Baptiste Maneyrol 	struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
1047f85e42aSJean-Baptiste Maneyrol 	unsigned int fifo_en = 0;
1057f85e42aSJean-Baptiste Maneyrol 	unsigned int sleep_gyro = 0;
1067f85e42aSJean-Baptiste Maneyrol 	unsigned int sleep_temp = 0;
1077f85e42aSJean-Baptiste Maneyrol 	unsigned int sleep;
1087f85e42aSJean-Baptiste Maneyrol 	int ret;
1097f85e42aSJean-Baptiste Maneyrol 
1107f85e42aSJean-Baptiste Maneyrol 	mutex_lock(&st->lock);
1117f85e42aSJean-Baptiste Maneyrol 
1127f85e42aSJean-Baptiste Maneyrol 	if (*scan_mask & INV_ICM42600_SCAN_MASK_TEMP) {
1137f85e42aSJean-Baptiste Maneyrol 		/* enable temp sensor */
1147f85e42aSJean-Baptiste Maneyrol 		ret = inv_icm42600_set_temp_conf(st, true, &sleep_temp);
1157f85e42aSJean-Baptiste Maneyrol 		if (ret)
1167f85e42aSJean-Baptiste Maneyrol 			goto out_unlock;
1177f85e42aSJean-Baptiste Maneyrol 		fifo_en |= INV_ICM42600_SENSOR_TEMP;
1187f85e42aSJean-Baptiste Maneyrol 	}
1197f85e42aSJean-Baptiste Maneyrol 
1207f85e42aSJean-Baptiste Maneyrol 	if (*scan_mask & INV_ICM42600_SCAN_MASK_GYRO_3AXIS) {
1217f85e42aSJean-Baptiste Maneyrol 		/* enable gyro sensor */
1227f85e42aSJean-Baptiste Maneyrol 		conf.mode = INV_ICM42600_SENSOR_MODE_LOW_NOISE;
1237f85e42aSJean-Baptiste Maneyrol 		ret = inv_icm42600_set_gyro_conf(st, &conf, &sleep_gyro);
1247f85e42aSJean-Baptiste Maneyrol 		if (ret)
1257f85e42aSJean-Baptiste Maneyrol 			goto out_unlock;
1267f85e42aSJean-Baptiste Maneyrol 		fifo_en |= INV_ICM42600_SENSOR_GYRO;
1277f85e42aSJean-Baptiste Maneyrol 	}
1287f85e42aSJean-Baptiste Maneyrol 
1297f85e42aSJean-Baptiste Maneyrol 	/* update data FIFO write */
130ec74ae9fSJean-Baptiste Maneyrol 	inv_icm42600_timestamp_apply_odr(ts, 0, 0, 0);
1317f85e42aSJean-Baptiste Maneyrol 	ret = inv_icm42600_buffer_set_fifo_en(st, fifo_en | st->fifo.en);
1327f85e42aSJean-Baptiste Maneyrol 	if (ret)
1337f85e42aSJean-Baptiste Maneyrol 		goto out_unlock;
1347f85e42aSJean-Baptiste Maneyrol 
1357f85e42aSJean-Baptiste Maneyrol 	ret = inv_icm42600_buffer_update_watermark(st);
1367f85e42aSJean-Baptiste Maneyrol 
1377f85e42aSJean-Baptiste Maneyrol out_unlock:
1387f85e42aSJean-Baptiste Maneyrol 	mutex_unlock(&st->lock);
1397f85e42aSJean-Baptiste Maneyrol 	/* sleep maximum required time */
1407f85e42aSJean-Baptiste Maneyrol 	if (sleep_gyro > sleep_temp)
1417f85e42aSJean-Baptiste Maneyrol 		sleep = sleep_gyro;
1427f85e42aSJean-Baptiste Maneyrol 	else
1437f85e42aSJean-Baptiste Maneyrol 		sleep = sleep_temp;
1447f85e42aSJean-Baptiste Maneyrol 	if (sleep)
1457f85e42aSJean-Baptiste Maneyrol 		msleep(sleep);
1467f85e42aSJean-Baptiste Maneyrol 	return ret;
1477f85e42aSJean-Baptiste Maneyrol }
1487f85e42aSJean-Baptiste Maneyrol 
149a095fadbSJean-Baptiste Maneyrol static int inv_icm42600_gyro_read_sensor(struct inv_icm42600_state *st,
150a095fadbSJean-Baptiste Maneyrol 					 struct iio_chan_spec const *chan,
151a095fadbSJean-Baptiste Maneyrol 					 int16_t *val)
152a095fadbSJean-Baptiste Maneyrol {
153a095fadbSJean-Baptiste Maneyrol 	struct device *dev = regmap_get_device(st->map);
154a095fadbSJean-Baptiste Maneyrol 	struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
155a095fadbSJean-Baptiste Maneyrol 	unsigned int reg;
156a095fadbSJean-Baptiste Maneyrol 	__be16 *data;
157a095fadbSJean-Baptiste Maneyrol 	int ret;
158a095fadbSJean-Baptiste Maneyrol 
159a095fadbSJean-Baptiste Maneyrol 	if (chan->type != IIO_ANGL_VEL)
160a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
161a095fadbSJean-Baptiste Maneyrol 
162a095fadbSJean-Baptiste Maneyrol 	switch (chan->channel2) {
163a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_X:
164a095fadbSJean-Baptiste Maneyrol 		reg = INV_ICM42600_REG_GYRO_DATA_X;
165a095fadbSJean-Baptiste Maneyrol 		break;
166a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_Y:
167a095fadbSJean-Baptiste Maneyrol 		reg = INV_ICM42600_REG_GYRO_DATA_Y;
168a095fadbSJean-Baptiste Maneyrol 		break;
169a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_Z:
170a095fadbSJean-Baptiste Maneyrol 		reg = INV_ICM42600_REG_GYRO_DATA_Z;
171a095fadbSJean-Baptiste Maneyrol 		break;
172a095fadbSJean-Baptiste Maneyrol 	default:
173a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
174a095fadbSJean-Baptiste Maneyrol 	}
175a095fadbSJean-Baptiste Maneyrol 
176a095fadbSJean-Baptiste Maneyrol 	pm_runtime_get_sync(dev);
177a095fadbSJean-Baptiste Maneyrol 	mutex_lock(&st->lock);
178a095fadbSJean-Baptiste Maneyrol 
179a095fadbSJean-Baptiste Maneyrol 	/* enable gyro sensor */
180a095fadbSJean-Baptiste Maneyrol 	conf.mode = INV_ICM42600_SENSOR_MODE_LOW_NOISE;
181a095fadbSJean-Baptiste Maneyrol 	ret = inv_icm42600_set_gyro_conf(st, &conf, NULL);
182a095fadbSJean-Baptiste Maneyrol 	if (ret)
183a095fadbSJean-Baptiste Maneyrol 		goto exit;
184a095fadbSJean-Baptiste Maneyrol 
185a095fadbSJean-Baptiste Maneyrol 	/* read gyro register data */
186a095fadbSJean-Baptiste Maneyrol 	data = (__be16 *)&st->buffer[0];
187a095fadbSJean-Baptiste Maneyrol 	ret = regmap_bulk_read(st->map, reg, data, sizeof(*data));
188a095fadbSJean-Baptiste Maneyrol 	if (ret)
189a095fadbSJean-Baptiste Maneyrol 		goto exit;
190a095fadbSJean-Baptiste Maneyrol 
191a095fadbSJean-Baptiste Maneyrol 	*val = (int16_t)be16_to_cpup(data);
192a095fadbSJean-Baptiste Maneyrol 	if (*val == INV_ICM42600_DATA_INVALID)
193a095fadbSJean-Baptiste Maneyrol 		ret = -EINVAL;
194a095fadbSJean-Baptiste Maneyrol exit:
195a095fadbSJean-Baptiste Maneyrol 	mutex_unlock(&st->lock);
196a095fadbSJean-Baptiste Maneyrol 	pm_runtime_mark_last_busy(dev);
197a095fadbSJean-Baptiste Maneyrol 	pm_runtime_put_autosuspend(dev);
198a095fadbSJean-Baptiste Maneyrol 	return ret;
199a095fadbSJean-Baptiste Maneyrol }
200a095fadbSJean-Baptiste Maneyrol 
201a095fadbSJean-Baptiste Maneyrol /* IIO format int + nano */
202a095fadbSJean-Baptiste Maneyrol static const int inv_icm42600_gyro_scale[] = {
203a095fadbSJean-Baptiste Maneyrol 	/* +/- 2000dps => 0.001065264 rad/s */
204a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_2000DPS] = 0,
205a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_2000DPS + 1] = 1065264,
206a095fadbSJean-Baptiste Maneyrol 	/* +/- 1000dps => 0.000532632 rad/s */
207a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_1000DPS] = 0,
208a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_1000DPS + 1] = 532632,
209a095fadbSJean-Baptiste Maneyrol 	/* +/- 500dps => 0.000266316 rad/s */
210a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_500DPS] = 0,
211a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_500DPS + 1] = 266316,
212a095fadbSJean-Baptiste Maneyrol 	/* +/- 250dps => 0.000133158 rad/s */
213a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_250DPS] = 0,
214a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_250DPS + 1] = 133158,
215a095fadbSJean-Baptiste Maneyrol 	/* +/- 125dps => 0.000066579 rad/s */
216a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_125DPS] = 0,
217a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_125DPS + 1] = 66579,
218a095fadbSJean-Baptiste Maneyrol 	/* +/- 62.5dps => 0.000033290 rad/s */
219a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_62_5DPS] = 0,
220a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_62_5DPS + 1] = 33290,
221a095fadbSJean-Baptiste Maneyrol 	/* +/- 31.25dps => 0.000016645 rad/s */
222a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_31_25DPS] = 0,
223a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_31_25DPS + 1] = 16645,
224a095fadbSJean-Baptiste Maneyrol 	/* +/- 15.625dps => 0.000008322 rad/s */
225a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_15_625DPS] = 0,
226a095fadbSJean-Baptiste Maneyrol 	[2 * INV_ICM42600_GYRO_FS_15_625DPS + 1] = 8322,
227a095fadbSJean-Baptiste Maneyrol };
228a095fadbSJean-Baptiste Maneyrol 
229a095fadbSJean-Baptiste Maneyrol static int inv_icm42600_gyro_read_scale(struct inv_icm42600_state *st,
230a095fadbSJean-Baptiste Maneyrol 					int *val, int *val2)
231a095fadbSJean-Baptiste Maneyrol {
232a095fadbSJean-Baptiste Maneyrol 	unsigned int idx;
233a095fadbSJean-Baptiste Maneyrol 
234a095fadbSJean-Baptiste Maneyrol 	idx = st->conf.gyro.fs;
235a095fadbSJean-Baptiste Maneyrol 
236a095fadbSJean-Baptiste Maneyrol 	*val = inv_icm42600_gyro_scale[2 * idx];
237a095fadbSJean-Baptiste Maneyrol 	*val2 = inv_icm42600_gyro_scale[2 * idx + 1];
238a095fadbSJean-Baptiste Maneyrol 	return IIO_VAL_INT_PLUS_NANO;
239a095fadbSJean-Baptiste Maneyrol }
240a095fadbSJean-Baptiste Maneyrol 
241a095fadbSJean-Baptiste Maneyrol static int inv_icm42600_gyro_write_scale(struct inv_icm42600_state *st,
242a095fadbSJean-Baptiste Maneyrol 					 int val, int val2)
243a095fadbSJean-Baptiste Maneyrol {
244a095fadbSJean-Baptiste Maneyrol 	struct device *dev = regmap_get_device(st->map);
245a095fadbSJean-Baptiste Maneyrol 	unsigned int idx;
246a095fadbSJean-Baptiste Maneyrol 	struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
247a095fadbSJean-Baptiste Maneyrol 	int ret;
248a095fadbSJean-Baptiste Maneyrol 
249a095fadbSJean-Baptiste Maneyrol 	for (idx = 0; idx < ARRAY_SIZE(inv_icm42600_gyro_scale); idx += 2) {
250a095fadbSJean-Baptiste Maneyrol 		if (val == inv_icm42600_gyro_scale[idx] &&
251a095fadbSJean-Baptiste Maneyrol 		    val2 == inv_icm42600_gyro_scale[idx + 1])
252a095fadbSJean-Baptiste Maneyrol 			break;
253a095fadbSJean-Baptiste Maneyrol 	}
254a095fadbSJean-Baptiste Maneyrol 	if (idx >= ARRAY_SIZE(inv_icm42600_gyro_scale))
255a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
256a095fadbSJean-Baptiste Maneyrol 
257a095fadbSJean-Baptiste Maneyrol 	conf.fs = idx / 2;
258a095fadbSJean-Baptiste Maneyrol 
259a095fadbSJean-Baptiste Maneyrol 	pm_runtime_get_sync(dev);
260a095fadbSJean-Baptiste Maneyrol 	mutex_lock(&st->lock);
261a095fadbSJean-Baptiste Maneyrol 
262a095fadbSJean-Baptiste Maneyrol 	ret = inv_icm42600_set_gyro_conf(st, &conf, NULL);
263a095fadbSJean-Baptiste Maneyrol 
264a095fadbSJean-Baptiste Maneyrol 	mutex_unlock(&st->lock);
265a095fadbSJean-Baptiste Maneyrol 	pm_runtime_mark_last_busy(dev);
266a095fadbSJean-Baptiste Maneyrol 	pm_runtime_put_autosuspend(dev);
267a095fadbSJean-Baptiste Maneyrol 
268a095fadbSJean-Baptiste Maneyrol 	return ret;
269a095fadbSJean-Baptiste Maneyrol }
270a095fadbSJean-Baptiste Maneyrol 
271a095fadbSJean-Baptiste Maneyrol /* IIO format int + micro */
272a095fadbSJean-Baptiste Maneyrol static const int inv_icm42600_gyro_odr[] = {
273a095fadbSJean-Baptiste Maneyrol 	/* 12.5Hz */
274a095fadbSJean-Baptiste Maneyrol 	12, 500000,
275a095fadbSJean-Baptiste Maneyrol 	/* 25Hz */
276a095fadbSJean-Baptiste Maneyrol 	25, 0,
277a095fadbSJean-Baptiste Maneyrol 	/* 50Hz */
278a095fadbSJean-Baptiste Maneyrol 	50, 0,
279a095fadbSJean-Baptiste Maneyrol 	/* 100Hz */
280a095fadbSJean-Baptiste Maneyrol 	100, 0,
281a095fadbSJean-Baptiste Maneyrol 	/* 200Hz */
282a095fadbSJean-Baptiste Maneyrol 	200, 0,
283a095fadbSJean-Baptiste Maneyrol 	/* 1kHz */
284a095fadbSJean-Baptiste Maneyrol 	1000, 0,
285a095fadbSJean-Baptiste Maneyrol 	/* 2kHz */
286a095fadbSJean-Baptiste Maneyrol 	2000, 0,
287a095fadbSJean-Baptiste Maneyrol 	/* 4kHz */
288a095fadbSJean-Baptiste Maneyrol 	4000, 0,
289a095fadbSJean-Baptiste Maneyrol };
290a095fadbSJean-Baptiste Maneyrol 
291a095fadbSJean-Baptiste Maneyrol static const int inv_icm42600_gyro_odr_conv[] = {
292a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_ODR_12_5HZ,
293a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_ODR_25HZ,
294a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_ODR_50HZ,
295a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_ODR_100HZ,
296a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_ODR_200HZ,
297a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_ODR_1KHZ_LN,
298a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_ODR_2KHZ_LN,
299a095fadbSJean-Baptiste Maneyrol 	INV_ICM42600_ODR_4KHZ_LN,
300a095fadbSJean-Baptiste Maneyrol };
301a095fadbSJean-Baptiste Maneyrol 
302a095fadbSJean-Baptiste Maneyrol static int inv_icm42600_gyro_read_odr(struct inv_icm42600_state *st,
303a095fadbSJean-Baptiste Maneyrol 				      int *val, int *val2)
304a095fadbSJean-Baptiste Maneyrol {
305a095fadbSJean-Baptiste Maneyrol 	unsigned int odr;
306a095fadbSJean-Baptiste Maneyrol 	unsigned int i;
307a095fadbSJean-Baptiste Maneyrol 
308a095fadbSJean-Baptiste Maneyrol 	odr = st->conf.gyro.odr;
309a095fadbSJean-Baptiste Maneyrol 
310a095fadbSJean-Baptiste Maneyrol 	for (i = 0; i < ARRAY_SIZE(inv_icm42600_gyro_odr_conv); ++i) {
311a095fadbSJean-Baptiste Maneyrol 		if (inv_icm42600_gyro_odr_conv[i] == odr)
312a095fadbSJean-Baptiste Maneyrol 			break;
313a095fadbSJean-Baptiste Maneyrol 	}
314a095fadbSJean-Baptiste Maneyrol 	if (i >= ARRAY_SIZE(inv_icm42600_gyro_odr_conv))
315a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
316a095fadbSJean-Baptiste Maneyrol 
317a095fadbSJean-Baptiste Maneyrol 	*val = inv_icm42600_gyro_odr[2 * i];
318a095fadbSJean-Baptiste Maneyrol 	*val2 = inv_icm42600_gyro_odr[2 * i + 1];
319a095fadbSJean-Baptiste Maneyrol 
320a095fadbSJean-Baptiste Maneyrol 	return IIO_VAL_INT_PLUS_MICRO;
321a095fadbSJean-Baptiste Maneyrol }
322a095fadbSJean-Baptiste Maneyrol 
323ec74ae9fSJean-Baptiste Maneyrol static int inv_icm42600_gyro_write_odr(struct iio_dev *indio_dev,
324a095fadbSJean-Baptiste Maneyrol 				       int val, int val2)
325a095fadbSJean-Baptiste Maneyrol {
326ec74ae9fSJean-Baptiste Maneyrol 	struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
327ec74ae9fSJean-Baptiste Maneyrol 	struct inv_icm42600_timestamp *ts = iio_priv(indio_dev);
328a095fadbSJean-Baptiste Maneyrol 	struct device *dev = regmap_get_device(st->map);
329a095fadbSJean-Baptiste Maneyrol 	unsigned int idx;
330a095fadbSJean-Baptiste Maneyrol 	struct inv_icm42600_sensor_conf conf = INV_ICM42600_SENSOR_CONF_INIT;
331a095fadbSJean-Baptiste Maneyrol 	int ret;
332a095fadbSJean-Baptiste Maneyrol 
333a095fadbSJean-Baptiste Maneyrol 	for (idx = 0; idx < ARRAY_SIZE(inv_icm42600_gyro_odr); idx += 2) {
334a095fadbSJean-Baptiste Maneyrol 		if (val == inv_icm42600_gyro_odr[idx] &&
335a095fadbSJean-Baptiste Maneyrol 		    val2 == inv_icm42600_gyro_odr[idx + 1])
336a095fadbSJean-Baptiste Maneyrol 			break;
337a095fadbSJean-Baptiste Maneyrol 	}
338a095fadbSJean-Baptiste Maneyrol 	if (idx >= ARRAY_SIZE(inv_icm42600_gyro_odr))
339a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
340a095fadbSJean-Baptiste Maneyrol 
341a095fadbSJean-Baptiste Maneyrol 	conf.odr = inv_icm42600_gyro_odr_conv[idx / 2];
342a095fadbSJean-Baptiste Maneyrol 
343a095fadbSJean-Baptiste Maneyrol 	pm_runtime_get_sync(dev);
344a095fadbSJean-Baptiste Maneyrol 	mutex_lock(&st->lock);
345a095fadbSJean-Baptiste Maneyrol 
346ec74ae9fSJean-Baptiste Maneyrol 	ret = inv_icm42600_timestamp_update_odr(ts, inv_icm42600_odr_to_period(conf.odr),
347ec74ae9fSJean-Baptiste Maneyrol 						iio_buffer_enabled(indio_dev));
348ec74ae9fSJean-Baptiste Maneyrol 	if (ret)
349ec74ae9fSJean-Baptiste Maneyrol 		goto out_unlock;
350ec74ae9fSJean-Baptiste Maneyrol 
351a095fadbSJean-Baptiste Maneyrol 	ret = inv_icm42600_set_gyro_conf(st, &conf, NULL);
3527f85e42aSJean-Baptiste Maneyrol 	if (ret)
3537f85e42aSJean-Baptiste Maneyrol 		goto out_unlock;
3547f85e42aSJean-Baptiste Maneyrol 	inv_icm42600_buffer_update_fifo_period(st);
3557f85e42aSJean-Baptiste Maneyrol 	inv_icm42600_buffer_update_watermark(st);
356a095fadbSJean-Baptiste Maneyrol 
3577f85e42aSJean-Baptiste Maneyrol out_unlock:
358a095fadbSJean-Baptiste Maneyrol 	mutex_unlock(&st->lock);
359a095fadbSJean-Baptiste Maneyrol 	pm_runtime_mark_last_busy(dev);
360a095fadbSJean-Baptiste Maneyrol 	pm_runtime_put_autosuspend(dev);
361a095fadbSJean-Baptiste Maneyrol 
362a095fadbSJean-Baptiste Maneyrol 	return ret;
363a095fadbSJean-Baptiste Maneyrol }
364a095fadbSJean-Baptiste Maneyrol 
365a095fadbSJean-Baptiste Maneyrol /*
366a095fadbSJean-Baptiste Maneyrol  * Calibration bias values, IIO range format int + nano.
367a095fadbSJean-Baptiste Maneyrol  * Value is limited to +/-64dps coded on 12 bits signed. Step is 1/32 dps.
368a095fadbSJean-Baptiste Maneyrol  */
369a095fadbSJean-Baptiste Maneyrol static int inv_icm42600_gyro_calibbias[] = {
370a095fadbSJean-Baptiste Maneyrol 	-1, 117010721,		/* min: -1.117010721 rad/s */
371a095fadbSJean-Baptiste Maneyrol 	0, 545415,		/* step: 0.000545415 rad/s */
372a095fadbSJean-Baptiste Maneyrol 	1, 116465306,		/* max: 1.116465306 rad/s */
373a095fadbSJean-Baptiste Maneyrol };
374a095fadbSJean-Baptiste Maneyrol 
375a095fadbSJean-Baptiste Maneyrol static int inv_icm42600_gyro_read_offset(struct inv_icm42600_state *st,
376a095fadbSJean-Baptiste Maneyrol 					 struct iio_chan_spec const *chan,
377a095fadbSJean-Baptiste Maneyrol 					 int *val, int *val2)
378a095fadbSJean-Baptiste Maneyrol {
379a095fadbSJean-Baptiste Maneyrol 	struct device *dev = regmap_get_device(st->map);
380a095fadbSJean-Baptiste Maneyrol 	int64_t val64;
381a095fadbSJean-Baptiste Maneyrol 	int32_t bias;
382a095fadbSJean-Baptiste Maneyrol 	unsigned int reg;
383a095fadbSJean-Baptiste Maneyrol 	int16_t offset;
384a095fadbSJean-Baptiste Maneyrol 	uint8_t data[2];
385a095fadbSJean-Baptiste Maneyrol 	int ret;
386a095fadbSJean-Baptiste Maneyrol 
387a095fadbSJean-Baptiste Maneyrol 	if (chan->type != IIO_ANGL_VEL)
388a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
389a095fadbSJean-Baptiste Maneyrol 
390a095fadbSJean-Baptiste Maneyrol 	switch (chan->channel2) {
391a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_X:
392a095fadbSJean-Baptiste Maneyrol 		reg = INV_ICM42600_REG_OFFSET_USER0;
393a095fadbSJean-Baptiste Maneyrol 		break;
394a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_Y:
395a095fadbSJean-Baptiste Maneyrol 		reg = INV_ICM42600_REG_OFFSET_USER1;
396a095fadbSJean-Baptiste Maneyrol 		break;
397a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_Z:
398a095fadbSJean-Baptiste Maneyrol 		reg = INV_ICM42600_REG_OFFSET_USER3;
399a095fadbSJean-Baptiste Maneyrol 		break;
400a095fadbSJean-Baptiste Maneyrol 	default:
401a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
402a095fadbSJean-Baptiste Maneyrol 	}
403a095fadbSJean-Baptiste Maneyrol 
404a095fadbSJean-Baptiste Maneyrol 	pm_runtime_get_sync(dev);
405a095fadbSJean-Baptiste Maneyrol 	mutex_lock(&st->lock);
406a095fadbSJean-Baptiste Maneyrol 
407a095fadbSJean-Baptiste Maneyrol 	ret = regmap_bulk_read(st->map, reg, st->buffer, sizeof(data));
408a095fadbSJean-Baptiste Maneyrol 	memcpy(data, st->buffer, sizeof(data));
409a095fadbSJean-Baptiste Maneyrol 
410a095fadbSJean-Baptiste Maneyrol 	mutex_unlock(&st->lock);
411a095fadbSJean-Baptiste Maneyrol 	pm_runtime_mark_last_busy(dev);
412a095fadbSJean-Baptiste Maneyrol 	pm_runtime_put_autosuspend(dev);
413a095fadbSJean-Baptiste Maneyrol 	if (ret)
414a095fadbSJean-Baptiste Maneyrol 		return ret;
415a095fadbSJean-Baptiste Maneyrol 
416a095fadbSJean-Baptiste Maneyrol 	/* 12 bits signed value */
417a095fadbSJean-Baptiste Maneyrol 	switch (chan->channel2) {
418a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_X:
419a095fadbSJean-Baptiste Maneyrol 		offset = sign_extend32(((data[1] & 0x0F) << 8) | data[0], 11);
420a095fadbSJean-Baptiste Maneyrol 		break;
421a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_Y:
422a095fadbSJean-Baptiste Maneyrol 		offset = sign_extend32(((data[0] & 0xF0) << 4) | data[1], 11);
423a095fadbSJean-Baptiste Maneyrol 		break;
424a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_Z:
425a095fadbSJean-Baptiste Maneyrol 		offset = sign_extend32(((data[1] & 0x0F) << 8) | data[0], 11);
426a095fadbSJean-Baptiste Maneyrol 		break;
427a095fadbSJean-Baptiste Maneyrol 	default:
428a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
429a095fadbSJean-Baptiste Maneyrol 	}
430a095fadbSJean-Baptiste Maneyrol 
431a095fadbSJean-Baptiste Maneyrol 	/*
432a095fadbSJean-Baptiste Maneyrol 	 * convert raw offset to dps then to rad/s
433a095fadbSJean-Baptiste Maneyrol 	 * 12 bits signed raw max 64 to dps: 64 / 2048
434a095fadbSJean-Baptiste Maneyrol 	 * dps to rad: Pi / 180
435a095fadbSJean-Baptiste Maneyrol 	 * result in nano (1000000000)
436a095fadbSJean-Baptiste Maneyrol 	 * (offset * 64 * Pi * 1000000000) / (2048 * 180)
437a095fadbSJean-Baptiste Maneyrol 	 */
438a095fadbSJean-Baptiste Maneyrol 	val64 = (int64_t)offset * 64LL * 3141592653LL;
439a095fadbSJean-Baptiste Maneyrol 	/* for rounding, add + or - divisor (2048 * 180) divided by 2 */
440a095fadbSJean-Baptiste Maneyrol 	if (val64 >= 0)
441a095fadbSJean-Baptiste Maneyrol 		val64 += 2048 * 180 / 2;
442a095fadbSJean-Baptiste Maneyrol 	else
443a095fadbSJean-Baptiste Maneyrol 		val64 -= 2048 * 180 / 2;
444a095fadbSJean-Baptiste Maneyrol 	bias = div_s64(val64, 2048 * 180);
445a095fadbSJean-Baptiste Maneyrol 	*val = bias / 1000000000L;
446a095fadbSJean-Baptiste Maneyrol 	*val2 = bias % 1000000000L;
447a095fadbSJean-Baptiste Maneyrol 
448a095fadbSJean-Baptiste Maneyrol 	return IIO_VAL_INT_PLUS_NANO;
449a095fadbSJean-Baptiste Maneyrol }
450a095fadbSJean-Baptiste Maneyrol 
451a095fadbSJean-Baptiste Maneyrol static int inv_icm42600_gyro_write_offset(struct inv_icm42600_state *st,
452a095fadbSJean-Baptiste Maneyrol 					  struct iio_chan_spec const *chan,
453a095fadbSJean-Baptiste Maneyrol 					  int val, int val2)
454a095fadbSJean-Baptiste Maneyrol {
455a095fadbSJean-Baptiste Maneyrol 	struct device *dev = regmap_get_device(st->map);
456a095fadbSJean-Baptiste Maneyrol 	int64_t val64, min, max;
457a095fadbSJean-Baptiste Maneyrol 	unsigned int reg, regval;
458a095fadbSJean-Baptiste Maneyrol 	int16_t offset;
459a095fadbSJean-Baptiste Maneyrol 	int ret;
460a095fadbSJean-Baptiste Maneyrol 
461a095fadbSJean-Baptiste Maneyrol 	if (chan->type != IIO_ANGL_VEL)
462a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
463a095fadbSJean-Baptiste Maneyrol 
464a095fadbSJean-Baptiste Maneyrol 	switch (chan->channel2) {
465a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_X:
466a095fadbSJean-Baptiste Maneyrol 		reg = INV_ICM42600_REG_OFFSET_USER0;
467a095fadbSJean-Baptiste Maneyrol 		break;
468a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_Y:
469a095fadbSJean-Baptiste Maneyrol 		reg = INV_ICM42600_REG_OFFSET_USER1;
470a095fadbSJean-Baptiste Maneyrol 		break;
471a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_Z:
472a095fadbSJean-Baptiste Maneyrol 		reg = INV_ICM42600_REG_OFFSET_USER3;
473a095fadbSJean-Baptiste Maneyrol 		break;
474a095fadbSJean-Baptiste Maneyrol 	default:
475a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
476a095fadbSJean-Baptiste Maneyrol 	}
477a095fadbSJean-Baptiste Maneyrol 
478a095fadbSJean-Baptiste Maneyrol 	/* inv_icm42600_gyro_calibbias: min - step - max in nano */
479a095fadbSJean-Baptiste Maneyrol 	min = (int64_t)inv_icm42600_gyro_calibbias[0] * 1000000000LL +
480a095fadbSJean-Baptiste Maneyrol 	      (int64_t)inv_icm42600_gyro_calibbias[1];
481a095fadbSJean-Baptiste Maneyrol 	max = (int64_t)inv_icm42600_gyro_calibbias[4] * 1000000000LL +
482a095fadbSJean-Baptiste Maneyrol 	      (int64_t)inv_icm42600_gyro_calibbias[5];
483a095fadbSJean-Baptiste Maneyrol 	val64 = (int64_t)val * 1000000000LL + (int64_t)val2;
484a095fadbSJean-Baptiste Maneyrol 	if (val64 < min || val64 > max)
485a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
486a095fadbSJean-Baptiste Maneyrol 
487a095fadbSJean-Baptiste Maneyrol 	/*
488a095fadbSJean-Baptiste Maneyrol 	 * convert rad/s to dps then to raw value
489a095fadbSJean-Baptiste Maneyrol 	 * rad to dps: 180 / Pi
490a095fadbSJean-Baptiste Maneyrol 	 * dps to raw 12 bits signed, max 64: 2048 / 64
491a095fadbSJean-Baptiste Maneyrol 	 * val in nano (1000000000)
492a095fadbSJean-Baptiste Maneyrol 	 * val * 180 * 2048 / (Pi * 1000000000 * 64)
493a095fadbSJean-Baptiste Maneyrol 	 */
494a095fadbSJean-Baptiste Maneyrol 	val64 = val64 * 180LL * 2048LL;
495a095fadbSJean-Baptiste Maneyrol 	/* for rounding, add + or - divisor (3141592653 * 64) divided by 2 */
496a095fadbSJean-Baptiste Maneyrol 	if (val64 >= 0)
497a095fadbSJean-Baptiste Maneyrol 		val64 += 3141592653LL * 64LL / 2LL;
498a095fadbSJean-Baptiste Maneyrol 	else
499a095fadbSJean-Baptiste Maneyrol 		val64 -= 3141592653LL * 64LL / 2LL;
500a095fadbSJean-Baptiste Maneyrol 	offset = div64_s64(val64, 3141592653LL * 64LL);
501a095fadbSJean-Baptiste Maneyrol 
502a095fadbSJean-Baptiste Maneyrol 	/* clamp value limited to 12 bits signed */
503a095fadbSJean-Baptiste Maneyrol 	if (offset < -2048)
504a095fadbSJean-Baptiste Maneyrol 		offset = -2048;
505a095fadbSJean-Baptiste Maneyrol 	else if (offset > 2047)
506a095fadbSJean-Baptiste Maneyrol 		offset = 2047;
507a095fadbSJean-Baptiste Maneyrol 
508a095fadbSJean-Baptiste Maneyrol 	pm_runtime_get_sync(dev);
509a095fadbSJean-Baptiste Maneyrol 	mutex_lock(&st->lock);
510a095fadbSJean-Baptiste Maneyrol 
511a095fadbSJean-Baptiste Maneyrol 	switch (chan->channel2) {
512a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_X:
513a095fadbSJean-Baptiste Maneyrol 		/* OFFSET_USER1 register is shared */
514a095fadbSJean-Baptiste Maneyrol 		ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER1,
515a095fadbSJean-Baptiste Maneyrol 				  &regval);
516a095fadbSJean-Baptiste Maneyrol 		if (ret)
517a095fadbSJean-Baptiste Maneyrol 			goto out_unlock;
518a095fadbSJean-Baptiste Maneyrol 		st->buffer[0] = offset & 0xFF;
519a095fadbSJean-Baptiste Maneyrol 		st->buffer[1] = (regval & 0xF0) | ((offset & 0xF00) >> 8);
520a095fadbSJean-Baptiste Maneyrol 		break;
521a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_Y:
522a095fadbSJean-Baptiste Maneyrol 		/* OFFSET_USER1 register is shared */
523a095fadbSJean-Baptiste Maneyrol 		ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER1,
524a095fadbSJean-Baptiste Maneyrol 				  &regval);
525a095fadbSJean-Baptiste Maneyrol 		if (ret)
526a095fadbSJean-Baptiste Maneyrol 			goto out_unlock;
527a095fadbSJean-Baptiste Maneyrol 		st->buffer[0] = ((offset & 0xF00) >> 4) | (regval & 0x0F);
528a095fadbSJean-Baptiste Maneyrol 		st->buffer[1] = offset & 0xFF;
529a095fadbSJean-Baptiste Maneyrol 		break;
530a095fadbSJean-Baptiste Maneyrol 	case IIO_MOD_Z:
531a095fadbSJean-Baptiste Maneyrol 		/* OFFSET_USER4 register is shared */
532a095fadbSJean-Baptiste Maneyrol 		ret = regmap_read(st->map, INV_ICM42600_REG_OFFSET_USER4,
533a095fadbSJean-Baptiste Maneyrol 				  &regval);
534a095fadbSJean-Baptiste Maneyrol 		if (ret)
535a095fadbSJean-Baptiste Maneyrol 			goto out_unlock;
536a095fadbSJean-Baptiste Maneyrol 		st->buffer[0] = offset & 0xFF;
537a095fadbSJean-Baptiste Maneyrol 		st->buffer[1] = (regval & 0xF0) | ((offset & 0xF00) >> 8);
538a095fadbSJean-Baptiste Maneyrol 		break;
539a095fadbSJean-Baptiste Maneyrol 	default:
540a095fadbSJean-Baptiste Maneyrol 		ret = -EINVAL;
541a095fadbSJean-Baptiste Maneyrol 		goto out_unlock;
542a095fadbSJean-Baptiste Maneyrol 	}
543a095fadbSJean-Baptiste Maneyrol 
544a095fadbSJean-Baptiste Maneyrol 	ret = regmap_bulk_write(st->map, reg, st->buffer, 2);
545a095fadbSJean-Baptiste Maneyrol 
546a095fadbSJean-Baptiste Maneyrol out_unlock:
547a095fadbSJean-Baptiste Maneyrol 	mutex_unlock(&st->lock);
548a095fadbSJean-Baptiste Maneyrol 	pm_runtime_mark_last_busy(dev);
549a095fadbSJean-Baptiste Maneyrol 	pm_runtime_put_autosuspend(dev);
550a095fadbSJean-Baptiste Maneyrol 	return ret;
551a095fadbSJean-Baptiste Maneyrol }
552a095fadbSJean-Baptiste Maneyrol 
553a095fadbSJean-Baptiste Maneyrol static int inv_icm42600_gyro_read_raw(struct iio_dev *indio_dev,
554a095fadbSJean-Baptiste Maneyrol 				      struct iio_chan_spec const *chan,
555a095fadbSJean-Baptiste Maneyrol 				      int *val, int *val2, long mask)
556a095fadbSJean-Baptiste Maneyrol {
557a095fadbSJean-Baptiste Maneyrol 	struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
558a095fadbSJean-Baptiste Maneyrol 	int16_t data;
559a095fadbSJean-Baptiste Maneyrol 	int ret;
560a095fadbSJean-Baptiste Maneyrol 
561bc3eb020SJean-Baptiste Maneyrol 	switch (chan->type) {
562bc3eb020SJean-Baptiste Maneyrol 	case IIO_ANGL_VEL:
563bc3eb020SJean-Baptiste Maneyrol 		break;
564bc3eb020SJean-Baptiste Maneyrol 	case IIO_TEMP:
565bc3eb020SJean-Baptiste Maneyrol 		return inv_icm42600_temp_read_raw(indio_dev, chan, val, val2, mask);
566bc3eb020SJean-Baptiste Maneyrol 	default:
567a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
568bc3eb020SJean-Baptiste Maneyrol 	}
569a095fadbSJean-Baptiste Maneyrol 
570a095fadbSJean-Baptiste Maneyrol 	switch (mask) {
571a095fadbSJean-Baptiste Maneyrol 	case IIO_CHAN_INFO_RAW:
572a095fadbSJean-Baptiste Maneyrol 		ret = iio_device_claim_direct_mode(indio_dev);
573a095fadbSJean-Baptiste Maneyrol 		if (ret)
574a095fadbSJean-Baptiste Maneyrol 			return ret;
575a095fadbSJean-Baptiste Maneyrol 		ret = inv_icm42600_gyro_read_sensor(st, chan, &data);
576a095fadbSJean-Baptiste Maneyrol 		iio_device_release_direct_mode(indio_dev);
577a095fadbSJean-Baptiste Maneyrol 		if (ret)
578a095fadbSJean-Baptiste Maneyrol 			return ret;
579a095fadbSJean-Baptiste Maneyrol 		*val = data;
580a095fadbSJean-Baptiste Maneyrol 		return IIO_VAL_INT;
581a095fadbSJean-Baptiste Maneyrol 	case IIO_CHAN_INFO_SCALE:
582a095fadbSJean-Baptiste Maneyrol 		return inv_icm42600_gyro_read_scale(st, val, val2);
583a095fadbSJean-Baptiste Maneyrol 	case IIO_CHAN_INFO_SAMP_FREQ:
584a095fadbSJean-Baptiste Maneyrol 		return inv_icm42600_gyro_read_odr(st, val, val2);
585a095fadbSJean-Baptiste Maneyrol 	case IIO_CHAN_INFO_CALIBBIAS:
586a095fadbSJean-Baptiste Maneyrol 		return inv_icm42600_gyro_read_offset(st, chan, val, val2);
587a095fadbSJean-Baptiste Maneyrol 	default:
588a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
589a095fadbSJean-Baptiste Maneyrol 	}
590a095fadbSJean-Baptiste Maneyrol }
591a095fadbSJean-Baptiste Maneyrol 
592a095fadbSJean-Baptiste Maneyrol static int inv_icm42600_gyro_read_avail(struct iio_dev *indio_dev,
593a095fadbSJean-Baptiste Maneyrol 					struct iio_chan_spec const *chan,
594a095fadbSJean-Baptiste Maneyrol 					const int **vals,
595a095fadbSJean-Baptiste Maneyrol 					int *type, int *length, long mask)
596a095fadbSJean-Baptiste Maneyrol {
597a095fadbSJean-Baptiste Maneyrol 	if (chan->type != IIO_ANGL_VEL)
598a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
599a095fadbSJean-Baptiste Maneyrol 
600a095fadbSJean-Baptiste Maneyrol 	switch (mask) {
601a095fadbSJean-Baptiste Maneyrol 	case IIO_CHAN_INFO_SCALE:
602a095fadbSJean-Baptiste Maneyrol 		*vals = inv_icm42600_gyro_scale;
603a095fadbSJean-Baptiste Maneyrol 		*type = IIO_VAL_INT_PLUS_NANO;
604a095fadbSJean-Baptiste Maneyrol 		*length = ARRAY_SIZE(inv_icm42600_gyro_scale);
605a095fadbSJean-Baptiste Maneyrol 		return IIO_AVAIL_LIST;
606a095fadbSJean-Baptiste Maneyrol 	case IIO_CHAN_INFO_SAMP_FREQ:
607a095fadbSJean-Baptiste Maneyrol 		*vals = inv_icm42600_gyro_odr;
608a095fadbSJean-Baptiste Maneyrol 		*type = IIO_VAL_INT_PLUS_MICRO;
609a095fadbSJean-Baptiste Maneyrol 		*length = ARRAY_SIZE(inv_icm42600_gyro_odr);
610a095fadbSJean-Baptiste Maneyrol 		return IIO_AVAIL_LIST;
611a095fadbSJean-Baptiste Maneyrol 	case IIO_CHAN_INFO_CALIBBIAS:
612a095fadbSJean-Baptiste Maneyrol 		*vals = inv_icm42600_gyro_calibbias;
613a095fadbSJean-Baptiste Maneyrol 		*type = IIO_VAL_INT_PLUS_NANO;
614a095fadbSJean-Baptiste Maneyrol 		return IIO_AVAIL_RANGE;
615a095fadbSJean-Baptiste Maneyrol 	default:
616a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
617a095fadbSJean-Baptiste Maneyrol 	}
618a095fadbSJean-Baptiste Maneyrol }
619a095fadbSJean-Baptiste Maneyrol 
620a095fadbSJean-Baptiste Maneyrol static int inv_icm42600_gyro_write_raw(struct iio_dev *indio_dev,
621a095fadbSJean-Baptiste Maneyrol 				       struct iio_chan_spec const *chan,
622a095fadbSJean-Baptiste Maneyrol 				       int val, int val2, long mask)
623a095fadbSJean-Baptiste Maneyrol {
624a095fadbSJean-Baptiste Maneyrol 	struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
625a095fadbSJean-Baptiste Maneyrol 	int ret;
626a095fadbSJean-Baptiste Maneyrol 
627a095fadbSJean-Baptiste Maneyrol 	if (chan->type != IIO_ANGL_VEL)
628a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
629a095fadbSJean-Baptiste Maneyrol 
630a095fadbSJean-Baptiste Maneyrol 	switch (mask) {
631a095fadbSJean-Baptiste Maneyrol 	case IIO_CHAN_INFO_SCALE:
632a095fadbSJean-Baptiste Maneyrol 		ret = iio_device_claim_direct_mode(indio_dev);
633a095fadbSJean-Baptiste Maneyrol 		if (ret)
634a095fadbSJean-Baptiste Maneyrol 			return ret;
635a095fadbSJean-Baptiste Maneyrol 		ret = inv_icm42600_gyro_write_scale(st, val, val2);
636a095fadbSJean-Baptiste Maneyrol 		iio_device_release_direct_mode(indio_dev);
637a095fadbSJean-Baptiste Maneyrol 		return ret;
638a095fadbSJean-Baptiste Maneyrol 	case IIO_CHAN_INFO_SAMP_FREQ:
639ec74ae9fSJean-Baptiste Maneyrol 		return inv_icm42600_gyro_write_odr(indio_dev, val, val2);
640a095fadbSJean-Baptiste Maneyrol 	case IIO_CHAN_INFO_CALIBBIAS:
641a095fadbSJean-Baptiste Maneyrol 		ret = iio_device_claim_direct_mode(indio_dev);
642a095fadbSJean-Baptiste Maneyrol 		if (ret)
643a095fadbSJean-Baptiste Maneyrol 			return ret;
644a095fadbSJean-Baptiste Maneyrol 		ret = inv_icm42600_gyro_write_offset(st, chan, val, val2);
645a095fadbSJean-Baptiste Maneyrol 		iio_device_release_direct_mode(indio_dev);
646a095fadbSJean-Baptiste Maneyrol 		return ret;
647a095fadbSJean-Baptiste Maneyrol 	default:
648a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
649a095fadbSJean-Baptiste Maneyrol 	}
650a095fadbSJean-Baptiste Maneyrol }
651a095fadbSJean-Baptiste Maneyrol 
652a095fadbSJean-Baptiste Maneyrol static int inv_icm42600_gyro_write_raw_get_fmt(struct iio_dev *indio_dev,
653a095fadbSJean-Baptiste Maneyrol 					       struct iio_chan_spec const *chan,
654a095fadbSJean-Baptiste Maneyrol 					       long mask)
655a095fadbSJean-Baptiste Maneyrol {
656a095fadbSJean-Baptiste Maneyrol 	if (chan->type != IIO_ANGL_VEL)
657a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
658a095fadbSJean-Baptiste Maneyrol 
659a095fadbSJean-Baptiste Maneyrol 	switch (mask) {
660a095fadbSJean-Baptiste Maneyrol 	case IIO_CHAN_INFO_SCALE:
661a095fadbSJean-Baptiste Maneyrol 		return IIO_VAL_INT_PLUS_NANO;
662a095fadbSJean-Baptiste Maneyrol 	case IIO_CHAN_INFO_SAMP_FREQ:
663a095fadbSJean-Baptiste Maneyrol 		return IIO_VAL_INT_PLUS_MICRO;
664a095fadbSJean-Baptiste Maneyrol 	case IIO_CHAN_INFO_CALIBBIAS:
665a095fadbSJean-Baptiste Maneyrol 		return IIO_VAL_INT_PLUS_NANO;
666a095fadbSJean-Baptiste Maneyrol 	default:
667a095fadbSJean-Baptiste Maneyrol 		return -EINVAL;
668a095fadbSJean-Baptiste Maneyrol 	}
669a095fadbSJean-Baptiste Maneyrol }
670a095fadbSJean-Baptiste Maneyrol 
6717f85e42aSJean-Baptiste Maneyrol static int inv_icm42600_gyro_hwfifo_set_watermark(struct iio_dev *indio_dev,
6727f85e42aSJean-Baptiste Maneyrol 						  unsigned int val)
6737f85e42aSJean-Baptiste Maneyrol {
6747f85e42aSJean-Baptiste Maneyrol 	struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
6757f85e42aSJean-Baptiste Maneyrol 	int ret;
6767f85e42aSJean-Baptiste Maneyrol 
6777f85e42aSJean-Baptiste Maneyrol 	mutex_lock(&st->lock);
6787f85e42aSJean-Baptiste Maneyrol 
6797f85e42aSJean-Baptiste Maneyrol 	st->fifo.watermark.gyro = val;
6807f85e42aSJean-Baptiste Maneyrol 	ret = inv_icm42600_buffer_update_watermark(st);
6817f85e42aSJean-Baptiste Maneyrol 
6827f85e42aSJean-Baptiste Maneyrol 	mutex_unlock(&st->lock);
6837f85e42aSJean-Baptiste Maneyrol 
6847f85e42aSJean-Baptiste Maneyrol 	return ret;
6857f85e42aSJean-Baptiste Maneyrol }
6867f85e42aSJean-Baptiste Maneyrol 
6877f85e42aSJean-Baptiste Maneyrol static int inv_icm42600_gyro_hwfifo_flush(struct iio_dev *indio_dev,
6887f85e42aSJean-Baptiste Maneyrol 					  unsigned int count)
6897f85e42aSJean-Baptiste Maneyrol {
6907f85e42aSJean-Baptiste Maneyrol 	struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
6917f85e42aSJean-Baptiste Maneyrol 	int ret;
6927f85e42aSJean-Baptiste Maneyrol 
6937f85e42aSJean-Baptiste Maneyrol 	if (count == 0)
6947f85e42aSJean-Baptiste Maneyrol 		return 0;
6957f85e42aSJean-Baptiste Maneyrol 
6967f85e42aSJean-Baptiste Maneyrol 	mutex_lock(&st->lock);
6977f85e42aSJean-Baptiste Maneyrol 
6987f85e42aSJean-Baptiste Maneyrol 	ret = inv_icm42600_buffer_hwfifo_flush(st, count);
6997f85e42aSJean-Baptiste Maneyrol 	if (!ret)
7007f85e42aSJean-Baptiste Maneyrol 		ret = st->fifo.nb.gyro;
7017f85e42aSJean-Baptiste Maneyrol 
7027f85e42aSJean-Baptiste Maneyrol 	mutex_unlock(&st->lock);
7037f85e42aSJean-Baptiste Maneyrol 
7047f85e42aSJean-Baptiste Maneyrol 	return ret;
7057f85e42aSJean-Baptiste Maneyrol }
7067f85e42aSJean-Baptiste Maneyrol 
707a095fadbSJean-Baptiste Maneyrol static const struct iio_info inv_icm42600_gyro_info = {
708a095fadbSJean-Baptiste Maneyrol 	.read_raw = inv_icm42600_gyro_read_raw,
709a095fadbSJean-Baptiste Maneyrol 	.read_avail = inv_icm42600_gyro_read_avail,
710a095fadbSJean-Baptiste Maneyrol 	.write_raw = inv_icm42600_gyro_write_raw,
711a095fadbSJean-Baptiste Maneyrol 	.write_raw_get_fmt = inv_icm42600_gyro_write_raw_get_fmt,
712a095fadbSJean-Baptiste Maneyrol 	.debugfs_reg_access = inv_icm42600_debugfs_reg,
7137f85e42aSJean-Baptiste Maneyrol 	.update_scan_mode = inv_icm42600_gyro_update_scan_mode,
7147f85e42aSJean-Baptiste Maneyrol 	.hwfifo_set_watermark = inv_icm42600_gyro_hwfifo_set_watermark,
7157f85e42aSJean-Baptiste Maneyrol 	.hwfifo_flush_to_buffer = inv_icm42600_gyro_hwfifo_flush,
716a095fadbSJean-Baptiste Maneyrol };
717a095fadbSJean-Baptiste Maneyrol 
718a095fadbSJean-Baptiste Maneyrol struct iio_dev *inv_icm42600_gyro_init(struct inv_icm42600_state *st)
719a095fadbSJean-Baptiste Maneyrol {
720a095fadbSJean-Baptiste Maneyrol 	struct device *dev = regmap_get_device(st->map);
721a095fadbSJean-Baptiste Maneyrol 	const char *name;
722ec74ae9fSJean-Baptiste Maneyrol 	struct inv_icm42600_timestamp *ts;
723a095fadbSJean-Baptiste Maneyrol 	struct iio_dev *indio_dev;
724a095fadbSJean-Baptiste Maneyrol 	int ret;
725a095fadbSJean-Baptiste Maneyrol 
726a095fadbSJean-Baptiste Maneyrol 	name = devm_kasprintf(dev, GFP_KERNEL, "%s-gyro", st->name);
727a095fadbSJean-Baptiste Maneyrol 	if (!name)
728a095fadbSJean-Baptiste Maneyrol 		return ERR_PTR(-ENOMEM);
729a095fadbSJean-Baptiste Maneyrol 
730ec74ae9fSJean-Baptiste Maneyrol 	indio_dev = devm_iio_device_alloc(dev, sizeof(*ts));
731a095fadbSJean-Baptiste Maneyrol 	if (!indio_dev)
732a095fadbSJean-Baptiste Maneyrol 		return ERR_PTR(-ENOMEM);
733a095fadbSJean-Baptiste Maneyrol 
734ec74ae9fSJean-Baptiste Maneyrol 	ts = iio_priv(indio_dev);
735ec74ae9fSJean-Baptiste Maneyrol 	inv_icm42600_timestamp_init(ts, inv_icm42600_odr_to_period(st->conf.gyro.odr));
736ec74ae9fSJean-Baptiste Maneyrol 
737a095fadbSJean-Baptiste Maneyrol 	iio_device_set_drvdata(indio_dev, st);
738a095fadbSJean-Baptiste Maneyrol 	indio_dev->name = name;
739a095fadbSJean-Baptiste Maneyrol 	indio_dev->info = &inv_icm42600_gyro_info;
74017395ce2SAlexandru Ardelean 	indio_dev->modes = INDIO_DIRECT_MODE;
741a095fadbSJean-Baptiste Maneyrol 	indio_dev->channels = inv_icm42600_gyro_channels;
742a095fadbSJean-Baptiste Maneyrol 	indio_dev->num_channels = ARRAY_SIZE(inv_icm42600_gyro_channels);
7437f85e42aSJean-Baptiste Maneyrol 	indio_dev->available_scan_masks = inv_icm42600_gyro_scan_masks;
7447f85e42aSJean-Baptiste Maneyrol 	indio_dev->setup_ops = &inv_icm42600_buffer_ops;
7457f85e42aSJean-Baptiste Maneyrol 
74617395ce2SAlexandru Ardelean 	ret = devm_iio_kfifo_buffer_setup(dev, indio_dev,
74717395ce2SAlexandru Ardelean 					  &inv_icm42600_buffer_ops);
74817395ce2SAlexandru Ardelean 	if (ret)
74917395ce2SAlexandru Ardelean 		return ERR_PTR(ret);
750a095fadbSJean-Baptiste Maneyrol 
751a095fadbSJean-Baptiste Maneyrol 	ret = devm_iio_device_register(dev, indio_dev);
752a095fadbSJean-Baptiste Maneyrol 	if (ret)
753a095fadbSJean-Baptiste Maneyrol 		return ERR_PTR(ret);
754a095fadbSJean-Baptiste Maneyrol 
755a095fadbSJean-Baptiste Maneyrol 	return indio_dev;
756a095fadbSJean-Baptiste Maneyrol }
7577f85e42aSJean-Baptiste Maneyrol 
7587f85e42aSJean-Baptiste Maneyrol int inv_icm42600_gyro_parse_fifo(struct iio_dev *indio_dev)
7597f85e42aSJean-Baptiste Maneyrol {
7607f85e42aSJean-Baptiste Maneyrol 	struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev);
761ec74ae9fSJean-Baptiste Maneyrol 	struct inv_icm42600_timestamp *ts = iio_priv(indio_dev);
7627f85e42aSJean-Baptiste Maneyrol 	ssize_t i, size;
763ec74ae9fSJean-Baptiste Maneyrol 	unsigned int no;
7647f85e42aSJean-Baptiste Maneyrol 	const void *accel, *gyro, *timestamp;
7657f85e42aSJean-Baptiste Maneyrol 	const int8_t *temp;
7667f85e42aSJean-Baptiste Maneyrol 	unsigned int odr;
767ec74ae9fSJean-Baptiste Maneyrol 	int64_t ts_val;
7687f85e42aSJean-Baptiste Maneyrol 	struct inv_icm42600_gyro_buffer buffer;
7697f85e42aSJean-Baptiste Maneyrol 
7707f85e42aSJean-Baptiste Maneyrol 	/* parse all fifo packets */
771ec74ae9fSJean-Baptiste Maneyrol 	for (i = 0, no = 0; i < st->fifo.count; i += size, ++no) {
7727f85e42aSJean-Baptiste Maneyrol 		size = inv_icm42600_fifo_decode_packet(&st->fifo.data[i],
7737f85e42aSJean-Baptiste Maneyrol 				&accel, &gyro, &temp, &timestamp, &odr);
7747f85e42aSJean-Baptiste Maneyrol 		/* quit if error or FIFO is empty */
7757f85e42aSJean-Baptiste Maneyrol 		if (size <= 0)
7767f85e42aSJean-Baptiste Maneyrol 			return size;
7777f85e42aSJean-Baptiste Maneyrol 
7787f85e42aSJean-Baptiste Maneyrol 		/* skip packet if no gyro data or data is invalid */
7797f85e42aSJean-Baptiste Maneyrol 		if (gyro == NULL || !inv_icm42600_fifo_is_data_valid(gyro))
7807f85e42aSJean-Baptiste Maneyrol 			continue;
7817f85e42aSJean-Baptiste Maneyrol 
782ec74ae9fSJean-Baptiste Maneyrol 		/* update odr */
783ec74ae9fSJean-Baptiste Maneyrol 		if (odr & INV_ICM42600_SENSOR_GYRO)
784ec74ae9fSJean-Baptiste Maneyrol 			inv_icm42600_timestamp_apply_odr(ts, st->fifo.period,
785ec74ae9fSJean-Baptiste Maneyrol 							 st->fifo.nb.total, no);
786ec74ae9fSJean-Baptiste Maneyrol 
7877f85e42aSJean-Baptiste Maneyrol 		/* buffer is copied to userspace, zeroing it to avoid any data leak */
7887f85e42aSJean-Baptiste Maneyrol 		memset(&buffer, 0, sizeof(buffer));
7897f85e42aSJean-Baptiste Maneyrol 		memcpy(&buffer.gyro, gyro, sizeof(buffer.gyro));
7907f85e42aSJean-Baptiste Maneyrol 		/* convert 8 bits FIFO temperature in high resolution format */
7917f85e42aSJean-Baptiste Maneyrol 		buffer.temp = temp ? (*temp * 64) : 0;
792ec74ae9fSJean-Baptiste Maneyrol 		ts_val = inv_icm42600_timestamp_pop(ts);
793ec74ae9fSJean-Baptiste Maneyrol 		iio_push_to_buffers_with_timestamp(indio_dev, &buffer, ts_val);
7947f85e42aSJean-Baptiste Maneyrol 	}
7957f85e42aSJean-Baptiste Maneyrol 
7967f85e42aSJean-Baptiste Maneyrol 	return 0;
7977f85e42aSJean-Baptiste Maneyrol }
798