xref: /openbmc/linux/drivers/iio/health/max30102.c (revision 4a075bd4)
1 /*
2  * max30102.c - Support for MAX30102 heart rate and pulse oximeter sensor
3  *
4  * Copyright (C) 2017 Matt Ranostay <matt@ranostay.consulting>
5  *
6  * Support for MAX30105 optical particle sensor
7  * Copyright (C) 2017 Peter Meerwald-Stadler <pmeerw@pmeerw.net>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License as published by
11  * the Free Software Foundation; either version 2 of the License, or
12  * (at your option) any later version.
13  *
14  * This program is distributed in the hope that it will be useful,
15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17  * GNU General Public License for more details.
18  *
19  * 7-bit I2C chip address: 0x57
20  * TODO: proximity power saving feature
21  */
22 
23 #include <linux/module.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/delay.h>
27 #include <linux/err.h>
28 #include <linux/irq.h>
29 #include <linux/i2c.h>
30 #include <linux/mutex.h>
31 #include <linux/of.h>
32 #include <linux/regmap.h>
33 #include <linux/iio/iio.h>
34 #include <linux/iio/buffer.h>
35 #include <linux/iio/kfifo_buf.h>
36 
37 #define MAX30102_REGMAP_NAME	"max30102_regmap"
38 #define MAX30102_DRV_NAME	"max30102"
39 #define MAX30102_PART_NUMBER	0x15
40 
41 enum max30102_chip_id {
42 	max30102,
43 	max30105,
44 };
45 
46 enum max3012_led_idx {
47 	MAX30102_LED_RED,
48 	MAX30102_LED_IR,
49 	MAX30105_LED_GREEN,
50 };
51 
52 #define MAX30102_REG_INT_STATUS			0x00
53 #define MAX30102_REG_INT_STATUS_PWR_RDY		BIT(0)
54 #define MAX30102_REG_INT_STATUS_PROX_INT	BIT(4)
55 #define MAX30102_REG_INT_STATUS_ALC_OVF		BIT(5)
56 #define MAX30102_REG_INT_STATUS_PPG_RDY		BIT(6)
57 #define MAX30102_REG_INT_STATUS_FIFO_RDY	BIT(7)
58 
59 #define MAX30102_REG_INT_ENABLE			0x02
60 #define MAX30102_REG_INT_ENABLE_PROX_INT_EN	BIT(4)
61 #define MAX30102_REG_INT_ENABLE_ALC_OVF_EN	BIT(5)
62 #define MAX30102_REG_INT_ENABLE_PPG_EN		BIT(6)
63 #define MAX30102_REG_INT_ENABLE_FIFO_EN		BIT(7)
64 #define MAX30102_REG_INT_ENABLE_MASK		0xf0
65 #define MAX30102_REG_INT_ENABLE_MASK_SHIFT	4
66 
67 #define MAX30102_REG_FIFO_WR_PTR		0x04
68 #define MAX30102_REG_FIFO_OVR_CTR		0x05
69 #define MAX30102_REG_FIFO_RD_PTR		0x06
70 #define MAX30102_REG_FIFO_DATA			0x07
71 #define MAX30102_REG_FIFO_DATA_BYTES		3
72 
73 #define MAX30102_REG_FIFO_CONFIG		0x08
74 #define MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES	BIT(1)
75 #define MAX30102_REG_FIFO_CONFIG_AVG_SHIFT	5
76 #define MAX30102_REG_FIFO_CONFIG_AFULL		BIT(0)
77 
78 #define MAX30102_REG_MODE_CONFIG		0x09
79 #define MAX30102_REG_MODE_CONFIG_MODE_NONE	0x00
80 #define MAX30102_REG_MODE_CONFIG_MODE_HR	0x02 /* red LED */
81 #define MAX30102_REG_MODE_CONFIG_MODE_HR_SPO2	0x03 /* red + IR LED */
82 #define MAX30102_REG_MODE_CONFIG_MODE_MULTI	0x07 /* multi-LED mode */
83 #define MAX30102_REG_MODE_CONFIG_MODE_MASK	GENMASK(2, 0)
84 #define MAX30102_REG_MODE_CONFIG_PWR		BIT(7)
85 
86 #define MAX30102_REG_MODE_CONTROL_SLOT21	0x11 /* multi-LED control */
87 #define MAX30102_REG_MODE_CONTROL_SLOT43	0x12
88 #define MAX30102_REG_MODE_CONTROL_SLOT_MASK	(GENMASK(6, 4) | GENMASK(2, 0))
89 #define MAX30102_REG_MODE_CONTROL_SLOT_SHIFT	4
90 
91 #define MAX30102_REG_SPO2_CONFIG		0x0a
92 #define MAX30102_REG_SPO2_CONFIG_PULSE_411_US	0x03
93 #define MAX30102_REG_SPO2_CONFIG_SR_400HZ	0x03
94 #define MAX30102_REG_SPO2_CONFIG_SR_MASK	0x07
95 #define MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT	2
96 #define MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS	BIT(0)
97 #define MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT	5
98 
99 #define MAX30102_REG_RED_LED_CONFIG		0x0c
100 #define MAX30102_REG_IR_LED_CONFIG		0x0d
101 #define MAX30105_REG_GREEN_LED_CONFIG		0x0e
102 
103 #define MAX30102_REG_TEMP_CONFIG		0x21
104 #define MAX30102_REG_TEMP_CONFIG_TEMP_EN	BIT(0)
105 
106 #define MAX30102_REG_TEMP_INTEGER		0x1f
107 #define MAX30102_REG_TEMP_FRACTION		0x20
108 
109 #define MAX30102_REG_REV_ID			0xfe
110 #define MAX30102_REG_PART_ID			0xff
111 
112 struct max30102_data {
113 	struct i2c_client *client;
114 	struct iio_dev *indio_dev;
115 	struct mutex lock;
116 	struct regmap *regmap;
117 	enum max30102_chip_id chip_id;
118 
119 	u8 buffer[12];
120 	__be32 processed_buffer[3]; /* 3 x 18-bit (padded to 32-bits) */
121 };
122 
123 static const struct regmap_config max30102_regmap_config = {
124 	.name = MAX30102_REGMAP_NAME,
125 
126 	.reg_bits = 8,
127 	.val_bits = 8,
128 };
129 
130 static const unsigned long max30102_scan_masks[] = {
131 	BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR),
132 	0
133 };
134 
135 static const unsigned long max30105_scan_masks[] = {
136 	BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR),
137 	BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR) |
138 		BIT(MAX30105_LED_GREEN),
139 	0
140 };
141 
142 #define MAX30102_INTENSITY_CHANNEL(_si, _mod) { \
143 		.type = IIO_INTENSITY, \
144 		.channel2 = _mod, \
145 		.modified = 1, \
146 		.scan_index = _si, \
147 		.scan_type = { \
148 			.sign = 'u', \
149 			.shift = 8, \
150 			.realbits = 18, \
151 			.storagebits = 32, \
152 			.endianness = IIO_BE, \
153 		}, \
154 	}
155 
156 static const struct iio_chan_spec max30102_channels[] = {
157 	MAX30102_INTENSITY_CHANNEL(MAX30102_LED_RED, IIO_MOD_LIGHT_RED),
158 	MAX30102_INTENSITY_CHANNEL(MAX30102_LED_IR, IIO_MOD_LIGHT_IR),
159 	{
160 		.type = IIO_TEMP,
161 		.info_mask_separate =
162 			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
163 		.scan_index = -1,
164 	},
165 };
166 
167 static const struct iio_chan_spec max30105_channels[] = {
168 	MAX30102_INTENSITY_CHANNEL(MAX30102_LED_RED, IIO_MOD_LIGHT_RED),
169 	MAX30102_INTENSITY_CHANNEL(MAX30102_LED_IR, IIO_MOD_LIGHT_IR),
170 	MAX30102_INTENSITY_CHANNEL(MAX30105_LED_GREEN, IIO_MOD_LIGHT_GREEN),
171 	{
172 		.type = IIO_TEMP,
173 		.info_mask_separate =
174 			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
175 		.scan_index = -1,
176 	},
177 };
178 
179 static int max30102_set_power(struct max30102_data *data, bool en)
180 {
181 	return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
182 				  MAX30102_REG_MODE_CONFIG_PWR,
183 				  en ? 0 : MAX30102_REG_MODE_CONFIG_PWR);
184 }
185 
186 static int max30102_set_powermode(struct max30102_data *data, u8 mode, bool en)
187 {
188 	u8 reg = mode;
189 
190 	if (!en)
191 		reg |= MAX30102_REG_MODE_CONFIG_PWR;
192 
193 	return regmap_update_bits(data->regmap, MAX30102_REG_MODE_CONFIG,
194 				  MAX30102_REG_MODE_CONFIG_PWR |
195 				  MAX30102_REG_MODE_CONFIG_MODE_MASK, reg);
196 }
197 
198 #define MAX30102_MODE_CONTROL_LED_SLOTS(slot2, slot1) \
199 	((slot2 << MAX30102_REG_MODE_CONTROL_SLOT_SHIFT) | slot1)
200 
201 static int max30102_buffer_postenable(struct iio_dev *indio_dev)
202 {
203 	struct max30102_data *data = iio_priv(indio_dev);
204 	int ret;
205 	u8 reg;
206 
207 	switch (*indio_dev->active_scan_mask) {
208 	case BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR):
209 		reg = MAX30102_REG_MODE_CONFIG_MODE_HR_SPO2;
210 		break;
211 	case BIT(MAX30102_LED_RED) | BIT(MAX30102_LED_IR) |
212 	     BIT(MAX30105_LED_GREEN):
213 		ret = regmap_update_bits(data->regmap,
214 					 MAX30102_REG_MODE_CONTROL_SLOT21,
215 					 MAX30102_REG_MODE_CONTROL_SLOT_MASK,
216 					 MAX30102_MODE_CONTROL_LED_SLOTS(2, 1));
217 		if (ret)
218 			return ret;
219 
220 		ret = regmap_update_bits(data->regmap,
221 					 MAX30102_REG_MODE_CONTROL_SLOT43,
222 					 MAX30102_REG_MODE_CONTROL_SLOT_MASK,
223 					 MAX30102_MODE_CONTROL_LED_SLOTS(0, 3));
224 		if (ret)
225 			return ret;
226 
227 		reg = MAX30102_REG_MODE_CONFIG_MODE_MULTI;
228 		break;
229 	default:
230 		return -EINVAL;
231 	}
232 
233 	return max30102_set_powermode(data, reg, true);
234 }
235 
236 static int max30102_buffer_predisable(struct iio_dev *indio_dev)
237 {
238 	struct max30102_data *data = iio_priv(indio_dev);
239 
240 	return max30102_set_powermode(data, MAX30102_REG_MODE_CONFIG_MODE_NONE,
241 				      false);
242 }
243 
244 static const struct iio_buffer_setup_ops max30102_buffer_setup_ops = {
245 	.postenable = max30102_buffer_postenable,
246 	.predisable = max30102_buffer_predisable,
247 };
248 
249 static inline int max30102_fifo_count(struct max30102_data *data)
250 {
251 	unsigned int val;
252 	int ret;
253 
254 	ret = regmap_read(data->regmap, MAX30102_REG_INT_STATUS, &val);
255 	if (ret)
256 		return ret;
257 
258 	/* FIFO has one sample slot left */
259 	if (val & MAX30102_REG_INT_STATUS_FIFO_RDY)
260 		return 1;
261 
262 	return 0;
263 }
264 
265 #define MAX30102_COPY_DATA(i) \
266 	memcpy(&data->processed_buffer[(i)], \
267 	       &buffer[(i) * MAX30102_REG_FIFO_DATA_BYTES], \
268 	       MAX30102_REG_FIFO_DATA_BYTES)
269 
270 static int max30102_read_measurement(struct max30102_data *data,
271 				     unsigned int measurements)
272 {
273 	int ret;
274 	u8 *buffer = (u8 *) &data->buffer;
275 
276 	ret = i2c_smbus_read_i2c_block_data(data->client,
277 					    MAX30102_REG_FIFO_DATA,
278 					    measurements *
279 					    MAX30102_REG_FIFO_DATA_BYTES,
280 					    buffer);
281 
282 	switch (measurements) {
283 	case 3:
284 		MAX30102_COPY_DATA(2);
285 		/* fall through */
286 	case 2:
287 		MAX30102_COPY_DATA(1);
288 		/* fall through */
289 	case 1:
290 		MAX30102_COPY_DATA(0);
291 		break;
292 	default:
293 		return -EINVAL;
294 	}
295 
296 	return (ret == measurements * MAX30102_REG_FIFO_DATA_BYTES) ?
297 	       0 : -EINVAL;
298 }
299 
300 static irqreturn_t max30102_interrupt_handler(int irq, void *private)
301 {
302 	struct iio_dev *indio_dev = private;
303 	struct max30102_data *data = iio_priv(indio_dev);
304 	unsigned int measurements = bitmap_weight(indio_dev->active_scan_mask,
305 						  indio_dev->masklength);
306 	int ret, cnt = 0;
307 
308 	mutex_lock(&data->lock);
309 
310 	while (cnt || (cnt = max30102_fifo_count(data)) > 0) {
311 		ret = max30102_read_measurement(data, measurements);
312 		if (ret)
313 			break;
314 
315 		iio_push_to_buffers(data->indio_dev, data->processed_buffer);
316 		cnt--;
317 	}
318 
319 	mutex_unlock(&data->lock);
320 
321 	return IRQ_HANDLED;
322 }
323 
324 static int max30102_get_current_idx(unsigned int val, int *reg)
325 {
326 	/* each step is 0.200 mA */
327 	*reg = val / 200;
328 
329 	return *reg > 0xff ? -EINVAL : 0;
330 }
331 
332 static int max30102_led_init(struct max30102_data *data)
333 {
334 	struct device *dev = &data->client->dev;
335 	struct device_node *np = dev->of_node;
336 	unsigned int val;
337 	int reg, ret;
338 
339 	ret = of_property_read_u32(np, "maxim,red-led-current-microamp", &val);
340 	if (ret) {
341 		dev_info(dev, "no red-led-current-microamp set\n");
342 
343 		/* Default to 7 mA RED LED */
344 		val = 7000;
345 	}
346 
347 	ret = max30102_get_current_idx(val, &reg);
348 	if (ret) {
349 		dev_err(dev, "invalid RED LED current setting %d\n", val);
350 		return ret;
351 	}
352 
353 	ret = regmap_write(data->regmap, MAX30102_REG_RED_LED_CONFIG, reg);
354 	if (ret)
355 		return ret;
356 
357 	if (data->chip_id == max30105) {
358 		ret = of_property_read_u32(np,
359 			"maxim,green-led-current-microamp", &val);
360 		if (ret) {
361 			dev_info(dev, "no green-led-current-microamp set\n");
362 
363 			/* Default to 7 mA green LED */
364 			val = 7000;
365 		}
366 
367 		ret = max30102_get_current_idx(val, &reg);
368 		if (ret) {
369 			dev_err(dev, "invalid green LED current setting %d\n",
370 				val);
371 			return ret;
372 		}
373 
374 		ret = regmap_write(data->regmap, MAX30105_REG_GREEN_LED_CONFIG,
375 				   reg);
376 		if (ret)
377 			return ret;
378 	}
379 
380 	ret = of_property_read_u32(np, "maxim,ir-led-current-microamp", &val);
381 	if (ret) {
382 		dev_info(dev, "no ir-led-current-microamp set\n");
383 
384 		/* Default to 7 mA IR LED */
385 		val = 7000;
386 	}
387 
388 	ret = max30102_get_current_idx(val, &reg);
389 	if (ret) {
390 		dev_err(dev, "invalid IR LED current setting %d\n", val);
391 		return ret;
392 	}
393 
394 	return regmap_write(data->regmap, MAX30102_REG_IR_LED_CONFIG, reg);
395 }
396 
397 static int max30102_chip_init(struct max30102_data *data)
398 {
399 	int ret;
400 
401 	/* setup LED current settings */
402 	ret = max30102_led_init(data);
403 	if (ret)
404 		return ret;
405 
406 	/* configure 18-bit HR + SpO2 readings at 400Hz */
407 	ret = regmap_write(data->regmap, MAX30102_REG_SPO2_CONFIG,
408 				(MAX30102_REG_SPO2_CONFIG_ADC_4096_STEPS
409 				 << MAX30102_REG_SPO2_CONFIG_ADC_MASK_SHIFT) |
410 				(MAX30102_REG_SPO2_CONFIG_SR_400HZ
411 				 << MAX30102_REG_SPO2_CONFIG_SR_MASK_SHIFT) |
412 				 MAX30102_REG_SPO2_CONFIG_PULSE_411_US);
413 	if (ret)
414 		return ret;
415 
416 	/* average 4 samples + generate FIFO interrupt */
417 	ret = regmap_write(data->regmap, MAX30102_REG_FIFO_CONFIG,
418 				(MAX30102_REG_FIFO_CONFIG_AVG_4SAMPLES
419 				 << MAX30102_REG_FIFO_CONFIG_AVG_SHIFT) |
420 				 MAX30102_REG_FIFO_CONFIG_AFULL);
421 	if (ret)
422 		return ret;
423 
424 	/* enable FIFO interrupt */
425 	return regmap_update_bits(data->regmap, MAX30102_REG_INT_ENABLE,
426 				 MAX30102_REG_INT_ENABLE_MASK,
427 				 MAX30102_REG_INT_ENABLE_FIFO_EN);
428 }
429 
430 static int max30102_read_temp(struct max30102_data *data, int *val)
431 {
432 	int ret;
433 	unsigned int reg;
434 
435 	ret = regmap_read(data->regmap, MAX30102_REG_TEMP_INTEGER, &reg);
436 	if (ret < 0)
437 		return ret;
438 	*val = reg << 4;
439 
440 	ret = regmap_read(data->regmap, MAX30102_REG_TEMP_FRACTION, &reg);
441 	if (ret < 0)
442 		return ret;
443 
444 	*val |= reg & 0xf;
445 	*val = sign_extend32(*val, 11);
446 
447 	return 0;
448 }
449 
450 static int max30102_get_temp(struct max30102_data *data, int *val, bool en)
451 {
452 	int ret;
453 
454 	if (en) {
455 		ret = max30102_set_power(data, true);
456 		if (ret)
457 			return ret;
458 	}
459 
460 	/* start acquisition */
461 	ret = regmap_update_bits(data->regmap, MAX30102_REG_TEMP_CONFIG,
462 				 MAX30102_REG_TEMP_CONFIG_TEMP_EN,
463 				 MAX30102_REG_TEMP_CONFIG_TEMP_EN);
464 	if (ret)
465 		goto out;
466 
467 	msleep(35);
468 	ret = max30102_read_temp(data, val);
469 
470 out:
471 	if (en)
472 		max30102_set_power(data, false);
473 
474 	return ret;
475 }
476 
477 static int max30102_read_raw(struct iio_dev *indio_dev,
478 			     struct iio_chan_spec const *chan,
479 			     int *val, int *val2, long mask)
480 {
481 	struct max30102_data *data = iio_priv(indio_dev);
482 	int ret = -EINVAL;
483 
484 	switch (mask) {
485 	case IIO_CHAN_INFO_RAW:
486 		/*
487 		 * Temperature reading can only be acquired when not in
488 		 * shutdown; leave shutdown briefly when buffer not running
489 		 */
490 		mutex_lock(&indio_dev->mlock);
491 		if (!iio_buffer_enabled(indio_dev))
492 			ret = max30102_get_temp(data, val, true);
493 		else
494 			ret = max30102_get_temp(data, val, false);
495 		mutex_unlock(&indio_dev->mlock);
496 		if (ret)
497 			return ret;
498 
499 		ret = IIO_VAL_INT;
500 		break;
501 	case IIO_CHAN_INFO_SCALE:
502 		*val = 1000;  /* 62.5 */
503 		*val2 = 16;
504 		ret = IIO_VAL_FRACTIONAL;
505 		break;
506 	}
507 
508 	return ret;
509 }
510 
511 static const struct iio_info max30102_info = {
512 	.read_raw = max30102_read_raw,
513 };
514 
515 static int max30102_probe(struct i2c_client *client,
516 			  const struct i2c_device_id *id)
517 {
518 	struct max30102_data *data;
519 	struct iio_buffer *buffer;
520 	struct iio_dev *indio_dev;
521 	int ret;
522 	unsigned int reg;
523 
524 	indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
525 	if (!indio_dev)
526 		return -ENOMEM;
527 
528 	buffer = devm_iio_kfifo_allocate(&client->dev);
529 	if (!buffer)
530 		return -ENOMEM;
531 
532 	iio_device_attach_buffer(indio_dev, buffer);
533 
534 	indio_dev->name = MAX30102_DRV_NAME;
535 	indio_dev->info = &max30102_info;
536 	indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
537 	indio_dev->setup_ops = &max30102_buffer_setup_ops;
538 	indio_dev->dev.parent = &client->dev;
539 
540 	data = iio_priv(indio_dev);
541 	data->indio_dev = indio_dev;
542 	data->client = client;
543 	data->chip_id = id->driver_data;
544 
545 	mutex_init(&data->lock);
546 	i2c_set_clientdata(client, indio_dev);
547 
548 	switch (data->chip_id) {
549 	case max30105:
550 		indio_dev->channels = max30105_channels;
551 		indio_dev->num_channels = ARRAY_SIZE(max30105_channels);
552 		indio_dev->available_scan_masks = max30105_scan_masks;
553 		break;
554 	case max30102:
555 		indio_dev->channels = max30102_channels;
556 		indio_dev->num_channels = ARRAY_SIZE(max30102_channels);
557 		indio_dev->available_scan_masks = max30102_scan_masks;
558 		break;
559 	default:
560 		return -ENODEV;
561 	}
562 
563 	data->regmap = devm_regmap_init_i2c(client, &max30102_regmap_config);
564 	if (IS_ERR(data->regmap)) {
565 		dev_err(&client->dev, "regmap initialization failed\n");
566 		return PTR_ERR(data->regmap);
567 	}
568 
569 	/* check part ID */
570 	ret = regmap_read(data->regmap, MAX30102_REG_PART_ID, &reg);
571 	if (ret)
572 		return ret;
573 	if (reg != MAX30102_PART_NUMBER)
574 		return -ENODEV;
575 
576 	/* show revision ID */
577 	ret = regmap_read(data->regmap, MAX30102_REG_REV_ID, &reg);
578 	if (ret)
579 		return ret;
580 	dev_dbg(&client->dev, "max3010x revision %02x\n", reg);
581 
582 	/* clear mode setting, chip shutdown */
583 	ret = max30102_set_powermode(data, MAX30102_REG_MODE_CONFIG_MODE_NONE,
584 				     false);
585 	if (ret)
586 		return ret;
587 
588 	ret = max30102_chip_init(data);
589 	if (ret)
590 		return ret;
591 
592 	if (client->irq <= 0) {
593 		dev_err(&client->dev, "no valid irq defined\n");
594 		return -EINVAL;
595 	}
596 
597 	ret = devm_request_threaded_irq(&client->dev, client->irq,
598 					NULL, max30102_interrupt_handler,
599 					IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
600 					"max30102_irq", indio_dev);
601 	if (ret) {
602 		dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
603 		return ret;
604 	}
605 
606 	return iio_device_register(indio_dev);
607 }
608 
609 static int max30102_remove(struct i2c_client *client)
610 {
611 	struct iio_dev *indio_dev = i2c_get_clientdata(client);
612 	struct max30102_data *data = iio_priv(indio_dev);
613 
614 	iio_device_unregister(indio_dev);
615 	max30102_set_power(data, false);
616 
617 	return 0;
618 }
619 
620 static const struct i2c_device_id max30102_id[] = {
621 	{ "max30102", max30102 },
622 	{ "max30105", max30105 },
623 	{}
624 };
625 MODULE_DEVICE_TABLE(i2c, max30102_id);
626 
627 static const struct of_device_id max30102_dt_ids[] = {
628 	{ .compatible = "maxim,max30102" },
629 	{ .compatible = "maxim,max30105" },
630 	{ }
631 };
632 MODULE_DEVICE_TABLE(of, max30102_dt_ids);
633 
634 static struct i2c_driver max30102_driver = {
635 	.driver = {
636 		.name	= MAX30102_DRV_NAME,
637 		.of_match_table	= of_match_ptr(max30102_dt_ids),
638 	},
639 	.probe		= max30102_probe,
640 	.remove		= max30102_remove,
641 	.id_table	= max30102_id,
642 };
643 module_i2c_driver(max30102_driver);
644 
645 MODULE_AUTHOR("Matt Ranostay <matt@ranostay.consulting>");
646 MODULE_DESCRIPTION("MAX30102 heart rate/pulse oximeter and MAX30105 particle sensor driver");
647 MODULE_LICENSE("GPL");
648