1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters 4 * 5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ 6 * Andrew F. Davis <afd@ti.com> 7 */ 8 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/interrupt.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/regmap.h> 15 #include <linux/spi/spi.h> 16 #include <linux/sysfs.h> 17 #include <linux/regulator/consumer.h> 18 19 #include <linux/iio/iio.h> 20 #include <linux/iio/sysfs.h> 21 #include <linux/iio/buffer.h> 22 #include <linux/iio/trigger.h> 23 #include <linux/iio/triggered_buffer.h> 24 #include <linux/iio/trigger_consumer.h> 25 26 #include "afe440x.h" 27 28 #define AFE4403_DRIVER_NAME "afe4403" 29 30 /* AFE4403 Registers */ 31 #define AFE4403_TIAGAIN 0x20 32 #define AFE4403_TIA_AMB_GAIN 0x21 33 34 enum afe4403_fields { 35 /* Gains */ 36 F_RF_LED1, F_CF_LED1, 37 F_RF_LED, F_CF_LED, 38 39 /* LED Current */ 40 F_ILED1, F_ILED2, 41 42 /* sentinel */ 43 F_MAX_FIELDS 44 }; 45 46 static const struct reg_field afe4403_reg_fields[] = { 47 /* Gains */ 48 [F_RF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 0, 2), 49 [F_CF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 3, 7), 50 [F_RF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 0, 2), 51 [F_CF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 3, 7), 52 /* LED Current */ 53 [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 7), 54 [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 8, 15), 55 }; 56 57 /** 58 * struct afe4403_data - AFE4403 device instance data 59 * @dev: Device structure 60 * @spi: SPI device handle 61 * @regmap: Register map of the device 62 * @fields: Register fields of the device 63 * @regulator: Pointer to the regulator for the IC 64 * @trig: IIO trigger for this device 65 * @irq: ADC_RDY line interrupt number 66 */ 67 struct afe4403_data { 68 struct device *dev; 69 struct spi_device *spi; 70 struct regmap *regmap; 71 struct regmap_field *fields[F_MAX_FIELDS]; 72 struct regulator *regulator; 73 struct iio_trigger *trig; 74 int irq; 75 }; 76 77 enum afe4403_chan_id { 78 LED2 = 1, 79 ALED2, 80 LED1, 81 ALED1, 82 LED2_ALED2, 83 LED1_ALED1, 84 }; 85 86 static const unsigned int afe4403_channel_values[] = { 87 [LED2] = AFE440X_LED2VAL, 88 [ALED2] = AFE440X_ALED2VAL, 89 [LED1] = AFE440X_LED1VAL, 90 [ALED1] = AFE440X_ALED1VAL, 91 [LED2_ALED2] = AFE440X_LED2_ALED2VAL, 92 [LED1_ALED1] = AFE440X_LED1_ALED1VAL, 93 }; 94 95 static const unsigned int afe4403_channel_leds[] = { 96 [LED2] = F_ILED2, 97 [LED1] = F_ILED1, 98 }; 99 100 static const struct iio_chan_spec afe4403_channels[] = { 101 /* ADC values */ 102 AFE440X_INTENSITY_CHAN(LED2, 0), 103 AFE440X_INTENSITY_CHAN(ALED2, 0), 104 AFE440X_INTENSITY_CHAN(LED1, 0), 105 AFE440X_INTENSITY_CHAN(ALED1, 0), 106 AFE440X_INTENSITY_CHAN(LED2_ALED2, 0), 107 AFE440X_INTENSITY_CHAN(LED1_ALED1, 0), 108 /* LED current */ 109 AFE440X_CURRENT_CHAN(LED2), 110 AFE440X_CURRENT_CHAN(LED1), 111 }; 112 113 static const struct afe440x_val_table afe4403_res_table[] = { 114 { 500000 }, { 250000 }, { 100000 }, { 50000 }, 115 { 25000 }, { 10000 }, { 1000000 }, { 0 }, 116 }; 117 AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4403_res_table); 118 119 static const struct afe440x_val_table afe4403_cap_table[] = { 120 { 0, 5000 }, { 0, 10000 }, { 0, 20000 }, { 0, 25000 }, 121 { 0, 30000 }, { 0, 35000 }, { 0, 45000 }, { 0, 50000 }, 122 { 0, 55000 }, { 0, 60000 }, { 0, 70000 }, { 0, 75000 }, 123 { 0, 80000 }, { 0, 85000 }, { 0, 95000 }, { 0, 100000 }, 124 { 0, 155000 }, { 0, 160000 }, { 0, 170000 }, { 0, 175000 }, 125 { 0, 180000 }, { 0, 185000 }, { 0, 195000 }, { 0, 200000 }, 126 { 0, 205000 }, { 0, 210000 }, { 0, 220000 }, { 0, 225000 }, 127 { 0, 230000 }, { 0, 235000 }, { 0, 245000 }, { 0, 250000 }, 128 }; 129 AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4403_cap_table); 130 131 static ssize_t afe440x_show_register(struct device *dev, 132 struct device_attribute *attr, 133 char *buf) 134 { 135 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 136 struct afe4403_data *afe = iio_priv(indio_dev); 137 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); 138 unsigned int reg_val; 139 int vals[2]; 140 int ret; 141 142 ret = regmap_field_read(afe->fields[afe440x_attr->field], ®_val); 143 if (ret) 144 return ret; 145 146 if (reg_val >= afe440x_attr->table_size) 147 return -EINVAL; 148 149 vals[0] = afe440x_attr->val_table[reg_val].integer; 150 vals[1] = afe440x_attr->val_table[reg_val].fract; 151 152 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals); 153 } 154 155 static ssize_t afe440x_store_register(struct device *dev, 156 struct device_attribute *attr, 157 const char *buf, size_t count) 158 { 159 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 160 struct afe4403_data *afe = iio_priv(indio_dev); 161 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); 162 int val, integer, fract, ret; 163 164 ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract); 165 if (ret) 166 return ret; 167 168 for (val = 0; val < afe440x_attr->table_size; val++) 169 if (afe440x_attr->val_table[val].integer == integer && 170 afe440x_attr->val_table[val].fract == fract) 171 break; 172 if (val == afe440x_attr->table_size) 173 return -EINVAL; 174 175 ret = regmap_field_write(afe->fields[afe440x_attr->field], val); 176 if (ret) 177 return ret; 178 179 return count; 180 } 181 182 static AFE440X_ATTR(in_intensity1_resistance, F_RF_LED, afe4403_res_table); 183 static AFE440X_ATTR(in_intensity1_capacitance, F_CF_LED, afe4403_cap_table); 184 185 static AFE440X_ATTR(in_intensity2_resistance, F_RF_LED, afe4403_res_table); 186 static AFE440X_ATTR(in_intensity2_capacitance, F_CF_LED, afe4403_cap_table); 187 188 static AFE440X_ATTR(in_intensity3_resistance, F_RF_LED1, afe4403_res_table); 189 static AFE440X_ATTR(in_intensity3_capacitance, F_CF_LED1, afe4403_cap_table); 190 191 static AFE440X_ATTR(in_intensity4_resistance, F_RF_LED1, afe4403_res_table); 192 static AFE440X_ATTR(in_intensity4_capacitance, F_CF_LED1, afe4403_cap_table); 193 194 static struct attribute *afe440x_attributes[] = { 195 &dev_attr_in_intensity_resistance_available.attr, 196 &dev_attr_in_intensity_capacitance_available.attr, 197 &afe440x_attr_in_intensity1_resistance.dev_attr.attr, 198 &afe440x_attr_in_intensity1_capacitance.dev_attr.attr, 199 &afe440x_attr_in_intensity2_resistance.dev_attr.attr, 200 &afe440x_attr_in_intensity2_capacitance.dev_attr.attr, 201 &afe440x_attr_in_intensity3_resistance.dev_attr.attr, 202 &afe440x_attr_in_intensity3_capacitance.dev_attr.attr, 203 &afe440x_attr_in_intensity4_resistance.dev_attr.attr, 204 &afe440x_attr_in_intensity4_capacitance.dev_attr.attr, 205 NULL 206 }; 207 208 static const struct attribute_group afe440x_attribute_group = { 209 .attrs = afe440x_attributes 210 }; 211 212 static int afe4403_read(struct afe4403_data *afe, unsigned int reg, u32 *val) 213 { 214 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ}; 215 u8 rx[3]; 216 int ret; 217 218 /* Enable reading from the device */ 219 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 220 if (ret) 221 return ret; 222 223 ret = spi_write_then_read(afe->spi, ®, 1, rx, 3); 224 if (ret) 225 return ret; 226 227 *val = (rx[0] << 16) | 228 (rx[1] << 8) | 229 (rx[2]); 230 231 /* Disable reading from the device */ 232 tx[3] = AFE440X_CONTROL0_WRITE; 233 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 234 if (ret) 235 return ret; 236 237 return 0; 238 } 239 240 static int afe4403_read_raw(struct iio_dev *indio_dev, 241 struct iio_chan_spec const *chan, 242 int *val, int *val2, long mask) 243 { 244 struct afe4403_data *afe = iio_priv(indio_dev); 245 unsigned int reg = afe4403_channel_values[chan->address]; 246 unsigned int field = afe4403_channel_leds[chan->address]; 247 int ret; 248 249 switch (chan->type) { 250 case IIO_INTENSITY: 251 switch (mask) { 252 case IIO_CHAN_INFO_RAW: 253 ret = afe4403_read(afe, reg, val); 254 if (ret) 255 return ret; 256 return IIO_VAL_INT; 257 } 258 break; 259 case IIO_CURRENT: 260 switch (mask) { 261 case IIO_CHAN_INFO_RAW: 262 ret = regmap_field_read(afe->fields[field], val); 263 if (ret) 264 return ret; 265 return IIO_VAL_INT; 266 case IIO_CHAN_INFO_SCALE: 267 *val = 0; 268 *val2 = 800000; 269 return IIO_VAL_INT_PLUS_MICRO; 270 } 271 break; 272 default: 273 break; 274 } 275 276 return -EINVAL; 277 } 278 279 static int afe4403_write_raw(struct iio_dev *indio_dev, 280 struct iio_chan_spec const *chan, 281 int val, int val2, long mask) 282 { 283 struct afe4403_data *afe = iio_priv(indio_dev); 284 unsigned int field = afe4403_channel_leds[chan->address]; 285 286 switch (chan->type) { 287 case IIO_CURRENT: 288 switch (mask) { 289 case IIO_CHAN_INFO_RAW: 290 return regmap_field_write(afe->fields[field], val); 291 } 292 break; 293 default: 294 break; 295 } 296 297 return -EINVAL; 298 } 299 300 static const struct iio_info afe4403_iio_info = { 301 .attrs = &afe440x_attribute_group, 302 .read_raw = afe4403_read_raw, 303 .write_raw = afe4403_write_raw, 304 }; 305 306 static irqreturn_t afe4403_trigger_handler(int irq, void *private) 307 { 308 struct iio_poll_func *pf = private; 309 struct iio_dev *indio_dev = pf->indio_dev; 310 struct afe4403_data *afe = iio_priv(indio_dev); 311 int ret, bit, i = 0; 312 s32 buffer[8]; 313 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ}; 314 u8 rx[3]; 315 316 /* Enable reading from the device */ 317 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 318 if (ret) 319 goto err; 320 321 for_each_set_bit(bit, indio_dev->active_scan_mask, 322 indio_dev->masklength) { 323 ret = spi_write_then_read(afe->spi, 324 &afe4403_channel_values[bit], 1, 325 rx, 3); 326 if (ret) 327 goto err; 328 329 buffer[i++] = (rx[0] << 16) | 330 (rx[1] << 8) | 331 (rx[2]); 332 } 333 334 /* Disable reading from the device */ 335 tx[3] = AFE440X_CONTROL0_WRITE; 336 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 337 if (ret) 338 goto err; 339 340 iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp); 341 err: 342 iio_trigger_notify_done(indio_dev->trig); 343 344 return IRQ_HANDLED; 345 } 346 347 static const struct iio_trigger_ops afe4403_trigger_ops = { 348 }; 349 350 #define AFE4403_TIMING_PAIRS \ 351 { AFE440X_LED2STC, 0x000050 }, \ 352 { AFE440X_LED2ENDC, 0x0003e7 }, \ 353 { AFE440X_LED1LEDSTC, 0x0007d0 }, \ 354 { AFE440X_LED1LEDENDC, 0x000bb7 }, \ 355 { AFE440X_ALED2STC, 0x000438 }, \ 356 { AFE440X_ALED2ENDC, 0x0007cf }, \ 357 { AFE440X_LED1STC, 0x000820 }, \ 358 { AFE440X_LED1ENDC, 0x000bb7 }, \ 359 { AFE440X_LED2LEDSTC, 0x000000 }, \ 360 { AFE440X_LED2LEDENDC, 0x0003e7 }, \ 361 { AFE440X_ALED1STC, 0x000c08 }, \ 362 { AFE440X_ALED1ENDC, 0x000f9f }, \ 363 { AFE440X_LED2CONVST, 0x0003ef }, \ 364 { AFE440X_LED2CONVEND, 0x0007cf }, \ 365 { AFE440X_ALED2CONVST, 0x0007d7 }, \ 366 { AFE440X_ALED2CONVEND, 0x000bb7 }, \ 367 { AFE440X_LED1CONVST, 0x000bbf }, \ 368 { AFE440X_LED1CONVEND, 0x009c3f }, \ 369 { AFE440X_ALED1CONVST, 0x000fa7 }, \ 370 { AFE440X_ALED1CONVEND, 0x001387 }, \ 371 { AFE440X_ADCRSTSTCT0, 0x0003e8 }, \ 372 { AFE440X_ADCRSTENDCT0, 0x0003eb }, \ 373 { AFE440X_ADCRSTSTCT1, 0x0007d0 }, \ 374 { AFE440X_ADCRSTENDCT1, 0x0007d3 }, \ 375 { AFE440X_ADCRSTSTCT2, 0x000bb8 }, \ 376 { AFE440X_ADCRSTENDCT2, 0x000bbb }, \ 377 { AFE440X_ADCRSTSTCT3, 0x000fa0 }, \ 378 { AFE440X_ADCRSTENDCT3, 0x000fa3 }, \ 379 { AFE440X_PRPCOUNT, 0x009c3f }, \ 380 { AFE440X_PDNCYCLESTC, 0x001518 }, \ 381 { AFE440X_PDNCYCLEENDC, 0x00991f } 382 383 static const struct reg_sequence afe4403_reg_sequences[] = { 384 AFE4403_TIMING_PAIRS, 385 { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN }, 386 { AFE4403_TIAGAIN, AFE440X_TIAGAIN_ENSEPGAIN }, 387 }; 388 389 static const struct regmap_range afe4403_yes_ranges[] = { 390 regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL), 391 }; 392 393 static const struct regmap_access_table afe4403_volatile_table = { 394 .yes_ranges = afe4403_yes_ranges, 395 .n_yes_ranges = ARRAY_SIZE(afe4403_yes_ranges), 396 }; 397 398 static const struct regmap_config afe4403_regmap_config = { 399 .reg_bits = 8, 400 .val_bits = 24, 401 402 .max_register = AFE440X_PDNCYCLEENDC, 403 .cache_type = REGCACHE_RBTREE, 404 .volatile_table = &afe4403_volatile_table, 405 }; 406 407 static const struct of_device_id afe4403_of_match[] = { 408 { .compatible = "ti,afe4403", }, 409 { /* sentinel */ } 410 }; 411 MODULE_DEVICE_TABLE(of, afe4403_of_match); 412 413 static int __maybe_unused afe4403_suspend(struct device *dev) 414 { 415 struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev)); 416 struct afe4403_data *afe = iio_priv(indio_dev); 417 int ret; 418 419 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, 420 AFE440X_CONTROL2_PDN_AFE, 421 AFE440X_CONTROL2_PDN_AFE); 422 if (ret) 423 return ret; 424 425 ret = regulator_disable(afe->regulator); 426 if (ret) { 427 dev_err(dev, "Unable to disable regulator\n"); 428 return ret; 429 } 430 431 return 0; 432 } 433 434 static int __maybe_unused afe4403_resume(struct device *dev) 435 { 436 struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev)); 437 struct afe4403_data *afe = iio_priv(indio_dev); 438 int ret; 439 440 ret = regulator_enable(afe->regulator); 441 if (ret) { 442 dev_err(dev, "Unable to enable regulator\n"); 443 return ret; 444 } 445 446 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, 447 AFE440X_CONTROL2_PDN_AFE, 0); 448 if (ret) 449 return ret; 450 451 return 0; 452 } 453 454 static SIMPLE_DEV_PM_OPS(afe4403_pm_ops, afe4403_suspend, afe4403_resume); 455 456 static int afe4403_probe(struct spi_device *spi) 457 { 458 struct iio_dev *indio_dev; 459 struct afe4403_data *afe; 460 int i, ret; 461 462 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*afe)); 463 if (!indio_dev) 464 return -ENOMEM; 465 466 afe = iio_priv(indio_dev); 467 spi_set_drvdata(spi, indio_dev); 468 469 afe->dev = &spi->dev; 470 afe->spi = spi; 471 afe->irq = spi->irq; 472 473 afe->regmap = devm_regmap_init_spi(spi, &afe4403_regmap_config); 474 if (IS_ERR(afe->regmap)) { 475 dev_err(afe->dev, "Unable to allocate register map\n"); 476 return PTR_ERR(afe->regmap); 477 } 478 479 for (i = 0; i < F_MAX_FIELDS; i++) { 480 afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap, 481 afe4403_reg_fields[i]); 482 if (IS_ERR(afe->fields[i])) { 483 dev_err(afe->dev, "Unable to allocate regmap fields\n"); 484 return PTR_ERR(afe->fields[i]); 485 } 486 } 487 488 afe->regulator = devm_regulator_get(afe->dev, "tx_sup"); 489 if (IS_ERR(afe->regulator)) { 490 dev_err(afe->dev, "Unable to get regulator\n"); 491 return PTR_ERR(afe->regulator); 492 } 493 ret = regulator_enable(afe->regulator); 494 if (ret) { 495 dev_err(afe->dev, "Unable to enable regulator\n"); 496 return ret; 497 } 498 499 ret = regmap_write(afe->regmap, AFE440X_CONTROL0, 500 AFE440X_CONTROL0_SW_RESET); 501 if (ret) { 502 dev_err(afe->dev, "Unable to reset device\n"); 503 goto err_disable_reg; 504 } 505 506 ret = regmap_multi_reg_write(afe->regmap, afe4403_reg_sequences, 507 ARRAY_SIZE(afe4403_reg_sequences)); 508 if (ret) { 509 dev_err(afe->dev, "Unable to set register defaults\n"); 510 goto err_disable_reg; 511 } 512 513 indio_dev->modes = INDIO_DIRECT_MODE; 514 indio_dev->dev.parent = afe->dev; 515 indio_dev->channels = afe4403_channels; 516 indio_dev->num_channels = ARRAY_SIZE(afe4403_channels); 517 indio_dev->name = AFE4403_DRIVER_NAME; 518 indio_dev->info = &afe4403_iio_info; 519 520 if (afe->irq > 0) { 521 afe->trig = devm_iio_trigger_alloc(afe->dev, 522 "%s-dev%d", 523 indio_dev->name, 524 indio_dev->id); 525 if (!afe->trig) { 526 dev_err(afe->dev, "Unable to allocate IIO trigger\n"); 527 ret = -ENOMEM; 528 goto err_disable_reg; 529 } 530 531 iio_trigger_set_drvdata(afe->trig, indio_dev); 532 533 afe->trig->ops = &afe4403_trigger_ops; 534 afe->trig->dev.parent = afe->dev; 535 536 ret = iio_trigger_register(afe->trig); 537 if (ret) { 538 dev_err(afe->dev, "Unable to register IIO trigger\n"); 539 goto err_disable_reg; 540 } 541 542 ret = devm_request_threaded_irq(afe->dev, afe->irq, 543 iio_trigger_generic_data_rdy_poll, 544 NULL, IRQF_ONESHOT, 545 AFE4403_DRIVER_NAME, 546 afe->trig); 547 if (ret) { 548 dev_err(afe->dev, "Unable to request IRQ\n"); 549 goto err_trig; 550 } 551 } 552 553 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, 554 afe4403_trigger_handler, NULL); 555 if (ret) { 556 dev_err(afe->dev, "Unable to setup buffer\n"); 557 goto err_trig; 558 } 559 560 ret = iio_device_register(indio_dev); 561 if (ret) { 562 dev_err(afe->dev, "Unable to register IIO device\n"); 563 goto err_buff; 564 } 565 566 return 0; 567 568 err_buff: 569 iio_triggered_buffer_cleanup(indio_dev); 570 err_trig: 571 if (afe->irq > 0) 572 iio_trigger_unregister(afe->trig); 573 err_disable_reg: 574 regulator_disable(afe->regulator); 575 576 return ret; 577 } 578 579 static int afe4403_remove(struct spi_device *spi) 580 { 581 struct iio_dev *indio_dev = spi_get_drvdata(spi); 582 struct afe4403_data *afe = iio_priv(indio_dev); 583 int ret; 584 585 iio_device_unregister(indio_dev); 586 587 iio_triggered_buffer_cleanup(indio_dev); 588 589 if (afe->irq > 0) 590 iio_trigger_unregister(afe->trig); 591 592 ret = regulator_disable(afe->regulator); 593 if (ret) { 594 dev_err(afe->dev, "Unable to disable regulator\n"); 595 return ret; 596 } 597 598 return 0; 599 } 600 601 static const struct spi_device_id afe4403_ids[] = { 602 { "afe4403", 0 }, 603 { /* sentinel */ } 604 }; 605 MODULE_DEVICE_TABLE(spi, afe4403_ids); 606 607 static struct spi_driver afe4403_spi_driver = { 608 .driver = { 609 .name = AFE4403_DRIVER_NAME, 610 .of_match_table = afe4403_of_match, 611 .pm = &afe4403_pm_ops, 612 }, 613 .probe = afe4403_probe, 614 .remove = afe4403_remove, 615 .id_table = afe4403_ids, 616 }; 617 module_spi_driver(afe4403_spi_driver); 618 619 MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); 620 MODULE_DESCRIPTION("TI AFE4403 Heart Rate Monitor and Pulse Oximeter AFE"); 621 MODULE_LICENSE("GPL v2"); 622