1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * AFE4403 Heart Rate Monitors and Low-Cost Pulse Oximeters 4 * 5 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/ 6 * Andrew F. Davis <afd@ti.com> 7 */ 8 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/interrupt.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/regmap.h> 15 #include <linux/spi/spi.h> 16 #include <linux/sysfs.h> 17 #include <linux/regulator/consumer.h> 18 19 #include <linux/iio/iio.h> 20 #include <linux/iio/sysfs.h> 21 #include <linux/iio/buffer.h> 22 #include <linux/iio/trigger.h> 23 #include <linux/iio/triggered_buffer.h> 24 #include <linux/iio/trigger_consumer.h> 25 26 #include <asm/unaligned.h> 27 28 #include "afe440x.h" 29 30 #define AFE4403_DRIVER_NAME "afe4403" 31 32 /* AFE4403 Registers */ 33 #define AFE4403_TIAGAIN 0x20 34 #define AFE4403_TIA_AMB_GAIN 0x21 35 36 enum afe4403_fields { 37 /* Gains */ 38 F_RF_LED1, F_CF_LED1, 39 F_RF_LED, F_CF_LED, 40 41 /* LED Current */ 42 F_ILED1, F_ILED2, 43 44 /* sentinel */ 45 F_MAX_FIELDS 46 }; 47 48 static const struct reg_field afe4403_reg_fields[] = { 49 /* Gains */ 50 [F_RF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 0, 2), 51 [F_CF_LED1] = REG_FIELD(AFE4403_TIAGAIN, 3, 7), 52 [F_RF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 0, 2), 53 [F_CF_LED] = REG_FIELD(AFE4403_TIA_AMB_GAIN, 3, 7), 54 /* LED Current */ 55 [F_ILED1] = REG_FIELD(AFE440X_LEDCNTRL, 0, 7), 56 [F_ILED2] = REG_FIELD(AFE440X_LEDCNTRL, 8, 15), 57 }; 58 59 /** 60 * struct afe4403_data - AFE4403 device instance data 61 * @dev: Device structure 62 * @spi: SPI device handle 63 * @regmap: Register map of the device 64 * @fields: Register fields of the device 65 * @regulator: Pointer to the regulator for the IC 66 * @trig: IIO trigger for this device 67 * @irq: ADC_RDY line interrupt number 68 */ 69 struct afe4403_data { 70 struct device *dev; 71 struct spi_device *spi; 72 struct regmap *regmap; 73 struct regmap_field *fields[F_MAX_FIELDS]; 74 struct regulator *regulator; 75 struct iio_trigger *trig; 76 int irq; 77 }; 78 79 enum afe4403_chan_id { 80 LED2 = 1, 81 ALED2, 82 LED1, 83 ALED1, 84 LED2_ALED2, 85 LED1_ALED1, 86 }; 87 88 static const unsigned int afe4403_channel_values[] = { 89 [LED2] = AFE440X_LED2VAL, 90 [ALED2] = AFE440X_ALED2VAL, 91 [LED1] = AFE440X_LED1VAL, 92 [ALED1] = AFE440X_ALED1VAL, 93 [LED2_ALED2] = AFE440X_LED2_ALED2VAL, 94 [LED1_ALED1] = AFE440X_LED1_ALED1VAL, 95 }; 96 97 static const unsigned int afe4403_channel_leds[] = { 98 [LED2] = F_ILED2, 99 [LED1] = F_ILED1, 100 }; 101 102 static const struct iio_chan_spec afe4403_channels[] = { 103 /* ADC values */ 104 AFE440X_INTENSITY_CHAN(LED2, 0), 105 AFE440X_INTENSITY_CHAN(ALED2, 0), 106 AFE440X_INTENSITY_CHAN(LED1, 0), 107 AFE440X_INTENSITY_CHAN(ALED1, 0), 108 AFE440X_INTENSITY_CHAN(LED2_ALED2, 0), 109 AFE440X_INTENSITY_CHAN(LED1_ALED1, 0), 110 /* LED current */ 111 AFE440X_CURRENT_CHAN(LED2), 112 AFE440X_CURRENT_CHAN(LED1), 113 }; 114 115 static const struct afe440x_val_table afe4403_res_table[] = { 116 { 500000 }, { 250000 }, { 100000 }, { 50000 }, 117 { 25000 }, { 10000 }, { 1000000 }, { 0 }, 118 }; 119 AFE440X_TABLE_ATTR(in_intensity_resistance_available, afe4403_res_table); 120 121 static const struct afe440x_val_table afe4403_cap_table[] = { 122 { 0, 5000 }, { 0, 10000 }, { 0, 20000 }, { 0, 25000 }, 123 { 0, 30000 }, { 0, 35000 }, { 0, 45000 }, { 0, 50000 }, 124 { 0, 55000 }, { 0, 60000 }, { 0, 70000 }, { 0, 75000 }, 125 { 0, 80000 }, { 0, 85000 }, { 0, 95000 }, { 0, 100000 }, 126 { 0, 155000 }, { 0, 160000 }, { 0, 170000 }, { 0, 175000 }, 127 { 0, 180000 }, { 0, 185000 }, { 0, 195000 }, { 0, 200000 }, 128 { 0, 205000 }, { 0, 210000 }, { 0, 220000 }, { 0, 225000 }, 129 { 0, 230000 }, { 0, 235000 }, { 0, 245000 }, { 0, 250000 }, 130 }; 131 AFE440X_TABLE_ATTR(in_intensity_capacitance_available, afe4403_cap_table); 132 133 static ssize_t afe440x_show_register(struct device *dev, 134 struct device_attribute *attr, 135 char *buf) 136 { 137 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 138 struct afe4403_data *afe = iio_priv(indio_dev); 139 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); 140 unsigned int reg_val; 141 int vals[2]; 142 int ret; 143 144 ret = regmap_field_read(afe->fields[afe440x_attr->field], ®_val); 145 if (ret) 146 return ret; 147 148 if (reg_val >= afe440x_attr->table_size) 149 return -EINVAL; 150 151 vals[0] = afe440x_attr->val_table[reg_val].integer; 152 vals[1] = afe440x_attr->val_table[reg_val].fract; 153 154 return iio_format_value(buf, IIO_VAL_INT_PLUS_MICRO, 2, vals); 155 } 156 157 static ssize_t afe440x_store_register(struct device *dev, 158 struct device_attribute *attr, 159 const char *buf, size_t count) 160 { 161 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 162 struct afe4403_data *afe = iio_priv(indio_dev); 163 struct afe440x_attr *afe440x_attr = to_afe440x_attr(attr); 164 int val, integer, fract, ret; 165 166 ret = iio_str_to_fixpoint(buf, 100000, &integer, &fract); 167 if (ret) 168 return ret; 169 170 for (val = 0; val < afe440x_attr->table_size; val++) 171 if (afe440x_attr->val_table[val].integer == integer && 172 afe440x_attr->val_table[val].fract == fract) 173 break; 174 if (val == afe440x_attr->table_size) 175 return -EINVAL; 176 177 ret = regmap_field_write(afe->fields[afe440x_attr->field], val); 178 if (ret) 179 return ret; 180 181 return count; 182 } 183 184 static AFE440X_ATTR(in_intensity1_resistance, F_RF_LED, afe4403_res_table); 185 static AFE440X_ATTR(in_intensity1_capacitance, F_CF_LED, afe4403_cap_table); 186 187 static AFE440X_ATTR(in_intensity2_resistance, F_RF_LED, afe4403_res_table); 188 static AFE440X_ATTR(in_intensity2_capacitance, F_CF_LED, afe4403_cap_table); 189 190 static AFE440X_ATTR(in_intensity3_resistance, F_RF_LED1, afe4403_res_table); 191 static AFE440X_ATTR(in_intensity3_capacitance, F_CF_LED1, afe4403_cap_table); 192 193 static AFE440X_ATTR(in_intensity4_resistance, F_RF_LED1, afe4403_res_table); 194 static AFE440X_ATTR(in_intensity4_capacitance, F_CF_LED1, afe4403_cap_table); 195 196 static struct attribute *afe440x_attributes[] = { 197 &dev_attr_in_intensity_resistance_available.attr, 198 &dev_attr_in_intensity_capacitance_available.attr, 199 &afe440x_attr_in_intensity1_resistance.dev_attr.attr, 200 &afe440x_attr_in_intensity1_capacitance.dev_attr.attr, 201 &afe440x_attr_in_intensity2_resistance.dev_attr.attr, 202 &afe440x_attr_in_intensity2_capacitance.dev_attr.attr, 203 &afe440x_attr_in_intensity3_resistance.dev_attr.attr, 204 &afe440x_attr_in_intensity3_capacitance.dev_attr.attr, 205 &afe440x_attr_in_intensity4_resistance.dev_attr.attr, 206 &afe440x_attr_in_intensity4_capacitance.dev_attr.attr, 207 NULL 208 }; 209 210 static const struct attribute_group afe440x_attribute_group = { 211 .attrs = afe440x_attributes 212 }; 213 214 static int afe4403_read(struct afe4403_data *afe, unsigned int reg, u32 *val) 215 { 216 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ}; 217 u8 rx[3]; 218 int ret; 219 220 /* Enable reading from the device */ 221 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 222 if (ret) 223 return ret; 224 225 ret = spi_write_then_read(afe->spi, ®, 1, rx, sizeof(rx)); 226 if (ret) 227 return ret; 228 229 *val = get_unaligned_be24(&rx[0]); 230 231 /* Disable reading from the device */ 232 tx[3] = AFE440X_CONTROL0_WRITE; 233 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 234 if (ret) 235 return ret; 236 237 return 0; 238 } 239 240 static int afe4403_read_raw(struct iio_dev *indio_dev, 241 struct iio_chan_spec const *chan, 242 int *val, int *val2, long mask) 243 { 244 struct afe4403_data *afe = iio_priv(indio_dev); 245 unsigned int reg = afe4403_channel_values[chan->address]; 246 unsigned int field = afe4403_channel_leds[chan->address]; 247 int ret; 248 249 switch (chan->type) { 250 case IIO_INTENSITY: 251 switch (mask) { 252 case IIO_CHAN_INFO_RAW: 253 ret = afe4403_read(afe, reg, val); 254 if (ret) 255 return ret; 256 return IIO_VAL_INT; 257 } 258 break; 259 case IIO_CURRENT: 260 switch (mask) { 261 case IIO_CHAN_INFO_RAW: 262 ret = regmap_field_read(afe->fields[field], val); 263 if (ret) 264 return ret; 265 return IIO_VAL_INT; 266 case IIO_CHAN_INFO_SCALE: 267 *val = 0; 268 *val2 = 800000; 269 return IIO_VAL_INT_PLUS_MICRO; 270 } 271 break; 272 default: 273 break; 274 } 275 276 return -EINVAL; 277 } 278 279 static int afe4403_write_raw(struct iio_dev *indio_dev, 280 struct iio_chan_spec const *chan, 281 int val, int val2, long mask) 282 { 283 struct afe4403_data *afe = iio_priv(indio_dev); 284 unsigned int field = afe4403_channel_leds[chan->address]; 285 286 switch (chan->type) { 287 case IIO_CURRENT: 288 switch (mask) { 289 case IIO_CHAN_INFO_RAW: 290 return regmap_field_write(afe->fields[field], val); 291 } 292 break; 293 default: 294 break; 295 } 296 297 return -EINVAL; 298 } 299 300 static const struct iio_info afe4403_iio_info = { 301 .attrs = &afe440x_attribute_group, 302 .read_raw = afe4403_read_raw, 303 .write_raw = afe4403_write_raw, 304 }; 305 306 static irqreturn_t afe4403_trigger_handler(int irq, void *private) 307 { 308 struct iio_poll_func *pf = private; 309 struct iio_dev *indio_dev = pf->indio_dev; 310 struct afe4403_data *afe = iio_priv(indio_dev); 311 int ret, bit, i = 0; 312 s32 buffer[8]; 313 u8 tx[4] = {AFE440X_CONTROL0, 0x0, 0x0, AFE440X_CONTROL0_READ}; 314 u8 rx[3]; 315 316 /* Enable reading from the device */ 317 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 318 if (ret) 319 goto err; 320 321 for_each_set_bit(bit, indio_dev->active_scan_mask, 322 indio_dev->masklength) { 323 ret = spi_write_then_read(afe->spi, 324 &afe4403_channel_values[bit], 1, 325 rx, sizeof(rx)); 326 if (ret) 327 goto err; 328 329 buffer[i++] = get_unaligned_be24(&rx[0]); 330 } 331 332 /* Disable reading from the device */ 333 tx[3] = AFE440X_CONTROL0_WRITE; 334 ret = spi_write_then_read(afe->spi, tx, 4, NULL, 0); 335 if (ret) 336 goto err; 337 338 iio_push_to_buffers_with_timestamp(indio_dev, buffer, pf->timestamp); 339 err: 340 iio_trigger_notify_done(indio_dev->trig); 341 342 return IRQ_HANDLED; 343 } 344 345 static const struct iio_trigger_ops afe4403_trigger_ops = { 346 }; 347 348 #define AFE4403_TIMING_PAIRS \ 349 { AFE440X_LED2STC, 0x000050 }, \ 350 { AFE440X_LED2ENDC, 0x0003e7 }, \ 351 { AFE440X_LED1LEDSTC, 0x0007d0 }, \ 352 { AFE440X_LED1LEDENDC, 0x000bb7 }, \ 353 { AFE440X_ALED2STC, 0x000438 }, \ 354 { AFE440X_ALED2ENDC, 0x0007cf }, \ 355 { AFE440X_LED1STC, 0x000820 }, \ 356 { AFE440X_LED1ENDC, 0x000bb7 }, \ 357 { AFE440X_LED2LEDSTC, 0x000000 }, \ 358 { AFE440X_LED2LEDENDC, 0x0003e7 }, \ 359 { AFE440X_ALED1STC, 0x000c08 }, \ 360 { AFE440X_ALED1ENDC, 0x000f9f }, \ 361 { AFE440X_LED2CONVST, 0x0003ef }, \ 362 { AFE440X_LED2CONVEND, 0x0007cf }, \ 363 { AFE440X_ALED2CONVST, 0x0007d7 }, \ 364 { AFE440X_ALED2CONVEND, 0x000bb7 }, \ 365 { AFE440X_LED1CONVST, 0x000bbf }, \ 366 { AFE440X_LED1CONVEND, 0x009c3f }, \ 367 { AFE440X_ALED1CONVST, 0x000fa7 }, \ 368 { AFE440X_ALED1CONVEND, 0x001387 }, \ 369 { AFE440X_ADCRSTSTCT0, 0x0003e8 }, \ 370 { AFE440X_ADCRSTENDCT0, 0x0003eb }, \ 371 { AFE440X_ADCRSTSTCT1, 0x0007d0 }, \ 372 { AFE440X_ADCRSTENDCT1, 0x0007d3 }, \ 373 { AFE440X_ADCRSTSTCT2, 0x000bb8 }, \ 374 { AFE440X_ADCRSTENDCT2, 0x000bbb }, \ 375 { AFE440X_ADCRSTSTCT3, 0x000fa0 }, \ 376 { AFE440X_ADCRSTENDCT3, 0x000fa3 }, \ 377 { AFE440X_PRPCOUNT, 0x009c3f }, \ 378 { AFE440X_PDNCYCLESTC, 0x001518 }, \ 379 { AFE440X_PDNCYCLEENDC, 0x00991f } 380 381 static const struct reg_sequence afe4403_reg_sequences[] = { 382 AFE4403_TIMING_PAIRS, 383 { AFE440X_CONTROL1, AFE440X_CONTROL1_TIMEREN }, 384 { AFE4403_TIAGAIN, AFE440X_TIAGAIN_ENSEPGAIN }, 385 }; 386 387 static const struct regmap_range afe4403_yes_ranges[] = { 388 regmap_reg_range(AFE440X_LED2VAL, AFE440X_LED1_ALED1VAL), 389 }; 390 391 static const struct regmap_access_table afe4403_volatile_table = { 392 .yes_ranges = afe4403_yes_ranges, 393 .n_yes_ranges = ARRAY_SIZE(afe4403_yes_ranges), 394 }; 395 396 static const struct regmap_config afe4403_regmap_config = { 397 .reg_bits = 8, 398 .val_bits = 24, 399 400 .max_register = AFE440X_PDNCYCLEENDC, 401 .cache_type = REGCACHE_RBTREE, 402 .volatile_table = &afe4403_volatile_table, 403 }; 404 405 static const struct of_device_id afe4403_of_match[] = { 406 { .compatible = "ti,afe4403", }, 407 { /* sentinel */ } 408 }; 409 MODULE_DEVICE_TABLE(of, afe4403_of_match); 410 411 static int __maybe_unused afe4403_suspend(struct device *dev) 412 { 413 struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev)); 414 struct afe4403_data *afe = iio_priv(indio_dev); 415 int ret; 416 417 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, 418 AFE440X_CONTROL2_PDN_AFE, 419 AFE440X_CONTROL2_PDN_AFE); 420 if (ret) 421 return ret; 422 423 ret = regulator_disable(afe->regulator); 424 if (ret) { 425 dev_err(dev, "Unable to disable regulator\n"); 426 return ret; 427 } 428 429 return 0; 430 } 431 432 static int __maybe_unused afe4403_resume(struct device *dev) 433 { 434 struct iio_dev *indio_dev = spi_get_drvdata(to_spi_device(dev)); 435 struct afe4403_data *afe = iio_priv(indio_dev); 436 int ret; 437 438 ret = regulator_enable(afe->regulator); 439 if (ret) { 440 dev_err(dev, "Unable to enable regulator\n"); 441 return ret; 442 } 443 444 ret = regmap_update_bits(afe->regmap, AFE440X_CONTROL2, 445 AFE440X_CONTROL2_PDN_AFE, 0); 446 if (ret) 447 return ret; 448 449 return 0; 450 } 451 452 static SIMPLE_DEV_PM_OPS(afe4403_pm_ops, afe4403_suspend, afe4403_resume); 453 454 static int afe4403_probe(struct spi_device *spi) 455 { 456 struct iio_dev *indio_dev; 457 struct afe4403_data *afe; 458 int i, ret; 459 460 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*afe)); 461 if (!indio_dev) 462 return -ENOMEM; 463 464 afe = iio_priv(indio_dev); 465 spi_set_drvdata(spi, indio_dev); 466 467 afe->dev = &spi->dev; 468 afe->spi = spi; 469 afe->irq = spi->irq; 470 471 afe->regmap = devm_regmap_init_spi(spi, &afe4403_regmap_config); 472 if (IS_ERR(afe->regmap)) { 473 dev_err(afe->dev, "Unable to allocate register map\n"); 474 return PTR_ERR(afe->regmap); 475 } 476 477 for (i = 0; i < F_MAX_FIELDS; i++) { 478 afe->fields[i] = devm_regmap_field_alloc(afe->dev, afe->regmap, 479 afe4403_reg_fields[i]); 480 if (IS_ERR(afe->fields[i])) { 481 dev_err(afe->dev, "Unable to allocate regmap fields\n"); 482 return PTR_ERR(afe->fields[i]); 483 } 484 } 485 486 afe->regulator = devm_regulator_get(afe->dev, "tx_sup"); 487 if (IS_ERR(afe->regulator)) { 488 dev_err(afe->dev, "Unable to get regulator\n"); 489 return PTR_ERR(afe->regulator); 490 } 491 ret = regulator_enable(afe->regulator); 492 if (ret) { 493 dev_err(afe->dev, "Unable to enable regulator\n"); 494 return ret; 495 } 496 497 ret = regmap_write(afe->regmap, AFE440X_CONTROL0, 498 AFE440X_CONTROL0_SW_RESET); 499 if (ret) { 500 dev_err(afe->dev, "Unable to reset device\n"); 501 goto err_disable_reg; 502 } 503 504 ret = regmap_multi_reg_write(afe->regmap, afe4403_reg_sequences, 505 ARRAY_SIZE(afe4403_reg_sequences)); 506 if (ret) { 507 dev_err(afe->dev, "Unable to set register defaults\n"); 508 goto err_disable_reg; 509 } 510 511 indio_dev->modes = INDIO_DIRECT_MODE; 512 indio_dev->dev.parent = afe->dev; 513 indio_dev->channels = afe4403_channels; 514 indio_dev->num_channels = ARRAY_SIZE(afe4403_channels); 515 indio_dev->name = AFE4403_DRIVER_NAME; 516 indio_dev->info = &afe4403_iio_info; 517 518 if (afe->irq > 0) { 519 afe->trig = devm_iio_trigger_alloc(afe->dev, 520 "%s-dev%d", 521 indio_dev->name, 522 indio_dev->id); 523 if (!afe->trig) { 524 dev_err(afe->dev, "Unable to allocate IIO trigger\n"); 525 ret = -ENOMEM; 526 goto err_disable_reg; 527 } 528 529 iio_trigger_set_drvdata(afe->trig, indio_dev); 530 531 afe->trig->ops = &afe4403_trigger_ops; 532 afe->trig->dev.parent = afe->dev; 533 534 ret = iio_trigger_register(afe->trig); 535 if (ret) { 536 dev_err(afe->dev, "Unable to register IIO trigger\n"); 537 goto err_disable_reg; 538 } 539 540 ret = devm_request_threaded_irq(afe->dev, afe->irq, 541 iio_trigger_generic_data_rdy_poll, 542 NULL, IRQF_ONESHOT, 543 AFE4403_DRIVER_NAME, 544 afe->trig); 545 if (ret) { 546 dev_err(afe->dev, "Unable to request IRQ\n"); 547 goto err_trig; 548 } 549 } 550 551 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time, 552 afe4403_trigger_handler, NULL); 553 if (ret) { 554 dev_err(afe->dev, "Unable to setup buffer\n"); 555 goto err_trig; 556 } 557 558 ret = iio_device_register(indio_dev); 559 if (ret) { 560 dev_err(afe->dev, "Unable to register IIO device\n"); 561 goto err_buff; 562 } 563 564 return 0; 565 566 err_buff: 567 iio_triggered_buffer_cleanup(indio_dev); 568 err_trig: 569 if (afe->irq > 0) 570 iio_trigger_unregister(afe->trig); 571 err_disable_reg: 572 regulator_disable(afe->regulator); 573 574 return ret; 575 } 576 577 static int afe4403_remove(struct spi_device *spi) 578 { 579 struct iio_dev *indio_dev = spi_get_drvdata(spi); 580 struct afe4403_data *afe = iio_priv(indio_dev); 581 int ret; 582 583 iio_device_unregister(indio_dev); 584 585 iio_triggered_buffer_cleanup(indio_dev); 586 587 if (afe->irq > 0) 588 iio_trigger_unregister(afe->trig); 589 590 ret = regulator_disable(afe->regulator); 591 if (ret) { 592 dev_err(afe->dev, "Unable to disable regulator\n"); 593 return ret; 594 } 595 596 return 0; 597 } 598 599 static const struct spi_device_id afe4403_ids[] = { 600 { "afe4403", 0 }, 601 { /* sentinel */ } 602 }; 603 MODULE_DEVICE_TABLE(spi, afe4403_ids); 604 605 static struct spi_driver afe4403_spi_driver = { 606 .driver = { 607 .name = AFE4403_DRIVER_NAME, 608 .of_match_table = afe4403_of_match, 609 .pm = &afe4403_pm_ops, 610 }, 611 .probe = afe4403_probe, 612 .remove = afe4403_remove, 613 .id_table = afe4403_ids, 614 }; 615 module_spi_driver(afe4403_spi_driver); 616 617 MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>"); 618 MODULE_DESCRIPTION("TI AFE4403 Heart Rate Monitor and Pulse Oximeter AFE"); 619 MODULE_LICENSE("GPL v2"); 620