1 /* 2 * LTC2632 Digital to analog convertors spi driver 3 * 4 * Copyright 2017 Maxime Roussin-B�langer 5 * 6 * Licensed under the GPL-2. 7 */ 8 9 #include <linux/device.h> 10 #include <linux/spi/spi.h> 11 #include <linux/module.h> 12 #include <linux/iio/iio.h> 13 14 #define LTC2632_DAC_CHANNELS 2 15 16 #define LTC2632_ADDR_DAC0 0x0 17 #define LTC2632_ADDR_DAC1 0x1 18 19 #define LTC2632_CMD_WRITE_INPUT_N 0x0 20 #define LTC2632_CMD_UPDATE_DAC_N 0x1 21 #define LTC2632_CMD_WRITE_INPUT_N_UPDATE_ALL 0x2 22 #define LTC2632_CMD_WRITE_INPUT_N_UPDATE_N 0x3 23 #define LTC2632_CMD_POWERDOWN_DAC_N 0x4 24 #define LTC2632_CMD_POWERDOWN_CHIP 0x5 25 #define LTC2632_CMD_INTERNAL_REFER 0x6 26 #define LTC2632_CMD_EXTERNAL_REFER 0x7 27 28 /** 29 * struct ltc2632_chip_info - chip specific information 30 * @channels: channel spec for the DAC 31 * @vref_mv: reference voltage 32 */ 33 struct ltc2632_chip_info { 34 const struct iio_chan_spec *channels; 35 const int vref_mv; 36 }; 37 38 /** 39 * struct ltc2632_state - driver instance specific data 40 * @spi_dev: pointer to the spi_device struct 41 * @powerdown_cache_mask used to show current channel powerdown state 42 */ 43 struct ltc2632_state { 44 struct spi_device *spi_dev; 45 unsigned int powerdown_cache_mask; 46 }; 47 48 enum ltc2632_supported_device_ids { 49 ID_LTC2632L12, 50 ID_LTC2632L10, 51 ID_LTC2632L8, 52 ID_LTC2632H12, 53 ID_LTC2632H10, 54 ID_LTC2632H8, 55 }; 56 57 static int ltc2632_spi_write(struct spi_device *spi, 58 u8 cmd, u8 addr, u16 val, u8 shift) 59 { 60 u32 data; 61 u8 msg[3]; 62 63 /* 64 * The input shift register is 24 bits wide. 65 * The next four are the command bits, C3 to C0, 66 * followed by the 4-bit DAC address, A3 to A0, and then the 67 * 12-, 10-, 8-bit data-word. The data-word comprises the 12-, 68 * 10-, 8-bit input code followed by 4, 6, or 8 don't care bits. 69 */ 70 data = (cmd << 20) | (addr << 16) | (val << shift); 71 msg[0] = data >> 16; 72 msg[1] = data >> 8; 73 msg[2] = data; 74 75 return spi_write(spi, msg, sizeof(msg)); 76 } 77 78 static int ltc2632_read_raw(struct iio_dev *indio_dev, 79 struct iio_chan_spec const *chan, 80 int *val, 81 int *val2, 82 long m) 83 { 84 struct ltc2632_chip_info *chip_info; 85 86 const struct ltc2632_state *st = iio_priv(indio_dev); 87 const struct spi_device_id *spi_dev_id = spi_get_device_id(st->spi_dev); 88 89 chip_info = (struct ltc2632_chip_info *)spi_dev_id->driver_data; 90 91 switch (m) { 92 case IIO_CHAN_INFO_SCALE: 93 *val = chip_info->vref_mv; 94 *val2 = chan->scan_type.realbits; 95 return IIO_VAL_FRACTIONAL_LOG2; 96 } 97 return -EINVAL; 98 } 99 100 static int ltc2632_write_raw(struct iio_dev *indio_dev, 101 struct iio_chan_spec const *chan, 102 int val, 103 int val2, 104 long mask) 105 { 106 struct ltc2632_state *st = iio_priv(indio_dev); 107 108 switch (mask) { 109 case IIO_CHAN_INFO_RAW: 110 if (val >= (1 << chan->scan_type.realbits) || val < 0) 111 return -EINVAL; 112 113 return ltc2632_spi_write(st->spi_dev, 114 LTC2632_CMD_WRITE_INPUT_N_UPDATE_N, 115 chan->address, val, 116 chan->scan_type.shift); 117 default: 118 return -EINVAL; 119 } 120 } 121 122 static ssize_t ltc2632_read_dac_powerdown(struct iio_dev *indio_dev, 123 uintptr_t private, 124 const struct iio_chan_spec *chan, 125 char *buf) 126 { 127 struct ltc2632_state *st = iio_priv(indio_dev); 128 129 return sprintf(buf, "%d\n", 130 !!(st->powerdown_cache_mask & (1 << chan->channel))); 131 } 132 133 static ssize_t ltc2632_write_dac_powerdown(struct iio_dev *indio_dev, 134 uintptr_t private, 135 const struct iio_chan_spec *chan, 136 const char *buf, 137 size_t len) 138 { 139 bool pwr_down; 140 int ret; 141 struct ltc2632_state *st = iio_priv(indio_dev); 142 143 ret = strtobool(buf, &pwr_down); 144 if (ret) 145 return ret; 146 147 if (pwr_down) 148 st->powerdown_cache_mask |= (1 << chan->channel); 149 else 150 st->powerdown_cache_mask &= ~(1 << chan->channel); 151 152 ret = ltc2632_spi_write(st->spi_dev, 153 LTC2632_CMD_POWERDOWN_DAC_N, 154 chan->channel, 0, 0); 155 156 return ret ? ret : len; 157 } 158 159 static const struct iio_info ltc2632_info = { 160 .write_raw = ltc2632_write_raw, 161 .read_raw = ltc2632_read_raw, 162 }; 163 164 static const struct iio_chan_spec_ext_info ltc2632_ext_info[] = { 165 { 166 .name = "powerdown", 167 .read = ltc2632_read_dac_powerdown, 168 .write = ltc2632_write_dac_powerdown, 169 .shared = IIO_SEPARATE, 170 }, 171 { }, 172 }; 173 174 #define LTC2632_CHANNEL(_chan, _bits) { \ 175 .type = IIO_VOLTAGE, \ 176 .indexed = 1, \ 177 .output = 1, \ 178 .channel = (_chan), \ 179 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 180 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 181 .address = (_chan), \ 182 .scan_type = { \ 183 .realbits = (_bits), \ 184 .shift = 16 - (_bits), \ 185 }, \ 186 .ext_info = ltc2632_ext_info, \ 187 } 188 189 #define DECLARE_LTC2632_CHANNELS(_name, _bits) \ 190 const struct iio_chan_spec _name ## _channels[] = { \ 191 LTC2632_CHANNEL(0, _bits), \ 192 LTC2632_CHANNEL(1, _bits), \ 193 } 194 195 static DECLARE_LTC2632_CHANNELS(ltc2632l12, 12); 196 static DECLARE_LTC2632_CHANNELS(ltc2632l10, 10); 197 static DECLARE_LTC2632_CHANNELS(ltc2632l8, 8); 198 199 static DECLARE_LTC2632_CHANNELS(ltc2632h12, 12); 200 static DECLARE_LTC2632_CHANNELS(ltc2632h10, 10); 201 static DECLARE_LTC2632_CHANNELS(ltc2632h8, 8); 202 203 static const struct ltc2632_chip_info ltc2632_chip_info_tbl[] = { 204 [ID_LTC2632L12] = { 205 .channels = ltc2632l12_channels, 206 .vref_mv = 2500, 207 }, 208 [ID_LTC2632L10] = { 209 .channels = ltc2632l10_channels, 210 .vref_mv = 2500, 211 }, 212 [ID_LTC2632L8] = { 213 .channels = ltc2632l8_channels, 214 .vref_mv = 2500, 215 }, 216 [ID_LTC2632H12] = { 217 .channels = ltc2632h12_channels, 218 .vref_mv = 4096, 219 }, 220 [ID_LTC2632H10] = { 221 .channels = ltc2632h10_channels, 222 .vref_mv = 4096, 223 }, 224 [ID_LTC2632H8] = { 225 .channels = ltc2632h8_channels, 226 .vref_mv = 4096, 227 }, 228 }; 229 230 static int ltc2632_probe(struct spi_device *spi) 231 { 232 struct ltc2632_state *st; 233 struct iio_dev *indio_dev; 234 struct ltc2632_chip_info *chip_info; 235 int ret; 236 237 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 238 if (!indio_dev) 239 return -ENOMEM; 240 241 st = iio_priv(indio_dev); 242 243 spi_set_drvdata(spi, indio_dev); 244 st->spi_dev = spi; 245 246 chip_info = (struct ltc2632_chip_info *) 247 spi_get_device_id(spi)->driver_data; 248 249 indio_dev->dev.parent = &spi->dev; 250 indio_dev->name = dev_of_node(&spi->dev) ? dev_of_node(&spi->dev)->name 251 : spi_get_device_id(spi)->name; 252 indio_dev->info = <c2632_info; 253 indio_dev->modes = INDIO_DIRECT_MODE; 254 indio_dev->channels = chip_info->channels; 255 indio_dev->num_channels = LTC2632_DAC_CHANNELS; 256 257 ret = ltc2632_spi_write(spi, LTC2632_CMD_INTERNAL_REFER, 0, 0, 0); 258 if (ret) { 259 dev_err(&spi->dev, 260 "Set internal reference command failed, %d\n", ret); 261 return ret; 262 } 263 264 return devm_iio_device_register(&spi->dev, indio_dev); 265 } 266 267 static const struct spi_device_id ltc2632_id[] = { 268 { "ltc2632-l12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632L12] }, 269 { "ltc2632-l10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632L10] }, 270 { "ltc2632-l8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632L8] }, 271 { "ltc2632-h12", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632H12] }, 272 { "ltc2632-h10", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632H10] }, 273 { "ltc2632-h8", (kernel_ulong_t)<c2632_chip_info_tbl[ID_LTC2632H8] }, 274 {} 275 }; 276 MODULE_DEVICE_TABLE(spi, ltc2632_id); 277 278 static struct spi_driver ltc2632_driver = { 279 .driver = { 280 .name = "ltc2632", 281 }, 282 .probe = ltc2632_probe, 283 .id_table = ltc2632_id, 284 }; 285 module_spi_driver(ltc2632_driver); 286 287 static const struct of_device_id ltc2632_of_match[] = { 288 { 289 .compatible = "lltc,ltc2632-l12", 290 .data = <c2632_chip_info_tbl[ID_LTC2632L12] 291 }, { 292 .compatible = "lltc,ltc2632-l10", 293 .data = <c2632_chip_info_tbl[ID_LTC2632L10] 294 }, { 295 .compatible = "lltc,ltc2632-l8", 296 .data = <c2632_chip_info_tbl[ID_LTC2632L8] 297 }, { 298 .compatible = "lltc,ltc2632-h12", 299 .data = <c2632_chip_info_tbl[ID_LTC2632H12] 300 }, { 301 .compatible = "lltc,ltc2632-h10", 302 .data = <c2632_chip_info_tbl[ID_LTC2632H10] 303 }, { 304 .compatible = "lltc,ltc2632-h8", 305 .data = <c2632_chip_info_tbl[ID_LTC2632H8] 306 }, 307 {} 308 }; 309 MODULE_DEVICE_TABLE(of, ltc2632_of_match); 310 311 MODULE_AUTHOR("Maxime Roussin-Belanger <maxime.roussinbelanger@gmail.com>"); 312 MODULE_DESCRIPTION("LTC2632 DAC SPI driver"); 313 MODULE_LICENSE("GPL v2"); 314