1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Analog devices AD5764, AD5764R, AD5744, AD5744R quad-channel 4 * Digital to Analog Converters driver 5 * 6 * Copyright 2011 Analog Devices Inc. 7 */ 8 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/module.h> 12 #include <linux/kernel.h> 13 #include <linux/spi/spi.h> 14 #include <linux/slab.h> 15 #include <linux/sysfs.h> 16 #include <linux/regulator/consumer.h> 17 18 #include <linux/iio/iio.h> 19 #include <linux/iio/sysfs.h> 20 21 #define AD5764_REG_SF_NOP 0x0 22 #define AD5764_REG_SF_CONFIG 0x1 23 #define AD5764_REG_SF_CLEAR 0x4 24 #define AD5764_REG_SF_LOAD 0x5 25 #define AD5764_REG_DATA(x) ((2 << 3) | (x)) 26 #define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x)) 27 #define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x)) 28 #define AD5764_REG_OFFSET(x) ((5 << 3) | (x)) 29 30 #define AD5764_NUM_CHANNELS 4 31 32 /** 33 * struct ad5764_chip_info - chip specific information 34 * @int_vref: Value of the internal reference voltage in uV - 0 if external 35 * reference voltage is used 36 * @channel channel specification 37 */ 38 39 struct ad5764_chip_info { 40 unsigned long int_vref; 41 const struct iio_chan_spec *channels; 42 }; 43 44 /** 45 * struct ad5764_state - driver instance specific data 46 * @spi: spi_device 47 * @chip_info: chip info 48 * @vref_reg: vref supply regulators 49 * @data: spi transfer buffers 50 */ 51 52 struct ad5764_state { 53 struct spi_device *spi; 54 const struct ad5764_chip_info *chip_info; 55 struct regulator_bulk_data vref_reg[2]; 56 57 /* 58 * DMA (thus cache coherency maintenance) requires the 59 * transfer buffers to live in their own cache lines. 60 */ 61 union { 62 __be32 d32; 63 u8 d8[4]; 64 } data[2] ____cacheline_aligned; 65 }; 66 67 enum ad5764_type { 68 ID_AD5744, 69 ID_AD5744R, 70 ID_AD5764, 71 ID_AD5764R, 72 }; 73 74 #define AD5764_CHANNEL(_chan, _bits) { \ 75 .type = IIO_VOLTAGE, \ 76 .indexed = 1, \ 77 .output = 1, \ 78 .channel = (_chan), \ 79 .address = (_chan), \ 80 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 81 BIT(IIO_CHAN_INFO_SCALE) | \ 82 BIT(IIO_CHAN_INFO_CALIBSCALE) | \ 83 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 84 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET), \ 85 .scan_type = { \ 86 .sign = 'u', \ 87 .realbits = (_bits), \ 88 .storagebits = 16, \ 89 .shift = 16 - (_bits), \ 90 }, \ 91 } 92 93 #define DECLARE_AD5764_CHANNELS(_name, _bits) \ 94 const struct iio_chan_spec _name##_channels[] = { \ 95 AD5764_CHANNEL(0, (_bits)), \ 96 AD5764_CHANNEL(1, (_bits)), \ 97 AD5764_CHANNEL(2, (_bits)), \ 98 AD5764_CHANNEL(3, (_bits)), \ 99 }; 100 101 static DECLARE_AD5764_CHANNELS(ad5764, 16); 102 static DECLARE_AD5764_CHANNELS(ad5744, 14); 103 104 static const struct ad5764_chip_info ad5764_chip_infos[] = { 105 [ID_AD5744] = { 106 .int_vref = 0, 107 .channels = ad5744_channels, 108 }, 109 [ID_AD5744R] = { 110 .int_vref = 5000000, 111 .channels = ad5744_channels, 112 }, 113 [ID_AD5764] = { 114 .int_vref = 0, 115 .channels = ad5764_channels, 116 }, 117 [ID_AD5764R] = { 118 .int_vref = 5000000, 119 .channels = ad5764_channels, 120 }, 121 }; 122 123 static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg, 124 unsigned int val) 125 { 126 struct ad5764_state *st = iio_priv(indio_dev); 127 int ret; 128 129 mutex_lock(&indio_dev->mlock); 130 st->data[0].d32 = cpu_to_be32((reg << 16) | val); 131 132 ret = spi_write(st->spi, &st->data[0].d8[1], 3); 133 mutex_unlock(&indio_dev->mlock); 134 135 return ret; 136 } 137 138 static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg, 139 unsigned int *val) 140 { 141 struct ad5764_state *st = iio_priv(indio_dev); 142 int ret; 143 struct spi_transfer t[] = { 144 { 145 .tx_buf = &st->data[0].d8[1], 146 .len = 3, 147 .cs_change = 1, 148 }, { 149 .rx_buf = &st->data[1].d8[1], 150 .len = 3, 151 }, 152 }; 153 154 mutex_lock(&indio_dev->mlock); 155 156 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16)); 157 158 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); 159 if (ret >= 0) 160 *val = be32_to_cpu(st->data[1].d32) & 0xffff; 161 162 mutex_unlock(&indio_dev->mlock); 163 164 return ret; 165 } 166 167 static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info) 168 { 169 switch (info) { 170 case IIO_CHAN_INFO_RAW: 171 return AD5764_REG_DATA(chan->address); 172 case IIO_CHAN_INFO_CALIBBIAS: 173 return AD5764_REG_OFFSET(chan->address); 174 case IIO_CHAN_INFO_CALIBSCALE: 175 return AD5764_REG_FINE_GAIN(chan->address); 176 default: 177 break; 178 } 179 180 return 0; 181 } 182 183 static int ad5764_write_raw(struct iio_dev *indio_dev, 184 struct iio_chan_spec const *chan, int val, int val2, long info) 185 { 186 const int max_val = (1 << chan->scan_type.realbits); 187 unsigned int reg; 188 189 switch (info) { 190 case IIO_CHAN_INFO_RAW: 191 if (val >= max_val || val < 0) 192 return -EINVAL; 193 val <<= chan->scan_type.shift; 194 break; 195 case IIO_CHAN_INFO_CALIBBIAS: 196 if (val >= 128 || val < -128) 197 return -EINVAL; 198 break; 199 case IIO_CHAN_INFO_CALIBSCALE: 200 if (val >= 32 || val < -32) 201 return -EINVAL; 202 break; 203 default: 204 return -EINVAL; 205 } 206 207 reg = ad5764_chan_info_to_reg(chan, info); 208 return ad5764_write(indio_dev, reg, (u16)val); 209 } 210 211 static int ad5764_get_channel_vref(struct ad5764_state *st, 212 unsigned int channel) 213 { 214 if (st->chip_info->int_vref) 215 return st->chip_info->int_vref; 216 else 217 return regulator_get_voltage(st->vref_reg[channel / 2].consumer); 218 } 219 220 static int ad5764_read_raw(struct iio_dev *indio_dev, 221 struct iio_chan_spec const *chan, int *val, int *val2, long info) 222 { 223 struct ad5764_state *st = iio_priv(indio_dev); 224 unsigned int reg; 225 int vref; 226 int ret; 227 228 switch (info) { 229 case IIO_CHAN_INFO_RAW: 230 reg = AD5764_REG_DATA(chan->address); 231 ret = ad5764_read(indio_dev, reg, val); 232 if (ret < 0) 233 return ret; 234 *val >>= chan->scan_type.shift; 235 return IIO_VAL_INT; 236 case IIO_CHAN_INFO_CALIBBIAS: 237 reg = AD5764_REG_OFFSET(chan->address); 238 ret = ad5764_read(indio_dev, reg, val); 239 if (ret < 0) 240 return ret; 241 *val = sign_extend32(*val, 7); 242 return IIO_VAL_INT; 243 case IIO_CHAN_INFO_CALIBSCALE: 244 reg = AD5764_REG_FINE_GAIN(chan->address); 245 ret = ad5764_read(indio_dev, reg, val); 246 if (ret < 0) 247 return ret; 248 *val = sign_extend32(*val, 5); 249 return IIO_VAL_INT; 250 case IIO_CHAN_INFO_SCALE: 251 /* vout = 4 * vref + ((dac_code / 65536) - 0.5) */ 252 vref = ad5764_get_channel_vref(st, chan->channel); 253 if (vref < 0) 254 return vref; 255 256 *val = vref * 4 / 1000; 257 *val2 = chan->scan_type.realbits; 258 return IIO_VAL_FRACTIONAL_LOG2; 259 case IIO_CHAN_INFO_OFFSET: 260 *val = -(1 << chan->scan_type.realbits) / 2; 261 return IIO_VAL_INT; 262 } 263 264 return -EINVAL; 265 } 266 267 static const struct iio_info ad5764_info = { 268 .read_raw = ad5764_read_raw, 269 .write_raw = ad5764_write_raw, 270 }; 271 272 static int ad5764_probe(struct spi_device *spi) 273 { 274 enum ad5764_type type = spi_get_device_id(spi)->driver_data; 275 struct iio_dev *indio_dev; 276 struct ad5764_state *st; 277 int ret; 278 279 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 280 if (indio_dev == NULL) { 281 dev_err(&spi->dev, "Failed to allocate iio device\n"); 282 return -ENOMEM; 283 } 284 285 st = iio_priv(indio_dev); 286 spi_set_drvdata(spi, indio_dev); 287 288 st->spi = spi; 289 st->chip_info = &ad5764_chip_infos[type]; 290 291 indio_dev->dev.parent = &spi->dev; 292 indio_dev->name = spi_get_device_id(spi)->name; 293 indio_dev->info = &ad5764_info; 294 indio_dev->modes = INDIO_DIRECT_MODE; 295 indio_dev->num_channels = AD5764_NUM_CHANNELS; 296 indio_dev->channels = st->chip_info->channels; 297 298 if (st->chip_info->int_vref == 0) { 299 st->vref_reg[0].supply = "vrefAB"; 300 st->vref_reg[1].supply = "vrefCD"; 301 302 ret = devm_regulator_bulk_get(&st->spi->dev, 303 ARRAY_SIZE(st->vref_reg), st->vref_reg); 304 if (ret) { 305 dev_err(&spi->dev, "Failed to request vref regulators: %d\n", 306 ret); 307 return ret; 308 } 309 310 ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg), 311 st->vref_reg); 312 if (ret) { 313 dev_err(&spi->dev, "Failed to enable vref regulators: %d\n", 314 ret); 315 return ret; 316 } 317 } 318 319 ret = iio_device_register(indio_dev); 320 if (ret) { 321 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret); 322 goto error_disable_reg; 323 } 324 325 return 0; 326 327 error_disable_reg: 328 if (st->chip_info->int_vref == 0) 329 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg); 330 return ret; 331 } 332 333 static int ad5764_remove(struct spi_device *spi) 334 { 335 struct iio_dev *indio_dev = spi_get_drvdata(spi); 336 struct ad5764_state *st = iio_priv(indio_dev); 337 338 iio_device_unregister(indio_dev); 339 340 if (st->chip_info->int_vref == 0) 341 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg); 342 343 return 0; 344 } 345 346 static const struct spi_device_id ad5764_ids[] = { 347 { "ad5744", ID_AD5744 }, 348 { "ad5744r", ID_AD5744R }, 349 { "ad5764", ID_AD5764 }, 350 { "ad5764r", ID_AD5764R }, 351 { } 352 }; 353 MODULE_DEVICE_TABLE(spi, ad5764_ids); 354 355 static struct spi_driver ad5764_driver = { 356 .driver = { 357 .name = "ad5764", 358 }, 359 .probe = ad5764_probe, 360 .remove = ad5764_remove, 361 .id_table = ad5764_ids, 362 }; 363 module_spi_driver(ad5764_driver); 364 365 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 366 MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC"); 367 MODULE_LICENSE("GPL v2"); 368