1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Analog devices AD5764, AD5764R, AD5744, AD5744R quad-channel 4 * Digital to Analog Converters driver 5 * 6 * Copyright 2011 Analog Devices Inc. 7 */ 8 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/module.h> 12 #include <linux/kernel.h> 13 #include <linux/spi/spi.h> 14 #include <linux/slab.h> 15 #include <linux/sysfs.h> 16 #include <linux/regulator/consumer.h> 17 18 #include <linux/iio/iio.h> 19 #include <linux/iio/sysfs.h> 20 21 #define AD5764_REG_SF_NOP 0x0 22 #define AD5764_REG_SF_CONFIG 0x1 23 #define AD5764_REG_SF_CLEAR 0x4 24 #define AD5764_REG_SF_LOAD 0x5 25 #define AD5764_REG_DATA(x) ((2 << 3) | (x)) 26 #define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x)) 27 #define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x)) 28 #define AD5764_REG_OFFSET(x) ((5 << 3) | (x)) 29 30 #define AD5764_NUM_CHANNELS 4 31 32 /** 33 * struct ad5764_chip_info - chip specific information 34 * @int_vref: Value of the internal reference voltage in uV - 0 if external 35 * reference voltage is used 36 * @channels: channel specification 37 */ 38 struct ad5764_chip_info { 39 unsigned long int_vref; 40 const struct iio_chan_spec *channels; 41 }; 42 43 /** 44 * struct ad5764_state - driver instance specific data 45 * @spi: spi_device 46 * @chip_info: chip info 47 * @vref_reg: vref supply regulators 48 * @lock: lock to protect the data buffer during SPI ops 49 * @data: spi transfer buffers 50 */ 51 52 struct ad5764_state { 53 struct spi_device *spi; 54 const struct ad5764_chip_info *chip_info; 55 struct regulator_bulk_data vref_reg[2]; 56 struct mutex lock; 57 58 /* 59 * DMA (thus cache coherency maintenance) requires the 60 * transfer buffers to live in their own cache lines. 61 */ 62 union { 63 __be32 d32; 64 u8 d8[4]; 65 } data[2] ____cacheline_aligned; 66 }; 67 68 enum ad5764_type { 69 ID_AD5744, 70 ID_AD5744R, 71 ID_AD5764, 72 ID_AD5764R, 73 }; 74 75 #define AD5764_CHANNEL(_chan, _bits) { \ 76 .type = IIO_VOLTAGE, \ 77 .indexed = 1, \ 78 .output = 1, \ 79 .channel = (_chan), \ 80 .address = (_chan), \ 81 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 82 BIT(IIO_CHAN_INFO_SCALE) | \ 83 BIT(IIO_CHAN_INFO_CALIBSCALE) | \ 84 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 85 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET), \ 86 .scan_type = { \ 87 .sign = 'u', \ 88 .realbits = (_bits), \ 89 .storagebits = 16, \ 90 .shift = 16 - (_bits), \ 91 }, \ 92 } 93 94 #define DECLARE_AD5764_CHANNELS(_name, _bits) \ 95 const struct iio_chan_spec _name##_channels[] = { \ 96 AD5764_CHANNEL(0, (_bits)), \ 97 AD5764_CHANNEL(1, (_bits)), \ 98 AD5764_CHANNEL(2, (_bits)), \ 99 AD5764_CHANNEL(3, (_bits)), \ 100 }; 101 102 static DECLARE_AD5764_CHANNELS(ad5764, 16); 103 static DECLARE_AD5764_CHANNELS(ad5744, 14); 104 105 static const struct ad5764_chip_info ad5764_chip_infos[] = { 106 [ID_AD5744] = { 107 .int_vref = 0, 108 .channels = ad5744_channels, 109 }, 110 [ID_AD5744R] = { 111 .int_vref = 5000000, 112 .channels = ad5744_channels, 113 }, 114 [ID_AD5764] = { 115 .int_vref = 0, 116 .channels = ad5764_channels, 117 }, 118 [ID_AD5764R] = { 119 .int_vref = 5000000, 120 .channels = ad5764_channels, 121 }, 122 }; 123 124 static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg, 125 unsigned int val) 126 { 127 struct ad5764_state *st = iio_priv(indio_dev); 128 int ret; 129 130 mutex_lock(&st->lock); 131 st->data[0].d32 = cpu_to_be32((reg << 16) | val); 132 133 ret = spi_write(st->spi, &st->data[0].d8[1], 3); 134 mutex_unlock(&st->lock); 135 136 return ret; 137 } 138 139 static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg, 140 unsigned int *val) 141 { 142 struct ad5764_state *st = iio_priv(indio_dev); 143 int ret; 144 struct spi_transfer t[] = { 145 { 146 .tx_buf = &st->data[0].d8[1], 147 .len = 3, 148 .cs_change = 1, 149 }, { 150 .rx_buf = &st->data[1].d8[1], 151 .len = 3, 152 }, 153 }; 154 155 mutex_lock(&st->lock); 156 157 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16)); 158 159 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); 160 if (ret >= 0) 161 *val = be32_to_cpu(st->data[1].d32) & 0xffff; 162 163 mutex_unlock(&st->lock); 164 165 return ret; 166 } 167 168 static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info) 169 { 170 switch (info) { 171 case IIO_CHAN_INFO_RAW: 172 return AD5764_REG_DATA(chan->address); 173 case IIO_CHAN_INFO_CALIBBIAS: 174 return AD5764_REG_OFFSET(chan->address); 175 case IIO_CHAN_INFO_CALIBSCALE: 176 return AD5764_REG_FINE_GAIN(chan->address); 177 default: 178 break; 179 } 180 181 return 0; 182 } 183 184 static int ad5764_write_raw(struct iio_dev *indio_dev, 185 struct iio_chan_spec const *chan, int val, int val2, long info) 186 { 187 const int max_val = (1 << chan->scan_type.realbits); 188 unsigned int reg; 189 190 switch (info) { 191 case IIO_CHAN_INFO_RAW: 192 if (val >= max_val || val < 0) 193 return -EINVAL; 194 val <<= chan->scan_type.shift; 195 break; 196 case IIO_CHAN_INFO_CALIBBIAS: 197 if (val >= 128 || val < -128) 198 return -EINVAL; 199 break; 200 case IIO_CHAN_INFO_CALIBSCALE: 201 if (val >= 32 || val < -32) 202 return -EINVAL; 203 break; 204 default: 205 return -EINVAL; 206 } 207 208 reg = ad5764_chan_info_to_reg(chan, info); 209 return ad5764_write(indio_dev, reg, (u16)val); 210 } 211 212 static int ad5764_get_channel_vref(struct ad5764_state *st, 213 unsigned int channel) 214 { 215 if (st->chip_info->int_vref) 216 return st->chip_info->int_vref; 217 else 218 return regulator_get_voltage(st->vref_reg[channel / 2].consumer); 219 } 220 221 static int ad5764_read_raw(struct iio_dev *indio_dev, 222 struct iio_chan_spec const *chan, int *val, int *val2, long info) 223 { 224 struct ad5764_state *st = iio_priv(indio_dev); 225 unsigned int reg; 226 int vref; 227 int ret; 228 229 switch (info) { 230 case IIO_CHAN_INFO_RAW: 231 reg = AD5764_REG_DATA(chan->address); 232 ret = ad5764_read(indio_dev, reg, val); 233 if (ret < 0) 234 return ret; 235 *val >>= chan->scan_type.shift; 236 return IIO_VAL_INT; 237 case IIO_CHAN_INFO_CALIBBIAS: 238 reg = AD5764_REG_OFFSET(chan->address); 239 ret = ad5764_read(indio_dev, reg, val); 240 if (ret < 0) 241 return ret; 242 *val = sign_extend32(*val, 7); 243 return IIO_VAL_INT; 244 case IIO_CHAN_INFO_CALIBSCALE: 245 reg = AD5764_REG_FINE_GAIN(chan->address); 246 ret = ad5764_read(indio_dev, reg, val); 247 if (ret < 0) 248 return ret; 249 *val = sign_extend32(*val, 5); 250 return IIO_VAL_INT; 251 case IIO_CHAN_INFO_SCALE: 252 /* vout = 4 * vref + ((dac_code / 65536) - 0.5) */ 253 vref = ad5764_get_channel_vref(st, chan->channel); 254 if (vref < 0) 255 return vref; 256 257 *val = vref * 4 / 1000; 258 *val2 = chan->scan_type.realbits; 259 return IIO_VAL_FRACTIONAL_LOG2; 260 case IIO_CHAN_INFO_OFFSET: 261 *val = -(1 << chan->scan_type.realbits) / 2; 262 return IIO_VAL_INT; 263 } 264 265 return -EINVAL; 266 } 267 268 static const struct iio_info ad5764_info = { 269 .read_raw = ad5764_read_raw, 270 .write_raw = ad5764_write_raw, 271 }; 272 273 static int ad5764_probe(struct spi_device *spi) 274 { 275 enum ad5764_type type = spi_get_device_id(spi)->driver_data; 276 struct iio_dev *indio_dev; 277 struct ad5764_state *st; 278 int ret; 279 280 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 281 if (indio_dev == NULL) { 282 dev_err(&spi->dev, "Failed to allocate iio device\n"); 283 return -ENOMEM; 284 } 285 286 st = iio_priv(indio_dev); 287 spi_set_drvdata(spi, indio_dev); 288 289 st->spi = spi; 290 st->chip_info = &ad5764_chip_infos[type]; 291 292 indio_dev->name = spi_get_device_id(spi)->name; 293 indio_dev->info = &ad5764_info; 294 indio_dev->modes = INDIO_DIRECT_MODE; 295 indio_dev->num_channels = AD5764_NUM_CHANNELS; 296 indio_dev->channels = st->chip_info->channels; 297 298 mutex_init(&st->lock); 299 300 if (st->chip_info->int_vref == 0) { 301 st->vref_reg[0].supply = "vrefAB"; 302 st->vref_reg[1].supply = "vrefCD"; 303 304 ret = devm_regulator_bulk_get(&st->spi->dev, 305 ARRAY_SIZE(st->vref_reg), st->vref_reg); 306 if (ret) { 307 dev_err(&spi->dev, "Failed to request vref regulators: %d\n", 308 ret); 309 return ret; 310 } 311 312 ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg), 313 st->vref_reg); 314 if (ret) { 315 dev_err(&spi->dev, "Failed to enable vref regulators: %d\n", 316 ret); 317 return ret; 318 } 319 } 320 321 ret = iio_device_register(indio_dev); 322 if (ret) { 323 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret); 324 goto error_disable_reg; 325 } 326 327 return 0; 328 329 error_disable_reg: 330 if (st->chip_info->int_vref == 0) 331 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg); 332 return ret; 333 } 334 335 static void ad5764_remove(struct spi_device *spi) 336 { 337 struct iio_dev *indio_dev = spi_get_drvdata(spi); 338 struct ad5764_state *st = iio_priv(indio_dev); 339 340 iio_device_unregister(indio_dev); 341 342 if (st->chip_info->int_vref == 0) 343 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg); 344 } 345 346 static const struct spi_device_id ad5764_ids[] = { 347 { "ad5744", ID_AD5744 }, 348 { "ad5744r", ID_AD5744R }, 349 { "ad5764", ID_AD5764 }, 350 { "ad5764r", ID_AD5764R }, 351 { } 352 }; 353 MODULE_DEVICE_TABLE(spi, ad5764_ids); 354 355 static struct spi_driver ad5764_driver = { 356 .driver = { 357 .name = "ad5764", 358 }, 359 .probe = ad5764_probe, 360 .remove = ad5764_remove, 361 .id_table = ad5764_ids, 362 }; 363 module_spi_driver(ad5764_driver); 364 365 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 366 MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC"); 367 MODULE_LICENSE("GPL v2"); 368