1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Analog devices AD5764, AD5764R, AD5744, AD5744R quad-channel 4 * Digital to Analog Converters driver 5 * 6 * Copyright 2011 Analog Devices Inc. 7 */ 8 9 #include <linux/device.h> 10 #include <linux/err.h> 11 #include <linux/module.h> 12 #include <linux/kernel.h> 13 #include <linux/spi/spi.h> 14 #include <linux/slab.h> 15 #include <linux/sysfs.h> 16 #include <linux/regulator/consumer.h> 17 18 #include <linux/iio/iio.h> 19 #include <linux/iio/sysfs.h> 20 21 #define AD5764_REG_SF_NOP 0x0 22 #define AD5764_REG_SF_CONFIG 0x1 23 #define AD5764_REG_SF_CLEAR 0x4 24 #define AD5764_REG_SF_LOAD 0x5 25 #define AD5764_REG_DATA(x) ((2 << 3) | (x)) 26 #define AD5764_REG_COARSE_GAIN(x) ((3 << 3) | (x)) 27 #define AD5764_REG_FINE_GAIN(x) ((4 << 3) | (x)) 28 #define AD5764_REG_OFFSET(x) ((5 << 3) | (x)) 29 30 #define AD5764_NUM_CHANNELS 4 31 32 /** 33 * struct ad5764_chip_info - chip specific information 34 * @int_vref: Value of the internal reference voltage in uV - 0 if external 35 * reference voltage is used 36 * @channel channel specification 37 */ 38 39 struct ad5764_chip_info { 40 unsigned long int_vref; 41 const struct iio_chan_spec *channels; 42 }; 43 44 /** 45 * struct ad5764_state - driver instance specific data 46 * @spi: spi_device 47 * @chip_info: chip info 48 * @vref_reg: vref supply regulators 49 * @lock lock to protect the data buffer during SPI ops 50 * @data: spi transfer buffers 51 */ 52 53 struct ad5764_state { 54 struct spi_device *spi; 55 const struct ad5764_chip_info *chip_info; 56 struct regulator_bulk_data vref_reg[2]; 57 struct mutex lock; 58 59 /* 60 * DMA (thus cache coherency maintenance) requires the 61 * transfer buffers to live in their own cache lines. 62 */ 63 union { 64 __be32 d32; 65 u8 d8[4]; 66 } data[2] ____cacheline_aligned; 67 }; 68 69 enum ad5764_type { 70 ID_AD5744, 71 ID_AD5744R, 72 ID_AD5764, 73 ID_AD5764R, 74 }; 75 76 #define AD5764_CHANNEL(_chan, _bits) { \ 77 .type = IIO_VOLTAGE, \ 78 .indexed = 1, \ 79 .output = 1, \ 80 .channel = (_chan), \ 81 .address = (_chan), \ 82 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 83 BIT(IIO_CHAN_INFO_SCALE) | \ 84 BIT(IIO_CHAN_INFO_CALIBSCALE) | \ 85 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 86 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET), \ 87 .scan_type = { \ 88 .sign = 'u', \ 89 .realbits = (_bits), \ 90 .storagebits = 16, \ 91 .shift = 16 - (_bits), \ 92 }, \ 93 } 94 95 #define DECLARE_AD5764_CHANNELS(_name, _bits) \ 96 const struct iio_chan_spec _name##_channels[] = { \ 97 AD5764_CHANNEL(0, (_bits)), \ 98 AD5764_CHANNEL(1, (_bits)), \ 99 AD5764_CHANNEL(2, (_bits)), \ 100 AD5764_CHANNEL(3, (_bits)), \ 101 }; 102 103 static DECLARE_AD5764_CHANNELS(ad5764, 16); 104 static DECLARE_AD5764_CHANNELS(ad5744, 14); 105 106 static const struct ad5764_chip_info ad5764_chip_infos[] = { 107 [ID_AD5744] = { 108 .int_vref = 0, 109 .channels = ad5744_channels, 110 }, 111 [ID_AD5744R] = { 112 .int_vref = 5000000, 113 .channels = ad5744_channels, 114 }, 115 [ID_AD5764] = { 116 .int_vref = 0, 117 .channels = ad5764_channels, 118 }, 119 [ID_AD5764R] = { 120 .int_vref = 5000000, 121 .channels = ad5764_channels, 122 }, 123 }; 124 125 static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg, 126 unsigned int val) 127 { 128 struct ad5764_state *st = iio_priv(indio_dev); 129 int ret; 130 131 mutex_lock(&st->lock); 132 st->data[0].d32 = cpu_to_be32((reg << 16) | val); 133 134 ret = spi_write(st->spi, &st->data[0].d8[1], 3); 135 mutex_unlock(&st->lock); 136 137 return ret; 138 } 139 140 static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg, 141 unsigned int *val) 142 { 143 struct ad5764_state *st = iio_priv(indio_dev); 144 int ret; 145 struct spi_transfer t[] = { 146 { 147 .tx_buf = &st->data[0].d8[1], 148 .len = 3, 149 .cs_change = 1, 150 }, { 151 .rx_buf = &st->data[1].d8[1], 152 .len = 3, 153 }, 154 }; 155 156 mutex_lock(&st->lock); 157 158 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16)); 159 160 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); 161 if (ret >= 0) 162 *val = be32_to_cpu(st->data[1].d32) & 0xffff; 163 164 mutex_unlock(&st->lock); 165 166 return ret; 167 } 168 169 static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info) 170 { 171 switch (info) { 172 case IIO_CHAN_INFO_RAW: 173 return AD5764_REG_DATA(chan->address); 174 case IIO_CHAN_INFO_CALIBBIAS: 175 return AD5764_REG_OFFSET(chan->address); 176 case IIO_CHAN_INFO_CALIBSCALE: 177 return AD5764_REG_FINE_GAIN(chan->address); 178 default: 179 break; 180 } 181 182 return 0; 183 } 184 185 static int ad5764_write_raw(struct iio_dev *indio_dev, 186 struct iio_chan_spec const *chan, int val, int val2, long info) 187 { 188 const int max_val = (1 << chan->scan_type.realbits); 189 unsigned int reg; 190 191 switch (info) { 192 case IIO_CHAN_INFO_RAW: 193 if (val >= max_val || val < 0) 194 return -EINVAL; 195 val <<= chan->scan_type.shift; 196 break; 197 case IIO_CHAN_INFO_CALIBBIAS: 198 if (val >= 128 || val < -128) 199 return -EINVAL; 200 break; 201 case IIO_CHAN_INFO_CALIBSCALE: 202 if (val >= 32 || val < -32) 203 return -EINVAL; 204 break; 205 default: 206 return -EINVAL; 207 } 208 209 reg = ad5764_chan_info_to_reg(chan, info); 210 return ad5764_write(indio_dev, reg, (u16)val); 211 } 212 213 static int ad5764_get_channel_vref(struct ad5764_state *st, 214 unsigned int channel) 215 { 216 if (st->chip_info->int_vref) 217 return st->chip_info->int_vref; 218 else 219 return regulator_get_voltage(st->vref_reg[channel / 2].consumer); 220 } 221 222 static int ad5764_read_raw(struct iio_dev *indio_dev, 223 struct iio_chan_spec const *chan, int *val, int *val2, long info) 224 { 225 struct ad5764_state *st = iio_priv(indio_dev); 226 unsigned int reg; 227 int vref; 228 int ret; 229 230 switch (info) { 231 case IIO_CHAN_INFO_RAW: 232 reg = AD5764_REG_DATA(chan->address); 233 ret = ad5764_read(indio_dev, reg, val); 234 if (ret < 0) 235 return ret; 236 *val >>= chan->scan_type.shift; 237 return IIO_VAL_INT; 238 case IIO_CHAN_INFO_CALIBBIAS: 239 reg = AD5764_REG_OFFSET(chan->address); 240 ret = ad5764_read(indio_dev, reg, val); 241 if (ret < 0) 242 return ret; 243 *val = sign_extend32(*val, 7); 244 return IIO_VAL_INT; 245 case IIO_CHAN_INFO_CALIBSCALE: 246 reg = AD5764_REG_FINE_GAIN(chan->address); 247 ret = ad5764_read(indio_dev, reg, val); 248 if (ret < 0) 249 return ret; 250 *val = sign_extend32(*val, 5); 251 return IIO_VAL_INT; 252 case IIO_CHAN_INFO_SCALE: 253 /* vout = 4 * vref + ((dac_code / 65536) - 0.5) */ 254 vref = ad5764_get_channel_vref(st, chan->channel); 255 if (vref < 0) 256 return vref; 257 258 *val = vref * 4 / 1000; 259 *val2 = chan->scan_type.realbits; 260 return IIO_VAL_FRACTIONAL_LOG2; 261 case IIO_CHAN_INFO_OFFSET: 262 *val = -(1 << chan->scan_type.realbits) / 2; 263 return IIO_VAL_INT; 264 } 265 266 return -EINVAL; 267 } 268 269 static const struct iio_info ad5764_info = { 270 .read_raw = ad5764_read_raw, 271 .write_raw = ad5764_write_raw, 272 }; 273 274 static int ad5764_probe(struct spi_device *spi) 275 { 276 enum ad5764_type type = spi_get_device_id(spi)->driver_data; 277 struct iio_dev *indio_dev; 278 struct ad5764_state *st; 279 int ret; 280 281 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 282 if (indio_dev == NULL) { 283 dev_err(&spi->dev, "Failed to allocate iio device\n"); 284 return -ENOMEM; 285 } 286 287 st = iio_priv(indio_dev); 288 spi_set_drvdata(spi, indio_dev); 289 290 st->spi = spi; 291 st->chip_info = &ad5764_chip_infos[type]; 292 293 indio_dev->dev.parent = &spi->dev; 294 indio_dev->name = spi_get_device_id(spi)->name; 295 indio_dev->info = &ad5764_info; 296 indio_dev->modes = INDIO_DIRECT_MODE; 297 indio_dev->num_channels = AD5764_NUM_CHANNELS; 298 indio_dev->channels = st->chip_info->channels; 299 300 mutex_init(&st->lock); 301 302 if (st->chip_info->int_vref == 0) { 303 st->vref_reg[0].supply = "vrefAB"; 304 st->vref_reg[1].supply = "vrefCD"; 305 306 ret = devm_regulator_bulk_get(&st->spi->dev, 307 ARRAY_SIZE(st->vref_reg), st->vref_reg); 308 if (ret) { 309 dev_err(&spi->dev, "Failed to request vref regulators: %d\n", 310 ret); 311 return ret; 312 } 313 314 ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg), 315 st->vref_reg); 316 if (ret) { 317 dev_err(&spi->dev, "Failed to enable vref regulators: %d\n", 318 ret); 319 return ret; 320 } 321 } 322 323 ret = iio_device_register(indio_dev); 324 if (ret) { 325 dev_err(&spi->dev, "Failed to register iio device: %d\n", ret); 326 goto error_disable_reg; 327 } 328 329 return 0; 330 331 error_disable_reg: 332 if (st->chip_info->int_vref == 0) 333 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg); 334 return ret; 335 } 336 337 static int ad5764_remove(struct spi_device *spi) 338 { 339 struct iio_dev *indio_dev = spi_get_drvdata(spi); 340 struct ad5764_state *st = iio_priv(indio_dev); 341 342 iio_device_unregister(indio_dev); 343 344 if (st->chip_info->int_vref == 0) 345 regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg); 346 347 return 0; 348 } 349 350 static const struct spi_device_id ad5764_ids[] = { 351 { "ad5744", ID_AD5744 }, 352 { "ad5744r", ID_AD5744R }, 353 { "ad5764", ID_AD5764 }, 354 { "ad5764r", ID_AD5764R }, 355 { } 356 }; 357 MODULE_DEVICE_TABLE(spi, ad5764_ids); 358 359 static struct spi_driver ad5764_driver = { 360 .driver = { 361 .name = "ad5764", 362 }, 363 .probe = ad5764_probe, 364 .remove = ad5764_remove, 365 .id_table = ad5764_ids, 366 }; 367 module_spi_driver(ad5764_driver); 368 369 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 370 MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC"); 371 MODULE_LICENSE("GPL v2"); 372