10357e488SStefan Popa /* SPDX-License-Identifier: GPL-2.0+ */ 20357e488SStefan Popa /* 30357e488SStefan Popa * This file is part of AD5686 DAC driver 40357e488SStefan Popa * 50357e488SStefan Popa * Copyright 2018 Analog Devices Inc. 60357e488SStefan Popa */ 70357e488SStefan Popa 80357e488SStefan Popa #ifndef __DRIVERS_IIO_DAC_AD5686_H__ 90357e488SStefan Popa #define __DRIVERS_IIO_DAC_AD5686_H__ 100357e488SStefan Popa 110357e488SStefan Popa #include <linux/types.h> 120357e488SStefan Popa #include <linux/cache.h> 130357e488SStefan Popa #include <linux/mutex.h> 140357e488SStefan Popa #include <linux/kernel.h> 150357e488SStefan Popa 160357e488SStefan Popa #define AD5686_ADDR(x) ((x) << 16) 170357e488SStefan Popa #define AD5686_CMD(x) ((x) << 20) 180357e488SStefan Popa 190357e488SStefan Popa #define AD5686_ADDR_DAC(chan) (0x1 << (chan)) 200357e488SStefan Popa #define AD5686_ADDR_ALL_DAC 0xF 210357e488SStefan Popa 220357e488SStefan Popa #define AD5686_CMD_NOOP 0x0 230357e488SStefan Popa #define AD5686_CMD_WRITE_INPUT_N 0x1 240357e488SStefan Popa #define AD5686_CMD_UPDATE_DAC_N 0x2 250357e488SStefan Popa #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N 0x3 260357e488SStefan Popa #define AD5686_CMD_POWERDOWN_DAC 0x4 270357e488SStefan Popa #define AD5686_CMD_LDAC_MASK 0x5 280357e488SStefan Popa #define AD5686_CMD_RESET 0x6 290357e488SStefan Popa #define AD5686_CMD_INTERNAL_REFER_SETUP 0x7 300357e488SStefan Popa #define AD5686_CMD_DAISY_CHAIN_ENABLE 0x8 310357e488SStefan Popa #define AD5686_CMD_READBACK_ENABLE 0x9 320357e488SStefan Popa 330357e488SStefan Popa #define AD5686_LDAC_PWRDN_NONE 0x0 340357e488SStefan Popa #define AD5686_LDAC_PWRDN_1K 0x1 350357e488SStefan Popa #define AD5686_LDAC_PWRDN_100K 0x2 360357e488SStefan Popa #define AD5686_LDAC_PWRDN_3STATE 0x3 370357e488SStefan Popa 38be1b24d2SStefan Popa #define AD5686_CMD_CONTROL_REG 0x4 39be1b24d2SStefan Popa #define AD5693_REF_BIT_MSK BIT(12) 40be1b24d2SStefan Popa 410357e488SStefan Popa /** 420357e488SStefan Popa * ad5686_supported_device_ids: 430357e488SStefan Popa */ 440357e488SStefan Popa enum ad5686_supported_device_ids { 454177381bSStefan Popa ID_AD5671R, 460357e488SStefan Popa ID_AD5672R, 474177381bSStefan Popa ID_AD5675R, 480357e488SStefan Popa ID_AD5676, 490357e488SStefan Popa ID_AD5676R, 500357e488SStefan Popa ID_AD5684, 510357e488SStefan Popa ID_AD5684R, 520357e488SStefan Popa ID_AD5685R, 530357e488SStefan Popa ID_AD5686, 540357e488SStefan Popa ID_AD5686R, 55be1b24d2SStefan Popa ID_AD5691R, 56be1b24d2SStefan Popa ID_AD5692R, 57be1b24d2SStefan Popa ID_AD5693, 58be1b24d2SStefan Popa ID_AD5693R, 594177381bSStefan Popa ID_AD5694, 604177381bSStefan Popa ID_AD5694R, 614177381bSStefan Popa ID_AD5695R, 624177381bSStefan Popa ID_AD5696, 634177381bSStefan Popa ID_AD5696R, 640357e488SStefan Popa }; 650357e488SStefan Popa 66be1b24d2SStefan Popa enum ad5686_regmap_type { 67be1b24d2SStefan Popa AD5686_REGMAP, 68be1b24d2SStefan Popa AD5693_REGMAP 69be1b24d2SStefan Popa }; 70be1b24d2SStefan Popa 710357e488SStefan Popa struct ad5686_state; 720357e488SStefan Popa 730357e488SStefan Popa typedef int (*ad5686_write_func)(struct ad5686_state *st, 740357e488SStefan Popa u8 cmd, u8 addr, u16 val); 750357e488SStefan Popa 760357e488SStefan Popa typedef int (*ad5686_read_func)(struct ad5686_state *st, u8 addr); 770357e488SStefan Popa 780357e488SStefan Popa /** 790357e488SStefan Popa * struct ad5686_chip_info - chip specific information 800357e488SStefan Popa * @int_vref_mv: AD5620/40/60: the internal reference voltage 810357e488SStefan Popa * @num_channels: number of channels 820357e488SStefan Popa * @channel: channel specification 83be1b24d2SStefan Popa * @regmap_type: register map layout variant 840357e488SStefan Popa */ 850357e488SStefan Popa 860357e488SStefan Popa struct ad5686_chip_info { 870357e488SStefan Popa u16 int_vref_mv; 880357e488SStefan Popa unsigned int num_channels; 890357e488SStefan Popa struct iio_chan_spec *channels; 90be1b24d2SStefan Popa enum ad5686_regmap_type regmap_type; 910357e488SStefan Popa }; 920357e488SStefan Popa 930357e488SStefan Popa /** 940357e488SStefan Popa * struct ad5446_state - driver instance specific data 950357e488SStefan Popa * @spi: spi_device 960357e488SStefan Popa * @chip_info: chip model specific constants, available modes etc 970357e488SStefan Popa * @reg: supply regulator 980357e488SStefan Popa * @vref_mv: actual reference voltage used 990357e488SStefan Popa * @pwr_down_mask: power down mask 1000357e488SStefan Popa * @pwr_down_mode: current power down mode 101be1b24d2SStefan Popa * @use_internal_vref: set to true if the internal reference voltage is used 1020357e488SStefan Popa * @data: spi transfer buffers 1030357e488SStefan Popa */ 1040357e488SStefan Popa 1050357e488SStefan Popa struct ad5686_state { 1060357e488SStefan Popa struct device *dev; 1070357e488SStefan Popa const struct ad5686_chip_info *chip_info; 1080357e488SStefan Popa struct regulator *reg; 1090357e488SStefan Popa unsigned short vref_mv; 1100357e488SStefan Popa unsigned int pwr_down_mask; 1110357e488SStefan Popa unsigned int pwr_down_mode; 1120357e488SStefan Popa ad5686_write_func write; 1130357e488SStefan Popa ad5686_read_func read; 114be1b24d2SStefan Popa bool use_internal_vref; 1150357e488SStefan Popa 1160357e488SStefan Popa /* 1170357e488SStefan Popa * DMA (thus cache coherency maintenance) requires the 1180357e488SStefan Popa * transfer buffers to live in their own cache lines. 1190357e488SStefan Popa */ 1200357e488SStefan Popa 1210357e488SStefan Popa union { 1220357e488SStefan Popa __be32 d32; 1230357e488SStefan Popa __be16 d16; 1240357e488SStefan Popa u8 d8[4]; 1250357e488SStefan Popa } data[3] ____cacheline_aligned; 1260357e488SStefan Popa }; 1270357e488SStefan Popa 1280357e488SStefan Popa 1290357e488SStefan Popa int ad5686_probe(struct device *dev, 1300357e488SStefan Popa enum ad5686_supported_device_ids chip_type, 1310357e488SStefan Popa const char *name, ad5686_write_func write, 1320357e488SStefan Popa ad5686_read_func read); 1330357e488SStefan Popa 1340357e488SStefan Popa int ad5686_remove(struct device *dev); 1350357e488SStefan Popa 1360357e488SStefan Popa 1370357e488SStefan Popa #endif /* __DRIVERS_IIO_DAC_AD5686_H__ */ 138