1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * AD5686R, AD5685R, AD5684R Digital to analog converters driver 4 * 5 * Copyright 2011 Analog Devices Inc. 6 */ 7 8 #include <linux/interrupt.h> 9 #include <linux/fs.h> 10 #include <linux/device.h> 11 #include <linux/module.h> 12 #include <linux/kernel.h> 13 #include <linux/slab.h> 14 #include <linux/sysfs.h> 15 #include <linux/regulator/consumer.h> 16 17 #include <linux/iio/iio.h> 18 #include <linux/iio/sysfs.h> 19 20 #include "ad5686.h" 21 22 static const char * const ad5686_powerdown_modes[] = { 23 "1kohm_to_gnd", 24 "100kohm_to_gnd", 25 "three_state" 26 }; 27 28 static int ad5686_get_powerdown_mode(struct iio_dev *indio_dev, 29 const struct iio_chan_spec *chan) 30 { 31 struct ad5686_state *st = iio_priv(indio_dev); 32 33 return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1; 34 } 35 36 static int ad5686_set_powerdown_mode(struct iio_dev *indio_dev, 37 const struct iio_chan_spec *chan, 38 unsigned int mode) 39 { 40 struct ad5686_state *st = iio_priv(indio_dev); 41 42 st->pwr_down_mode &= ~(0x3 << (chan->channel * 2)); 43 st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2)); 44 45 return 0; 46 } 47 48 static const struct iio_enum ad5686_powerdown_mode_enum = { 49 .items = ad5686_powerdown_modes, 50 .num_items = ARRAY_SIZE(ad5686_powerdown_modes), 51 .get = ad5686_get_powerdown_mode, 52 .set = ad5686_set_powerdown_mode, 53 }; 54 55 static ssize_t ad5686_read_dac_powerdown(struct iio_dev *indio_dev, 56 uintptr_t private, const struct iio_chan_spec *chan, char *buf) 57 { 58 struct ad5686_state *st = iio_priv(indio_dev); 59 60 return sprintf(buf, "%d\n", !!(st->pwr_down_mask & 61 (0x3 << (chan->channel * 2)))); 62 } 63 64 static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev, 65 uintptr_t private, 66 const struct iio_chan_spec *chan, 67 const char *buf, 68 size_t len) 69 { 70 bool readin; 71 int ret; 72 struct ad5686_state *st = iio_priv(indio_dev); 73 unsigned int val, ref_bit_msk; 74 u8 shift, address = 0; 75 76 ret = strtobool(buf, &readin); 77 if (ret) 78 return ret; 79 80 if (readin) 81 st->pwr_down_mask |= (0x3 << (chan->channel * 2)); 82 else 83 st->pwr_down_mask &= ~(0x3 << (chan->channel * 2)); 84 85 switch (st->chip_info->regmap_type) { 86 case AD5310_REGMAP: 87 shift = 9; 88 ref_bit_msk = AD5310_REF_BIT_MSK; 89 break; 90 case AD5683_REGMAP: 91 shift = 13; 92 ref_bit_msk = AD5683_REF_BIT_MSK; 93 break; 94 case AD5686_REGMAP: 95 shift = 0; 96 ref_bit_msk = 0; 97 /* AD5674R/AD5679R have 16 channels and 2 powerdown registers */ 98 if (chan->channel > 0x7) 99 address = 0x8; 100 break; 101 case AD5693_REGMAP: 102 shift = 13; 103 ref_bit_msk = AD5693_REF_BIT_MSK; 104 break; 105 default: 106 return -EINVAL; 107 } 108 109 val = ((st->pwr_down_mask & st->pwr_down_mode) << shift); 110 if (!st->use_internal_vref) 111 val |= ref_bit_msk; 112 113 ret = st->write(st, AD5686_CMD_POWERDOWN_DAC, 114 address, val >> (address * 2)); 115 116 return ret ? ret : len; 117 } 118 119 static int ad5686_read_raw(struct iio_dev *indio_dev, 120 struct iio_chan_spec const *chan, 121 int *val, 122 int *val2, 123 long m) 124 { 125 struct ad5686_state *st = iio_priv(indio_dev); 126 int ret; 127 128 switch (m) { 129 case IIO_CHAN_INFO_RAW: 130 mutex_lock(&st->lock); 131 ret = st->read(st, chan->address); 132 mutex_unlock(&st->lock); 133 if (ret < 0) 134 return ret; 135 *val = (ret >> chan->scan_type.shift) & 136 GENMASK(chan->scan_type.realbits - 1, 0); 137 return IIO_VAL_INT; 138 case IIO_CHAN_INFO_SCALE: 139 *val = st->vref_mv; 140 *val2 = chan->scan_type.realbits; 141 return IIO_VAL_FRACTIONAL_LOG2; 142 } 143 return -EINVAL; 144 } 145 146 static int ad5686_write_raw(struct iio_dev *indio_dev, 147 struct iio_chan_spec const *chan, 148 int val, 149 int val2, 150 long mask) 151 { 152 struct ad5686_state *st = iio_priv(indio_dev); 153 int ret; 154 155 switch (mask) { 156 case IIO_CHAN_INFO_RAW: 157 if (val > (1 << chan->scan_type.realbits) || val < 0) 158 return -EINVAL; 159 160 mutex_lock(&st->lock); 161 ret = st->write(st, 162 AD5686_CMD_WRITE_INPUT_N_UPDATE_N, 163 chan->address, 164 val << chan->scan_type.shift); 165 mutex_unlock(&st->lock); 166 break; 167 default: 168 ret = -EINVAL; 169 } 170 171 return ret; 172 } 173 174 static const struct iio_info ad5686_info = { 175 .read_raw = ad5686_read_raw, 176 .write_raw = ad5686_write_raw, 177 }; 178 179 static const struct iio_chan_spec_ext_info ad5686_ext_info[] = { 180 { 181 .name = "powerdown", 182 .read = ad5686_read_dac_powerdown, 183 .write = ad5686_write_dac_powerdown, 184 .shared = IIO_SEPARATE, 185 }, 186 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5686_powerdown_mode_enum), 187 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5686_powerdown_mode_enum), 188 { }, 189 }; 190 191 #define AD5868_CHANNEL(chan, addr, bits, _shift) { \ 192 .type = IIO_VOLTAGE, \ 193 .indexed = 1, \ 194 .output = 1, \ 195 .channel = chan, \ 196 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 197 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\ 198 .address = addr, \ 199 .scan_type = { \ 200 .sign = 'u', \ 201 .realbits = (bits), \ 202 .storagebits = 16, \ 203 .shift = (_shift), \ 204 }, \ 205 .ext_info = ad5686_ext_info, \ 206 } 207 208 #define DECLARE_AD5693_CHANNELS(name, bits, _shift) \ 209 static const struct iio_chan_spec name[] = { \ 210 AD5868_CHANNEL(0, 0, bits, _shift), \ 211 } 212 213 #define DECLARE_AD5338_CHANNELS(name, bits, _shift) \ 214 static const struct iio_chan_spec name[] = { \ 215 AD5868_CHANNEL(0, 1, bits, _shift), \ 216 AD5868_CHANNEL(1, 8, bits, _shift), \ 217 } 218 219 #define DECLARE_AD5686_CHANNELS(name, bits, _shift) \ 220 static const struct iio_chan_spec name[] = { \ 221 AD5868_CHANNEL(0, 1, bits, _shift), \ 222 AD5868_CHANNEL(1, 2, bits, _shift), \ 223 AD5868_CHANNEL(2, 4, bits, _shift), \ 224 AD5868_CHANNEL(3, 8, bits, _shift), \ 225 } 226 227 #define DECLARE_AD5676_CHANNELS(name, bits, _shift) \ 228 static const struct iio_chan_spec name[] = { \ 229 AD5868_CHANNEL(0, 0, bits, _shift), \ 230 AD5868_CHANNEL(1, 1, bits, _shift), \ 231 AD5868_CHANNEL(2, 2, bits, _shift), \ 232 AD5868_CHANNEL(3, 3, bits, _shift), \ 233 AD5868_CHANNEL(4, 4, bits, _shift), \ 234 AD5868_CHANNEL(5, 5, bits, _shift), \ 235 AD5868_CHANNEL(6, 6, bits, _shift), \ 236 AD5868_CHANNEL(7, 7, bits, _shift), \ 237 } 238 239 #define DECLARE_AD5679_CHANNELS(name, bits, _shift) \ 240 static const struct iio_chan_spec name[] = { \ 241 AD5868_CHANNEL(0, 0, bits, _shift), \ 242 AD5868_CHANNEL(1, 1, bits, _shift), \ 243 AD5868_CHANNEL(2, 2, bits, _shift), \ 244 AD5868_CHANNEL(3, 3, bits, _shift), \ 245 AD5868_CHANNEL(4, 4, bits, _shift), \ 246 AD5868_CHANNEL(5, 5, bits, _shift), \ 247 AD5868_CHANNEL(6, 6, bits, _shift), \ 248 AD5868_CHANNEL(7, 7, bits, _shift), \ 249 AD5868_CHANNEL(8, 8, bits, _shift), \ 250 AD5868_CHANNEL(9, 9, bits, _shift), \ 251 AD5868_CHANNEL(10, 10, bits, _shift), \ 252 AD5868_CHANNEL(11, 11, bits, _shift), \ 253 AD5868_CHANNEL(12, 12, bits, _shift), \ 254 AD5868_CHANNEL(13, 13, bits, _shift), \ 255 AD5868_CHANNEL(14, 14, bits, _shift), \ 256 AD5868_CHANNEL(15, 15, bits, _shift), \ 257 } 258 259 DECLARE_AD5693_CHANNELS(ad5310r_channels, 10, 2); 260 DECLARE_AD5693_CHANNELS(ad5311r_channels, 10, 6); 261 DECLARE_AD5338_CHANNELS(ad5338r_channels, 10, 6); 262 DECLARE_AD5676_CHANNELS(ad5672_channels, 12, 4); 263 DECLARE_AD5679_CHANNELS(ad5674r_channels, 12, 4); 264 DECLARE_AD5676_CHANNELS(ad5676_channels, 16, 0); 265 DECLARE_AD5679_CHANNELS(ad5679r_channels, 16, 0); 266 DECLARE_AD5686_CHANNELS(ad5684_channels, 12, 4); 267 DECLARE_AD5686_CHANNELS(ad5685r_channels, 14, 2); 268 DECLARE_AD5686_CHANNELS(ad5686_channels, 16, 0); 269 DECLARE_AD5693_CHANNELS(ad5693_channels, 16, 0); 270 DECLARE_AD5693_CHANNELS(ad5692r_channels, 14, 2); 271 DECLARE_AD5693_CHANNELS(ad5691r_channels, 12, 4); 272 273 static const struct ad5686_chip_info ad5686_chip_info_tbl[] = { 274 [ID_AD5310R] = { 275 .channels = ad5310r_channels, 276 .int_vref_mv = 2500, 277 .num_channels = 1, 278 .regmap_type = AD5310_REGMAP, 279 }, 280 [ID_AD5311R] = { 281 .channels = ad5311r_channels, 282 .int_vref_mv = 2500, 283 .num_channels = 1, 284 .regmap_type = AD5693_REGMAP, 285 }, 286 [ID_AD5338R] = { 287 .channels = ad5338r_channels, 288 .int_vref_mv = 2500, 289 .num_channels = 2, 290 .regmap_type = AD5686_REGMAP, 291 }, 292 [ID_AD5671R] = { 293 .channels = ad5672_channels, 294 .int_vref_mv = 2500, 295 .num_channels = 8, 296 .regmap_type = AD5686_REGMAP, 297 }, 298 [ID_AD5672R] = { 299 .channels = ad5672_channels, 300 .int_vref_mv = 2500, 301 .num_channels = 8, 302 .regmap_type = AD5686_REGMAP, 303 }, 304 [ID_AD5674R] = { 305 .channels = ad5674r_channels, 306 .int_vref_mv = 2500, 307 .num_channels = 16, 308 .regmap_type = AD5686_REGMAP, 309 }, 310 [ID_AD5675R] = { 311 .channels = ad5676_channels, 312 .int_vref_mv = 2500, 313 .num_channels = 8, 314 .regmap_type = AD5686_REGMAP, 315 }, 316 [ID_AD5676] = { 317 .channels = ad5676_channels, 318 .num_channels = 8, 319 .regmap_type = AD5686_REGMAP, 320 }, 321 [ID_AD5676R] = { 322 .channels = ad5676_channels, 323 .int_vref_mv = 2500, 324 .num_channels = 8, 325 .regmap_type = AD5686_REGMAP, 326 }, 327 [ID_AD5679R] = { 328 .channels = ad5679r_channels, 329 .int_vref_mv = 2500, 330 .num_channels = 16, 331 .regmap_type = AD5686_REGMAP, 332 }, 333 [ID_AD5681R] = { 334 .channels = ad5691r_channels, 335 .int_vref_mv = 2500, 336 .num_channels = 1, 337 .regmap_type = AD5683_REGMAP, 338 }, 339 [ID_AD5682R] = { 340 .channels = ad5692r_channels, 341 .int_vref_mv = 2500, 342 .num_channels = 1, 343 .regmap_type = AD5683_REGMAP, 344 }, 345 [ID_AD5683] = { 346 .channels = ad5693_channels, 347 .num_channels = 1, 348 .regmap_type = AD5683_REGMAP, 349 }, 350 [ID_AD5683R] = { 351 .channels = ad5693_channels, 352 .int_vref_mv = 2500, 353 .num_channels = 1, 354 .regmap_type = AD5683_REGMAP, 355 }, 356 [ID_AD5684] = { 357 .channels = ad5684_channels, 358 .num_channels = 4, 359 .regmap_type = AD5686_REGMAP, 360 }, 361 [ID_AD5684R] = { 362 .channels = ad5684_channels, 363 .int_vref_mv = 2500, 364 .num_channels = 4, 365 .regmap_type = AD5686_REGMAP, 366 }, 367 [ID_AD5685R] = { 368 .channels = ad5685r_channels, 369 .int_vref_mv = 2500, 370 .num_channels = 4, 371 .regmap_type = AD5686_REGMAP, 372 }, 373 [ID_AD5686] = { 374 .channels = ad5686_channels, 375 .num_channels = 4, 376 .regmap_type = AD5686_REGMAP, 377 }, 378 [ID_AD5686R] = { 379 .channels = ad5686_channels, 380 .int_vref_mv = 2500, 381 .num_channels = 4, 382 .regmap_type = AD5686_REGMAP, 383 }, 384 [ID_AD5691R] = { 385 .channels = ad5691r_channels, 386 .int_vref_mv = 2500, 387 .num_channels = 1, 388 .regmap_type = AD5693_REGMAP, 389 }, 390 [ID_AD5692R] = { 391 .channels = ad5692r_channels, 392 .int_vref_mv = 2500, 393 .num_channels = 1, 394 .regmap_type = AD5693_REGMAP, 395 }, 396 [ID_AD5693] = { 397 .channels = ad5693_channels, 398 .num_channels = 1, 399 .regmap_type = AD5693_REGMAP, 400 }, 401 [ID_AD5693R] = { 402 .channels = ad5693_channels, 403 .int_vref_mv = 2500, 404 .num_channels = 1, 405 .regmap_type = AD5693_REGMAP, 406 }, 407 [ID_AD5694] = { 408 .channels = ad5684_channels, 409 .num_channels = 4, 410 .regmap_type = AD5686_REGMAP, 411 }, 412 [ID_AD5694R] = { 413 .channels = ad5684_channels, 414 .int_vref_mv = 2500, 415 .num_channels = 4, 416 .regmap_type = AD5686_REGMAP, 417 }, 418 [ID_AD5696] = { 419 .channels = ad5686_channels, 420 .num_channels = 4, 421 .regmap_type = AD5686_REGMAP, 422 }, 423 [ID_AD5696R] = { 424 .channels = ad5686_channels, 425 .int_vref_mv = 2500, 426 .num_channels = 4, 427 .regmap_type = AD5686_REGMAP, 428 }, 429 }; 430 431 int ad5686_probe(struct device *dev, 432 enum ad5686_supported_device_ids chip_type, 433 const char *name, ad5686_write_func write, 434 ad5686_read_func read) 435 { 436 struct ad5686_state *st; 437 struct iio_dev *indio_dev; 438 unsigned int val, ref_bit_msk; 439 u8 cmd; 440 int ret, i, voltage_uv = 0; 441 442 indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); 443 if (indio_dev == NULL) 444 return -ENOMEM; 445 446 st = iio_priv(indio_dev); 447 dev_set_drvdata(dev, indio_dev); 448 449 st->dev = dev; 450 st->write = write; 451 st->read = read; 452 453 st->reg = devm_regulator_get_optional(dev, "vcc"); 454 if (!IS_ERR(st->reg)) { 455 ret = regulator_enable(st->reg); 456 if (ret) 457 return ret; 458 459 ret = regulator_get_voltage(st->reg); 460 if (ret < 0) 461 goto error_disable_reg; 462 463 voltage_uv = ret; 464 } 465 466 st->chip_info = &ad5686_chip_info_tbl[chip_type]; 467 468 if (voltage_uv) 469 st->vref_mv = voltage_uv / 1000; 470 else 471 st->vref_mv = st->chip_info->int_vref_mv; 472 473 /* Set all the power down mode for all channels to 1K pulldown */ 474 for (i = 0; i < st->chip_info->num_channels; i++) 475 st->pwr_down_mode |= (0x01 << (i * 2)); 476 477 indio_dev->name = name; 478 indio_dev->info = &ad5686_info; 479 indio_dev->modes = INDIO_DIRECT_MODE; 480 indio_dev->channels = st->chip_info->channels; 481 indio_dev->num_channels = st->chip_info->num_channels; 482 483 mutex_init(&st->lock); 484 485 switch (st->chip_info->regmap_type) { 486 case AD5310_REGMAP: 487 cmd = AD5686_CMD_CONTROL_REG; 488 ref_bit_msk = AD5310_REF_BIT_MSK; 489 st->use_internal_vref = !voltage_uv; 490 break; 491 case AD5683_REGMAP: 492 cmd = AD5686_CMD_CONTROL_REG; 493 ref_bit_msk = AD5683_REF_BIT_MSK; 494 st->use_internal_vref = !voltage_uv; 495 break; 496 case AD5686_REGMAP: 497 cmd = AD5686_CMD_INTERNAL_REFER_SETUP; 498 ref_bit_msk = 0; 499 break; 500 case AD5693_REGMAP: 501 cmd = AD5686_CMD_CONTROL_REG; 502 ref_bit_msk = AD5693_REF_BIT_MSK; 503 st->use_internal_vref = !voltage_uv; 504 break; 505 default: 506 ret = -EINVAL; 507 goto error_disable_reg; 508 } 509 510 val = (voltage_uv | ref_bit_msk); 511 512 ret = st->write(st, cmd, 0, !!val); 513 if (ret) 514 goto error_disable_reg; 515 516 ret = iio_device_register(indio_dev); 517 if (ret) 518 goto error_disable_reg; 519 520 return 0; 521 522 error_disable_reg: 523 if (!IS_ERR(st->reg)) 524 regulator_disable(st->reg); 525 return ret; 526 } 527 EXPORT_SYMBOL_GPL(ad5686_probe); 528 529 int ad5686_remove(struct device *dev) 530 { 531 struct iio_dev *indio_dev = dev_get_drvdata(dev); 532 struct ad5686_state *st = iio_priv(indio_dev); 533 534 iio_device_unregister(indio_dev); 535 if (!IS_ERR(st->reg)) 536 regulator_disable(st->reg); 537 538 return 0; 539 } 540 EXPORT_SYMBOL_GPL(ad5686_remove); 541 542 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>"); 543 MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC"); 544 MODULE_LICENSE("GPL v2"); 545