xref: /openbmc/linux/drivers/iio/dac/ad5686.c (revision 8b030a57)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * AD5686R, AD5685R, AD5684R Digital to analog converters  driver
4  *
5  * Copyright 2011 Analog Devices Inc.
6  */
7 
8 #include <linux/interrupt.h>
9 #include <linux/fs.h>
10 #include <linux/device.h>
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/slab.h>
14 #include <linux/sysfs.h>
15 #include <linux/regulator/consumer.h>
16 
17 #include <linux/iio/iio.h>
18 #include <linux/iio/sysfs.h>
19 
20 #include "ad5686.h"
21 
22 static const char * const ad5686_powerdown_modes[] = {
23 	"1kohm_to_gnd",
24 	"100kohm_to_gnd",
25 	"three_state"
26 };
27 
28 static int ad5686_get_powerdown_mode(struct iio_dev *indio_dev,
29 				     const struct iio_chan_spec *chan)
30 {
31 	struct ad5686_state *st = iio_priv(indio_dev);
32 
33 	return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1;
34 }
35 
36 static int ad5686_set_powerdown_mode(struct iio_dev *indio_dev,
37 				     const struct iio_chan_spec *chan,
38 				     unsigned int mode)
39 {
40 	struct ad5686_state *st = iio_priv(indio_dev);
41 
42 	st->pwr_down_mode &= ~(0x3 << (chan->channel * 2));
43 	st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2));
44 
45 	return 0;
46 }
47 
48 static const struct iio_enum ad5686_powerdown_mode_enum = {
49 	.items = ad5686_powerdown_modes,
50 	.num_items = ARRAY_SIZE(ad5686_powerdown_modes),
51 	.get = ad5686_get_powerdown_mode,
52 	.set = ad5686_set_powerdown_mode,
53 };
54 
55 static ssize_t ad5686_read_dac_powerdown(struct iio_dev *indio_dev,
56 		uintptr_t private, const struct iio_chan_spec *chan, char *buf)
57 {
58 	struct ad5686_state *st = iio_priv(indio_dev);
59 
60 	return sprintf(buf, "%d\n", !!(st->pwr_down_mask &
61 				       (0x3 << (chan->channel * 2))));
62 }
63 
64 static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
65 					  uintptr_t private,
66 					  const struct iio_chan_spec *chan,
67 					  const char *buf,
68 					  size_t len)
69 {
70 	bool readin;
71 	int ret;
72 	struct ad5686_state *st = iio_priv(indio_dev);
73 	unsigned int val, ref_bit_msk;
74 	u8 shift;
75 
76 	ret = strtobool(buf, &readin);
77 	if (ret)
78 		return ret;
79 
80 	if (readin)
81 		st->pwr_down_mask |= (0x3 << (chan->channel * 2));
82 	else
83 		st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
84 
85 	switch (st->chip_info->regmap_type) {
86 	case AD5310_REGMAP:
87 		shift = 9;
88 		ref_bit_msk = AD5310_REF_BIT_MSK;
89 		break;
90 	case AD5683_REGMAP:
91 		shift = 13;
92 		ref_bit_msk = AD5683_REF_BIT_MSK;
93 		break;
94 	case AD5686_REGMAP:
95 		shift = 0;
96 		ref_bit_msk = 0;
97 		break;
98 	case AD5693_REGMAP:
99 		shift = 13;
100 		ref_bit_msk = AD5693_REF_BIT_MSK;
101 		break;
102 	default:
103 		return -EINVAL;
104 	}
105 
106 	val = ((st->pwr_down_mask & st->pwr_down_mode) << shift);
107 	if (!st->use_internal_vref)
108 		val |= ref_bit_msk;
109 
110 	ret = st->write(st, AD5686_CMD_POWERDOWN_DAC, 0, val);
111 
112 	return ret ? ret : len;
113 }
114 
115 static int ad5686_read_raw(struct iio_dev *indio_dev,
116 			   struct iio_chan_spec const *chan,
117 			   int *val,
118 			   int *val2,
119 			   long m)
120 {
121 	struct ad5686_state *st = iio_priv(indio_dev);
122 	int ret;
123 
124 	switch (m) {
125 	case IIO_CHAN_INFO_RAW:
126 		mutex_lock(&indio_dev->mlock);
127 		ret = st->read(st, chan->address);
128 		mutex_unlock(&indio_dev->mlock);
129 		if (ret < 0)
130 			return ret;
131 		*val = (ret >> chan->scan_type.shift) &
132 			GENMASK(chan->scan_type.realbits - 1, 0);
133 		return IIO_VAL_INT;
134 	case IIO_CHAN_INFO_SCALE:
135 		*val = st->vref_mv;
136 		*val2 = chan->scan_type.realbits;
137 		return IIO_VAL_FRACTIONAL_LOG2;
138 	}
139 	return -EINVAL;
140 }
141 
142 static int ad5686_write_raw(struct iio_dev *indio_dev,
143 			    struct iio_chan_spec const *chan,
144 			    int val,
145 			    int val2,
146 			    long mask)
147 {
148 	struct ad5686_state *st = iio_priv(indio_dev);
149 	int ret;
150 
151 	switch (mask) {
152 	case IIO_CHAN_INFO_RAW:
153 		if (val > (1 << chan->scan_type.realbits) || val < 0)
154 			return -EINVAL;
155 
156 		mutex_lock(&indio_dev->mlock);
157 		ret = st->write(st,
158 				AD5686_CMD_WRITE_INPUT_N_UPDATE_N,
159 				chan->address,
160 				val << chan->scan_type.shift);
161 		mutex_unlock(&indio_dev->mlock);
162 		break;
163 	default:
164 		ret = -EINVAL;
165 	}
166 
167 	return ret;
168 }
169 
170 static const struct iio_info ad5686_info = {
171 	.read_raw = ad5686_read_raw,
172 	.write_raw = ad5686_write_raw,
173 };
174 
175 static const struct iio_chan_spec_ext_info ad5686_ext_info[] = {
176 	{
177 		.name = "powerdown",
178 		.read = ad5686_read_dac_powerdown,
179 		.write = ad5686_write_dac_powerdown,
180 		.shared = IIO_SEPARATE,
181 	},
182 	IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5686_powerdown_mode_enum),
183 	IIO_ENUM_AVAILABLE("powerdown_mode", &ad5686_powerdown_mode_enum),
184 	{ },
185 };
186 
187 #define AD5868_CHANNEL(chan, addr, bits, _shift) {		\
188 		.type = IIO_VOLTAGE,				\
189 		.indexed = 1,					\
190 		.output = 1,					\
191 		.channel = chan,				\
192 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),	\
193 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\
194 		.address = addr,				\
195 		.scan_type = {					\
196 			.sign = 'u',				\
197 			.realbits = (bits),			\
198 			.storagebits = 16,			\
199 			.shift = (_shift),			\
200 		},						\
201 		.ext_info = ad5686_ext_info,			\
202 }
203 
204 #define DECLARE_AD5693_CHANNELS(name, bits, _shift)		\
205 static struct iio_chan_spec name[] = {				\
206 		AD5868_CHANNEL(0, 0, bits, _shift),		\
207 }
208 
209 #define DECLARE_AD5686_CHANNELS(name, bits, _shift)		\
210 static struct iio_chan_spec name[] = {				\
211 		AD5868_CHANNEL(0, 1, bits, _shift),		\
212 		AD5868_CHANNEL(1, 2, bits, _shift),		\
213 		AD5868_CHANNEL(2, 4, bits, _shift),		\
214 		AD5868_CHANNEL(3, 8, bits, _shift),		\
215 }
216 
217 #define DECLARE_AD5676_CHANNELS(name, bits, _shift)		\
218 static struct iio_chan_spec name[] = {				\
219 		AD5868_CHANNEL(0, 0, bits, _shift),		\
220 		AD5868_CHANNEL(1, 1, bits, _shift),		\
221 		AD5868_CHANNEL(2, 2, bits, _shift),		\
222 		AD5868_CHANNEL(3, 3, bits, _shift),		\
223 		AD5868_CHANNEL(4, 4, bits, _shift),		\
224 		AD5868_CHANNEL(5, 5, bits, _shift),		\
225 		AD5868_CHANNEL(6, 6, bits, _shift),		\
226 		AD5868_CHANNEL(7, 7, bits, _shift),		\
227 }
228 
229 DECLARE_AD5693_CHANNELS(ad5310r_channels, 10, 2);
230 DECLARE_AD5693_CHANNELS(ad5311r_channels, 10, 6);
231 DECLARE_AD5676_CHANNELS(ad5672_channels, 12, 4);
232 DECLARE_AD5676_CHANNELS(ad5676_channels, 16, 0);
233 DECLARE_AD5686_CHANNELS(ad5684_channels, 12, 4);
234 DECLARE_AD5686_CHANNELS(ad5685r_channels, 14, 2);
235 DECLARE_AD5686_CHANNELS(ad5686_channels, 16, 0);
236 DECLARE_AD5693_CHANNELS(ad5693_channels, 16, 0);
237 DECLARE_AD5693_CHANNELS(ad5692r_channels, 14, 2);
238 DECLARE_AD5693_CHANNELS(ad5691r_channels, 12, 4);
239 
240 static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
241 	[ID_AD5310R] = {
242 		.channels = ad5310r_channels,
243 		.int_vref_mv = 2500,
244 		.num_channels = 1,
245 		.regmap_type = AD5310_REGMAP,
246 	},
247 	[ID_AD5311R] = {
248 		.channels = ad5311r_channels,
249 		.int_vref_mv = 2500,
250 		.num_channels = 1,
251 		.regmap_type = AD5693_REGMAP,
252 	},
253 	[ID_AD5671R] = {
254 		.channels = ad5672_channels,
255 		.int_vref_mv = 2500,
256 		.num_channels = 8,
257 		.regmap_type = AD5686_REGMAP,
258 	},
259 	[ID_AD5672R] = {
260 		.channels = ad5672_channels,
261 		.int_vref_mv = 2500,
262 		.num_channels = 8,
263 		.regmap_type = AD5686_REGMAP,
264 	},
265 	[ID_AD5675R] = {
266 		.channels = ad5676_channels,
267 		.int_vref_mv = 2500,
268 		.num_channels = 8,
269 		.regmap_type = AD5686_REGMAP,
270 	},
271 	[ID_AD5676] = {
272 		.channels = ad5676_channels,
273 		.num_channels = 8,
274 		.regmap_type = AD5686_REGMAP,
275 	},
276 	[ID_AD5676R] = {
277 		.channels = ad5676_channels,
278 		.int_vref_mv = 2500,
279 		.num_channels = 8,
280 		.regmap_type = AD5686_REGMAP,
281 	},
282 	[ID_AD5681R] = {
283 		.channels = ad5691r_channels,
284 		.int_vref_mv = 2500,
285 		.num_channels = 1,
286 		.regmap_type = AD5683_REGMAP,
287 	},
288 	[ID_AD5682R] = {
289 		.channels = ad5692r_channels,
290 		.int_vref_mv = 2500,
291 		.num_channels = 1,
292 		.regmap_type = AD5683_REGMAP,
293 	},
294 	[ID_AD5683] = {
295 		.channels = ad5693_channels,
296 		.num_channels = 1,
297 		.regmap_type = AD5683_REGMAP,
298 	},
299 	[ID_AD5683R] = {
300 		.channels = ad5693_channels,
301 		.int_vref_mv = 2500,
302 		.num_channels = 1,
303 		.regmap_type = AD5683_REGMAP,
304 	},
305 	[ID_AD5684] = {
306 		.channels = ad5684_channels,
307 		.num_channels = 4,
308 		.regmap_type = AD5686_REGMAP,
309 	},
310 	[ID_AD5684R] = {
311 		.channels = ad5684_channels,
312 		.int_vref_mv = 2500,
313 		.num_channels = 4,
314 		.regmap_type = AD5686_REGMAP,
315 	},
316 	[ID_AD5685R] = {
317 		.channels = ad5685r_channels,
318 		.int_vref_mv = 2500,
319 		.num_channels = 4,
320 		.regmap_type = AD5686_REGMAP,
321 	},
322 	[ID_AD5686] = {
323 		.channels = ad5686_channels,
324 		.num_channels = 4,
325 		.regmap_type = AD5686_REGMAP,
326 	},
327 	[ID_AD5686R] = {
328 		.channels = ad5686_channels,
329 		.int_vref_mv = 2500,
330 		.num_channels = 4,
331 		.regmap_type = AD5686_REGMAP,
332 	},
333 	[ID_AD5691R] = {
334 		.channels = ad5691r_channels,
335 		.int_vref_mv = 2500,
336 		.num_channels = 1,
337 		.regmap_type = AD5693_REGMAP,
338 	},
339 	[ID_AD5692R] = {
340 		.channels = ad5692r_channels,
341 		.int_vref_mv = 2500,
342 		.num_channels = 1,
343 		.regmap_type = AD5693_REGMAP,
344 	},
345 	[ID_AD5693] = {
346 		.channels = ad5693_channels,
347 		.num_channels = 1,
348 		.regmap_type = AD5693_REGMAP,
349 	},
350 	[ID_AD5693R] = {
351 		.channels = ad5693_channels,
352 		.int_vref_mv = 2500,
353 		.num_channels = 1,
354 		.regmap_type = AD5693_REGMAP,
355 	},
356 	[ID_AD5694] = {
357 		.channels = ad5684_channels,
358 		.num_channels = 4,
359 		.regmap_type = AD5686_REGMAP,
360 	},
361 	[ID_AD5694R] = {
362 		.channels = ad5684_channels,
363 		.int_vref_mv = 2500,
364 		.num_channels = 4,
365 		.regmap_type = AD5686_REGMAP,
366 	},
367 	[ID_AD5696] = {
368 		.channels = ad5686_channels,
369 		.num_channels = 4,
370 		.regmap_type = AD5686_REGMAP,
371 	},
372 	[ID_AD5696R] = {
373 		.channels = ad5686_channels,
374 		.int_vref_mv = 2500,
375 		.num_channels = 4,
376 		.regmap_type = AD5686_REGMAP,
377 	},
378 };
379 
380 int ad5686_probe(struct device *dev,
381 		 enum ad5686_supported_device_ids chip_type,
382 		 const char *name, ad5686_write_func write,
383 		 ad5686_read_func read)
384 {
385 	struct ad5686_state *st;
386 	struct iio_dev *indio_dev;
387 	unsigned int val, ref_bit_msk;
388 	u8 cmd;
389 	int ret, i, voltage_uv = 0;
390 
391 	indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
392 	if (indio_dev == NULL)
393 		return  -ENOMEM;
394 
395 	st = iio_priv(indio_dev);
396 	dev_set_drvdata(dev, indio_dev);
397 
398 	st->dev = dev;
399 	st->write = write;
400 	st->read = read;
401 
402 	st->reg = devm_regulator_get_optional(dev, "vcc");
403 	if (!IS_ERR(st->reg)) {
404 		ret = regulator_enable(st->reg);
405 		if (ret)
406 			return ret;
407 
408 		ret = regulator_get_voltage(st->reg);
409 		if (ret < 0)
410 			goto error_disable_reg;
411 
412 		voltage_uv = ret;
413 	}
414 
415 	st->chip_info = &ad5686_chip_info_tbl[chip_type];
416 
417 	if (voltage_uv)
418 		st->vref_mv = voltage_uv / 1000;
419 	else
420 		st->vref_mv = st->chip_info->int_vref_mv;
421 
422 	/* Set all the power down mode for all channels to 1K pulldown */
423 	for (i = 0; i < st->chip_info->num_channels; i++)
424 		st->pwr_down_mode |= (0x01 << (i * 2));
425 
426 	indio_dev->dev.parent = dev;
427 	indio_dev->name = name;
428 	indio_dev->info = &ad5686_info;
429 	indio_dev->modes = INDIO_DIRECT_MODE;
430 	indio_dev->channels = st->chip_info->channels;
431 	indio_dev->num_channels = st->chip_info->num_channels;
432 
433 	switch (st->chip_info->regmap_type) {
434 	case AD5310_REGMAP:
435 		cmd = AD5686_CMD_CONTROL_REG;
436 		ref_bit_msk = AD5310_REF_BIT_MSK;
437 		st->use_internal_vref = !voltage_uv;
438 		break;
439 	case AD5683_REGMAP:
440 		cmd = AD5686_CMD_CONTROL_REG;
441 		ref_bit_msk = AD5683_REF_BIT_MSK;
442 		st->use_internal_vref = !voltage_uv;
443 		break;
444 	case AD5686_REGMAP:
445 		cmd = AD5686_CMD_INTERNAL_REFER_SETUP;
446 		ref_bit_msk = 0;
447 		break;
448 	case AD5693_REGMAP:
449 		cmd = AD5686_CMD_CONTROL_REG;
450 		ref_bit_msk = AD5693_REF_BIT_MSK;
451 		st->use_internal_vref = !voltage_uv;
452 		break;
453 	default:
454 		ret = -EINVAL;
455 		goto error_disable_reg;
456 	}
457 
458 	val = (voltage_uv | ref_bit_msk);
459 
460 	ret = st->write(st, cmd, 0, !!val);
461 	if (ret)
462 		goto error_disable_reg;
463 
464 	ret = iio_device_register(indio_dev);
465 	if (ret)
466 		goto error_disable_reg;
467 
468 	return 0;
469 
470 error_disable_reg:
471 	if (!IS_ERR(st->reg))
472 		regulator_disable(st->reg);
473 	return ret;
474 }
475 EXPORT_SYMBOL_GPL(ad5686_probe);
476 
477 int ad5686_remove(struct device *dev)
478 {
479 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
480 	struct ad5686_state *st = iio_priv(indio_dev);
481 
482 	iio_device_unregister(indio_dev);
483 	if (!IS_ERR(st->reg))
484 		regulator_disable(st->reg);
485 
486 	return 0;
487 }
488 EXPORT_SYMBOL_GPL(ad5686_remove);
489 
490 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
491 MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC");
492 MODULE_LICENSE("GPL v2");
493