xref: /openbmc/linux/drivers/iio/dac/ad5421.c (revision d6fc9fcb)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * AD5421 Digital to analog converters  driver
4  *
5  * Copyright 2011 Analog Devices Inc.
6  */
7 
8 #include <linux/device.h>
9 #include <linux/delay.h>
10 #include <linux/err.h>
11 #include <linux/module.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 
18 #include <linux/iio/iio.h>
19 #include <linux/iio/sysfs.h>
20 #include <linux/iio/events.h>
21 #include <linux/iio/dac/ad5421.h>
22 
23 
24 #define AD5421_REG_DAC_DATA		0x1
25 #define AD5421_REG_CTRL			0x2
26 #define AD5421_REG_OFFSET		0x3
27 #define AD5421_REG_GAIN			0x4
28 /* load dac and fault shared the same register number. Writing to it will cause
29  * a dac load command, reading from it will return the fault status register */
30 #define AD5421_REG_LOAD_DAC		0x5
31 #define AD5421_REG_FAULT		0x5
32 #define AD5421_REG_FORCE_ALARM_CURRENT	0x6
33 #define AD5421_REG_RESET		0x7
34 #define AD5421_REG_START_CONVERSION	0x8
35 #define AD5421_REG_NOOP			0x9
36 
37 #define AD5421_CTRL_WATCHDOG_DISABLE	BIT(12)
38 #define AD5421_CTRL_AUTO_FAULT_READBACK	BIT(11)
39 #define AD5421_CTRL_MIN_CURRENT		BIT(9)
40 #define AD5421_CTRL_ADC_SOURCE_TEMP	BIT(8)
41 #define AD5421_CTRL_ADC_ENABLE		BIT(7)
42 #define AD5421_CTRL_PWR_DOWN_INT_VREF	BIT(6)
43 
44 #define AD5421_FAULT_SPI			BIT(15)
45 #define AD5421_FAULT_PEC			BIT(14)
46 #define AD5421_FAULT_OVER_CURRENT		BIT(13)
47 #define AD5421_FAULT_UNDER_CURRENT		BIT(12)
48 #define AD5421_FAULT_TEMP_OVER_140		BIT(11)
49 #define AD5421_FAULT_TEMP_OVER_100		BIT(10)
50 #define AD5421_FAULT_UNDER_VOLTAGE_6V		BIT(9)
51 #define AD5421_FAULT_UNDER_VOLTAGE_12V		BIT(8)
52 
53 /* These bits will cause the fault pin to go high */
54 #define AD5421_FAULT_TRIGGER_IRQ \
55 	(AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
56 	AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
57 
58 /**
59  * struct ad5421_state - driver instance specific data
60  * @spi:		spi_device
61  * @ctrl:		control register cache
62  * @current_range:	current range which the device is configured for
63  * @data:		spi transfer buffers
64  * @fault_mask:		software masking of events
65  */
66 struct ad5421_state {
67 	struct spi_device		*spi;
68 	unsigned int			ctrl;
69 	enum ad5421_current_range	current_range;
70 	unsigned int			fault_mask;
71 
72 	/*
73 	 * DMA (thus cache coherency maintenance) requires the
74 	 * transfer buffers to live in their own cache lines.
75 	 */
76 	union {
77 		__be32 d32;
78 		u8 d8[4];
79 	} data[2] ____cacheline_aligned;
80 };
81 
82 static const struct iio_event_spec ad5421_current_event[] = {
83 	{
84 		.type = IIO_EV_TYPE_THRESH,
85 		.dir = IIO_EV_DIR_RISING,
86 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
87 			BIT(IIO_EV_INFO_ENABLE),
88 	}, {
89 		.type = IIO_EV_TYPE_THRESH,
90 		.dir = IIO_EV_DIR_FALLING,
91 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
92 			BIT(IIO_EV_INFO_ENABLE),
93 	},
94 };
95 
96 static const struct iio_event_spec ad5421_temp_event[] = {
97 	{
98 		.type = IIO_EV_TYPE_THRESH,
99 		.dir = IIO_EV_DIR_RISING,
100 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
101 			BIT(IIO_EV_INFO_ENABLE),
102 	},
103 };
104 
105 static const struct iio_chan_spec ad5421_channels[] = {
106 	{
107 		.type = IIO_CURRENT,
108 		.indexed = 1,
109 		.output = 1,
110 		.channel = 0,
111 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
112 			BIT(IIO_CHAN_INFO_CALIBSCALE) |
113 			BIT(IIO_CHAN_INFO_CALIBBIAS),
114 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
115 			BIT(IIO_CHAN_INFO_OFFSET),
116 		.scan_type = {
117 			.sign = 'u',
118 			.realbits = 16,
119 			.storagebits = 16,
120 		},
121 		.event_spec = ad5421_current_event,
122 		.num_event_specs = ARRAY_SIZE(ad5421_current_event),
123 	},
124 	{
125 		.type = IIO_TEMP,
126 		.channel = -1,
127 		.event_spec = ad5421_temp_event,
128 		.num_event_specs = ARRAY_SIZE(ad5421_temp_event),
129 	},
130 };
131 
132 static int ad5421_write_unlocked(struct iio_dev *indio_dev,
133 	unsigned int reg, unsigned int val)
134 {
135 	struct ad5421_state *st = iio_priv(indio_dev);
136 
137 	st->data[0].d32 = cpu_to_be32((reg << 16) | val);
138 
139 	return spi_write(st->spi, &st->data[0].d8[1], 3);
140 }
141 
142 static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
143 	unsigned int val)
144 {
145 	int ret;
146 
147 	mutex_lock(&indio_dev->mlock);
148 	ret = ad5421_write_unlocked(indio_dev, reg, val);
149 	mutex_unlock(&indio_dev->mlock);
150 
151 	return ret;
152 }
153 
154 static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
155 {
156 	struct ad5421_state *st = iio_priv(indio_dev);
157 	int ret;
158 	struct spi_transfer t[] = {
159 		{
160 			.tx_buf = &st->data[0].d8[1],
161 			.len = 3,
162 			.cs_change = 1,
163 		}, {
164 			.rx_buf = &st->data[1].d8[1],
165 			.len = 3,
166 		},
167 	};
168 
169 	mutex_lock(&indio_dev->mlock);
170 
171 	st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
172 
173 	ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
174 	if (ret >= 0)
175 		ret = be32_to_cpu(st->data[1].d32) & 0xffff;
176 
177 	mutex_unlock(&indio_dev->mlock);
178 
179 	return ret;
180 }
181 
182 static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
183 	unsigned int clr)
184 {
185 	struct ad5421_state *st = iio_priv(indio_dev);
186 	unsigned int ret;
187 
188 	mutex_lock(&indio_dev->mlock);
189 
190 	st->ctrl &= ~clr;
191 	st->ctrl |= set;
192 
193 	ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
194 
195 	mutex_unlock(&indio_dev->mlock);
196 
197 	return ret;
198 }
199 
200 static irqreturn_t ad5421_fault_handler(int irq, void *data)
201 {
202 	struct iio_dev *indio_dev = data;
203 	struct ad5421_state *st = iio_priv(indio_dev);
204 	unsigned int fault;
205 	unsigned int old_fault = 0;
206 	unsigned int events;
207 
208 	fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
209 	if (!fault)
210 		return IRQ_NONE;
211 
212 	/* If we had a fault, this might mean that the DAC has lost its state
213 	 * and has been reset. Make sure that the control register actually
214 	 * contains what we expect it to contain. Otherwise the watchdog might
215 	 * be enabled and we get watchdog timeout faults, which will render the
216 	 * DAC unusable. */
217 	ad5421_update_ctrl(indio_dev, 0, 0);
218 
219 
220 	/* The fault pin stays high as long as a fault condition is present and
221 	 * it is not possible to mask fault conditions. For certain fault
222 	 * conditions for example like over-temperature it takes some time
223 	 * until the fault condition disappears. If we would exit the interrupt
224 	 * handler immediately after handling the event it would be entered
225 	 * again instantly. Thus we fall back to polling in case we detect that
226 	 * a interrupt condition is still present.
227 	 */
228 	do {
229 		/* 0xffff is a invalid value for the register and will only be
230 		 * read if there has been a communication error */
231 		if (fault == 0xffff)
232 			fault = 0;
233 
234 		/* we are only interested in new events */
235 		events = (old_fault ^ fault) & fault;
236 		events &= st->fault_mask;
237 
238 		if (events & AD5421_FAULT_OVER_CURRENT) {
239 			iio_push_event(indio_dev,
240 				IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
241 					0,
242 					IIO_EV_TYPE_THRESH,
243 					IIO_EV_DIR_RISING),
244 			iio_get_time_ns(indio_dev));
245 		}
246 
247 		if (events & AD5421_FAULT_UNDER_CURRENT) {
248 			iio_push_event(indio_dev,
249 				IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
250 					0,
251 					IIO_EV_TYPE_THRESH,
252 					IIO_EV_DIR_FALLING),
253 				iio_get_time_ns(indio_dev));
254 		}
255 
256 		if (events & AD5421_FAULT_TEMP_OVER_140) {
257 			iio_push_event(indio_dev,
258 				IIO_UNMOD_EVENT_CODE(IIO_TEMP,
259 					0,
260 					IIO_EV_TYPE_MAG,
261 					IIO_EV_DIR_RISING),
262 				iio_get_time_ns(indio_dev));
263 		}
264 
265 		old_fault = fault;
266 		fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
267 
268 		/* still active? go to sleep for some time */
269 		if (fault & AD5421_FAULT_TRIGGER_IRQ)
270 			msleep(1000);
271 
272 	} while (fault & AD5421_FAULT_TRIGGER_IRQ);
273 
274 
275 	return IRQ_HANDLED;
276 }
277 
278 static void ad5421_get_current_min_max(struct ad5421_state *st,
279 	unsigned int *min, unsigned int *max)
280 {
281 	/* The current range is configured using external pins, which are
282 	 * usually hard-wired and not run-time switchable. */
283 	switch (st->current_range) {
284 	case AD5421_CURRENT_RANGE_4mA_20mA:
285 		*min = 4000;
286 		*max = 20000;
287 		break;
288 	case AD5421_CURRENT_RANGE_3mA8_21mA:
289 		*min = 3800;
290 		*max = 21000;
291 		break;
292 	case AD5421_CURRENT_RANGE_3mA2_24mA:
293 		*min = 3200;
294 		*max = 24000;
295 		break;
296 	default:
297 		*min = 0;
298 		*max = 1;
299 		break;
300 	}
301 }
302 
303 static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
304 {
305 	unsigned int min, max;
306 
307 	ad5421_get_current_min_max(st, &min, &max);
308 	return (min * (1 << 16)) / (max - min);
309 }
310 
311 static int ad5421_read_raw(struct iio_dev *indio_dev,
312 	struct iio_chan_spec const *chan, int *val, int *val2, long m)
313 {
314 	struct ad5421_state *st = iio_priv(indio_dev);
315 	unsigned int min, max;
316 	int ret;
317 
318 	if (chan->type != IIO_CURRENT)
319 		return -EINVAL;
320 
321 	switch (m) {
322 	case IIO_CHAN_INFO_RAW:
323 		ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
324 		if (ret < 0)
325 			return ret;
326 		*val = ret;
327 		return IIO_VAL_INT;
328 	case IIO_CHAN_INFO_SCALE:
329 		ad5421_get_current_min_max(st, &min, &max);
330 		*val = max - min;
331 		*val2 = (1 << 16) * 1000;
332 		return IIO_VAL_FRACTIONAL;
333 	case IIO_CHAN_INFO_OFFSET:
334 		*val = ad5421_get_offset(st);
335 		return IIO_VAL_INT;
336 	case IIO_CHAN_INFO_CALIBBIAS:
337 		ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
338 		if (ret < 0)
339 			return ret;
340 		*val = ret - 32768;
341 		return IIO_VAL_INT;
342 	case IIO_CHAN_INFO_CALIBSCALE:
343 		ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
344 		if (ret < 0)
345 			return ret;
346 		*val = ret;
347 		return IIO_VAL_INT;
348 	}
349 
350 	return -EINVAL;
351 }
352 
353 static int ad5421_write_raw(struct iio_dev *indio_dev,
354 	struct iio_chan_spec const *chan, int val, int val2, long mask)
355 {
356 	const unsigned int max_val = 1 << 16;
357 
358 	switch (mask) {
359 	case IIO_CHAN_INFO_RAW:
360 		if (val >= max_val || val < 0)
361 			return -EINVAL;
362 
363 		return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
364 	case IIO_CHAN_INFO_CALIBBIAS:
365 		val += 32768;
366 		if (val >= max_val || val < 0)
367 			return -EINVAL;
368 
369 		return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
370 	case IIO_CHAN_INFO_CALIBSCALE:
371 		if (val >= max_val || val < 0)
372 			return -EINVAL;
373 
374 		return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
375 	default:
376 		break;
377 	}
378 
379 	return -EINVAL;
380 }
381 
382 static int ad5421_write_event_config(struct iio_dev *indio_dev,
383 	const struct iio_chan_spec *chan, enum iio_event_type type,
384 	enum iio_event_direction dir, int state)
385 {
386 	struct ad5421_state *st = iio_priv(indio_dev);
387 	unsigned int mask;
388 
389 	switch (chan->type) {
390 	case IIO_CURRENT:
391 		if (dir == IIO_EV_DIR_RISING)
392 			mask = AD5421_FAULT_OVER_CURRENT;
393 		else
394 			mask = AD5421_FAULT_UNDER_CURRENT;
395 		break;
396 	case IIO_TEMP:
397 		mask = AD5421_FAULT_TEMP_OVER_140;
398 		break;
399 	default:
400 		return -EINVAL;
401 	}
402 
403 	mutex_lock(&indio_dev->mlock);
404 	if (state)
405 		st->fault_mask |= mask;
406 	else
407 		st->fault_mask &= ~mask;
408 	mutex_unlock(&indio_dev->mlock);
409 
410 	return 0;
411 }
412 
413 static int ad5421_read_event_config(struct iio_dev *indio_dev,
414 	const struct iio_chan_spec *chan, enum iio_event_type type,
415 	enum iio_event_direction dir)
416 {
417 	struct ad5421_state *st = iio_priv(indio_dev);
418 	unsigned int mask;
419 
420 	switch (chan->type) {
421 	case IIO_CURRENT:
422 		if (dir == IIO_EV_DIR_RISING)
423 			mask = AD5421_FAULT_OVER_CURRENT;
424 		else
425 			mask = AD5421_FAULT_UNDER_CURRENT;
426 		break;
427 	case IIO_TEMP:
428 		mask = AD5421_FAULT_TEMP_OVER_140;
429 		break;
430 	default:
431 		return -EINVAL;
432 	}
433 
434 	return (bool)(st->fault_mask & mask);
435 }
436 
437 static int ad5421_read_event_value(struct iio_dev *indio_dev,
438 	const struct iio_chan_spec *chan, enum iio_event_type type,
439 	enum iio_event_direction dir, enum iio_event_info info, int *val,
440 	int *val2)
441 {
442 	int ret;
443 
444 	switch (chan->type) {
445 	case IIO_CURRENT:
446 		ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
447 		if (ret < 0)
448 			return ret;
449 		*val = ret;
450 		break;
451 	case IIO_TEMP:
452 		*val = 140000;
453 		break;
454 	default:
455 		return -EINVAL;
456 	}
457 
458 	return IIO_VAL_INT;
459 }
460 
461 static const struct iio_info ad5421_info = {
462 	.read_raw =		ad5421_read_raw,
463 	.write_raw =		ad5421_write_raw,
464 	.read_event_config =	ad5421_read_event_config,
465 	.write_event_config =	ad5421_write_event_config,
466 	.read_event_value =	ad5421_read_event_value,
467 };
468 
469 static int ad5421_probe(struct spi_device *spi)
470 {
471 	struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
472 	struct iio_dev *indio_dev;
473 	struct ad5421_state *st;
474 	int ret;
475 
476 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
477 	if (indio_dev == NULL) {
478 		dev_err(&spi->dev, "Failed to allocate iio device\n");
479 		return  -ENOMEM;
480 	}
481 
482 	st = iio_priv(indio_dev);
483 	spi_set_drvdata(spi, indio_dev);
484 
485 	st->spi = spi;
486 
487 	indio_dev->dev.parent = &spi->dev;
488 	indio_dev->name = "ad5421";
489 	indio_dev->info = &ad5421_info;
490 	indio_dev->modes = INDIO_DIRECT_MODE;
491 	indio_dev->channels = ad5421_channels;
492 	indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
493 
494 	st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE |
495 			AD5421_CTRL_AUTO_FAULT_READBACK;
496 
497 	if (pdata) {
498 		st->current_range = pdata->current_range;
499 		if (pdata->external_vref)
500 			st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF;
501 	} else {
502 		st->current_range = AD5421_CURRENT_RANGE_4mA_20mA;
503 	}
504 
505 	/* write initial ctrl register value */
506 	ad5421_update_ctrl(indio_dev, 0, 0);
507 
508 	if (spi->irq) {
509 		ret = devm_request_threaded_irq(&spi->dev, spi->irq,
510 					   NULL,
511 					   ad5421_fault_handler,
512 					   IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
513 					   "ad5421 fault",
514 					   indio_dev);
515 		if (ret)
516 			return ret;
517 	}
518 
519 	return devm_iio_device_register(&spi->dev, indio_dev);
520 }
521 
522 static struct spi_driver ad5421_driver = {
523 	.driver = {
524 		   .name = "ad5421",
525 	},
526 	.probe = ad5421_probe,
527 };
528 module_spi_driver(ad5421_driver);
529 
530 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
531 MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
532 MODULE_LICENSE("GPL v2");
533 MODULE_ALIAS("spi:ad5421");
534