1 /* 2 * AD5421 Digital to analog converters driver 3 * 4 * Copyright 2011 Analog Devices Inc. 5 * 6 * Licensed under the GPL-2. 7 */ 8 9 #include <linux/device.h> 10 #include <linux/delay.h> 11 #include <linux/err.h> 12 #include <linux/module.h> 13 #include <linux/interrupt.h> 14 #include <linux/kernel.h> 15 #include <linux/spi/spi.h> 16 #include <linux/slab.h> 17 #include <linux/sysfs.h> 18 19 #include <linux/iio/iio.h> 20 #include <linux/iio/sysfs.h> 21 #include <linux/iio/events.h> 22 #include <linux/iio/dac/ad5421.h> 23 24 25 #define AD5421_REG_DAC_DATA 0x1 26 #define AD5421_REG_CTRL 0x2 27 #define AD5421_REG_OFFSET 0x3 28 #define AD5421_REG_GAIN 0x4 29 /* load dac and fault shared the same register number. Writing to it will cause 30 * a dac load command, reading from it will return the fault status register */ 31 #define AD5421_REG_LOAD_DAC 0x5 32 #define AD5421_REG_FAULT 0x5 33 #define AD5421_REG_FORCE_ALARM_CURRENT 0x6 34 #define AD5421_REG_RESET 0x7 35 #define AD5421_REG_START_CONVERSION 0x8 36 #define AD5421_REG_NOOP 0x9 37 38 #define AD5421_CTRL_WATCHDOG_DISABLE BIT(12) 39 #define AD5421_CTRL_AUTO_FAULT_READBACK BIT(11) 40 #define AD5421_CTRL_MIN_CURRENT BIT(9) 41 #define AD5421_CTRL_ADC_SOURCE_TEMP BIT(8) 42 #define AD5421_CTRL_ADC_ENABLE BIT(7) 43 #define AD5421_CTRL_PWR_DOWN_INT_VREF BIT(6) 44 45 #define AD5421_FAULT_SPI BIT(15) 46 #define AD5421_FAULT_PEC BIT(14) 47 #define AD5421_FAULT_OVER_CURRENT BIT(13) 48 #define AD5421_FAULT_UNDER_CURRENT BIT(12) 49 #define AD5421_FAULT_TEMP_OVER_140 BIT(11) 50 #define AD5421_FAULT_TEMP_OVER_100 BIT(10) 51 #define AD5421_FAULT_UNDER_VOLTAGE_6V BIT(9) 52 #define AD5421_FAULT_UNDER_VOLTAGE_12V BIT(8) 53 54 /* These bits will cause the fault pin to go high */ 55 #define AD5421_FAULT_TRIGGER_IRQ \ 56 (AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \ 57 AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140) 58 59 /** 60 * struct ad5421_state - driver instance specific data 61 * @spi: spi_device 62 * @ctrl: control register cache 63 * @current_range: current range which the device is configured for 64 * @data: spi transfer buffers 65 * @fault_mask: software masking of events 66 */ 67 struct ad5421_state { 68 struct spi_device *spi; 69 unsigned int ctrl; 70 enum ad5421_current_range current_range; 71 unsigned int fault_mask; 72 73 /* 74 * DMA (thus cache coherency maintenance) requires the 75 * transfer buffers to live in their own cache lines. 76 */ 77 union { 78 __be32 d32; 79 u8 d8[4]; 80 } data[2] ____cacheline_aligned; 81 }; 82 83 static const struct iio_event_spec ad5421_current_event[] = { 84 { 85 .type = IIO_EV_TYPE_THRESH, 86 .dir = IIO_EV_DIR_RISING, 87 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 88 BIT(IIO_EV_INFO_ENABLE), 89 }, { 90 .type = IIO_EV_TYPE_THRESH, 91 .dir = IIO_EV_DIR_FALLING, 92 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 93 BIT(IIO_EV_INFO_ENABLE), 94 }, 95 }; 96 97 static const struct iio_event_spec ad5421_temp_event[] = { 98 { 99 .type = IIO_EV_TYPE_THRESH, 100 .dir = IIO_EV_DIR_RISING, 101 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 102 BIT(IIO_EV_INFO_ENABLE), 103 }, 104 }; 105 106 static const struct iio_chan_spec ad5421_channels[] = { 107 { 108 .type = IIO_CURRENT, 109 .indexed = 1, 110 .output = 1, 111 .channel = 0, 112 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | 113 BIT(IIO_CHAN_INFO_CALIBSCALE) | 114 BIT(IIO_CHAN_INFO_CALIBBIAS), 115 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | 116 BIT(IIO_CHAN_INFO_OFFSET), 117 .scan_type = { 118 .sign = 'u', 119 .realbits = 16, 120 .storagebits = 16, 121 }, 122 .event_spec = ad5421_current_event, 123 .num_event_specs = ARRAY_SIZE(ad5421_current_event), 124 }, 125 { 126 .type = IIO_TEMP, 127 .channel = -1, 128 .event_spec = ad5421_temp_event, 129 .num_event_specs = ARRAY_SIZE(ad5421_temp_event), 130 }, 131 }; 132 133 static int ad5421_write_unlocked(struct iio_dev *indio_dev, 134 unsigned int reg, unsigned int val) 135 { 136 struct ad5421_state *st = iio_priv(indio_dev); 137 138 st->data[0].d32 = cpu_to_be32((reg << 16) | val); 139 140 return spi_write(st->spi, &st->data[0].d8[1], 3); 141 } 142 143 static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg, 144 unsigned int val) 145 { 146 int ret; 147 148 mutex_lock(&indio_dev->mlock); 149 ret = ad5421_write_unlocked(indio_dev, reg, val); 150 mutex_unlock(&indio_dev->mlock); 151 152 return ret; 153 } 154 155 static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg) 156 { 157 struct ad5421_state *st = iio_priv(indio_dev); 158 int ret; 159 struct spi_transfer t[] = { 160 { 161 .tx_buf = &st->data[0].d8[1], 162 .len = 3, 163 .cs_change = 1, 164 }, { 165 .rx_buf = &st->data[1].d8[1], 166 .len = 3, 167 }, 168 }; 169 170 mutex_lock(&indio_dev->mlock); 171 172 st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16)); 173 174 ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t)); 175 if (ret >= 0) 176 ret = be32_to_cpu(st->data[1].d32) & 0xffff; 177 178 mutex_unlock(&indio_dev->mlock); 179 180 return ret; 181 } 182 183 static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set, 184 unsigned int clr) 185 { 186 struct ad5421_state *st = iio_priv(indio_dev); 187 unsigned int ret; 188 189 mutex_lock(&indio_dev->mlock); 190 191 st->ctrl &= ~clr; 192 st->ctrl |= set; 193 194 ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl); 195 196 mutex_unlock(&indio_dev->mlock); 197 198 return ret; 199 } 200 201 static irqreturn_t ad5421_fault_handler(int irq, void *data) 202 { 203 struct iio_dev *indio_dev = data; 204 struct ad5421_state *st = iio_priv(indio_dev); 205 unsigned int fault; 206 unsigned int old_fault = 0; 207 unsigned int events; 208 209 fault = ad5421_read(indio_dev, AD5421_REG_FAULT); 210 if (!fault) 211 return IRQ_NONE; 212 213 /* If we had a fault, this might mean that the DAC has lost its state 214 * and has been reset. Make sure that the control register actually 215 * contains what we expect it to contain. Otherwise the watchdog might 216 * be enabled and we get watchdog timeout faults, which will render the 217 * DAC unusable. */ 218 ad5421_update_ctrl(indio_dev, 0, 0); 219 220 221 /* The fault pin stays high as long as a fault condition is present and 222 * it is not possible to mask fault conditions. For certain fault 223 * conditions for example like over-temperature it takes some time 224 * until the fault condition disappears. If we would exit the interrupt 225 * handler immediately after handling the event it would be entered 226 * again instantly. Thus we fall back to polling in case we detect that 227 * a interrupt condition is still present. 228 */ 229 do { 230 /* 0xffff is a invalid value for the register and will only be 231 * read if there has been a communication error */ 232 if (fault == 0xffff) 233 fault = 0; 234 235 /* we are only interested in new events */ 236 events = (old_fault ^ fault) & fault; 237 events &= st->fault_mask; 238 239 if (events & AD5421_FAULT_OVER_CURRENT) { 240 iio_push_event(indio_dev, 241 IIO_UNMOD_EVENT_CODE(IIO_CURRENT, 242 0, 243 IIO_EV_TYPE_THRESH, 244 IIO_EV_DIR_RISING), 245 iio_get_time_ns()); 246 } 247 248 if (events & AD5421_FAULT_UNDER_CURRENT) { 249 iio_push_event(indio_dev, 250 IIO_UNMOD_EVENT_CODE(IIO_CURRENT, 251 0, 252 IIO_EV_TYPE_THRESH, 253 IIO_EV_DIR_FALLING), 254 iio_get_time_ns()); 255 } 256 257 if (events & AD5421_FAULT_TEMP_OVER_140) { 258 iio_push_event(indio_dev, 259 IIO_UNMOD_EVENT_CODE(IIO_TEMP, 260 0, 261 IIO_EV_TYPE_MAG, 262 IIO_EV_DIR_RISING), 263 iio_get_time_ns()); 264 } 265 266 old_fault = fault; 267 fault = ad5421_read(indio_dev, AD5421_REG_FAULT); 268 269 /* still active? go to sleep for some time */ 270 if (fault & AD5421_FAULT_TRIGGER_IRQ) 271 msleep(1000); 272 273 } while (fault & AD5421_FAULT_TRIGGER_IRQ); 274 275 276 return IRQ_HANDLED; 277 } 278 279 static void ad5421_get_current_min_max(struct ad5421_state *st, 280 unsigned int *min, unsigned int *max) 281 { 282 /* The current range is configured using external pins, which are 283 * usually hard-wired and not run-time switchable. */ 284 switch (st->current_range) { 285 case AD5421_CURRENT_RANGE_4mA_20mA: 286 *min = 4000; 287 *max = 20000; 288 break; 289 case AD5421_CURRENT_RANGE_3mA8_21mA: 290 *min = 3800; 291 *max = 21000; 292 break; 293 case AD5421_CURRENT_RANGE_3mA2_24mA: 294 *min = 3200; 295 *max = 24000; 296 break; 297 default: 298 *min = 0; 299 *max = 1; 300 break; 301 } 302 } 303 304 static inline unsigned int ad5421_get_offset(struct ad5421_state *st) 305 { 306 unsigned int min, max; 307 308 ad5421_get_current_min_max(st, &min, &max); 309 return (min * (1 << 16)) / (max - min); 310 } 311 312 static int ad5421_read_raw(struct iio_dev *indio_dev, 313 struct iio_chan_spec const *chan, int *val, int *val2, long m) 314 { 315 struct ad5421_state *st = iio_priv(indio_dev); 316 unsigned int min, max; 317 int ret; 318 319 if (chan->type != IIO_CURRENT) 320 return -EINVAL; 321 322 switch (m) { 323 case IIO_CHAN_INFO_RAW: 324 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA); 325 if (ret < 0) 326 return ret; 327 *val = ret; 328 return IIO_VAL_INT; 329 case IIO_CHAN_INFO_SCALE: 330 ad5421_get_current_min_max(st, &min, &max); 331 *val = max - min; 332 *val2 = (1 << 16) * 1000; 333 return IIO_VAL_FRACTIONAL; 334 case IIO_CHAN_INFO_OFFSET: 335 *val = ad5421_get_offset(st); 336 return IIO_VAL_INT; 337 case IIO_CHAN_INFO_CALIBBIAS: 338 ret = ad5421_read(indio_dev, AD5421_REG_OFFSET); 339 if (ret < 0) 340 return ret; 341 *val = ret - 32768; 342 return IIO_VAL_INT; 343 case IIO_CHAN_INFO_CALIBSCALE: 344 ret = ad5421_read(indio_dev, AD5421_REG_GAIN); 345 if (ret < 0) 346 return ret; 347 *val = ret; 348 return IIO_VAL_INT; 349 } 350 351 return -EINVAL; 352 } 353 354 static int ad5421_write_raw(struct iio_dev *indio_dev, 355 struct iio_chan_spec const *chan, int val, int val2, long mask) 356 { 357 const unsigned int max_val = 1 << 16; 358 359 switch (mask) { 360 case IIO_CHAN_INFO_RAW: 361 if (val >= max_val || val < 0) 362 return -EINVAL; 363 364 return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val); 365 case IIO_CHAN_INFO_CALIBBIAS: 366 val += 32768; 367 if (val >= max_val || val < 0) 368 return -EINVAL; 369 370 return ad5421_write(indio_dev, AD5421_REG_OFFSET, val); 371 case IIO_CHAN_INFO_CALIBSCALE: 372 if (val >= max_val || val < 0) 373 return -EINVAL; 374 375 return ad5421_write(indio_dev, AD5421_REG_GAIN, val); 376 default: 377 break; 378 } 379 380 return -EINVAL; 381 } 382 383 static int ad5421_write_event_config(struct iio_dev *indio_dev, 384 const struct iio_chan_spec *chan, enum iio_event_type type, 385 enum iio_event_direction dir, int state) 386 { 387 struct ad5421_state *st = iio_priv(indio_dev); 388 unsigned int mask; 389 390 switch (chan->type) { 391 case IIO_CURRENT: 392 if (dir == IIO_EV_DIR_RISING) 393 mask = AD5421_FAULT_OVER_CURRENT; 394 else 395 mask = AD5421_FAULT_UNDER_CURRENT; 396 break; 397 case IIO_TEMP: 398 mask = AD5421_FAULT_TEMP_OVER_140; 399 break; 400 default: 401 return -EINVAL; 402 } 403 404 mutex_lock(&indio_dev->mlock); 405 if (state) 406 st->fault_mask |= mask; 407 else 408 st->fault_mask &= ~mask; 409 mutex_unlock(&indio_dev->mlock); 410 411 return 0; 412 } 413 414 static int ad5421_read_event_config(struct iio_dev *indio_dev, 415 const struct iio_chan_spec *chan, enum iio_event_type type, 416 enum iio_event_direction dir) 417 { 418 struct ad5421_state *st = iio_priv(indio_dev); 419 unsigned int mask; 420 421 switch (chan->type) { 422 case IIO_CURRENT: 423 if (dir == IIO_EV_DIR_RISING) 424 mask = AD5421_FAULT_OVER_CURRENT; 425 else 426 mask = AD5421_FAULT_UNDER_CURRENT; 427 break; 428 case IIO_TEMP: 429 mask = AD5421_FAULT_TEMP_OVER_140; 430 break; 431 default: 432 return -EINVAL; 433 } 434 435 return (bool)(st->fault_mask & mask); 436 } 437 438 static int ad5421_read_event_value(struct iio_dev *indio_dev, 439 const struct iio_chan_spec *chan, enum iio_event_type type, 440 enum iio_event_direction dir, enum iio_event_info info, int *val, 441 int *val2) 442 { 443 int ret; 444 445 switch (chan->type) { 446 case IIO_CURRENT: 447 ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA); 448 if (ret < 0) 449 return ret; 450 *val = ret; 451 break; 452 case IIO_TEMP: 453 *val = 140000; 454 break; 455 default: 456 return -EINVAL; 457 } 458 459 return IIO_VAL_INT; 460 } 461 462 static const struct iio_info ad5421_info = { 463 .read_raw = ad5421_read_raw, 464 .write_raw = ad5421_write_raw, 465 .read_event_config = ad5421_read_event_config, 466 .write_event_config = ad5421_write_event_config, 467 .read_event_value = ad5421_read_event_value, 468 .driver_module = THIS_MODULE, 469 }; 470 471 static int ad5421_probe(struct spi_device *spi) 472 { 473 struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev); 474 struct iio_dev *indio_dev; 475 struct ad5421_state *st; 476 int ret; 477 478 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 479 if (indio_dev == NULL) { 480 dev_err(&spi->dev, "Failed to allocate iio device\n"); 481 return -ENOMEM; 482 } 483 484 st = iio_priv(indio_dev); 485 spi_set_drvdata(spi, indio_dev); 486 487 st->spi = spi; 488 489 indio_dev->dev.parent = &spi->dev; 490 indio_dev->name = "ad5421"; 491 indio_dev->info = &ad5421_info; 492 indio_dev->modes = INDIO_DIRECT_MODE; 493 indio_dev->channels = ad5421_channels; 494 indio_dev->num_channels = ARRAY_SIZE(ad5421_channels); 495 496 st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE | 497 AD5421_CTRL_AUTO_FAULT_READBACK; 498 499 if (pdata) { 500 st->current_range = pdata->current_range; 501 if (pdata->external_vref) 502 st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF; 503 } else { 504 st->current_range = AD5421_CURRENT_RANGE_4mA_20mA; 505 } 506 507 /* write initial ctrl register value */ 508 ad5421_update_ctrl(indio_dev, 0, 0); 509 510 if (spi->irq) { 511 ret = devm_request_threaded_irq(&spi->dev, spi->irq, 512 NULL, 513 ad5421_fault_handler, 514 IRQF_TRIGGER_HIGH | IRQF_ONESHOT, 515 "ad5421 fault", 516 indio_dev); 517 if (ret) 518 return ret; 519 } 520 521 return devm_iio_device_register(&spi->dev, indio_dev); 522 } 523 524 static struct spi_driver ad5421_driver = { 525 .driver = { 526 .name = "ad5421", 527 .owner = THIS_MODULE, 528 }, 529 .probe = ad5421_probe, 530 }; 531 module_spi_driver(ad5421_driver); 532 533 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); 534 MODULE_DESCRIPTION("Analog Devices AD5421 DAC"); 535 MODULE_LICENSE("GPL v2"); 536 MODULE_ALIAS("spi:ad5421"); 537