xref: /openbmc/linux/drivers/iio/dac/ad5421.c (revision 31b90347)
1 /*
2  * AD5421 Digital to analog converters  driver
3  *
4  * Copyright 2011 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2.
7  */
8 
9 #include <linux/device.h>
10 #include <linux/delay.h>
11 #include <linux/err.h>
12 #include <linux/module.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/spi/spi.h>
16 #include <linux/slab.h>
17 #include <linux/sysfs.h>
18 
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 #include <linux/iio/events.h>
22 #include <linux/iio/dac/ad5421.h>
23 
24 
25 #define AD5421_REG_DAC_DATA		0x1
26 #define AD5421_REG_CTRL			0x2
27 #define AD5421_REG_OFFSET		0x3
28 #define AD5421_REG_GAIN			0x4
29 /* load dac and fault shared the same register number. Writing to it will cause
30  * a dac load command, reading from it will return the fault status register */
31 #define AD5421_REG_LOAD_DAC		0x5
32 #define AD5421_REG_FAULT		0x5
33 #define AD5421_REG_FORCE_ALARM_CURRENT	0x6
34 #define AD5421_REG_RESET		0x7
35 #define AD5421_REG_START_CONVERSION	0x8
36 #define AD5421_REG_NOOP			0x9
37 
38 #define AD5421_CTRL_WATCHDOG_DISABLE	BIT(12)
39 #define AD5421_CTRL_AUTO_FAULT_READBACK	BIT(11)
40 #define AD5421_CTRL_MIN_CURRENT		BIT(9)
41 #define AD5421_CTRL_ADC_SOURCE_TEMP	BIT(8)
42 #define AD5421_CTRL_ADC_ENABLE		BIT(7)
43 #define AD5421_CTRL_PWR_DOWN_INT_VREF	BIT(6)
44 
45 #define AD5421_FAULT_SPI			BIT(15)
46 #define AD5421_FAULT_PEC			BIT(14)
47 #define AD5421_FAULT_OVER_CURRENT		BIT(13)
48 #define AD5421_FAULT_UNDER_CURRENT		BIT(12)
49 #define AD5421_FAULT_TEMP_OVER_140		BIT(11)
50 #define AD5421_FAULT_TEMP_OVER_100		BIT(10)
51 #define AD5421_FAULT_UNDER_VOLTAGE_6V		BIT(9)
52 #define AD5421_FAULT_UNDER_VOLTAGE_12V		BIT(8)
53 
54 /* These bits will cause the fault pin to go high */
55 #define AD5421_FAULT_TRIGGER_IRQ \
56 	(AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
57 	AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
58 
59 /**
60  * struct ad5421_state - driver instance specific data
61  * @spi:		spi_device
62  * @ctrl:		control register cache
63  * @current_range:	current range which the device is configured for
64  * @data:		spi transfer buffers
65  * @fault_mask:		software masking of events
66  */
67 struct ad5421_state {
68 	struct spi_device		*spi;
69 	unsigned int			ctrl;
70 	enum ad5421_current_range	current_range;
71 	unsigned int			fault_mask;
72 
73 	/*
74 	 * DMA (thus cache coherency maintenance) requires the
75 	 * transfer buffers to live in their own cache lines.
76 	 */
77 	union {
78 		u32 d32;
79 		u8 d8[4];
80 	} data[2] ____cacheline_aligned;
81 };
82 
83 static const struct iio_event_spec ad5421_current_event[] = {
84 	{
85 		.type = IIO_EV_TYPE_THRESH,
86 		.dir = IIO_EV_DIR_RISING,
87 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
88 			BIT(IIO_EV_INFO_ENABLE),
89 	}, {
90 		.type = IIO_EV_TYPE_THRESH,
91 		.dir = IIO_EV_DIR_FALLING,
92 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
93 			BIT(IIO_EV_INFO_ENABLE),
94 	},
95 };
96 
97 static const struct iio_event_spec ad5421_temp_event[] = {
98 	{
99 		.type = IIO_EV_TYPE_THRESH,
100 		.dir = IIO_EV_DIR_RISING,
101 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
102 			BIT(IIO_EV_INFO_ENABLE),
103 	},
104 };
105 
106 static const struct iio_chan_spec ad5421_channels[] = {
107 	{
108 		.type = IIO_CURRENT,
109 		.indexed = 1,
110 		.output = 1,
111 		.channel = 0,
112 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
113 			BIT(IIO_CHAN_INFO_CALIBSCALE) |
114 			BIT(IIO_CHAN_INFO_CALIBBIAS),
115 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
116 			BIT(IIO_CHAN_INFO_OFFSET),
117 		.scan_type = IIO_ST('u', 16, 16, 0),
118 		.event_spec = ad5421_current_event,
119 		.num_event_specs = ARRAY_SIZE(ad5421_current_event),
120 	},
121 	{
122 		.type = IIO_TEMP,
123 		.channel = -1,
124 		.event_spec = ad5421_temp_event,
125 		.num_event_specs = ARRAY_SIZE(ad5421_temp_event),
126 	},
127 };
128 
129 static int ad5421_write_unlocked(struct iio_dev *indio_dev,
130 	unsigned int reg, unsigned int val)
131 {
132 	struct ad5421_state *st = iio_priv(indio_dev);
133 
134 	st->data[0].d32 = cpu_to_be32((reg << 16) | val);
135 
136 	return spi_write(st->spi, &st->data[0].d8[1], 3);
137 }
138 
139 static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
140 	unsigned int val)
141 {
142 	int ret;
143 
144 	mutex_lock(&indio_dev->mlock);
145 	ret = ad5421_write_unlocked(indio_dev, reg, val);
146 	mutex_unlock(&indio_dev->mlock);
147 
148 	return ret;
149 }
150 
151 static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
152 {
153 	struct ad5421_state *st = iio_priv(indio_dev);
154 	int ret;
155 	struct spi_transfer t[] = {
156 		{
157 			.tx_buf = &st->data[0].d8[1],
158 			.len = 3,
159 			.cs_change = 1,
160 		}, {
161 			.rx_buf = &st->data[1].d8[1],
162 			.len = 3,
163 		},
164 	};
165 
166 	mutex_lock(&indio_dev->mlock);
167 
168 	st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
169 
170 	ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
171 	if (ret >= 0)
172 		ret = be32_to_cpu(st->data[1].d32) & 0xffff;
173 
174 	mutex_unlock(&indio_dev->mlock);
175 
176 	return ret;
177 }
178 
179 static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
180 	unsigned int clr)
181 {
182 	struct ad5421_state *st = iio_priv(indio_dev);
183 	unsigned int ret;
184 
185 	mutex_lock(&indio_dev->mlock);
186 
187 	st->ctrl &= ~clr;
188 	st->ctrl |= set;
189 
190 	ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
191 
192 	mutex_unlock(&indio_dev->mlock);
193 
194 	return ret;
195 }
196 
197 static irqreturn_t ad5421_fault_handler(int irq, void *data)
198 {
199 	struct iio_dev *indio_dev = data;
200 	struct ad5421_state *st = iio_priv(indio_dev);
201 	unsigned int fault;
202 	unsigned int old_fault = 0;
203 	unsigned int events;
204 
205 	fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
206 	if (!fault)
207 		return IRQ_NONE;
208 
209 	/* If we had a fault, this might mean that the DAC has lost its state
210 	 * and has been reset. Make sure that the control register actually
211 	 * contains what we expect it to contain. Otherwise the watchdog might
212 	 * be enabled and we get watchdog timeout faults, which will render the
213 	 * DAC unusable. */
214 	ad5421_update_ctrl(indio_dev, 0, 0);
215 
216 
217 	/* The fault pin stays high as long as a fault condition is present and
218 	 * it is not possible to mask fault conditions. For certain fault
219 	 * conditions for example like over-temperature it takes some time
220 	 * until the fault condition disappears. If we would exit the interrupt
221 	 * handler immediately after handling the event it would be entered
222 	 * again instantly. Thus we fall back to polling in case we detect that
223 	 * a interrupt condition is still present.
224 	 */
225 	do {
226 		/* 0xffff is a invalid value for the register and will only be
227 		 * read if there has been a communication error */
228 		if (fault == 0xffff)
229 			fault = 0;
230 
231 		/* we are only interested in new events */
232 		events = (old_fault ^ fault) & fault;
233 		events &= st->fault_mask;
234 
235 		if (events & AD5421_FAULT_OVER_CURRENT) {
236 			iio_push_event(indio_dev,
237 				IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
238 					0,
239 					IIO_EV_TYPE_THRESH,
240 					IIO_EV_DIR_RISING),
241 			iio_get_time_ns());
242 		}
243 
244 		if (events & AD5421_FAULT_UNDER_CURRENT) {
245 			iio_push_event(indio_dev,
246 				IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
247 					0,
248 					IIO_EV_TYPE_THRESH,
249 					IIO_EV_DIR_FALLING),
250 				iio_get_time_ns());
251 		}
252 
253 		if (events & AD5421_FAULT_TEMP_OVER_140) {
254 			iio_push_event(indio_dev,
255 				IIO_UNMOD_EVENT_CODE(IIO_TEMP,
256 					0,
257 					IIO_EV_TYPE_MAG,
258 					IIO_EV_DIR_RISING),
259 				iio_get_time_ns());
260 		}
261 
262 		old_fault = fault;
263 		fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
264 
265 		/* still active? go to sleep for some time */
266 		if (fault & AD5421_FAULT_TRIGGER_IRQ)
267 			msleep(1000);
268 
269 	} while (fault & AD5421_FAULT_TRIGGER_IRQ);
270 
271 
272 	return IRQ_HANDLED;
273 }
274 
275 static void ad5421_get_current_min_max(struct ad5421_state *st,
276 	unsigned int *min, unsigned int *max)
277 {
278 	/* The current range is configured using external pins, which are
279 	 * usually hard-wired and not run-time switchable. */
280 	switch (st->current_range) {
281 	case AD5421_CURRENT_RANGE_4mA_20mA:
282 		*min = 4000;
283 		*max = 20000;
284 		break;
285 	case AD5421_CURRENT_RANGE_3mA8_21mA:
286 		*min = 3800;
287 		*max = 21000;
288 		break;
289 	case AD5421_CURRENT_RANGE_3mA2_24mA:
290 		*min = 3200;
291 		*max = 24000;
292 		break;
293 	default:
294 		*min = 0;
295 		*max = 1;
296 		break;
297 	}
298 }
299 
300 static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
301 {
302 	unsigned int min, max;
303 
304 	ad5421_get_current_min_max(st, &min, &max);
305 	return (min * (1 << 16)) / (max - min);
306 }
307 
308 static int ad5421_read_raw(struct iio_dev *indio_dev,
309 	struct iio_chan_spec const *chan, int *val, int *val2, long m)
310 {
311 	struct ad5421_state *st = iio_priv(indio_dev);
312 	unsigned int min, max;
313 	int ret;
314 
315 	if (chan->type != IIO_CURRENT)
316 		return -EINVAL;
317 
318 	switch (m) {
319 	case IIO_CHAN_INFO_RAW:
320 		ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
321 		if (ret < 0)
322 			return ret;
323 		*val = ret;
324 		return IIO_VAL_INT;
325 	case IIO_CHAN_INFO_SCALE:
326 		ad5421_get_current_min_max(st, &min, &max);
327 		*val = max - min;
328 		*val2 = (1 << 16) * 1000;
329 		return IIO_VAL_FRACTIONAL;
330 	case IIO_CHAN_INFO_OFFSET:
331 		*val = ad5421_get_offset(st);
332 		return IIO_VAL_INT;
333 	case IIO_CHAN_INFO_CALIBBIAS:
334 		ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
335 		if (ret < 0)
336 			return ret;
337 		*val = ret - 32768;
338 		return IIO_VAL_INT;
339 	case IIO_CHAN_INFO_CALIBSCALE:
340 		ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
341 		if (ret < 0)
342 			return ret;
343 		*val = ret;
344 		return IIO_VAL_INT;
345 	}
346 
347 	return -EINVAL;
348 }
349 
350 static int ad5421_write_raw(struct iio_dev *indio_dev,
351 	struct iio_chan_spec const *chan, int val, int val2, long mask)
352 {
353 	const unsigned int max_val = 1 << 16;
354 
355 	switch (mask) {
356 	case IIO_CHAN_INFO_RAW:
357 		if (val >= max_val || val < 0)
358 			return -EINVAL;
359 
360 		return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
361 	case IIO_CHAN_INFO_CALIBBIAS:
362 		val += 32768;
363 		if (val >= max_val || val < 0)
364 			return -EINVAL;
365 
366 		return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
367 	case IIO_CHAN_INFO_CALIBSCALE:
368 		if (val >= max_val || val < 0)
369 			return -EINVAL;
370 
371 		return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
372 	default:
373 		break;
374 	}
375 
376 	return -EINVAL;
377 }
378 
379 static int ad5421_write_event_config(struct iio_dev *indio_dev,
380 	const struct iio_chan_spec *chan, enum iio_event_type type,
381 	enum iio_event_direction dir, int state)
382 {
383 	struct ad5421_state *st = iio_priv(indio_dev);
384 	unsigned int mask;
385 
386 	switch (chan->type) {
387 	case IIO_CURRENT:
388 		if (dir == IIO_EV_DIR_RISING)
389 			mask = AD5421_FAULT_OVER_CURRENT;
390 		else
391 			mask = AD5421_FAULT_UNDER_CURRENT;
392 		break;
393 	case IIO_TEMP:
394 		mask = AD5421_FAULT_TEMP_OVER_140;
395 		break;
396 	default:
397 		return -EINVAL;
398 	}
399 
400 	mutex_lock(&indio_dev->mlock);
401 	if (state)
402 		st->fault_mask |= mask;
403 	else
404 		st->fault_mask &= ~mask;
405 	mutex_unlock(&indio_dev->mlock);
406 
407 	return 0;
408 }
409 
410 static int ad5421_read_event_config(struct iio_dev *indio_dev,
411 	const struct iio_chan_spec *chan, enum iio_event_type type,
412 	enum iio_event_direction dir)
413 {
414 	struct ad5421_state *st = iio_priv(indio_dev);
415 	unsigned int mask;
416 
417 	switch (chan->type) {
418 	case IIO_CURRENT:
419 		if (dir == IIO_EV_DIR_RISING)
420 			mask = AD5421_FAULT_OVER_CURRENT;
421 		else
422 			mask = AD5421_FAULT_UNDER_CURRENT;
423 		break;
424 	case IIO_TEMP:
425 		mask = AD5421_FAULT_TEMP_OVER_140;
426 		break;
427 	default:
428 		return -EINVAL;
429 	}
430 
431 	return (bool)(st->fault_mask & mask);
432 }
433 
434 static int ad5421_read_event_value(struct iio_dev *indio_dev,
435 	const struct iio_chan_spec *chan, enum iio_event_type type,
436 	enum iio_event_direction dir, enum iio_event_info info, int *val,
437 	int *val2)
438 {
439 	int ret;
440 
441 	switch (chan->type) {
442 	case IIO_CURRENT:
443 		ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
444 		if (ret < 0)
445 			return ret;
446 		*val = ret;
447 		break;
448 	case IIO_TEMP:
449 		*val = 140000;
450 		break;
451 	default:
452 		return -EINVAL;
453 	}
454 
455 	return IIO_VAL_INT;
456 }
457 
458 static const struct iio_info ad5421_info = {
459 	.read_raw =		ad5421_read_raw,
460 	.write_raw =		ad5421_write_raw,
461 	.read_event_config_new = ad5421_read_event_config,
462 	.write_event_config_new = ad5421_write_event_config,
463 	.read_event_value_new =	ad5421_read_event_value,
464 	.driver_module =	THIS_MODULE,
465 };
466 
467 static int ad5421_probe(struct spi_device *spi)
468 {
469 	struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
470 	struct iio_dev *indio_dev;
471 	struct ad5421_state *st;
472 	int ret;
473 
474 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
475 	if (indio_dev == NULL) {
476 		dev_err(&spi->dev, "Failed to allocate iio device\n");
477 		return  -ENOMEM;
478 	}
479 
480 	st = iio_priv(indio_dev);
481 	spi_set_drvdata(spi, indio_dev);
482 
483 	st->spi = spi;
484 
485 	indio_dev->dev.parent = &spi->dev;
486 	indio_dev->name = "ad5421";
487 	indio_dev->info = &ad5421_info;
488 	indio_dev->modes = INDIO_DIRECT_MODE;
489 	indio_dev->channels = ad5421_channels;
490 	indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
491 
492 	st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE |
493 			AD5421_CTRL_AUTO_FAULT_READBACK;
494 
495 	if (pdata) {
496 		st->current_range = pdata->current_range;
497 		if (pdata->external_vref)
498 			st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF;
499 	} else {
500 		st->current_range = AD5421_CURRENT_RANGE_4mA_20mA;
501 	}
502 
503 	/* write initial ctrl register value */
504 	ad5421_update_ctrl(indio_dev, 0, 0);
505 
506 	if (spi->irq) {
507 		ret = devm_request_threaded_irq(&spi->dev, spi->irq,
508 					   NULL,
509 					   ad5421_fault_handler,
510 					   IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
511 					   "ad5421 fault",
512 					   indio_dev);
513 		if (ret)
514 			return ret;
515 	}
516 
517 	return iio_device_register(indio_dev);
518 }
519 
520 static int ad5421_remove(struct spi_device *spi)
521 {
522 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
523 
524 	iio_device_unregister(indio_dev);
525 
526 	return 0;
527 }
528 
529 static struct spi_driver ad5421_driver = {
530 	.driver = {
531 		   .name = "ad5421",
532 		   .owner = THIS_MODULE,
533 	},
534 	.probe = ad5421_probe,
535 	.remove = ad5421_remove,
536 };
537 module_spi_driver(ad5421_driver);
538 
539 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
540 MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
541 MODULE_LICENSE("GPL v2");
542 MODULE_ALIAS("spi:ad5421");
543