xref: /openbmc/linux/drivers/iio/dac/ad5421.c (revision 8ef411b7)
1dbdc025bSLars-Peter Clausen /*
2dbdc025bSLars-Peter Clausen  * AD5421 Digital to analog converters  driver
3dbdc025bSLars-Peter Clausen  *
4dbdc025bSLars-Peter Clausen  * Copyright 2011 Analog Devices Inc.
5dbdc025bSLars-Peter Clausen  *
6dbdc025bSLars-Peter Clausen  * Licensed under the GPL-2.
7dbdc025bSLars-Peter Clausen  */
8dbdc025bSLars-Peter Clausen 
9dbdc025bSLars-Peter Clausen #include <linux/device.h>
10dbdc025bSLars-Peter Clausen #include <linux/delay.h>
11dbdc025bSLars-Peter Clausen #include <linux/err.h>
12dbdc025bSLars-Peter Clausen #include <linux/module.h>
13dbdc025bSLars-Peter Clausen #include <linux/interrupt.h>
14dbdc025bSLars-Peter Clausen #include <linux/kernel.h>
15dbdc025bSLars-Peter Clausen #include <linux/spi/spi.h>
16dbdc025bSLars-Peter Clausen #include <linux/slab.h>
17dbdc025bSLars-Peter Clausen #include <linux/sysfs.h>
18dbdc025bSLars-Peter Clausen 
19dbdc025bSLars-Peter Clausen #include <linux/iio/iio.h>
20dbdc025bSLars-Peter Clausen #include <linux/iio/sysfs.h>
21dbdc025bSLars-Peter Clausen #include <linux/iio/events.h>
22dbdc025bSLars-Peter Clausen #include <linux/iio/dac/ad5421.h>
23dbdc025bSLars-Peter Clausen 
24dbdc025bSLars-Peter Clausen 
25dbdc025bSLars-Peter Clausen #define AD5421_REG_DAC_DATA		0x1
26dbdc025bSLars-Peter Clausen #define AD5421_REG_CTRL			0x2
27dbdc025bSLars-Peter Clausen #define AD5421_REG_OFFSET		0x3
28dbdc025bSLars-Peter Clausen #define AD5421_REG_GAIN			0x4
29dbdc025bSLars-Peter Clausen /* load dac and fault shared the same register number. Writing to it will cause
30dbdc025bSLars-Peter Clausen  * a dac load command, reading from it will return the fault status register */
31dbdc025bSLars-Peter Clausen #define AD5421_REG_LOAD_DAC		0x5
32dbdc025bSLars-Peter Clausen #define AD5421_REG_FAULT		0x5
33dbdc025bSLars-Peter Clausen #define AD5421_REG_FORCE_ALARM_CURRENT	0x6
34dbdc025bSLars-Peter Clausen #define AD5421_REG_RESET		0x7
35dbdc025bSLars-Peter Clausen #define AD5421_REG_START_CONVERSION	0x8
36dbdc025bSLars-Peter Clausen #define AD5421_REG_NOOP			0x9
37dbdc025bSLars-Peter Clausen 
38dbdc025bSLars-Peter Clausen #define AD5421_CTRL_WATCHDOG_DISABLE	BIT(12)
39dbdc025bSLars-Peter Clausen #define AD5421_CTRL_AUTO_FAULT_READBACK	BIT(11)
40dbdc025bSLars-Peter Clausen #define AD5421_CTRL_MIN_CURRENT		BIT(9)
41dbdc025bSLars-Peter Clausen #define AD5421_CTRL_ADC_SOURCE_TEMP	BIT(8)
42dbdc025bSLars-Peter Clausen #define AD5421_CTRL_ADC_ENABLE		BIT(7)
43dbdc025bSLars-Peter Clausen #define AD5421_CTRL_PWR_DOWN_INT_VREF	BIT(6)
44dbdc025bSLars-Peter Clausen 
45dbdc025bSLars-Peter Clausen #define AD5421_FAULT_SPI			BIT(15)
46dbdc025bSLars-Peter Clausen #define AD5421_FAULT_PEC			BIT(14)
47dbdc025bSLars-Peter Clausen #define AD5421_FAULT_OVER_CURRENT		BIT(13)
48dbdc025bSLars-Peter Clausen #define AD5421_FAULT_UNDER_CURRENT		BIT(12)
49dbdc025bSLars-Peter Clausen #define AD5421_FAULT_TEMP_OVER_140		BIT(11)
50dbdc025bSLars-Peter Clausen #define AD5421_FAULT_TEMP_OVER_100		BIT(10)
51dbdc025bSLars-Peter Clausen #define AD5421_FAULT_UNDER_VOLTAGE_6V		BIT(9)
52dbdc025bSLars-Peter Clausen #define AD5421_FAULT_UNDER_VOLTAGE_12V		BIT(8)
53dbdc025bSLars-Peter Clausen 
54dbdc025bSLars-Peter Clausen /* These bits will cause the fault pin to go high */
55dbdc025bSLars-Peter Clausen #define AD5421_FAULT_TRIGGER_IRQ \
56dbdc025bSLars-Peter Clausen 	(AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
57dbdc025bSLars-Peter Clausen 	AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
58dbdc025bSLars-Peter Clausen 
59dbdc025bSLars-Peter Clausen /**
60dbdc025bSLars-Peter Clausen  * struct ad5421_state - driver instance specific data
61dbdc025bSLars-Peter Clausen  * @spi:		spi_device
62dbdc025bSLars-Peter Clausen  * @ctrl:		control register cache
63dbdc025bSLars-Peter Clausen  * @current_range:	current range which the device is configured for
64dbdc025bSLars-Peter Clausen  * @data:		spi transfer buffers
65dbdc025bSLars-Peter Clausen  * @fault_mask:		software masking of events
66dbdc025bSLars-Peter Clausen  */
67dbdc025bSLars-Peter Clausen struct ad5421_state {
68dbdc025bSLars-Peter Clausen 	struct spi_device		*spi;
69dbdc025bSLars-Peter Clausen 	unsigned int			ctrl;
70dbdc025bSLars-Peter Clausen 	enum ad5421_current_range	current_range;
71dbdc025bSLars-Peter Clausen 	unsigned int			fault_mask;
72dbdc025bSLars-Peter Clausen 
73dbdc025bSLars-Peter Clausen 	/*
74dbdc025bSLars-Peter Clausen 	 * DMA (thus cache coherency maintenance) requires the
75dbdc025bSLars-Peter Clausen 	 * transfer buffers to live in their own cache lines.
76dbdc025bSLars-Peter Clausen 	 */
77dbdc025bSLars-Peter Clausen 	union {
788ef411b7SLars-Peter Clausen 		__be32 d32;
79dbdc025bSLars-Peter Clausen 		u8 d8[4];
80dbdc025bSLars-Peter Clausen 	} data[2] ____cacheline_aligned;
81dbdc025bSLars-Peter Clausen };
82dbdc025bSLars-Peter Clausen 
831eefd62bSLars-Peter Clausen static const struct iio_event_spec ad5421_current_event[] = {
841eefd62bSLars-Peter Clausen 	{
851eefd62bSLars-Peter Clausen 		.type = IIO_EV_TYPE_THRESH,
861eefd62bSLars-Peter Clausen 		.dir = IIO_EV_DIR_RISING,
871eefd62bSLars-Peter Clausen 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
881eefd62bSLars-Peter Clausen 			BIT(IIO_EV_INFO_ENABLE),
891eefd62bSLars-Peter Clausen 	}, {
901eefd62bSLars-Peter Clausen 		.type = IIO_EV_TYPE_THRESH,
911eefd62bSLars-Peter Clausen 		.dir = IIO_EV_DIR_FALLING,
921eefd62bSLars-Peter Clausen 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
931eefd62bSLars-Peter Clausen 			BIT(IIO_EV_INFO_ENABLE),
941eefd62bSLars-Peter Clausen 	},
951eefd62bSLars-Peter Clausen };
961eefd62bSLars-Peter Clausen 
971eefd62bSLars-Peter Clausen static const struct iio_event_spec ad5421_temp_event[] = {
981eefd62bSLars-Peter Clausen 	{
991eefd62bSLars-Peter Clausen 		.type = IIO_EV_TYPE_THRESH,
1001eefd62bSLars-Peter Clausen 		.dir = IIO_EV_DIR_RISING,
1011eefd62bSLars-Peter Clausen 		.mask_separate = BIT(IIO_EV_INFO_VALUE) |
1021eefd62bSLars-Peter Clausen 			BIT(IIO_EV_INFO_ENABLE),
1031eefd62bSLars-Peter Clausen 	},
1041eefd62bSLars-Peter Clausen };
1051eefd62bSLars-Peter Clausen 
106dbdc025bSLars-Peter Clausen static const struct iio_chan_spec ad5421_channels[] = {
107dbdc025bSLars-Peter Clausen 	{
108dbdc025bSLars-Peter Clausen 		.type = IIO_CURRENT,
109dbdc025bSLars-Peter Clausen 		.indexed = 1,
110dbdc025bSLars-Peter Clausen 		.output = 1,
111dbdc025bSLars-Peter Clausen 		.channel = 0,
11231311c2aSJonathan Cameron 		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
11331311c2aSJonathan Cameron 			BIT(IIO_CHAN_INFO_CALIBSCALE) |
11431311c2aSJonathan Cameron 			BIT(IIO_CHAN_INFO_CALIBBIAS),
11531311c2aSJonathan Cameron 		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
11631311c2aSJonathan Cameron 			BIT(IIO_CHAN_INFO_OFFSET),
117dbdc025bSLars-Peter Clausen 		.scan_type = IIO_ST('u', 16, 16, 0),
1181eefd62bSLars-Peter Clausen 		.event_spec = ad5421_current_event,
1191eefd62bSLars-Peter Clausen 		.num_event_specs = ARRAY_SIZE(ad5421_current_event),
120dbdc025bSLars-Peter Clausen 	},
121dbdc025bSLars-Peter Clausen 	{
122dbdc025bSLars-Peter Clausen 		.type = IIO_TEMP,
123dbdc025bSLars-Peter Clausen 		.channel = -1,
1241eefd62bSLars-Peter Clausen 		.event_spec = ad5421_temp_event,
1251eefd62bSLars-Peter Clausen 		.num_event_specs = ARRAY_SIZE(ad5421_temp_event),
126dbdc025bSLars-Peter Clausen 	},
127dbdc025bSLars-Peter Clausen };
128dbdc025bSLars-Peter Clausen 
129dbdc025bSLars-Peter Clausen static int ad5421_write_unlocked(struct iio_dev *indio_dev,
130dbdc025bSLars-Peter Clausen 	unsigned int reg, unsigned int val)
131dbdc025bSLars-Peter Clausen {
132dbdc025bSLars-Peter Clausen 	struct ad5421_state *st = iio_priv(indio_dev);
133dbdc025bSLars-Peter Clausen 
134dbdc025bSLars-Peter Clausen 	st->data[0].d32 = cpu_to_be32((reg << 16) | val);
135dbdc025bSLars-Peter Clausen 
136dbdc025bSLars-Peter Clausen 	return spi_write(st->spi, &st->data[0].d8[1], 3);
137dbdc025bSLars-Peter Clausen }
138dbdc025bSLars-Peter Clausen 
139dbdc025bSLars-Peter Clausen static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
140dbdc025bSLars-Peter Clausen 	unsigned int val)
141dbdc025bSLars-Peter Clausen {
142dbdc025bSLars-Peter Clausen 	int ret;
143dbdc025bSLars-Peter Clausen 
144dbdc025bSLars-Peter Clausen 	mutex_lock(&indio_dev->mlock);
145dbdc025bSLars-Peter Clausen 	ret = ad5421_write_unlocked(indio_dev, reg, val);
146dbdc025bSLars-Peter Clausen 	mutex_unlock(&indio_dev->mlock);
147dbdc025bSLars-Peter Clausen 
148dbdc025bSLars-Peter Clausen 	return ret;
149dbdc025bSLars-Peter Clausen }
150dbdc025bSLars-Peter Clausen 
151dbdc025bSLars-Peter Clausen static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
152dbdc025bSLars-Peter Clausen {
153dbdc025bSLars-Peter Clausen 	struct ad5421_state *st = iio_priv(indio_dev);
154dbdc025bSLars-Peter Clausen 	int ret;
155dbdc025bSLars-Peter Clausen 	struct spi_transfer t[] = {
156dbdc025bSLars-Peter Clausen 		{
157dbdc025bSLars-Peter Clausen 			.tx_buf = &st->data[0].d8[1],
158dbdc025bSLars-Peter Clausen 			.len = 3,
159dbdc025bSLars-Peter Clausen 			.cs_change = 1,
160dbdc025bSLars-Peter Clausen 		}, {
161dbdc025bSLars-Peter Clausen 			.rx_buf = &st->data[1].d8[1],
162dbdc025bSLars-Peter Clausen 			.len = 3,
163dbdc025bSLars-Peter Clausen 		},
164dbdc025bSLars-Peter Clausen 	};
165dbdc025bSLars-Peter Clausen 
166dbdc025bSLars-Peter Clausen 	mutex_lock(&indio_dev->mlock);
167dbdc025bSLars-Peter Clausen 
168dbdc025bSLars-Peter Clausen 	st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
169dbdc025bSLars-Peter Clausen 
17014543a00SLars-Peter Clausen 	ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
171dbdc025bSLars-Peter Clausen 	if (ret >= 0)
172dbdc025bSLars-Peter Clausen 		ret = be32_to_cpu(st->data[1].d32) & 0xffff;
173dbdc025bSLars-Peter Clausen 
174dbdc025bSLars-Peter Clausen 	mutex_unlock(&indio_dev->mlock);
175dbdc025bSLars-Peter Clausen 
176dbdc025bSLars-Peter Clausen 	return ret;
177dbdc025bSLars-Peter Clausen }
178dbdc025bSLars-Peter Clausen 
179dbdc025bSLars-Peter Clausen static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
180dbdc025bSLars-Peter Clausen 	unsigned int clr)
181dbdc025bSLars-Peter Clausen {
182dbdc025bSLars-Peter Clausen 	struct ad5421_state *st = iio_priv(indio_dev);
183dbdc025bSLars-Peter Clausen 	unsigned int ret;
184dbdc025bSLars-Peter Clausen 
185dbdc025bSLars-Peter Clausen 	mutex_lock(&indio_dev->mlock);
186dbdc025bSLars-Peter Clausen 
187dbdc025bSLars-Peter Clausen 	st->ctrl &= ~clr;
188dbdc025bSLars-Peter Clausen 	st->ctrl |= set;
189dbdc025bSLars-Peter Clausen 
190dbdc025bSLars-Peter Clausen 	ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
191dbdc025bSLars-Peter Clausen 
192dbdc025bSLars-Peter Clausen 	mutex_unlock(&indio_dev->mlock);
193dbdc025bSLars-Peter Clausen 
194dbdc025bSLars-Peter Clausen 	return ret;
195dbdc025bSLars-Peter Clausen }
196dbdc025bSLars-Peter Clausen 
197dbdc025bSLars-Peter Clausen static irqreturn_t ad5421_fault_handler(int irq, void *data)
198dbdc025bSLars-Peter Clausen {
199dbdc025bSLars-Peter Clausen 	struct iio_dev *indio_dev = data;
200dbdc025bSLars-Peter Clausen 	struct ad5421_state *st = iio_priv(indio_dev);
201dbdc025bSLars-Peter Clausen 	unsigned int fault;
202dbdc025bSLars-Peter Clausen 	unsigned int old_fault = 0;
203dbdc025bSLars-Peter Clausen 	unsigned int events;
204dbdc025bSLars-Peter Clausen 
205dbdc025bSLars-Peter Clausen 	fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
206dbdc025bSLars-Peter Clausen 	if (!fault)
207dbdc025bSLars-Peter Clausen 		return IRQ_NONE;
208dbdc025bSLars-Peter Clausen 
209dbdc025bSLars-Peter Clausen 	/* If we had a fault, this might mean that the DAC has lost its state
210dbdc025bSLars-Peter Clausen 	 * and has been reset. Make sure that the control register actually
211dbdc025bSLars-Peter Clausen 	 * contains what we expect it to contain. Otherwise the watchdog might
212dbdc025bSLars-Peter Clausen 	 * be enabled and we get watchdog timeout faults, which will render the
213dbdc025bSLars-Peter Clausen 	 * DAC unusable. */
214dbdc025bSLars-Peter Clausen 	ad5421_update_ctrl(indio_dev, 0, 0);
215dbdc025bSLars-Peter Clausen 
216dbdc025bSLars-Peter Clausen 
217dbdc025bSLars-Peter Clausen 	/* The fault pin stays high as long as a fault condition is present and
218dbdc025bSLars-Peter Clausen 	 * it is not possible to mask fault conditions. For certain fault
219dbdc025bSLars-Peter Clausen 	 * conditions for example like over-temperature it takes some time
220dbdc025bSLars-Peter Clausen 	 * until the fault condition disappears. If we would exit the interrupt
221dbdc025bSLars-Peter Clausen 	 * handler immediately after handling the event it would be entered
222dbdc025bSLars-Peter Clausen 	 * again instantly. Thus we fall back to polling in case we detect that
223dbdc025bSLars-Peter Clausen 	 * a interrupt condition is still present.
224dbdc025bSLars-Peter Clausen 	 */
225dbdc025bSLars-Peter Clausen 	do {
226dbdc025bSLars-Peter Clausen 		/* 0xffff is a invalid value for the register and will only be
227dbdc025bSLars-Peter Clausen 		 * read if there has been a communication error */
228dbdc025bSLars-Peter Clausen 		if (fault == 0xffff)
229dbdc025bSLars-Peter Clausen 			fault = 0;
230dbdc025bSLars-Peter Clausen 
231dbdc025bSLars-Peter Clausen 		/* we are only interested in new events */
232dbdc025bSLars-Peter Clausen 		events = (old_fault ^ fault) & fault;
233dbdc025bSLars-Peter Clausen 		events &= st->fault_mask;
234dbdc025bSLars-Peter Clausen 
235dbdc025bSLars-Peter Clausen 		if (events & AD5421_FAULT_OVER_CURRENT) {
236dbdc025bSLars-Peter Clausen 			iio_push_event(indio_dev,
237dbdc025bSLars-Peter Clausen 				IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
238dbdc025bSLars-Peter Clausen 					0,
239dbdc025bSLars-Peter Clausen 					IIO_EV_TYPE_THRESH,
240dbdc025bSLars-Peter Clausen 					IIO_EV_DIR_RISING),
241dbdc025bSLars-Peter Clausen 			iio_get_time_ns());
242dbdc025bSLars-Peter Clausen 		}
243dbdc025bSLars-Peter Clausen 
244dbdc025bSLars-Peter Clausen 		if (events & AD5421_FAULT_UNDER_CURRENT) {
245dbdc025bSLars-Peter Clausen 			iio_push_event(indio_dev,
246dbdc025bSLars-Peter Clausen 				IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
247dbdc025bSLars-Peter Clausen 					0,
248dbdc025bSLars-Peter Clausen 					IIO_EV_TYPE_THRESH,
249dbdc025bSLars-Peter Clausen 					IIO_EV_DIR_FALLING),
250dbdc025bSLars-Peter Clausen 				iio_get_time_ns());
251dbdc025bSLars-Peter Clausen 		}
252dbdc025bSLars-Peter Clausen 
253dbdc025bSLars-Peter Clausen 		if (events & AD5421_FAULT_TEMP_OVER_140) {
254dbdc025bSLars-Peter Clausen 			iio_push_event(indio_dev,
255dbdc025bSLars-Peter Clausen 				IIO_UNMOD_EVENT_CODE(IIO_TEMP,
256dbdc025bSLars-Peter Clausen 					0,
257dbdc025bSLars-Peter Clausen 					IIO_EV_TYPE_MAG,
258dbdc025bSLars-Peter Clausen 					IIO_EV_DIR_RISING),
259dbdc025bSLars-Peter Clausen 				iio_get_time_ns());
260dbdc025bSLars-Peter Clausen 		}
261dbdc025bSLars-Peter Clausen 
262dbdc025bSLars-Peter Clausen 		old_fault = fault;
263dbdc025bSLars-Peter Clausen 		fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
264dbdc025bSLars-Peter Clausen 
265dbdc025bSLars-Peter Clausen 		/* still active? go to sleep for some time */
266dbdc025bSLars-Peter Clausen 		if (fault & AD5421_FAULT_TRIGGER_IRQ)
267dbdc025bSLars-Peter Clausen 			msleep(1000);
268dbdc025bSLars-Peter Clausen 
269dbdc025bSLars-Peter Clausen 	} while (fault & AD5421_FAULT_TRIGGER_IRQ);
270dbdc025bSLars-Peter Clausen 
271dbdc025bSLars-Peter Clausen 
272dbdc025bSLars-Peter Clausen 	return IRQ_HANDLED;
273dbdc025bSLars-Peter Clausen }
274dbdc025bSLars-Peter Clausen 
275dbdc025bSLars-Peter Clausen static void ad5421_get_current_min_max(struct ad5421_state *st,
276dbdc025bSLars-Peter Clausen 	unsigned int *min, unsigned int *max)
277dbdc025bSLars-Peter Clausen {
278dbdc025bSLars-Peter Clausen 	/* The current range is configured using external pins, which are
279dbdc025bSLars-Peter Clausen 	 * usually hard-wired and not run-time switchable. */
280dbdc025bSLars-Peter Clausen 	switch (st->current_range) {
281dbdc025bSLars-Peter Clausen 	case AD5421_CURRENT_RANGE_4mA_20mA:
282dbdc025bSLars-Peter Clausen 		*min = 4000;
283dbdc025bSLars-Peter Clausen 		*max = 20000;
284dbdc025bSLars-Peter Clausen 		break;
285dbdc025bSLars-Peter Clausen 	case AD5421_CURRENT_RANGE_3mA8_21mA:
286dbdc025bSLars-Peter Clausen 		*min = 3800;
287dbdc025bSLars-Peter Clausen 		*max = 21000;
288dbdc025bSLars-Peter Clausen 		break;
289dbdc025bSLars-Peter Clausen 	case AD5421_CURRENT_RANGE_3mA2_24mA:
290dbdc025bSLars-Peter Clausen 		*min = 3200;
291dbdc025bSLars-Peter Clausen 		*max = 24000;
292dbdc025bSLars-Peter Clausen 		break;
293dbdc025bSLars-Peter Clausen 	default:
294dbdc025bSLars-Peter Clausen 		*min = 0;
295dbdc025bSLars-Peter Clausen 		*max = 1;
296dbdc025bSLars-Peter Clausen 		break;
297dbdc025bSLars-Peter Clausen 	}
298dbdc025bSLars-Peter Clausen }
299dbdc025bSLars-Peter Clausen 
300dbdc025bSLars-Peter Clausen static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
301dbdc025bSLars-Peter Clausen {
302dbdc025bSLars-Peter Clausen 	unsigned int min, max;
303dbdc025bSLars-Peter Clausen 
304dbdc025bSLars-Peter Clausen 	ad5421_get_current_min_max(st, &min, &max);
305dbdc025bSLars-Peter Clausen 	return (min * (1 << 16)) / (max - min);
306dbdc025bSLars-Peter Clausen }
307dbdc025bSLars-Peter Clausen 
308dbdc025bSLars-Peter Clausen static int ad5421_read_raw(struct iio_dev *indio_dev,
309dbdc025bSLars-Peter Clausen 	struct iio_chan_spec const *chan, int *val, int *val2, long m)
310dbdc025bSLars-Peter Clausen {
311dbdc025bSLars-Peter Clausen 	struct ad5421_state *st = iio_priv(indio_dev);
312bc7c49bcSLars-Peter Clausen 	unsigned int min, max;
313dbdc025bSLars-Peter Clausen 	int ret;
314dbdc025bSLars-Peter Clausen 
315dbdc025bSLars-Peter Clausen 	if (chan->type != IIO_CURRENT)
316dbdc025bSLars-Peter Clausen 		return -EINVAL;
317dbdc025bSLars-Peter Clausen 
318dbdc025bSLars-Peter Clausen 	switch (m) {
319dbdc025bSLars-Peter Clausen 	case IIO_CHAN_INFO_RAW:
320dbdc025bSLars-Peter Clausen 		ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
321dbdc025bSLars-Peter Clausen 		if (ret < 0)
322dbdc025bSLars-Peter Clausen 			return ret;
323dbdc025bSLars-Peter Clausen 		*val = ret;
324dbdc025bSLars-Peter Clausen 		return IIO_VAL_INT;
325dbdc025bSLars-Peter Clausen 	case IIO_CHAN_INFO_SCALE:
326bc7c49bcSLars-Peter Clausen 		ad5421_get_current_min_max(st, &min, &max);
327bc7c49bcSLars-Peter Clausen 		*val = max - min;
328bc7c49bcSLars-Peter Clausen 		*val2 = (1 << 16) * 1000;
329bc7c49bcSLars-Peter Clausen 		return IIO_VAL_FRACTIONAL;
330dbdc025bSLars-Peter Clausen 	case IIO_CHAN_INFO_OFFSET:
331dbdc025bSLars-Peter Clausen 		*val = ad5421_get_offset(st);
332dbdc025bSLars-Peter Clausen 		return IIO_VAL_INT;
333dbdc025bSLars-Peter Clausen 	case IIO_CHAN_INFO_CALIBBIAS:
334dbdc025bSLars-Peter Clausen 		ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
335dbdc025bSLars-Peter Clausen 		if (ret < 0)
336dbdc025bSLars-Peter Clausen 			return ret;
337dbdc025bSLars-Peter Clausen 		*val = ret - 32768;
338dbdc025bSLars-Peter Clausen 		return IIO_VAL_INT;
339dbdc025bSLars-Peter Clausen 	case IIO_CHAN_INFO_CALIBSCALE:
340dbdc025bSLars-Peter Clausen 		ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
341dbdc025bSLars-Peter Clausen 		if (ret < 0)
342dbdc025bSLars-Peter Clausen 			return ret;
343dbdc025bSLars-Peter Clausen 		*val = ret;
344dbdc025bSLars-Peter Clausen 		return IIO_VAL_INT;
345dbdc025bSLars-Peter Clausen 	}
346dbdc025bSLars-Peter Clausen 
347dbdc025bSLars-Peter Clausen 	return -EINVAL;
348dbdc025bSLars-Peter Clausen }
349dbdc025bSLars-Peter Clausen 
350dbdc025bSLars-Peter Clausen static int ad5421_write_raw(struct iio_dev *indio_dev,
351dbdc025bSLars-Peter Clausen 	struct iio_chan_spec const *chan, int val, int val2, long mask)
352dbdc025bSLars-Peter Clausen {
353dbdc025bSLars-Peter Clausen 	const unsigned int max_val = 1 << 16;
354dbdc025bSLars-Peter Clausen 
355dbdc025bSLars-Peter Clausen 	switch (mask) {
356dbdc025bSLars-Peter Clausen 	case IIO_CHAN_INFO_RAW:
357dbdc025bSLars-Peter Clausen 		if (val >= max_val || val < 0)
358dbdc025bSLars-Peter Clausen 			return -EINVAL;
359dbdc025bSLars-Peter Clausen 
360dbdc025bSLars-Peter Clausen 		return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
361dbdc025bSLars-Peter Clausen 	case IIO_CHAN_INFO_CALIBBIAS:
362dbdc025bSLars-Peter Clausen 		val += 32768;
363dbdc025bSLars-Peter Clausen 		if (val >= max_val || val < 0)
364dbdc025bSLars-Peter Clausen 			return -EINVAL;
365dbdc025bSLars-Peter Clausen 
366dbdc025bSLars-Peter Clausen 		return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
367dbdc025bSLars-Peter Clausen 	case IIO_CHAN_INFO_CALIBSCALE:
368dbdc025bSLars-Peter Clausen 		if (val >= max_val || val < 0)
369dbdc025bSLars-Peter Clausen 			return -EINVAL;
370dbdc025bSLars-Peter Clausen 
371dbdc025bSLars-Peter Clausen 		return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
372dbdc025bSLars-Peter Clausen 	default:
373dbdc025bSLars-Peter Clausen 		break;
374dbdc025bSLars-Peter Clausen 	}
375dbdc025bSLars-Peter Clausen 
376dbdc025bSLars-Peter Clausen 	return -EINVAL;
377dbdc025bSLars-Peter Clausen }
378dbdc025bSLars-Peter Clausen 
379dbdc025bSLars-Peter Clausen static int ad5421_write_event_config(struct iio_dev *indio_dev,
3801eefd62bSLars-Peter Clausen 	const struct iio_chan_spec *chan, enum iio_event_type type,
3811eefd62bSLars-Peter Clausen 	enum iio_event_direction dir, int state)
382dbdc025bSLars-Peter Clausen {
383dbdc025bSLars-Peter Clausen 	struct ad5421_state *st = iio_priv(indio_dev);
384dbdc025bSLars-Peter Clausen 	unsigned int mask;
385dbdc025bSLars-Peter Clausen 
3861eefd62bSLars-Peter Clausen 	switch (chan->type) {
387dbdc025bSLars-Peter Clausen 	case IIO_CURRENT:
3881eefd62bSLars-Peter Clausen 		if (dir == IIO_EV_DIR_RISING)
389dbdc025bSLars-Peter Clausen 			mask = AD5421_FAULT_OVER_CURRENT;
390dbdc025bSLars-Peter Clausen 		else
391dbdc025bSLars-Peter Clausen 			mask = AD5421_FAULT_UNDER_CURRENT;
392dbdc025bSLars-Peter Clausen 		break;
393dbdc025bSLars-Peter Clausen 	case IIO_TEMP:
394dbdc025bSLars-Peter Clausen 		mask = AD5421_FAULT_TEMP_OVER_140;
395dbdc025bSLars-Peter Clausen 		break;
396dbdc025bSLars-Peter Clausen 	default:
397dbdc025bSLars-Peter Clausen 		return -EINVAL;
398dbdc025bSLars-Peter Clausen 	}
399dbdc025bSLars-Peter Clausen 
400dbdc025bSLars-Peter Clausen 	mutex_lock(&indio_dev->mlock);
401dbdc025bSLars-Peter Clausen 	if (state)
402dbdc025bSLars-Peter Clausen 		st->fault_mask |= mask;
403dbdc025bSLars-Peter Clausen 	else
404dbdc025bSLars-Peter Clausen 		st->fault_mask &= ~mask;
405dbdc025bSLars-Peter Clausen 	mutex_unlock(&indio_dev->mlock);
406dbdc025bSLars-Peter Clausen 
407dbdc025bSLars-Peter Clausen 	return 0;
408dbdc025bSLars-Peter Clausen }
409dbdc025bSLars-Peter Clausen 
410dbdc025bSLars-Peter Clausen static int ad5421_read_event_config(struct iio_dev *indio_dev,
4111eefd62bSLars-Peter Clausen 	const struct iio_chan_spec *chan, enum iio_event_type type,
4121eefd62bSLars-Peter Clausen 	enum iio_event_direction dir)
413dbdc025bSLars-Peter Clausen {
414dbdc025bSLars-Peter Clausen 	struct ad5421_state *st = iio_priv(indio_dev);
415dbdc025bSLars-Peter Clausen 	unsigned int mask;
416dbdc025bSLars-Peter Clausen 
4171eefd62bSLars-Peter Clausen 	switch (chan->type) {
418dbdc025bSLars-Peter Clausen 	case IIO_CURRENT:
4191eefd62bSLars-Peter Clausen 		if (dir == IIO_EV_DIR_RISING)
420dbdc025bSLars-Peter Clausen 			mask = AD5421_FAULT_OVER_CURRENT;
421dbdc025bSLars-Peter Clausen 		else
422dbdc025bSLars-Peter Clausen 			mask = AD5421_FAULT_UNDER_CURRENT;
423dbdc025bSLars-Peter Clausen 		break;
424dbdc025bSLars-Peter Clausen 	case IIO_TEMP:
425dbdc025bSLars-Peter Clausen 		mask = AD5421_FAULT_TEMP_OVER_140;
426dbdc025bSLars-Peter Clausen 		break;
427dbdc025bSLars-Peter Clausen 	default:
428dbdc025bSLars-Peter Clausen 		return -EINVAL;
429dbdc025bSLars-Peter Clausen 	}
430dbdc025bSLars-Peter Clausen 
431dbdc025bSLars-Peter Clausen 	return (bool)(st->fault_mask & mask);
432dbdc025bSLars-Peter Clausen }
433dbdc025bSLars-Peter Clausen 
4341eefd62bSLars-Peter Clausen static int ad5421_read_event_value(struct iio_dev *indio_dev,
4351eefd62bSLars-Peter Clausen 	const struct iio_chan_spec *chan, enum iio_event_type type,
4361eefd62bSLars-Peter Clausen 	enum iio_event_direction dir, enum iio_event_info info, int *val,
4371eefd62bSLars-Peter Clausen 	int *val2)
438dbdc025bSLars-Peter Clausen {
439dbdc025bSLars-Peter Clausen 	int ret;
440dbdc025bSLars-Peter Clausen 
4411eefd62bSLars-Peter Clausen 	switch (chan->type) {
442dbdc025bSLars-Peter Clausen 	case IIO_CURRENT:
443dbdc025bSLars-Peter Clausen 		ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
444dbdc025bSLars-Peter Clausen 		if (ret < 0)
445dbdc025bSLars-Peter Clausen 			return ret;
446dbdc025bSLars-Peter Clausen 		*val = ret;
447dbdc025bSLars-Peter Clausen 		break;
448dbdc025bSLars-Peter Clausen 	case IIO_TEMP:
449dbdc025bSLars-Peter Clausen 		*val = 140000;
450dbdc025bSLars-Peter Clausen 		break;
451dbdc025bSLars-Peter Clausen 	default:
452dbdc025bSLars-Peter Clausen 		return -EINVAL;
453dbdc025bSLars-Peter Clausen 	}
454dbdc025bSLars-Peter Clausen 
4551eefd62bSLars-Peter Clausen 	return IIO_VAL_INT;
456dbdc025bSLars-Peter Clausen }
457dbdc025bSLars-Peter Clausen 
458dbdc025bSLars-Peter Clausen static const struct iio_info ad5421_info = {
459dbdc025bSLars-Peter Clausen 	.read_raw =		ad5421_read_raw,
460dbdc025bSLars-Peter Clausen 	.write_raw =		ad5421_write_raw,
4611eefd62bSLars-Peter Clausen 	.read_event_config_new = ad5421_read_event_config,
4621eefd62bSLars-Peter Clausen 	.write_event_config_new = ad5421_write_event_config,
4631eefd62bSLars-Peter Clausen 	.read_event_value_new =	ad5421_read_event_value,
464dbdc025bSLars-Peter Clausen 	.driver_module =	THIS_MODULE,
465dbdc025bSLars-Peter Clausen };
466dbdc025bSLars-Peter Clausen 
467fc52692cSGreg Kroah-Hartman static int ad5421_probe(struct spi_device *spi)
468dbdc025bSLars-Peter Clausen {
469dbdc025bSLars-Peter Clausen 	struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
470dbdc025bSLars-Peter Clausen 	struct iio_dev *indio_dev;
471dbdc025bSLars-Peter Clausen 	struct ad5421_state *st;
472dbdc025bSLars-Peter Clausen 	int ret;
473dbdc025bSLars-Peter Clausen 
47462a308a6SSachin Kamat 	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
475dbdc025bSLars-Peter Clausen 	if (indio_dev == NULL) {
476dbdc025bSLars-Peter Clausen 		dev_err(&spi->dev, "Failed to allocate iio device\n");
477dbdc025bSLars-Peter Clausen 		return  -ENOMEM;
478dbdc025bSLars-Peter Clausen 	}
479dbdc025bSLars-Peter Clausen 
480dbdc025bSLars-Peter Clausen 	st = iio_priv(indio_dev);
481dbdc025bSLars-Peter Clausen 	spi_set_drvdata(spi, indio_dev);
482dbdc025bSLars-Peter Clausen 
483dbdc025bSLars-Peter Clausen 	st->spi = spi;
484dbdc025bSLars-Peter Clausen 
485dbdc025bSLars-Peter Clausen 	indio_dev->dev.parent = &spi->dev;
486dbdc025bSLars-Peter Clausen 	indio_dev->name = "ad5421";
487dbdc025bSLars-Peter Clausen 	indio_dev->info = &ad5421_info;
488dbdc025bSLars-Peter Clausen 	indio_dev->modes = INDIO_DIRECT_MODE;
489dbdc025bSLars-Peter Clausen 	indio_dev->channels = ad5421_channels;
490dbdc025bSLars-Peter Clausen 	indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
491dbdc025bSLars-Peter Clausen 
492dbdc025bSLars-Peter Clausen 	st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE |
493dbdc025bSLars-Peter Clausen 			AD5421_CTRL_AUTO_FAULT_READBACK;
494dbdc025bSLars-Peter Clausen 
495dbdc025bSLars-Peter Clausen 	if (pdata) {
496dbdc025bSLars-Peter Clausen 		st->current_range = pdata->current_range;
497dbdc025bSLars-Peter Clausen 		if (pdata->external_vref)
498dbdc025bSLars-Peter Clausen 			st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF;
499dbdc025bSLars-Peter Clausen 	} else {
500dbdc025bSLars-Peter Clausen 		st->current_range = AD5421_CURRENT_RANGE_4mA_20mA;
501dbdc025bSLars-Peter Clausen 	}
502dbdc025bSLars-Peter Clausen 
503dbdc025bSLars-Peter Clausen 	/* write initial ctrl register value */
504dbdc025bSLars-Peter Clausen 	ad5421_update_ctrl(indio_dev, 0, 0);
505dbdc025bSLars-Peter Clausen 
506dbdc025bSLars-Peter Clausen 	if (spi->irq) {
50762a308a6SSachin Kamat 		ret = devm_request_threaded_irq(&spi->dev, spi->irq,
508dbdc025bSLars-Peter Clausen 					   NULL,
509dbdc025bSLars-Peter Clausen 					   ad5421_fault_handler,
510dbdc025bSLars-Peter Clausen 					   IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
511dbdc025bSLars-Peter Clausen 					   "ad5421 fault",
512dbdc025bSLars-Peter Clausen 					   indio_dev);
513dbdc025bSLars-Peter Clausen 		if (ret)
51462a308a6SSachin Kamat 			return ret;
515dbdc025bSLars-Peter Clausen 	}
516dbdc025bSLars-Peter Clausen 
517365736e7SSachin Kamat 	return devm_iio_device_register(&spi->dev, indio_dev);
518dbdc025bSLars-Peter Clausen }
519dbdc025bSLars-Peter Clausen 
520dbdc025bSLars-Peter Clausen static struct spi_driver ad5421_driver = {
521dbdc025bSLars-Peter Clausen 	.driver = {
522dbdc025bSLars-Peter Clausen 		   .name = "ad5421",
523dbdc025bSLars-Peter Clausen 		   .owner = THIS_MODULE,
524dbdc025bSLars-Peter Clausen 	},
525dbdc025bSLars-Peter Clausen 	.probe = ad5421_probe,
526dbdc025bSLars-Peter Clausen };
527dbdc025bSLars-Peter Clausen module_spi_driver(ad5421_driver);
528dbdc025bSLars-Peter Clausen 
529dbdc025bSLars-Peter Clausen MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
530dbdc025bSLars-Peter Clausen MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
531dbdc025bSLars-Peter Clausen MODULE_LICENSE("GPL v2");
532dbdc025bSLars-Peter Clausen MODULE_ALIAS("spi:ad5421");
533