1fda8d26eSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2dbdc025bSLars-Peter Clausen /*
3dbdc025bSLars-Peter Clausen * AD5421 Digital to analog converters driver
4dbdc025bSLars-Peter Clausen *
5dbdc025bSLars-Peter Clausen * Copyright 2011 Analog Devices Inc.
6dbdc025bSLars-Peter Clausen */
7dbdc025bSLars-Peter Clausen
8dbdc025bSLars-Peter Clausen #include <linux/device.h>
9dbdc025bSLars-Peter Clausen #include <linux/delay.h>
10dbdc025bSLars-Peter Clausen #include <linux/err.h>
11dbdc025bSLars-Peter Clausen #include <linux/module.h>
12dbdc025bSLars-Peter Clausen #include <linux/interrupt.h>
13dbdc025bSLars-Peter Clausen #include <linux/kernel.h>
14dbdc025bSLars-Peter Clausen #include <linux/spi/spi.h>
15dbdc025bSLars-Peter Clausen #include <linux/slab.h>
16dbdc025bSLars-Peter Clausen #include <linux/sysfs.h>
17dbdc025bSLars-Peter Clausen
18dbdc025bSLars-Peter Clausen #include <linux/iio/iio.h>
19dbdc025bSLars-Peter Clausen #include <linux/iio/sysfs.h>
20dbdc025bSLars-Peter Clausen #include <linux/iio/events.h>
21dbdc025bSLars-Peter Clausen #include <linux/iio/dac/ad5421.h>
22dbdc025bSLars-Peter Clausen
23dbdc025bSLars-Peter Clausen
24dbdc025bSLars-Peter Clausen #define AD5421_REG_DAC_DATA 0x1
25dbdc025bSLars-Peter Clausen #define AD5421_REG_CTRL 0x2
26dbdc025bSLars-Peter Clausen #define AD5421_REG_OFFSET 0x3
27dbdc025bSLars-Peter Clausen #define AD5421_REG_GAIN 0x4
28dbdc025bSLars-Peter Clausen /* load dac and fault shared the same register number. Writing to it will cause
29dbdc025bSLars-Peter Clausen * a dac load command, reading from it will return the fault status register */
30dbdc025bSLars-Peter Clausen #define AD5421_REG_LOAD_DAC 0x5
31dbdc025bSLars-Peter Clausen #define AD5421_REG_FAULT 0x5
32dbdc025bSLars-Peter Clausen #define AD5421_REG_FORCE_ALARM_CURRENT 0x6
33dbdc025bSLars-Peter Clausen #define AD5421_REG_RESET 0x7
34dbdc025bSLars-Peter Clausen #define AD5421_REG_START_CONVERSION 0x8
35dbdc025bSLars-Peter Clausen #define AD5421_REG_NOOP 0x9
36dbdc025bSLars-Peter Clausen
37dbdc025bSLars-Peter Clausen #define AD5421_CTRL_WATCHDOG_DISABLE BIT(12)
38dbdc025bSLars-Peter Clausen #define AD5421_CTRL_AUTO_FAULT_READBACK BIT(11)
39dbdc025bSLars-Peter Clausen #define AD5421_CTRL_MIN_CURRENT BIT(9)
40dbdc025bSLars-Peter Clausen #define AD5421_CTRL_ADC_SOURCE_TEMP BIT(8)
41dbdc025bSLars-Peter Clausen #define AD5421_CTRL_ADC_ENABLE BIT(7)
42dbdc025bSLars-Peter Clausen #define AD5421_CTRL_PWR_DOWN_INT_VREF BIT(6)
43dbdc025bSLars-Peter Clausen
44dbdc025bSLars-Peter Clausen #define AD5421_FAULT_SPI BIT(15)
45dbdc025bSLars-Peter Clausen #define AD5421_FAULT_PEC BIT(14)
46dbdc025bSLars-Peter Clausen #define AD5421_FAULT_OVER_CURRENT BIT(13)
47dbdc025bSLars-Peter Clausen #define AD5421_FAULT_UNDER_CURRENT BIT(12)
48dbdc025bSLars-Peter Clausen #define AD5421_FAULT_TEMP_OVER_140 BIT(11)
49dbdc025bSLars-Peter Clausen #define AD5421_FAULT_TEMP_OVER_100 BIT(10)
50dbdc025bSLars-Peter Clausen #define AD5421_FAULT_UNDER_VOLTAGE_6V BIT(9)
51dbdc025bSLars-Peter Clausen #define AD5421_FAULT_UNDER_VOLTAGE_12V BIT(8)
52dbdc025bSLars-Peter Clausen
53dbdc025bSLars-Peter Clausen /* These bits will cause the fault pin to go high */
54dbdc025bSLars-Peter Clausen #define AD5421_FAULT_TRIGGER_IRQ \
55dbdc025bSLars-Peter Clausen (AD5421_FAULT_SPI | AD5421_FAULT_PEC | AD5421_FAULT_OVER_CURRENT | \
56dbdc025bSLars-Peter Clausen AD5421_FAULT_UNDER_CURRENT | AD5421_FAULT_TEMP_OVER_140)
57dbdc025bSLars-Peter Clausen
58dbdc025bSLars-Peter Clausen /**
59dbdc025bSLars-Peter Clausen * struct ad5421_state - driver instance specific data
60dbdc025bSLars-Peter Clausen * @spi: spi_device
61dbdc025bSLars-Peter Clausen * @ctrl: control register cache
62dbdc025bSLars-Peter Clausen * @current_range: current range which the device is configured for
63dbdc025bSLars-Peter Clausen * @data: spi transfer buffers
64dbdc025bSLars-Peter Clausen * @fault_mask: software masking of events
65140d5532SLee Jones * @lock: lock to protect the data buffer during SPI ops
66dbdc025bSLars-Peter Clausen */
67dbdc025bSLars-Peter Clausen struct ad5421_state {
68dbdc025bSLars-Peter Clausen struct spi_device *spi;
69dbdc025bSLars-Peter Clausen unsigned int ctrl;
70dbdc025bSLars-Peter Clausen enum ad5421_current_range current_range;
71dbdc025bSLars-Peter Clausen unsigned int fault_mask;
729bc17892SSergiu Cuciurean struct mutex lock;
73dbdc025bSLars-Peter Clausen
74dbdc025bSLars-Peter Clausen /*
75*d2b240d3SJonathan Cameron * DMA (thus cache coherency maintenance) may require the
76dbdc025bSLars-Peter Clausen * transfer buffers to live in their own cache lines.
77dbdc025bSLars-Peter Clausen */
78dbdc025bSLars-Peter Clausen union {
798ef411b7SLars-Peter Clausen __be32 d32;
80dbdc025bSLars-Peter Clausen u8 d8[4];
81*d2b240d3SJonathan Cameron } data[2] __aligned(IIO_DMA_MINALIGN);
82dbdc025bSLars-Peter Clausen };
83dbdc025bSLars-Peter Clausen
841eefd62bSLars-Peter Clausen static const struct iio_event_spec ad5421_current_event[] = {
851eefd62bSLars-Peter Clausen {
861eefd62bSLars-Peter Clausen .type = IIO_EV_TYPE_THRESH,
871eefd62bSLars-Peter Clausen .dir = IIO_EV_DIR_RISING,
881eefd62bSLars-Peter Clausen .mask_separate = BIT(IIO_EV_INFO_VALUE) |
891eefd62bSLars-Peter Clausen BIT(IIO_EV_INFO_ENABLE),
901eefd62bSLars-Peter Clausen }, {
911eefd62bSLars-Peter Clausen .type = IIO_EV_TYPE_THRESH,
921eefd62bSLars-Peter Clausen .dir = IIO_EV_DIR_FALLING,
931eefd62bSLars-Peter Clausen .mask_separate = BIT(IIO_EV_INFO_VALUE) |
941eefd62bSLars-Peter Clausen BIT(IIO_EV_INFO_ENABLE),
951eefd62bSLars-Peter Clausen },
961eefd62bSLars-Peter Clausen };
971eefd62bSLars-Peter Clausen
981eefd62bSLars-Peter Clausen static const struct iio_event_spec ad5421_temp_event[] = {
991eefd62bSLars-Peter Clausen {
1001eefd62bSLars-Peter Clausen .type = IIO_EV_TYPE_THRESH,
1011eefd62bSLars-Peter Clausen .dir = IIO_EV_DIR_RISING,
1021eefd62bSLars-Peter Clausen .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1031eefd62bSLars-Peter Clausen BIT(IIO_EV_INFO_ENABLE),
1041eefd62bSLars-Peter Clausen },
1051eefd62bSLars-Peter Clausen };
1061eefd62bSLars-Peter Clausen
107dbdc025bSLars-Peter Clausen static const struct iio_chan_spec ad5421_channels[] = {
108dbdc025bSLars-Peter Clausen {
109dbdc025bSLars-Peter Clausen .type = IIO_CURRENT,
110dbdc025bSLars-Peter Clausen .indexed = 1,
111dbdc025bSLars-Peter Clausen .output = 1,
112dbdc025bSLars-Peter Clausen .channel = 0,
11331311c2aSJonathan Cameron .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
11431311c2aSJonathan Cameron BIT(IIO_CHAN_INFO_CALIBSCALE) |
11531311c2aSJonathan Cameron BIT(IIO_CHAN_INFO_CALIBBIAS),
11631311c2aSJonathan Cameron .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |
11731311c2aSJonathan Cameron BIT(IIO_CHAN_INFO_OFFSET),
11849f82897SJonathan Cameron .scan_type = {
11949f82897SJonathan Cameron .sign = 'u',
12049f82897SJonathan Cameron .realbits = 16,
12149f82897SJonathan Cameron .storagebits = 16,
12249f82897SJonathan Cameron },
1231eefd62bSLars-Peter Clausen .event_spec = ad5421_current_event,
1241eefd62bSLars-Peter Clausen .num_event_specs = ARRAY_SIZE(ad5421_current_event),
125dbdc025bSLars-Peter Clausen },
126dbdc025bSLars-Peter Clausen {
127dbdc025bSLars-Peter Clausen .type = IIO_TEMP,
128dbdc025bSLars-Peter Clausen .channel = -1,
1291eefd62bSLars-Peter Clausen .event_spec = ad5421_temp_event,
1301eefd62bSLars-Peter Clausen .num_event_specs = ARRAY_SIZE(ad5421_temp_event),
131dbdc025bSLars-Peter Clausen },
132dbdc025bSLars-Peter Clausen };
133dbdc025bSLars-Peter Clausen
ad5421_write_unlocked(struct iio_dev * indio_dev,unsigned int reg,unsigned int val)134dbdc025bSLars-Peter Clausen static int ad5421_write_unlocked(struct iio_dev *indio_dev,
135dbdc025bSLars-Peter Clausen unsigned int reg, unsigned int val)
136dbdc025bSLars-Peter Clausen {
137dbdc025bSLars-Peter Clausen struct ad5421_state *st = iio_priv(indio_dev);
138dbdc025bSLars-Peter Clausen
139dbdc025bSLars-Peter Clausen st->data[0].d32 = cpu_to_be32((reg << 16) | val);
140dbdc025bSLars-Peter Clausen
141dbdc025bSLars-Peter Clausen return spi_write(st->spi, &st->data[0].d8[1], 3);
142dbdc025bSLars-Peter Clausen }
143dbdc025bSLars-Peter Clausen
ad5421_write(struct iio_dev * indio_dev,unsigned int reg,unsigned int val)144dbdc025bSLars-Peter Clausen static int ad5421_write(struct iio_dev *indio_dev, unsigned int reg,
145dbdc025bSLars-Peter Clausen unsigned int val)
146dbdc025bSLars-Peter Clausen {
1479bc17892SSergiu Cuciurean struct ad5421_state *st = iio_priv(indio_dev);
148dbdc025bSLars-Peter Clausen int ret;
149dbdc025bSLars-Peter Clausen
1509bc17892SSergiu Cuciurean mutex_lock(&st->lock);
151dbdc025bSLars-Peter Clausen ret = ad5421_write_unlocked(indio_dev, reg, val);
1529bc17892SSergiu Cuciurean mutex_unlock(&st->lock);
153dbdc025bSLars-Peter Clausen
154dbdc025bSLars-Peter Clausen return ret;
155dbdc025bSLars-Peter Clausen }
156dbdc025bSLars-Peter Clausen
ad5421_read(struct iio_dev * indio_dev,unsigned int reg)157dbdc025bSLars-Peter Clausen static int ad5421_read(struct iio_dev *indio_dev, unsigned int reg)
158dbdc025bSLars-Peter Clausen {
159dbdc025bSLars-Peter Clausen struct ad5421_state *st = iio_priv(indio_dev);
160dbdc025bSLars-Peter Clausen int ret;
161dbdc025bSLars-Peter Clausen struct spi_transfer t[] = {
162dbdc025bSLars-Peter Clausen {
163dbdc025bSLars-Peter Clausen .tx_buf = &st->data[0].d8[1],
164dbdc025bSLars-Peter Clausen .len = 3,
165dbdc025bSLars-Peter Clausen .cs_change = 1,
166dbdc025bSLars-Peter Clausen }, {
167dbdc025bSLars-Peter Clausen .rx_buf = &st->data[1].d8[1],
168dbdc025bSLars-Peter Clausen .len = 3,
169dbdc025bSLars-Peter Clausen },
170dbdc025bSLars-Peter Clausen };
171dbdc025bSLars-Peter Clausen
1729bc17892SSergiu Cuciurean mutex_lock(&st->lock);
173dbdc025bSLars-Peter Clausen
174dbdc025bSLars-Peter Clausen st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
175dbdc025bSLars-Peter Clausen
17614543a00SLars-Peter Clausen ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
177dbdc025bSLars-Peter Clausen if (ret >= 0)
178dbdc025bSLars-Peter Clausen ret = be32_to_cpu(st->data[1].d32) & 0xffff;
179dbdc025bSLars-Peter Clausen
1809bc17892SSergiu Cuciurean mutex_unlock(&st->lock);
181dbdc025bSLars-Peter Clausen
182dbdc025bSLars-Peter Clausen return ret;
183dbdc025bSLars-Peter Clausen }
184dbdc025bSLars-Peter Clausen
ad5421_update_ctrl(struct iio_dev * indio_dev,unsigned int set,unsigned int clr)185dbdc025bSLars-Peter Clausen static int ad5421_update_ctrl(struct iio_dev *indio_dev, unsigned int set,
186dbdc025bSLars-Peter Clausen unsigned int clr)
187dbdc025bSLars-Peter Clausen {
188dbdc025bSLars-Peter Clausen struct ad5421_state *st = iio_priv(indio_dev);
189dbdc025bSLars-Peter Clausen unsigned int ret;
190dbdc025bSLars-Peter Clausen
1919bc17892SSergiu Cuciurean mutex_lock(&st->lock);
192dbdc025bSLars-Peter Clausen
193dbdc025bSLars-Peter Clausen st->ctrl &= ~clr;
194dbdc025bSLars-Peter Clausen st->ctrl |= set;
195dbdc025bSLars-Peter Clausen
196dbdc025bSLars-Peter Clausen ret = ad5421_write_unlocked(indio_dev, AD5421_REG_CTRL, st->ctrl);
197dbdc025bSLars-Peter Clausen
1989bc17892SSergiu Cuciurean mutex_unlock(&st->lock);
199dbdc025bSLars-Peter Clausen
200dbdc025bSLars-Peter Clausen return ret;
201dbdc025bSLars-Peter Clausen }
202dbdc025bSLars-Peter Clausen
ad5421_fault_handler(int irq,void * data)203dbdc025bSLars-Peter Clausen static irqreturn_t ad5421_fault_handler(int irq, void *data)
204dbdc025bSLars-Peter Clausen {
205dbdc025bSLars-Peter Clausen struct iio_dev *indio_dev = data;
206dbdc025bSLars-Peter Clausen struct ad5421_state *st = iio_priv(indio_dev);
207dbdc025bSLars-Peter Clausen unsigned int fault;
208dbdc025bSLars-Peter Clausen unsigned int old_fault = 0;
209dbdc025bSLars-Peter Clausen unsigned int events;
210dbdc025bSLars-Peter Clausen
211dbdc025bSLars-Peter Clausen fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
212dbdc025bSLars-Peter Clausen if (!fault)
213dbdc025bSLars-Peter Clausen return IRQ_NONE;
214dbdc025bSLars-Peter Clausen
215dbdc025bSLars-Peter Clausen /* If we had a fault, this might mean that the DAC has lost its state
216dbdc025bSLars-Peter Clausen * and has been reset. Make sure that the control register actually
217dbdc025bSLars-Peter Clausen * contains what we expect it to contain. Otherwise the watchdog might
218dbdc025bSLars-Peter Clausen * be enabled and we get watchdog timeout faults, which will render the
219dbdc025bSLars-Peter Clausen * DAC unusable. */
220dbdc025bSLars-Peter Clausen ad5421_update_ctrl(indio_dev, 0, 0);
221dbdc025bSLars-Peter Clausen
222dbdc025bSLars-Peter Clausen
223dbdc025bSLars-Peter Clausen /* The fault pin stays high as long as a fault condition is present and
224dbdc025bSLars-Peter Clausen * it is not possible to mask fault conditions. For certain fault
225dbdc025bSLars-Peter Clausen * conditions for example like over-temperature it takes some time
226dbdc025bSLars-Peter Clausen * until the fault condition disappears. If we would exit the interrupt
227dbdc025bSLars-Peter Clausen * handler immediately after handling the event it would be entered
228dbdc025bSLars-Peter Clausen * again instantly. Thus we fall back to polling in case we detect that
229dbdc025bSLars-Peter Clausen * a interrupt condition is still present.
230dbdc025bSLars-Peter Clausen */
231dbdc025bSLars-Peter Clausen do {
232dbdc025bSLars-Peter Clausen /* 0xffff is a invalid value for the register and will only be
233dbdc025bSLars-Peter Clausen * read if there has been a communication error */
234dbdc025bSLars-Peter Clausen if (fault == 0xffff)
235dbdc025bSLars-Peter Clausen fault = 0;
236dbdc025bSLars-Peter Clausen
237dbdc025bSLars-Peter Clausen /* we are only interested in new events */
238dbdc025bSLars-Peter Clausen events = (old_fault ^ fault) & fault;
239dbdc025bSLars-Peter Clausen events &= st->fault_mask;
240dbdc025bSLars-Peter Clausen
241dbdc025bSLars-Peter Clausen if (events & AD5421_FAULT_OVER_CURRENT) {
242dbdc025bSLars-Peter Clausen iio_push_event(indio_dev,
243dbdc025bSLars-Peter Clausen IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
244dbdc025bSLars-Peter Clausen 0,
245dbdc025bSLars-Peter Clausen IIO_EV_TYPE_THRESH,
246dbdc025bSLars-Peter Clausen IIO_EV_DIR_RISING),
247bc2b7dabSGregor Boirie iio_get_time_ns(indio_dev));
248dbdc025bSLars-Peter Clausen }
249dbdc025bSLars-Peter Clausen
250dbdc025bSLars-Peter Clausen if (events & AD5421_FAULT_UNDER_CURRENT) {
251dbdc025bSLars-Peter Clausen iio_push_event(indio_dev,
252dbdc025bSLars-Peter Clausen IIO_UNMOD_EVENT_CODE(IIO_CURRENT,
253dbdc025bSLars-Peter Clausen 0,
254dbdc025bSLars-Peter Clausen IIO_EV_TYPE_THRESH,
255dbdc025bSLars-Peter Clausen IIO_EV_DIR_FALLING),
256bc2b7dabSGregor Boirie iio_get_time_ns(indio_dev));
257dbdc025bSLars-Peter Clausen }
258dbdc025bSLars-Peter Clausen
259dbdc025bSLars-Peter Clausen if (events & AD5421_FAULT_TEMP_OVER_140) {
260dbdc025bSLars-Peter Clausen iio_push_event(indio_dev,
261dbdc025bSLars-Peter Clausen IIO_UNMOD_EVENT_CODE(IIO_TEMP,
262dbdc025bSLars-Peter Clausen 0,
263dbdc025bSLars-Peter Clausen IIO_EV_TYPE_MAG,
264dbdc025bSLars-Peter Clausen IIO_EV_DIR_RISING),
265bc2b7dabSGregor Boirie iio_get_time_ns(indio_dev));
266dbdc025bSLars-Peter Clausen }
267dbdc025bSLars-Peter Clausen
268dbdc025bSLars-Peter Clausen old_fault = fault;
269dbdc025bSLars-Peter Clausen fault = ad5421_read(indio_dev, AD5421_REG_FAULT);
270dbdc025bSLars-Peter Clausen
271dbdc025bSLars-Peter Clausen /* still active? go to sleep for some time */
272dbdc025bSLars-Peter Clausen if (fault & AD5421_FAULT_TRIGGER_IRQ)
273dbdc025bSLars-Peter Clausen msleep(1000);
274dbdc025bSLars-Peter Clausen
275dbdc025bSLars-Peter Clausen } while (fault & AD5421_FAULT_TRIGGER_IRQ);
276dbdc025bSLars-Peter Clausen
277dbdc025bSLars-Peter Clausen
278dbdc025bSLars-Peter Clausen return IRQ_HANDLED;
279dbdc025bSLars-Peter Clausen }
280dbdc025bSLars-Peter Clausen
ad5421_get_current_min_max(struct ad5421_state * st,unsigned int * min,unsigned int * max)281dbdc025bSLars-Peter Clausen static void ad5421_get_current_min_max(struct ad5421_state *st,
282dbdc025bSLars-Peter Clausen unsigned int *min, unsigned int *max)
283dbdc025bSLars-Peter Clausen {
284dbdc025bSLars-Peter Clausen /* The current range is configured using external pins, which are
285dbdc025bSLars-Peter Clausen * usually hard-wired and not run-time switchable. */
286dbdc025bSLars-Peter Clausen switch (st->current_range) {
287dbdc025bSLars-Peter Clausen case AD5421_CURRENT_RANGE_4mA_20mA:
288dbdc025bSLars-Peter Clausen *min = 4000;
289dbdc025bSLars-Peter Clausen *max = 20000;
290dbdc025bSLars-Peter Clausen break;
291dbdc025bSLars-Peter Clausen case AD5421_CURRENT_RANGE_3mA8_21mA:
292dbdc025bSLars-Peter Clausen *min = 3800;
293dbdc025bSLars-Peter Clausen *max = 21000;
294dbdc025bSLars-Peter Clausen break;
295dbdc025bSLars-Peter Clausen case AD5421_CURRENT_RANGE_3mA2_24mA:
296dbdc025bSLars-Peter Clausen *min = 3200;
297dbdc025bSLars-Peter Clausen *max = 24000;
298dbdc025bSLars-Peter Clausen break;
299dbdc025bSLars-Peter Clausen default:
300dbdc025bSLars-Peter Clausen *min = 0;
301dbdc025bSLars-Peter Clausen *max = 1;
302dbdc025bSLars-Peter Clausen break;
303dbdc025bSLars-Peter Clausen }
304dbdc025bSLars-Peter Clausen }
305dbdc025bSLars-Peter Clausen
ad5421_get_offset(struct ad5421_state * st)306dbdc025bSLars-Peter Clausen static inline unsigned int ad5421_get_offset(struct ad5421_state *st)
307dbdc025bSLars-Peter Clausen {
308dbdc025bSLars-Peter Clausen unsigned int min, max;
309dbdc025bSLars-Peter Clausen
310dbdc025bSLars-Peter Clausen ad5421_get_current_min_max(st, &min, &max);
311dbdc025bSLars-Peter Clausen return (min * (1 << 16)) / (max - min);
312dbdc025bSLars-Peter Clausen }
313dbdc025bSLars-Peter Clausen
ad5421_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)314dbdc025bSLars-Peter Clausen static int ad5421_read_raw(struct iio_dev *indio_dev,
315dbdc025bSLars-Peter Clausen struct iio_chan_spec const *chan, int *val, int *val2, long m)
316dbdc025bSLars-Peter Clausen {
317dbdc025bSLars-Peter Clausen struct ad5421_state *st = iio_priv(indio_dev);
318bc7c49bcSLars-Peter Clausen unsigned int min, max;
319dbdc025bSLars-Peter Clausen int ret;
320dbdc025bSLars-Peter Clausen
321dbdc025bSLars-Peter Clausen if (chan->type != IIO_CURRENT)
322dbdc025bSLars-Peter Clausen return -EINVAL;
323dbdc025bSLars-Peter Clausen
324dbdc025bSLars-Peter Clausen switch (m) {
325dbdc025bSLars-Peter Clausen case IIO_CHAN_INFO_RAW:
326dbdc025bSLars-Peter Clausen ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
327dbdc025bSLars-Peter Clausen if (ret < 0)
328dbdc025bSLars-Peter Clausen return ret;
329dbdc025bSLars-Peter Clausen *val = ret;
330dbdc025bSLars-Peter Clausen return IIO_VAL_INT;
331dbdc025bSLars-Peter Clausen case IIO_CHAN_INFO_SCALE:
332bc7c49bcSLars-Peter Clausen ad5421_get_current_min_max(st, &min, &max);
333bc7c49bcSLars-Peter Clausen *val = max - min;
334bc7c49bcSLars-Peter Clausen *val2 = (1 << 16) * 1000;
335bc7c49bcSLars-Peter Clausen return IIO_VAL_FRACTIONAL;
336dbdc025bSLars-Peter Clausen case IIO_CHAN_INFO_OFFSET:
337dbdc025bSLars-Peter Clausen *val = ad5421_get_offset(st);
338dbdc025bSLars-Peter Clausen return IIO_VAL_INT;
339dbdc025bSLars-Peter Clausen case IIO_CHAN_INFO_CALIBBIAS:
340dbdc025bSLars-Peter Clausen ret = ad5421_read(indio_dev, AD5421_REG_OFFSET);
341dbdc025bSLars-Peter Clausen if (ret < 0)
342dbdc025bSLars-Peter Clausen return ret;
343dbdc025bSLars-Peter Clausen *val = ret - 32768;
344dbdc025bSLars-Peter Clausen return IIO_VAL_INT;
345dbdc025bSLars-Peter Clausen case IIO_CHAN_INFO_CALIBSCALE:
346dbdc025bSLars-Peter Clausen ret = ad5421_read(indio_dev, AD5421_REG_GAIN);
347dbdc025bSLars-Peter Clausen if (ret < 0)
348dbdc025bSLars-Peter Clausen return ret;
349dbdc025bSLars-Peter Clausen *val = ret;
350dbdc025bSLars-Peter Clausen return IIO_VAL_INT;
351dbdc025bSLars-Peter Clausen }
352dbdc025bSLars-Peter Clausen
353dbdc025bSLars-Peter Clausen return -EINVAL;
354dbdc025bSLars-Peter Clausen }
355dbdc025bSLars-Peter Clausen
ad5421_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)356dbdc025bSLars-Peter Clausen static int ad5421_write_raw(struct iio_dev *indio_dev,
357dbdc025bSLars-Peter Clausen struct iio_chan_spec const *chan, int val, int val2, long mask)
358dbdc025bSLars-Peter Clausen {
359dbdc025bSLars-Peter Clausen const unsigned int max_val = 1 << 16;
360dbdc025bSLars-Peter Clausen
361dbdc025bSLars-Peter Clausen switch (mask) {
362dbdc025bSLars-Peter Clausen case IIO_CHAN_INFO_RAW:
363dbdc025bSLars-Peter Clausen if (val >= max_val || val < 0)
364dbdc025bSLars-Peter Clausen return -EINVAL;
365dbdc025bSLars-Peter Clausen
366dbdc025bSLars-Peter Clausen return ad5421_write(indio_dev, AD5421_REG_DAC_DATA, val);
367dbdc025bSLars-Peter Clausen case IIO_CHAN_INFO_CALIBBIAS:
368dbdc025bSLars-Peter Clausen val += 32768;
369dbdc025bSLars-Peter Clausen if (val >= max_val || val < 0)
370dbdc025bSLars-Peter Clausen return -EINVAL;
371dbdc025bSLars-Peter Clausen
372dbdc025bSLars-Peter Clausen return ad5421_write(indio_dev, AD5421_REG_OFFSET, val);
373dbdc025bSLars-Peter Clausen case IIO_CHAN_INFO_CALIBSCALE:
374dbdc025bSLars-Peter Clausen if (val >= max_val || val < 0)
375dbdc025bSLars-Peter Clausen return -EINVAL;
376dbdc025bSLars-Peter Clausen
377dbdc025bSLars-Peter Clausen return ad5421_write(indio_dev, AD5421_REG_GAIN, val);
378dbdc025bSLars-Peter Clausen default:
379dbdc025bSLars-Peter Clausen break;
380dbdc025bSLars-Peter Clausen }
381dbdc025bSLars-Peter Clausen
382dbdc025bSLars-Peter Clausen return -EINVAL;
383dbdc025bSLars-Peter Clausen }
384dbdc025bSLars-Peter Clausen
ad5421_write_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,int state)385dbdc025bSLars-Peter Clausen static int ad5421_write_event_config(struct iio_dev *indio_dev,
3861eefd62bSLars-Peter Clausen const struct iio_chan_spec *chan, enum iio_event_type type,
3871eefd62bSLars-Peter Clausen enum iio_event_direction dir, int state)
388dbdc025bSLars-Peter Clausen {
389dbdc025bSLars-Peter Clausen struct ad5421_state *st = iio_priv(indio_dev);
390dbdc025bSLars-Peter Clausen unsigned int mask;
391dbdc025bSLars-Peter Clausen
3921eefd62bSLars-Peter Clausen switch (chan->type) {
393dbdc025bSLars-Peter Clausen case IIO_CURRENT:
3941eefd62bSLars-Peter Clausen if (dir == IIO_EV_DIR_RISING)
395dbdc025bSLars-Peter Clausen mask = AD5421_FAULT_OVER_CURRENT;
396dbdc025bSLars-Peter Clausen else
397dbdc025bSLars-Peter Clausen mask = AD5421_FAULT_UNDER_CURRENT;
398dbdc025bSLars-Peter Clausen break;
399dbdc025bSLars-Peter Clausen case IIO_TEMP:
400dbdc025bSLars-Peter Clausen mask = AD5421_FAULT_TEMP_OVER_140;
401dbdc025bSLars-Peter Clausen break;
402dbdc025bSLars-Peter Clausen default:
403dbdc025bSLars-Peter Clausen return -EINVAL;
404dbdc025bSLars-Peter Clausen }
405dbdc025bSLars-Peter Clausen
4069bc17892SSergiu Cuciurean mutex_lock(&st->lock);
407dbdc025bSLars-Peter Clausen if (state)
408dbdc025bSLars-Peter Clausen st->fault_mask |= mask;
409dbdc025bSLars-Peter Clausen else
410dbdc025bSLars-Peter Clausen st->fault_mask &= ~mask;
4119bc17892SSergiu Cuciurean mutex_unlock(&st->lock);
412dbdc025bSLars-Peter Clausen
413dbdc025bSLars-Peter Clausen return 0;
414dbdc025bSLars-Peter Clausen }
415dbdc025bSLars-Peter Clausen
ad5421_read_event_config(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir)416dbdc025bSLars-Peter Clausen static int ad5421_read_event_config(struct iio_dev *indio_dev,
4171eefd62bSLars-Peter Clausen const struct iio_chan_spec *chan, enum iio_event_type type,
4181eefd62bSLars-Peter Clausen enum iio_event_direction dir)
419dbdc025bSLars-Peter Clausen {
420dbdc025bSLars-Peter Clausen struct ad5421_state *st = iio_priv(indio_dev);
421dbdc025bSLars-Peter Clausen unsigned int mask;
422dbdc025bSLars-Peter Clausen
4231eefd62bSLars-Peter Clausen switch (chan->type) {
424dbdc025bSLars-Peter Clausen case IIO_CURRENT:
4251eefd62bSLars-Peter Clausen if (dir == IIO_EV_DIR_RISING)
426dbdc025bSLars-Peter Clausen mask = AD5421_FAULT_OVER_CURRENT;
427dbdc025bSLars-Peter Clausen else
428dbdc025bSLars-Peter Clausen mask = AD5421_FAULT_UNDER_CURRENT;
429dbdc025bSLars-Peter Clausen break;
430dbdc025bSLars-Peter Clausen case IIO_TEMP:
431dbdc025bSLars-Peter Clausen mask = AD5421_FAULT_TEMP_OVER_140;
432dbdc025bSLars-Peter Clausen break;
433dbdc025bSLars-Peter Clausen default:
434dbdc025bSLars-Peter Clausen return -EINVAL;
435dbdc025bSLars-Peter Clausen }
436dbdc025bSLars-Peter Clausen
437dbdc025bSLars-Peter Clausen return (bool)(st->fault_mask & mask);
438dbdc025bSLars-Peter Clausen }
439dbdc025bSLars-Peter Clausen
ad5421_read_event_value(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)4401eefd62bSLars-Peter Clausen static int ad5421_read_event_value(struct iio_dev *indio_dev,
4411eefd62bSLars-Peter Clausen const struct iio_chan_spec *chan, enum iio_event_type type,
4421eefd62bSLars-Peter Clausen enum iio_event_direction dir, enum iio_event_info info, int *val,
4431eefd62bSLars-Peter Clausen int *val2)
444dbdc025bSLars-Peter Clausen {
445dbdc025bSLars-Peter Clausen int ret;
446dbdc025bSLars-Peter Clausen
4471eefd62bSLars-Peter Clausen switch (chan->type) {
448dbdc025bSLars-Peter Clausen case IIO_CURRENT:
449dbdc025bSLars-Peter Clausen ret = ad5421_read(indio_dev, AD5421_REG_DAC_DATA);
450dbdc025bSLars-Peter Clausen if (ret < 0)
451dbdc025bSLars-Peter Clausen return ret;
452dbdc025bSLars-Peter Clausen *val = ret;
453dbdc025bSLars-Peter Clausen break;
454dbdc025bSLars-Peter Clausen case IIO_TEMP:
455dbdc025bSLars-Peter Clausen *val = 140000;
456dbdc025bSLars-Peter Clausen break;
457dbdc025bSLars-Peter Clausen default:
458dbdc025bSLars-Peter Clausen return -EINVAL;
459dbdc025bSLars-Peter Clausen }
460dbdc025bSLars-Peter Clausen
4611eefd62bSLars-Peter Clausen return IIO_VAL_INT;
462dbdc025bSLars-Peter Clausen }
463dbdc025bSLars-Peter Clausen
464dbdc025bSLars-Peter Clausen static const struct iio_info ad5421_info = {
465dbdc025bSLars-Peter Clausen .read_raw = ad5421_read_raw,
466dbdc025bSLars-Peter Clausen .write_raw = ad5421_write_raw,
467cb955852SLars-Peter Clausen .read_event_config = ad5421_read_event_config,
468cb955852SLars-Peter Clausen .write_event_config = ad5421_write_event_config,
469cb955852SLars-Peter Clausen .read_event_value = ad5421_read_event_value,
470dbdc025bSLars-Peter Clausen };
471dbdc025bSLars-Peter Clausen
ad5421_probe(struct spi_device * spi)472fc52692cSGreg Kroah-Hartman static int ad5421_probe(struct spi_device *spi)
473dbdc025bSLars-Peter Clausen {
474dbdc025bSLars-Peter Clausen struct ad5421_platform_data *pdata = dev_get_platdata(&spi->dev);
475dbdc025bSLars-Peter Clausen struct iio_dev *indio_dev;
476dbdc025bSLars-Peter Clausen struct ad5421_state *st;
477dbdc025bSLars-Peter Clausen int ret;
478dbdc025bSLars-Peter Clausen
47962a308a6SSachin Kamat indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
480dbdc025bSLars-Peter Clausen if (indio_dev == NULL) {
481dbdc025bSLars-Peter Clausen dev_err(&spi->dev, "Failed to allocate iio device\n");
482dbdc025bSLars-Peter Clausen return -ENOMEM;
483dbdc025bSLars-Peter Clausen }
484dbdc025bSLars-Peter Clausen
485dbdc025bSLars-Peter Clausen st = iio_priv(indio_dev);
486dbdc025bSLars-Peter Clausen spi_set_drvdata(spi, indio_dev);
487dbdc025bSLars-Peter Clausen
488dbdc025bSLars-Peter Clausen st->spi = spi;
489dbdc025bSLars-Peter Clausen
490dbdc025bSLars-Peter Clausen indio_dev->name = "ad5421";
491dbdc025bSLars-Peter Clausen indio_dev->info = &ad5421_info;
492dbdc025bSLars-Peter Clausen indio_dev->modes = INDIO_DIRECT_MODE;
493dbdc025bSLars-Peter Clausen indio_dev->channels = ad5421_channels;
494dbdc025bSLars-Peter Clausen indio_dev->num_channels = ARRAY_SIZE(ad5421_channels);
495dbdc025bSLars-Peter Clausen
4969bc17892SSergiu Cuciurean mutex_init(&st->lock);
4979bc17892SSergiu Cuciurean
498dbdc025bSLars-Peter Clausen st->ctrl = AD5421_CTRL_WATCHDOG_DISABLE |
499dbdc025bSLars-Peter Clausen AD5421_CTRL_AUTO_FAULT_READBACK;
500dbdc025bSLars-Peter Clausen
501dbdc025bSLars-Peter Clausen if (pdata) {
502dbdc025bSLars-Peter Clausen st->current_range = pdata->current_range;
503dbdc025bSLars-Peter Clausen if (pdata->external_vref)
504dbdc025bSLars-Peter Clausen st->ctrl |= AD5421_CTRL_PWR_DOWN_INT_VREF;
505dbdc025bSLars-Peter Clausen } else {
506dbdc025bSLars-Peter Clausen st->current_range = AD5421_CURRENT_RANGE_4mA_20mA;
507dbdc025bSLars-Peter Clausen }
508dbdc025bSLars-Peter Clausen
509dbdc025bSLars-Peter Clausen /* write initial ctrl register value */
510dbdc025bSLars-Peter Clausen ad5421_update_ctrl(indio_dev, 0, 0);
511dbdc025bSLars-Peter Clausen
512dbdc025bSLars-Peter Clausen if (spi->irq) {
51362a308a6SSachin Kamat ret = devm_request_threaded_irq(&spi->dev, spi->irq,
514dbdc025bSLars-Peter Clausen NULL,
515dbdc025bSLars-Peter Clausen ad5421_fault_handler,
516dbdc025bSLars-Peter Clausen IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
517dbdc025bSLars-Peter Clausen "ad5421 fault",
518dbdc025bSLars-Peter Clausen indio_dev);
519dbdc025bSLars-Peter Clausen if (ret)
52062a308a6SSachin Kamat return ret;
521dbdc025bSLars-Peter Clausen }
522dbdc025bSLars-Peter Clausen
523365736e7SSachin Kamat return devm_iio_device_register(&spi->dev, indio_dev);
524dbdc025bSLars-Peter Clausen }
525dbdc025bSLars-Peter Clausen
526dbdc025bSLars-Peter Clausen static struct spi_driver ad5421_driver = {
527dbdc025bSLars-Peter Clausen .driver = {
528dbdc025bSLars-Peter Clausen .name = "ad5421",
529dbdc025bSLars-Peter Clausen },
530dbdc025bSLars-Peter Clausen .probe = ad5421_probe,
531dbdc025bSLars-Peter Clausen };
532dbdc025bSLars-Peter Clausen module_spi_driver(ad5421_driver);
533dbdc025bSLars-Peter Clausen
534dbdc025bSLars-Peter Clausen MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
535dbdc025bSLars-Peter Clausen MODULE_DESCRIPTION("Analog Devices AD5421 DAC");
536dbdc025bSLars-Peter Clausen MODULE_LICENSE("GPL v2");
537dbdc025bSLars-Peter Clausen MODULE_ALIAS("spi:ad5421");
538