xref: /openbmc/linux/drivers/iio/dac/ad5064.c (revision 842b6b16)
1 /*
2  * AD5024, AD5025, AD5044, AD5045, AD5064, AD5064-1, AD5065, AD5628, AD5629R,
3  * AD5648, AD5666, AD5668, AD5669R Digital to analog converters driver
4  *
5  * Copyright 2011 Analog Devices Inc.
6  *
7  * Licensed under the GPL-2.
8  */
9 
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/i2c.h>
16 #include <linux/slab.h>
17 #include <linux/sysfs.h>
18 #include <linux/regulator/consumer.h>
19 #include <asm/unaligned.h>
20 
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 
24 #define AD5064_MAX_DAC_CHANNELS			8
25 #define AD5064_MAX_VREFS			4
26 
27 #define AD5064_ADDR(x)				((x) << 20)
28 #define AD5064_CMD(x)				((x) << 24)
29 
30 #define AD5064_ADDR_ALL_DAC			0xF
31 
32 #define AD5064_CMD_WRITE_INPUT_N		0x0
33 #define AD5064_CMD_UPDATE_DAC_N			0x1
34 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_ALL	0x2
35 #define AD5064_CMD_WRITE_INPUT_N_UPDATE_N	0x3
36 #define AD5064_CMD_POWERDOWN_DAC		0x4
37 #define AD5064_CMD_CLEAR			0x5
38 #define AD5064_CMD_LDAC_MASK			0x6
39 #define AD5064_CMD_RESET			0x7
40 #define AD5064_CMD_CONFIG			0x8
41 
42 #define AD5064_CONFIG_DAISY_CHAIN_ENABLE	BIT(1)
43 #define AD5064_CONFIG_INT_VREF_ENABLE		BIT(0)
44 
45 #define AD5064_LDAC_PWRDN_NONE			0x0
46 #define AD5064_LDAC_PWRDN_1K			0x1
47 #define AD5064_LDAC_PWRDN_100K			0x2
48 #define AD5064_LDAC_PWRDN_3STATE		0x3
49 
50 /**
51  * struct ad5064_chip_info - chip specific information
52  * @shared_vref:	whether the vref supply is shared between channels
53  * @internal_vref:	internal reference voltage. 0 if the chip has no internal
54  *			vref.
55  * @channel:		channel specification
56  * @num_channels:	number of channels
57  */
58 
59 struct ad5064_chip_info {
60 	bool shared_vref;
61 	unsigned long internal_vref;
62 	const struct iio_chan_spec *channels;
63 	unsigned int num_channels;
64 };
65 
66 struct ad5064_state;
67 
68 typedef int (*ad5064_write_func)(struct ad5064_state *st, unsigned int cmd,
69 		unsigned int addr, unsigned int val);
70 
71 /**
72  * struct ad5064_state - driver instance specific data
73  * @dev:		the device for this driver instance
74  * @chip_info:		chip model specific constants, available modes etc
75  * @vref_reg:		vref supply regulators
76  * @pwr_down:		whether channel is powered down
77  * @pwr_down_mode:	channel's current power down mode
78  * @dac_cache:		current DAC raw value (chip does not support readback)
79  * @use_internal_vref:	set to true if the internal reference voltage should be
80  *			used.
81  * @write:		register write callback
82  * @data:		i2c/spi transfer buffers
83  */
84 
85 struct ad5064_state {
86 	struct device			*dev;
87 	const struct ad5064_chip_info	*chip_info;
88 	struct regulator_bulk_data	vref_reg[AD5064_MAX_VREFS];
89 	bool				pwr_down[AD5064_MAX_DAC_CHANNELS];
90 	u8				pwr_down_mode[AD5064_MAX_DAC_CHANNELS];
91 	unsigned int			dac_cache[AD5064_MAX_DAC_CHANNELS];
92 	bool				use_internal_vref;
93 
94 	ad5064_write_func		write;
95 
96 	/*
97 	 * DMA (thus cache coherency maintenance) requires the
98 	 * transfer buffers to live in their own cache lines.
99 	 */
100 	union {
101 		u8 i2c[3];
102 		__be32 spi;
103 	} data ____cacheline_aligned;
104 };
105 
106 enum ad5064_type {
107 	ID_AD5024,
108 	ID_AD5025,
109 	ID_AD5044,
110 	ID_AD5045,
111 	ID_AD5064,
112 	ID_AD5064_1,
113 	ID_AD5065,
114 	ID_AD5628_1,
115 	ID_AD5628_2,
116 	ID_AD5629_1,
117 	ID_AD5629_2,
118 	ID_AD5648_1,
119 	ID_AD5648_2,
120 	ID_AD5666_1,
121 	ID_AD5666_2,
122 	ID_AD5668_1,
123 	ID_AD5668_2,
124 	ID_AD5669_1,
125 	ID_AD5669_2,
126 };
127 
128 static int ad5064_write(struct ad5064_state *st, unsigned int cmd,
129 	unsigned int addr, unsigned int val, unsigned int shift)
130 {
131 	val <<= shift;
132 
133 	return st->write(st, cmd, addr, val);
134 }
135 
136 static int ad5064_sync_powerdown_mode(struct ad5064_state *st,
137 	const struct iio_chan_spec *chan)
138 {
139 	unsigned int val;
140 	int ret;
141 
142 	val = (0x1 << chan->address);
143 
144 	if (st->pwr_down[chan->channel])
145 		val |= st->pwr_down_mode[chan->channel] << 8;
146 
147 	ret = ad5064_write(st, AD5064_CMD_POWERDOWN_DAC, 0, val, 0);
148 
149 	return ret;
150 }
151 
152 static const char * const ad5064_powerdown_modes[] = {
153 	"1kohm_to_gnd",
154 	"100kohm_to_gnd",
155 	"three_state",
156 };
157 
158 static int ad5064_get_powerdown_mode(struct iio_dev *indio_dev,
159 	const struct iio_chan_spec *chan)
160 {
161 	struct ad5064_state *st = iio_priv(indio_dev);
162 
163 	return st->pwr_down_mode[chan->channel] - 1;
164 }
165 
166 static int ad5064_set_powerdown_mode(struct iio_dev *indio_dev,
167 	const struct iio_chan_spec *chan, unsigned int mode)
168 {
169 	struct ad5064_state *st = iio_priv(indio_dev);
170 	int ret;
171 
172 	mutex_lock(&indio_dev->mlock);
173 	st->pwr_down_mode[chan->channel] = mode + 1;
174 
175 	ret = ad5064_sync_powerdown_mode(st, chan);
176 	mutex_unlock(&indio_dev->mlock);
177 
178 	return ret;
179 }
180 
181 static const struct iio_enum ad5064_powerdown_mode_enum = {
182 	.items = ad5064_powerdown_modes,
183 	.num_items = ARRAY_SIZE(ad5064_powerdown_modes),
184 	.get = ad5064_get_powerdown_mode,
185 	.set = ad5064_set_powerdown_mode,
186 };
187 
188 static ssize_t ad5064_read_dac_powerdown(struct iio_dev *indio_dev,
189 	uintptr_t private, const struct iio_chan_spec *chan, char *buf)
190 {
191 	struct ad5064_state *st = iio_priv(indio_dev);
192 
193 	return sprintf(buf, "%d\n", st->pwr_down[chan->channel]);
194 }
195 
196 static ssize_t ad5064_write_dac_powerdown(struct iio_dev *indio_dev,
197 	 uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
198 	 size_t len)
199 {
200 	struct ad5064_state *st = iio_priv(indio_dev);
201 	bool pwr_down;
202 	int ret;
203 
204 	ret = strtobool(buf, &pwr_down);
205 	if (ret)
206 		return ret;
207 
208 	mutex_lock(&indio_dev->mlock);
209 	st->pwr_down[chan->channel] = pwr_down;
210 
211 	ret = ad5064_sync_powerdown_mode(st, chan);
212 	mutex_unlock(&indio_dev->mlock);
213 	return ret ? ret : len;
214 }
215 
216 static int ad5064_get_vref(struct ad5064_state *st,
217 	struct iio_chan_spec const *chan)
218 {
219 	unsigned int i;
220 
221 	if (st->use_internal_vref)
222 		return st->chip_info->internal_vref;
223 
224 	i = st->chip_info->shared_vref ? 0 : chan->channel;
225 	return regulator_get_voltage(st->vref_reg[i].consumer);
226 }
227 
228 static int ad5064_read_raw(struct iio_dev *indio_dev,
229 			   struct iio_chan_spec const *chan,
230 			   int *val,
231 			   int *val2,
232 			   long m)
233 {
234 	struct ad5064_state *st = iio_priv(indio_dev);
235 	int scale_uv;
236 
237 	switch (m) {
238 	case IIO_CHAN_INFO_RAW:
239 		*val = st->dac_cache[chan->channel];
240 		return IIO_VAL_INT;
241 	case IIO_CHAN_INFO_SCALE:
242 		scale_uv = ad5064_get_vref(st, chan);
243 		if (scale_uv < 0)
244 			return scale_uv;
245 
246 		*val = scale_uv / 1000;
247 		*val2 = chan->scan_type.realbits;
248 		return IIO_VAL_FRACTIONAL_LOG2;
249 	default:
250 		break;
251 	}
252 	return -EINVAL;
253 }
254 
255 static int ad5064_write_raw(struct iio_dev *indio_dev,
256 	struct iio_chan_spec const *chan, int val, int val2, long mask)
257 {
258 	struct ad5064_state *st = iio_priv(indio_dev);
259 	int ret;
260 
261 	switch (mask) {
262 	case IIO_CHAN_INFO_RAW:
263 		if (val >= (1 << chan->scan_type.realbits) || val < 0)
264 			return -EINVAL;
265 
266 		mutex_lock(&indio_dev->mlock);
267 		ret = ad5064_write(st, AD5064_CMD_WRITE_INPUT_N_UPDATE_N,
268 				chan->address, val, chan->scan_type.shift);
269 		if (ret == 0)
270 			st->dac_cache[chan->channel] = val;
271 		mutex_unlock(&indio_dev->mlock);
272 		break;
273 	default:
274 		ret = -EINVAL;
275 	}
276 
277 	return ret;
278 }
279 
280 static const struct iio_info ad5064_info = {
281 	.read_raw = ad5064_read_raw,
282 	.write_raw = ad5064_write_raw,
283 	.driver_module = THIS_MODULE,
284 };
285 
286 static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
287 	{
288 		.name = "powerdown",
289 		.read = ad5064_read_dac_powerdown,
290 		.write = ad5064_write_dac_powerdown,
291 		.shared = IIO_SEPARATE,
292 	},
293 	IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5064_powerdown_mode_enum),
294 	IIO_ENUM_AVAILABLE("powerdown_mode", &ad5064_powerdown_mode_enum),
295 	{ },
296 };
297 
298 #define AD5064_CHANNEL(chan, addr, bits, _shift) {		\
299 	.type = IIO_VOLTAGE,					\
300 	.indexed = 1,						\
301 	.output = 1,						\
302 	.channel = (chan),					\
303 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |		\
304 	BIT(IIO_CHAN_INFO_SCALE),					\
305 	.address = addr,					\
306 	.scan_type = {						\
307 		.sign = 'u',					\
308 		.realbits = (bits),				\
309 		.storagebits = 16,				\
310 		.shift = (_shift),				\
311 	},							\
312 	.ext_info = ad5064_ext_info,				\
313 }
314 
315 #define DECLARE_AD5064_CHANNELS(name, bits, shift) \
316 const struct iio_chan_spec name[] = { \
317 	AD5064_CHANNEL(0, 0, bits, shift), \
318 	AD5064_CHANNEL(1, 1, bits, shift), \
319 	AD5064_CHANNEL(2, 2, bits, shift), \
320 	AD5064_CHANNEL(3, 3, bits, shift), \
321 	AD5064_CHANNEL(4, 4, bits, shift), \
322 	AD5064_CHANNEL(5, 5, bits, shift), \
323 	AD5064_CHANNEL(6, 6, bits, shift), \
324 	AD5064_CHANNEL(7, 7, bits, shift), \
325 }
326 
327 #define DECLARE_AD5065_CHANNELS(name, bits, shift) \
328 const struct iio_chan_spec name[] = { \
329 	AD5064_CHANNEL(0, 0, bits, shift), \
330 	AD5064_CHANNEL(1, 3, bits, shift), \
331 }
332 
333 static DECLARE_AD5064_CHANNELS(ad5024_channels, 12, 8);
334 static DECLARE_AD5064_CHANNELS(ad5044_channels, 14, 6);
335 static DECLARE_AD5064_CHANNELS(ad5064_channels, 16, 4);
336 
337 static DECLARE_AD5065_CHANNELS(ad5025_channels, 12, 8);
338 static DECLARE_AD5065_CHANNELS(ad5045_channels, 14, 6);
339 static DECLARE_AD5065_CHANNELS(ad5065_channels, 16, 4);
340 
341 static DECLARE_AD5064_CHANNELS(ad5629_channels, 12, 4);
342 static DECLARE_AD5064_CHANNELS(ad5669_channels, 16, 0);
343 
344 static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
345 	[ID_AD5024] = {
346 		.shared_vref = false,
347 		.channels = ad5024_channels,
348 		.num_channels = 4,
349 	},
350 	[ID_AD5025] = {
351 		.shared_vref = false,
352 		.channels = ad5025_channels,
353 		.num_channels = 2,
354 	},
355 	[ID_AD5044] = {
356 		.shared_vref = false,
357 		.channels = ad5044_channels,
358 		.num_channels = 4,
359 	},
360 	[ID_AD5045] = {
361 		.shared_vref = false,
362 		.channels = ad5045_channels,
363 		.num_channels = 2,
364 	},
365 	[ID_AD5064] = {
366 		.shared_vref = false,
367 		.channels = ad5064_channels,
368 		.num_channels = 4,
369 	},
370 	[ID_AD5064_1] = {
371 		.shared_vref = true,
372 		.channels = ad5064_channels,
373 		.num_channels = 4,
374 	},
375 	[ID_AD5065] = {
376 		.shared_vref = false,
377 		.channels = ad5065_channels,
378 		.num_channels = 2,
379 	},
380 	[ID_AD5628_1] = {
381 		.shared_vref = true,
382 		.internal_vref = 2500000,
383 		.channels = ad5024_channels,
384 		.num_channels = 8,
385 	},
386 	[ID_AD5628_2] = {
387 		.shared_vref = true,
388 		.internal_vref = 5000000,
389 		.channels = ad5024_channels,
390 		.num_channels = 8,
391 	},
392 	[ID_AD5629_1] = {
393 		.shared_vref = true,
394 		.internal_vref = 2500000,
395 		.channels = ad5629_channels,
396 		.num_channels = 8,
397 	},
398 	[ID_AD5629_2] = {
399 		.shared_vref = true,
400 		.internal_vref = 5000000,
401 		.channels = ad5629_channels,
402 		.num_channels = 8,
403 	},
404 	[ID_AD5648_1] = {
405 		.shared_vref = true,
406 		.internal_vref = 2500000,
407 		.channels = ad5044_channels,
408 		.num_channels = 8,
409 	},
410 	[ID_AD5648_2] = {
411 		.shared_vref = true,
412 		.internal_vref = 5000000,
413 		.channels = ad5044_channels,
414 		.num_channels = 8,
415 	},
416 	[ID_AD5666_1] = {
417 		.shared_vref = true,
418 		.internal_vref = 2500000,
419 		.channels = ad5064_channels,
420 		.num_channels = 4,
421 	},
422 	[ID_AD5666_2] = {
423 		.shared_vref = true,
424 		.internal_vref = 5000000,
425 		.channels = ad5064_channels,
426 		.num_channels = 4,
427 	},
428 	[ID_AD5668_1] = {
429 		.shared_vref = true,
430 		.internal_vref = 2500000,
431 		.channels = ad5064_channels,
432 		.num_channels = 8,
433 	},
434 	[ID_AD5668_2] = {
435 		.shared_vref = true,
436 		.internal_vref = 5000000,
437 		.channels = ad5064_channels,
438 		.num_channels = 8,
439 	},
440 	[ID_AD5669_1] = {
441 		.shared_vref = true,
442 		.internal_vref = 2500000,
443 		.channels = ad5669_channels,
444 		.num_channels = 8,
445 	},
446 	[ID_AD5669_2] = {
447 		.shared_vref = true,
448 		.internal_vref = 5000000,
449 		.channels = ad5669_channels,
450 		.num_channels = 8,
451 	},
452 };
453 
454 static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
455 {
456 	return st->chip_info->shared_vref ? 1 : st->chip_info->num_channels;
457 }
458 
459 static const char * const ad5064_vref_names[] = {
460 	"vrefA",
461 	"vrefB",
462 	"vrefC",
463 	"vrefD",
464 };
465 
466 static const char * const ad5064_vref_name(struct ad5064_state *st,
467 	unsigned int vref)
468 {
469 	return st->chip_info->shared_vref ? "vref" : ad5064_vref_names[vref];
470 }
471 
472 static int ad5064_probe(struct device *dev, enum ad5064_type type,
473 			const char *name, ad5064_write_func write)
474 {
475 	struct iio_dev *indio_dev;
476 	struct ad5064_state *st;
477 	unsigned int midscale;
478 	unsigned int i;
479 	int ret;
480 
481 	indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
482 	if (indio_dev == NULL)
483 		return  -ENOMEM;
484 
485 	st = iio_priv(indio_dev);
486 	dev_set_drvdata(dev, indio_dev);
487 
488 	st->chip_info = &ad5064_chip_info_tbl[type];
489 	st->dev = dev;
490 	st->write = write;
491 
492 	for (i = 0; i < ad5064_num_vref(st); ++i)
493 		st->vref_reg[i].supply = ad5064_vref_name(st, i);
494 
495 	ret = devm_regulator_bulk_get(dev, ad5064_num_vref(st),
496 		st->vref_reg);
497 	if (ret) {
498 		if (!st->chip_info->internal_vref)
499 			return ret;
500 		st->use_internal_vref = true;
501 		ret = ad5064_write(st, AD5064_CMD_CONFIG, 0,
502 			AD5064_CONFIG_INT_VREF_ENABLE, 0);
503 		if (ret) {
504 			dev_err(dev, "Failed to enable internal vref: %d\n",
505 				ret);
506 			return ret;
507 		}
508 	} else {
509 		ret = regulator_bulk_enable(ad5064_num_vref(st), st->vref_reg);
510 		if (ret)
511 			return ret;
512 	}
513 
514 	indio_dev->dev.parent = dev;
515 	indio_dev->name = name;
516 	indio_dev->info = &ad5064_info;
517 	indio_dev->modes = INDIO_DIRECT_MODE;
518 	indio_dev->channels = st->chip_info->channels;
519 	indio_dev->num_channels = st->chip_info->num_channels;
520 
521 	midscale = (1 << indio_dev->channels[0].scan_type.realbits) /  2;
522 
523 	for (i = 0; i < st->chip_info->num_channels; ++i) {
524 		st->pwr_down_mode[i] = AD5064_LDAC_PWRDN_1K;
525 		st->dac_cache[i] = midscale;
526 	}
527 
528 	ret = iio_device_register(indio_dev);
529 	if (ret)
530 		goto error_disable_reg;
531 
532 	return 0;
533 
534 error_disable_reg:
535 	if (!st->use_internal_vref)
536 		regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
537 
538 	return ret;
539 }
540 
541 static int ad5064_remove(struct device *dev)
542 {
543 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
544 	struct ad5064_state *st = iio_priv(indio_dev);
545 
546 	iio_device_unregister(indio_dev);
547 
548 	if (!st->use_internal_vref)
549 		regulator_bulk_disable(ad5064_num_vref(st), st->vref_reg);
550 
551 	return 0;
552 }
553 
554 #if IS_ENABLED(CONFIG_SPI_MASTER)
555 
556 static int ad5064_spi_write(struct ad5064_state *st, unsigned int cmd,
557 	unsigned int addr, unsigned int val)
558 {
559 	struct spi_device *spi = to_spi_device(st->dev);
560 
561 	st->data.spi = cpu_to_be32(AD5064_CMD(cmd) | AD5064_ADDR(addr) | val);
562 	return spi_write(spi, &st->data.spi, sizeof(st->data.spi));
563 }
564 
565 static int ad5064_spi_probe(struct spi_device *spi)
566 {
567 	const struct spi_device_id *id = spi_get_device_id(spi);
568 
569 	return ad5064_probe(&spi->dev, id->driver_data, id->name,
570 				ad5064_spi_write);
571 }
572 
573 static int ad5064_spi_remove(struct spi_device *spi)
574 {
575 	return ad5064_remove(&spi->dev);
576 }
577 
578 static const struct spi_device_id ad5064_spi_ids[] = {
579 	{"ad5024", ID_AD5024},
580 	{"ad5025", ID_AD5025},
581 	{"ad5044", ID_AD5044},
582 	{"ad5045", ID_AD5045},
583 	{"ad5064", ID_AD5064},
584 	{"ad5064-1", ID_AD5064_1},
585 	{"ad5065", ID_AD5065},
586 	{"ad5628-1", ID_AD5628_1},
587 	{"ad5628-2", ID_AD5628_2},
588 	{"ad5648-1", ID_AD5648_1},
589 	{"ad5648-2", ID_AD5648_2},
590 	{"ad5666-1", ID_AD5666_1},
591 	{"ad5666-2", ID_AD5666_2},
592 	{"ad5668-1", ID_AD5668_1},
593 	{"ad5668-2", ID_AD5668_2},
594 	{"ad5668-3", ID_AD5668_2}, /* similar enough to ad5668-2 */
595 	{}
596 };
597 MODULE_DEVICE_TABLE(spi, ad5064_spi_ids);
598 
599 static struct spi_driver ad5064_spi_driver = {
600 	.driver = {
601 		   .name = "ad5064",
602 	},
603 	.probe = ad5064_spi_probe,
604 	.remove = ad5064_spi_remove,
605 	.id_table = ad5064_spi_ids,
606 };
607 
608 static int __init ad5064_spi_register_driver(void)
609 {
610 	return spi_register_driver(&ad5064_spi_driver);
611 }
612 
613 static void ad5064_spi_unregister_driver(void)
614 {
615 	spi_unregister_driver(&ad5064_spi_driver);
616 }
617 
618 #else
619 
620 static inline int ad5064_spi_register_driver(void) { return 0; }
621 static inline void ad5064_spi_unregister_driver(void) { }
622 
623 #endif
624 
625 #if IS_ENABLED(CONFIG_I2C)
626 
627 static int ad5064_i2c_write(struct ad5064_state *st, unsigned int cmd,
628 	unsigned int addr, unsigned int val)
629 {
630 	struct i2c_client *i2c = to_i2c_client(st->dev);
631 	int ret;
632 
633 	st->data.i2c[0] = (cmd << 4) | addr;
634 	put_unaligned_be16(val, &st->data.i2c[1]);
635 
636 	ret = i2c_master_send(i2c, st->data.i2c, 3);
637 	if (ret < 0)
638 		return ret;
639 
640 	return 0;
641 }
642 
643 static int ad5064_i2c_probe(struct i2c_client *i2c,
644 	const struct i2c_device_id *id)
645 {
646 	return ad5064_probe(&i2c->dev, id->driver_data, id->name,
647 						ad5064_i2c_write);
648 }
649 
650 static int ad5064_i2c_remove(struct i2c_client *i2c)
651 {
652 	return ad5064_remove(&i2c->dev);
653 }
654 
655 static const struct i2c_device_id ad5064_i2c_ids[] = {
656 	{"ad5629-1", ID_AD5629_1},
657 	{"ad5629-2", ID_AD5629_2},
658 	{"ad5629-3", ID_AD5629_2}, /* similar enough to ad5629-2 */
659 	{"ad5669-1", ID_AD5669_1},
660 	{"ad5669-2", ID_AD5669_2},
661 	{"ad5669-3", ID_AD5669_2}, /* similar enough to ad5669-2 */
662 	{}
663 };
664 MODULE_DEVICE_TABLE(i2c, ad5064_i2c_ids);
665 
666 static struct i2c_driver ad5064_i2c_driver = {
667 	.driver = {
668 		   .name = "ad5064",
669 	},
670 	.probe = ad5064_i2c_probe,
671 	.remove = ad5064_i2c_remove,
672 	.id_table = ad5064_i2c_ids,
673 };
674 
675 static int __init ad5064_i2c_register_driver(void)
676 {
677 	return i2c_add_driver(&ad5064_i2c_driver);
678 }
679 
680 static void __exit ad5064_i2c_unregister_driver(void)
681 {
682 	i2c_del_driver(&ad5064_i2c_driver);
683 }
684 
685 #else
686 
687 static inline int ad5064_i2c_register_driver(void) { return 0; }
688 static inline void ad5064_i2c_unregister_driver(void) { }
689 
690 #endif
691 
692 static int __init ad5064_init(void)
693 {
694 	int ret;
695 
696 	ret = ad5064_spi_register_driver();
697 	if (ret)
698 		return ret;
699 
700 	ret = ad5064_i2c_register_driver();
701 	if (ret) {
702 		ad5064_spi_unregister_driver();
703 		return ret;
704 	}
705 
706 	return 0;
707 }
708 module_init(ad5064_init);
709 
710 static void __exit ad5064_exit(void)
711 {
712 	ad5064_i2c_unregister_driver();
713 	ad5064_spi_unregister_driver();
714 }
715 module_exit(ad5064_exit);
716 
717 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
718 MODULE_DESCRIPTION("Analog Devices AD5024 and similar multi-channel DACs");
719 MODULE_LICENSE("GPL v2");
720