xref: /openbmc/linux/drivers/iio/adc/ti_am335x_adc.c (revision 7ca6740c)
1 /*
2  * TI ADC MFD driver
3  *
4  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation version 2.
9  *
10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11  * kind, whether express or implied; without even the implied warranty
12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 
16 #include <linux/init.h>
17 #include <linux/kernel.h>
18 #include <linux/err.h>
19 #include <linux/module.h>
20 #include <linux/slab.h>
21 #include <linux/interrupt.h>
22 #include <linux/platform_device.h>
23 #include <linux/io.h>
24 #include <linux/iio/iio.h>
25 #include <linux/of.h>
26 #include <linux/of_device.h>
27 #include <linux/iio/machine.h>
28 #include <linux/iio/driver.h>
29 
30 #include <linux/mfd/ti_am335x_tscadc.h>
31 #include <linux/iio/buffer.h>
32 #include <linux/iio/kfifo_buf.h>
33 
34 struct tiadc_device {
35 	struct ti_tscadc_dev *mfd_tscadc;
36 	int channels;
37 	u8 channel_line[8];
38 	u8 channel_step[8];
39 	int buffer_en_ch_steps;
40 	u16 data[8];
41 };
42 
43 static unsigned int tiadc_readl(struct tiadc_device *adc, unsigned int reg)
44 {
45 	return readl(adc->mfd_tscadc->tscadc_base + reg);
46 }
47 
48 static void tiadc_writel(struct tiadc_device *adc, unsigned int reg,
49 					unsigned int val)
50 {
51 	writel(val, adc->mfd_tscadc->tscadc_base + reg);
52 }
53 
54 static u32 get_adc_step_mask(struct tiadc_device *adc_dev)
55 {
56 	u32 step_en;
57 
58 	step_en = ((1 << adc_dev->channels) - 1);
59 	step_en <<= TOTAL_STEPS - adc_dev->channels + 1;
60 	return step_en;
61 }
62 
63 static u32 get_adc_chan_step_mask(struct tiadc_device *adc_dev,
64 		struct iio_chan_spec const *chan)
65 {
66 	int i;
67 
68 	for (i = 0; i < ARRAY_SIZE(adc_dev->channel_step); i++) {
69 		if (chan->channel == adc_dev->channel_line[i]) {
70 			u32 step;
71 
72 			step = adc_dev->channel_step[i];
73 			/* +1 for the charger */
74 			return 1 << (step + 1);
75 		}
76 	}
77 	WARN_ON(1);
78 	return 0;
79 }
80 
81 static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan)
82 {
83 	return 1 << adc_dev->channel_step[chan];
84 }
85 
86 static void tiadc_step_config(struct iio_dev *indio_dev)
87 {
88 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
89 	unsigned int stepconfig;
90 	int i, steps;
91 
92 	/*
93 	 * There are 16 configurable steps and 8 analog input
94 	 * lines available which are shared between Touchscreen and ADC.
95 	 *
96 	 * Steps backwards i.e. from 16 towards 0 are used by ADC
97 	 * depending on number of input lines needed.
98 	 * Channel would represent which analog input
99 	 * needs to be given to ADC to digitalize data.
100 	 */
101 
102 	steps = TOTAL_STEPS - adc_dev->channels;
103 	if (iio_buffer_enabled(indio_dev))
104 		stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1
105 					| STEPCONFIG_MODE_SWCNT;
106 	else
107 		stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1;
108 
109 	for (i = 0; i < adc_dev->channels; i++) {
110 		int chan;
111 
112 		chan = adc_dev->channel_line[i];
113 		tiadc_writel(adc_dev, REG_STEPCONFIG(steps),
114 				stepconfig | STEPCONFIG_INP(chan));
115 		tiadc_writel(adc_dev, REG_STEPDELAY(steps),
116 				STEPCONFIG_OPENDLY);
117 		adc_dev->channel_step[i] = steps;
118 		steps++;
119 	}
120 }
121 
122 static irqreturn_t tiadc_irq_h(int irq, void *private)
123 {
124 	struct iio_dev *indio_dev = private;
125 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
126 	unsigned int status, config;
127 	status = tiadc_readl(adc_dev, REG_IRQSTATUS);
128 
129 	/*
130 	 * ADC and touchscreen share the IRQ line.
131 	 * FIFO0 interrupts are used by TSC. Handle FIFO1 IRQs here only
132 	 */
133 	if (status & IRQENB_FIFO1OVRRUN) {
134 		/* FIFO Overrun. Clear flag. Disable/Enable ADC to recover */
135 		config = tiadc_readl(adc_dev, REG_CTRL);
136 		config &= ~(CNTRLREG_TSCSSENB);
137 		tiadc_writel(adc_dev, REG_CTRL, config);
138 		tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1OVRRUN
139 				| IRQENB_FIFO1UNDRFLW | IRQENB_FIFO1THRES);
140 		tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_TSCSSENB));
141 		return IRQ_HANDLED;
142 	} else if (status & IRQENB_FIFO1THRES) {
143 		/* Disable irq and wake worker thread */
144 		tiadc_writel(adc_dev, REG_IRQCLR, IRQENB_FIFO1THRES);
145 		return IRQ_WAKE_THREAD;
146 	}
147 
148 	return IRQ_NONE;
149 }
150 
151 static irqreturn_t tiadc_worker_h(int irq, void *private)
152 {
153 	struct iio_dev *indio_dev = private;
154 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
155 	int i, k, fifo1count, read;
156 	u16 *data = adc_dev->data;
157 
158 	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
159 	for (k = 0; k < fifo1count; k = k + i) {
160 		for (i = 0; i < (indio_dev->scan_bytes)/2; i++) {
161 			read = tiadc_readl(adc_dev, REG_FIFO1);
162 			data[i] = read & FIFOREAD_DATA_MASK;
163 		}
164 		iio_push_to_buffers(indio_dev, (u8 *) data);
165 	}
166 
167 	tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES);
168 	tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES);
169 
170 	return IRQ_HANDLED;
171 }
172 
173 static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
174 {
175 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
176 	int i, fifo1count, read;
177 
178 	tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
179 				IRQENB_FIFO1OVRRUN |
180 				IRQENB_FIFO1UNDRFLW));
181 
182 	/* Flush FIFO. Needed in corner cases in simultaneous tsc/adc use */
183 	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
184 	for (i = 0; i < fifo1count; i++)
185 		read = tiadc_readl(adc_dev, REG_FIFO1);
186 
187 	return 0;
188 }
189 
190 static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
191 {
192 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
193 	struct iio_buffer *buffer = indio_dev->buffer;
194 	unsigned int enb = 0;
195 	u8 bit;
196 
197 	tiadc_step_config(indio_dev);
198 	for_each_set_bit(bit, buffer->scan_mask, adc_dev->channels)
199 		enb |= (get_adc_step_bit(adc_dev, bit) << 1);
200 	adc_dev->buffer_en_ch_steps = enb;
201 
202 	am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);
203 
204 	tiadc_writel(adc_dev,  REG_IRQSTATUS, IRQENB_FIFO1THRES
205 				| IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
206 	tiadc_writel(adc_dev,  REG_IRQENABLE, IRQENB_FIFO1THRES
207 				| IRQENB_FIFO1OVRRUN);
208 
209 	return 0;
210 }
211 
212 static int tiadc_buffer_predisable(struct iio_dev *indio_dev)
213 {
214 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
215 	int fifo1count, i, read;
216 
217 	tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
218 				IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW));
219 	am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);
220 	adc_dev->buffer_en_ch_steps = 0;
221 
222 	/* Flush FIFO of leftover data in the time it takes to disable adc */
223 	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
224 	for (i = 0; i < fifo1count; i++)
225 		read = tiadc_readl(adc_dev, REG_FIFO1);
226 
227 	return 0;
228 }
229 
230 static int tiadc_buffer_postdisable(struct iio_dev *indio_dev)
231 {
232 	tiadc_step_config(indio_dev);
233 
234 	return 0;
235 }
236 
237 static const struct iio_buffer_setup_ops tiadc_buffer_setup_ops = {
238 	.preenable = &tiadc_buffer_preenable,
239 	.postenable = &tiadc_buffer_postenable,
240 	.predisable = &tiadc_buffer_predisable,
241 	.postdisable = &tiadc_buffer_postdisable,
242 };
243 
244 static int tiadc_iio_buffered_hardware_setup(struct iio_dev *indio_dev,
245 	irqreturn_t (*pollfunc_bh)(int irq, void *p),
246 	irqreturn_t (*pollfunc_th)(int irq, void *p),
247 	int irq,
248 	unsigned long flags,
249 	const struct iio_buffer_setup_ops *setup_ops)
250 {
251 	int ret;
252 
253 	indio_dev->buffer = iio_kfifo_allocate(indio_dev);
254 	if (!indio_dev->buffer)
255 		return -ENOMEM;
256 
257 	ret = request_threaded_irq(irq,	pollfunc_th, pollfunc_bh,
258 				flags, indio_dev->name, indio_dev);
259 	if (ret)
260 		goto error_kfifo_free;
261 
262 	indio_dev->setup_ops = setup_ops;
263 	indio_dev->modes |= INDIO_BUFFER_HARDWARE;
264 
265 	ret = iio_buffer_register(indio_dev,
266 				  indio_dev->channels,
267 				  indio_dev->num_channels);
268 	if (ret)
269 		goto error_free_irq;
270 
271 	return 0;
272 
273 error_free_irq:
274 	free_irq(irq, indio_dev);
275 error_kfifo_free:
276 	iio_kfifo_free(indio_dev->buffer);
277 	return ret;
278 }
279 
280 static void tiadc_iio_buffered_hardware_remove(struct iio_dev *indio_dev)
281 {
282 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
283 
284 	free_irq(adc_dev->mfd_tscadc->irq, indio_dev);
285 	iio_kfifo_free(indio_dev->buffer);
286 	iio_buffer_unregister(indio_dev);
287 }
288 
289 
290 static const char * const chan_name_ain[] = {
291 	"AIN0",
292 	"AIN1",
293 	"AIN2",
294 	"AIN3",
295 	"AIN4",
296 	"AIN5",
297 	"AIN6",
298 	"AIN7",
299 };
300 
301 static int tiadc_channel_init(struct iio_dev *indio_dev, int channels)
302 {
303 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
304 	struct iio_chan_spec *chan_array;
305 	struct iio_chan_spec *chan;
306 	int i;
307 
308 	indio_dev->num_channels = channels;
309 	chan_array = kcalloc(channels,
310 			sizeof(struct iio_chan_spec), GFP_KERNEL);
311 	if (chan_array == NULL)
312 		return -ENOMEM;
313 
314 	chan = chan_array;
315 	for (i = 0; i < channels; i++, chan++) {
316 
317 		chan->type = IIO_VOLTAGE;
318 		chan->indexed = 1;
319 		chan->channel = adc_dev->channel_line[i];
320 		chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
321 		chan->datasheet_name = chan_name_ain[chan->channel];
322 		chan->scan_index = i;
323 		chan->scan_type.sign = 'u';
324 		chan->scan_type.realbits = 12;
325 		chan->scan_type.storagebits = 16;
326 	}
327 
328 	indio_dev->channels = chan_array;
329 
330 	return 0;
331 }
332 
333 static void tiadc_channels_remove(struct iio_dev *indio_dev)
334 {
335 	kfree(indio_dev->channels);
336 }
337 
338 static int tiadc_read_raw(struct iio_dev *indio_dev,
339 		struct iio_chan_spec const *chan,
340 		int *val, int *val2, long mask)
341 {
342 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
343 	int i, map_val;
344 	unsigned int fifo1count, read, stepid;
345 	bool found = false;
346 	u32 step_en;
347 	unsigned long timeout;
348 
349 	if (iio_buffer_enabled(indio_dev))
350 		return -EBUSY;
351 
352 	step_en = get_adc_chan_step_mask(adc_dev, chan);
353 	if (!step_en)
354 		return -EINVAL;
355 
356 	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
357 	while (fifo1count--)
358 		tiadc_readl(adc_dev, REG_FIFO1);
359 
360 	am335x_tsc_se_set_once(adc_dev->mfd_tscadc, step_en);
361 
362 	timeout = jiffies + usecs_to_jiffies
363 				(IDLE_TIMEOUT * adc_dev->channels);
364 	/* Wait for Fifo threshold interrupt */
365 	while (1) {
366 		fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
367 		if (fifo1count)
368 			break;
369 
370 		if (time_after(jiffies, timeout)) {
371 			am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
372 			return -EAGAIN;
373 		}
374 	}
375 	map_val = chan->channel + TOTAL_CHANNELS;
376 
377 	/*
378 	 * We check the complete FIFO. We programmed just one entry but in case
379 	 * something went wrong we left empty handed (-EAGAIN previously) and
380 	 * then the value apeared somehow in the FIFO we would have two entries.
381 	 * Therefore we read every item and keep only the latest version of the
382 	 * requested channel.
383 	 */
384 	for (i = 0; i < fifo1count; i++) {
385 		read = tiadc_readl(adc_dev, REG_FIFO1);
386 		stepid = read & FIFOREAD_CHNLID_MASK;
387 		stepid = stepid >> 0x10;
388 
389 		if (stepid == map_val) {
390 			read = read & FIFOREAD_DATA_MASK;
391 			found = true;
392 			*val = (u16) read;
393 		}
394 	}
395 	am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
396 
397 	if (found == false)
398 		return -EBUSY;
399 	return IIO_VAL_INT;
400 }
401 
402 static const struct iio_info tiadc_info = {
403 	.read_raw = &tiadc_read_raw,
404 	.driver_module = THIS_MODULE,
405 };
406 
407 static int tiadc_probe(struct platform_device *pdev)
408 {
409 	struct iio_dev		*indio_dev;
410 	struct tiadc_device	*adc_dev;
411 	struct device_node	*node = pdev->dev.of_node;
412 	struct property		*prop;
413 	const __be32		*cur;
414 	int			err;
415 	u32			val;
416 	int			channels = 0;
417 
418 	if (!node) {
419 		dev_err(&pdev->dev, "Could not find valid DT data.\n");
420 		return -EINVAL;
421 	}
422 
423 	indio_dev = devm_iio_device_alloc(&pdev->dev,
424 					  sizeof(struct tiadc_device));
425 	if (indio_dev == NULL) {
426 		dev_err(&pdev->dev, "failed to allocate iio device\n");
427 		return -ENOMEM;
428 	}
429 	adc_dev = iio_priv(indio_dev);
430 
431 	adc_dev->mfd_tscadc = ti_tscadc_dev_get(pdev);
432 
433 	of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
434 		adc_dev->channel_line[channels] = val;
435 		channels++;
436 	}
437 	adc_dev->channels = channels;
438 
439 	indio_dev->dev.parent = &pdev->dev;
440 	indio_dev->name = dev_name(&pdev->dev);
441 	indio_dev->modes = INDIO_DIRECT_MODE;
442 	indio_dev->info = &tiadc_info;
443 
444 	tiadc_step_config(indio_dev);
445 	tiadc_writel(adc_dev, REG_FIFO1THR, FIFO1_THRESHOLD);
446 
447 	err = tiadc_channel_init(indio_dev, adc_dev->channels);
448 	if (err < 0)
449 		return err;
450 
451 	err = tiadc_iio_buffered_hardware_setup(indio_dev,
452 		&tiadc_worker_h,
453 		&tiadc_irq_h,
454 		adc_dev->mfd_tscadc->irq,
455 		IRQF_SHARED,
456 		&tiadc_buffer_setup_ops);
457 
458 	if (err)
459 		goto err_free_channels;
460 
461 	err = iio_device_register(indio_dev);
462 	if (err)
463 		goto err_buffer_unregister;
464 
465 	platform_set_drvdata(pdev, indio_dev);
466 
467 	return 0;
468 
469 err_buffer_unregister:
470 	tiadc_iio_buffered_hardware_remove(indio_dev);
471 err_free_channels:
472 	tiadc_channels_remove(indio_dev);
473 	return err;
474 }
475 
476 static int tiadc_remove(struct platform_device *pdev)
477 {
478 	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
479 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
480 	u32 step_en;
481 
482 	iio_device_unregister(indio_dev);
483 	tiadc_iio_buffered_hardware_remove(indio_dev);
484 	tiadc_channels_remove(indio_dev);
485 
486 	step_en = get_adc_step_mask(adc_dev);
487 	am335x_tsc_se_clr(adc_dev->mfd_tscadc, step_en);
488 
489 	return 0;
490 }
491 
492 #ifdef CONFIG_PM
493 static int tiadc_suspend(struct device *dev)
494 {
495 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
496 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
497 	struct ti_tscadc_dev *tscadc_dev;
498 	unsigned int idle;
499 
500 	tscadc_dev = ti_tscadc_dev_get(to_platform_device(dev));
501 	if (!device_may_wakeup(tscadc_dev->dev)) {
502 		idle = tiadc_readl(adc_dev, REG_CTRL);
503 		idle &= ~(CNTRLREG_TSCSSENB);
504 		tiadc_writel(adc_dev, REG_CTRL, (idle |
505 				CNTRLREG_POWERDOWN));
506 	}
507 
508 	return 0;
509 }
510 
511 static int tiadc_resume(struct device *dev)
512 {
513 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
514 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
515 	unsigned int restore;
516 
517 	/* Make sure ADC is powered up */
518 	restore = tiadc_readl(adc_dev, REG_CTRL);
519 	restore &= ~(CNTRLREG_POWERDOWN);
520 	tiadc_writel(adc_dev, REG_CTRL, restore);
521 
522 	tiadc_step_config(indio_dev);
523 	am335x_tsc_se_set_cache(adc_dev->mfd_tscadc,
524 			adc_dev->buffer_en_ch_steps);
525 	return 0;
526 }
527 
528 static const struct dev_pm_ops tiadc_pm_ops = {
529 	.suspend = tiadc_suspend,
530 	.resume = tiadc_resume,
531 };
532 #define TIADC_PM_OPS (&tiadc_pm_ops)
533 #else
534 #define TIADC_PM_OPS NULL
535 #endif
536 
537 static const struct of_device_id ti_adc_dt_ids[] = {
538 	{ .compatible = "ti,am3359-adc", },
539 	{ }
540 };
541 MODULE_DEVICE_TABLE(of, ti_adc_dt_ids);
542 
543 static struct platform_driver tiadc_driver = {
544 	.driver = {
545 		.name   = "TI-am335x-adc",
546 		.owner	= THIS_MODULE,
547 		.pm	= TIADC_PM_OPS,
548 		.of_match_table = ti_adc_dt_ids,
549 	},
550 	.probe	= tiadc_probe,
551 	.remove	= tiadc_remove,
552 };
553 module_platform_driver(tiadc_driver);
554 
555 MODULE_DESCRIPTION("TI ADC controller driver");
556 MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
557 MODULE_LICENSE("GPL");
558