xref: /openbmc/linux/drivers/iio/adc/ti_am335x_adc.c (revision 275876e2)
1 /*
2  * TI ADC MFD driver
3  *
4  * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation version 2.
9  *
10  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11  * kind, whether express or implied; without even the implied warranty
12  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13  * GNU General Public License for more details.
14  */
15 
16 #include <linux/kernel.h>
17 #include <linux/err.h>
18 #include <linux/module.h>
19 #include <linux/slab.h>
20 #include <linux/interrupt.h>
21 #include <linux/platform_device.h>
22 #include <linux/io.h>
23 #include <linux/iio/iio.h>
24 #include <linux/of.h>
25 #include <linux/of_device.h>
26 #include <linux/iio/machine.h>
27 #include <linux/iio/driver.h>
28 
29 #include <linux/mfd/ti_am335x_tscadc.h>
30 #include <linux/iio/buffer.h>
31 #include <linux/iio/kfifo_buf.h>
32 
33 struct tiadc_device {
34 	struct ti_tscadc_dev *mfd_tscadc;
35 	int channels;
36 	u8 channel_line[8];
37 	u8 channel_step[8];
38 	int buffer_en_ch_steps;
39 	u16 data[8];
40 };
41 
42 static unsigned int tiadc_readl(struct tiadc_device *adc, unsigned int reg)
43 {
44 	return readl(adc->mfd_tscadc->tscadc_base + reg);
45 }
46 
47 static void tiadc_writel(struct tiadc_device *adc, unsigned int reg,
48 					unsigned int val)
49 {
50 	writel(val, adc->mfd_tscadc->tscadc_base + reg);
51 }
52 
53 static u32 get_adc_step_mask(struct tiadc_device *adc_dev)
54 {
55 	u32 step_en;
56 
57 	step_en = ((1 << adc_dev->channels) - 1);
58 	step_en <<= TOTAL_STEPS - adc_dev->channels + 1;
59 	return step_en;
60 }
61 
62 static u32 get_adc_chan_step_mask(struct tiadc_device *adc_dev,
63 		struct iio_chan_spec const *chan)
64 {
65 	int i;
66 
67 	for (i = 0; i < ARRAY_SIZE(adc_dev->channel_step); i++) {
68 		if (chan->channel == adc_dev->channel_line[i]) {
69 			u32 step;
70 
71 			step = adc_dev->channel_step[i];
72 			/* +1 for the charger */
73 			return 1 << (step + 1);
74 		}
75 	}
76 	WARN_ON(1);
77 	return 0;
78 }
79 
80 static u32 get_adc_step_bit(struct tiadc_device *adc_dev, int chan)
81 {
82 	return 1 << adc_dev->channel_step[chan];
83 }
84 
85 static void tiadc_step_config(struct iio_dev *indio_dev)
86 {
87 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
88 	unsigned int stepconfig;
89 	int i, steps;
90 
91 	/*
92 	 * There are 16 configurable steps and 8 analog input
93 	 * lines available which are shared between Touchscreen and ADC.
94 	 *
95 	 * Steps backwards i.e. from 16 towards 0 are used by ADC
96 	 * depending on number of input lines needed.
97 	 * Channel would represent which analog input
98 	 * needs to be given to ADC to digitalize data.
99 	 */
100 
101 	steps = TOTAL_STEPS - adc_dev->channels;
102 	if (iio_buffer_enabled(indio_dev))
103 		stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1
104 					| STEPCONFIG_MODE_SWCNT;
105 	else
106 		stepconfig = STEPCONFIG_AVG_16 | STEPCONFIG_FIFO1;
107 
108 	for (i = 0; i < adc_dev->channels; i++) {
109 		int chan;
110 
111 		chan = adc_dev->channel_line[i];
112 		tiadc_writel(adc_dev, REG_STEPCONFIG(steps),
113 				stepconfig | STEPCONFIG_INP(chan));
114 		tiadc_writel(adc_dev, REG_STEPDELAY(steps),
115 				STEPCONFIG_OPENDLY);
116 		adc_dev->channel_step[i] = steps;
117 		steps++;
118 	}
119 }
120 
121 static irqreturn_t tiadc_irq_h(int irq, void *private)
122 {
123 	struct iio_dev *indio_dev = private;
124 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
125 	unsigned int status, config;
126 	status = tiadc_readl(adc_dev, REG_IRQSTATUS);
127 
128 	/*
129 	 * ADC and touchscreen share the IRQ line.
130 	 * FIFO0 interrupts are used by TSC. Handle FIFO1 IRQs here only
131 	 */
132 	if (status & IRQENB_FIFO1OVRRUN) {
133 		/* FIFO Overrun. Clear flag. Disable/Enable ADC to recover */
134 		config = tiadc_readl(adc_dev, REG_CTRL);
135 		config &= ~(CNTRLREG_TSCSSENB);
136 		tiadc_writel(adc_dev, REG_CTRL, config);
137 		tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1OVRRUN
138 				| IRQENB_FIFO1UNDRFLW | IRQENB_FIFO1THRES);
139 		tiadc_writel(adc_dev, REG_CTRL, (config | CNTRLREG_TSCSSENB));
140 		return IRQ_HANDLED;
141 	} else if (status & IRQENB_FIFO1THRES) {
142 		/* Disable irq and wake worker thread */
143 		tiadc_writel(adc_dev, REG_IRQCLR, IRQENB_FIFO1THRES);
144 		return IRQ_WAKE_THREAD;
145 	}
146 
147 	return IRQ_NONE;
148 }
149 
150 static irqreturn_t tiadc_worker_h(int irq, void *private)
151 {
152 	struct iio_dev *indio_dev = private;
153 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
154 	int i, k, fifo1count, read;
155 	u16 *data = adc_dev->data;
156 
157 	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
158 	for (k = 0; k < fifo1count; k = k + i) {
159 		for (i = 0; i < (indio_dev->scan_bytes)/2; i++) {
160 			read = tiadc_readl(adc_dev, REG_FIFO1);
161 			data[i] = read & FIFOREAD_DATA_MASK;
162 		}
163 		iio_push_to_buffers(indio_dev, (u8 *) data);
164 	}
165 
166 	tiadc_writel(adc_dev, REG_IRQSTATUS, IRQENB_FIFO1THRES);
167 	tiadc_writel(adc_dev, REG_IRQENABLE, IRQENB_FIFO1THRES);
168 
169 	return IRQ_HANDLED;
170 }
171 
172 static int tiadc_buffer_preenable(struct iio_dev *indio_dev)
173 {
174 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
175 	int i, fifo1count, read;
176 
177 	tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
178 				IRQENB_FIFO1OVRRUN |
179 				IRQENB_FIFO1UNDRFLW));
180 
181 	/* Flush FIFO. Needed in corner cases in simultaneous tsc/adc use */
182 	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
183 	for (i = 0; i < fifo1count; i++)
184 		read = tiadc_readl(adc_dev, REG_FIFO1);
185 
186 	return 0;
187 }
188 
189 static int tiadc_buffer_postenable(struct iio_dev *indio_dev)
190 {
191 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
192 	struct iio_buffer *buffer = indio_dev->buffer;
193 	unsigned int enb = 0;
194 	u8 bit;
195 
196 	tiadc_step_config(indio_dev);
197 	for_each_set_bit(bit, buffer->scan_mask, adc_dev->channels)
198 		enb |= (get_adc_step_bit(adc_dev, bit) << 1);
199 	adc_dev->buffer_en_ch_steps = enb;
200 
201 	am335x_tsc_se_set_cache(adc_dev->mfd_tscadc, enb);
202 
203 	tiadc_writel(adc_dev,  REG_IRQSTATUS, IRQENB_FIFO1THRES
204 				| IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW);
205 	tiadc_writel(adc_dev,  REG_IRQENABLE, IRQENB_FIFO1THRES
206 				| IRQENB_FIFO1OVRRUN);
207 
208 	return 0;
209 }
210 
211 static int tiadc_buffer_predisable(struct iio_dev *indio_dev)
212 {
213 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
214 	int fifo1count, i, read;
215 
216 	tiadc_writel(adc_dev, REG_IRQCLR, (IRQENB_FIFO1THRES |
217 				IRQENB_FIFO1OVRRUN | IRQENB_FIFO1UNDRFLW));
218 	am335x_tsc_se_clr(adc_dev->mfd_tscadc, adc_dev->buffer_en_ch_steps);
219 	adc_dev->buffer_en_ch_steps = 0;
220 
221 	/* Flush FIFO of leftover data in the time it takes to disable adc */
222 	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
223 	for (i = 0; i < fifo1count; i++)
224 		read = tiadc_readl(adc_dev, REG_FIFO1);
225 
226 	return 0;
227 }
228 
229 static int tiadc_buffer_postdisable(struct iio_dev *indio_dev)
230 {
231 	tiadc_step_config(indio_dev);
232 
233 	return 0;
234 }
235 
236 static const struct iio_buffer_setup_ops tiadc_buffer_setup_ops = {
237 	.preenable = &tiadc_buffer_preenable,
238 	.postenable = &tiadc_buffer_postenable,
239 	.predisable = &tiadc_buffer_predisable,
240 	.postdisable = &tiadc_buffer_postdisable,
241 };
242 
243 static int tiadc_iio_buffered_hardware_setup(struct iio_dev *indio_dev,
244 	irqreturn_t (*pollfunc_bh)(int irq, void *p),
245 	irqreturn_t (*pollfunc_th)(int irq, void *p),
246 	int irq,
247 	unsigned long flags,
248 	const struct iio_buffer_setup_ops *setup_ops)
249 {
250 	struct iio_buffer *buffer;
251 	int ret;
252 
253 	buffer = iio_kfifo_allocate(indio_dev);
254 	if (!buffer)
255 		return -ENOMEM;
256 
257 	iio_device_attach_buffer(indio_dev, buffer);
258 
259 	ret = request_threaded_irq(irq,	pollfunc_th, pollfunc_bh,
260 				flags, indio_dev->name, indio_dev);
261 	if (ret)
262 		goto error_kfifo_free;
263 
264 	indio_dev->setup_ops = setup_ops;
265 	indio_dev->modes |= INDIO_BUFFER_HARDWARE;
266 
267 	ret = iio_buffer_register(indio_dev,
268 				  indio_dev->channels,
269 				  indio_dev->num_channels);
270 	if (ret)
271 		goto error_free_irq;
272 
273 	return 0;
274 
275 error_free_irq:
276 	free_irq(irq, indio_dev);
277 error_kfifo_free:
278 	iio_kfifo_free(indio_dev->buffer);
279 	return ret;
280 }
281 
282 static void tiadc_iio_buffered_hardware_remove(struct iio_dev *indio_dev)
283 {
284 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
285 
286 	free_irq(adc_dev->mfd_tscadc->irq, indio_dev);
287 	iio_kfifo_free(indio_dev->buffer);
288 	iio_buffer_unregister(indio_dev);
289 }
290 
291 
292 static const char * const chan_name_ain[] = {
293 	"AIN0",
294 	"AIN1",
295 	"AIN2",
296 	"AIN3",
297 	"AIN4",
298 	"AIN5",
299 	"AIN6",
300 	"AIN7",
301 };
302 
303 static int tiadc_channel_init(struct iio_dev *indio_dev, int channels)
304 {
305 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
306 	struct iio_chan_spec *chan_array;
307 	struct iio_chan_spec *chan;
308 	int i;
309 
310 	indio_dev->num_channels = channels;
311 	chan_array = kcalloc(channels,
312 			sizeof(struct iio_chan_spec), GFP_KERNEL);
313 	if (chan_array == NULL)
314 		return -ENOMEM;
315 
316 	chan = chan_array;
317 	for (i = 0; i < channels; i++, chan++) {
318 
319 		chan->type = IIO_VOLTAGE;
320 		chan->indexed = 1;
321 		chan->channel = adc_dev->channel_line[i];
322 		chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
323 		chan->datasheet_name = chan_name_ain[chan->channel];
324 		chan->scan_index = i;
325 		chan->scan_type.sign = 'u';
326 		chan->scan_type.realbits = 12;
327 		chan->scan_type.storagebits = 16;
328 	}
329 
330 	indio_dev->channels = chan_array;
331 
332 	return 0;
333 }
334 
335 static void tiadc_channels_remove(struct iio_dev *indio_dev)
336 {
337 	kfree(indio_dev->channels);
338 }
339 
340 static int tiadc_read_raw(struct iio_dev *indio_dev,
341 		struct iio_chan_spec const *chan,
342 		int *val, int *val2, long mask)
343 {
344 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
345 	int i, map_val;
346 	unsigned int fifo1count, read, stepid;
347 	bool found = false;
348 	u32 step_en;
349 	unsigned long timeout;
350 
351 	if (iio_buffer_enabled(indio_dev))
352 		return -EBUSY;
353 
354 	step_en = get_adc_chan_step_mask(adc_dev, chan);
355 	if (!step_en)
356 		return -EINVAL;
357 
358 	fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
359 	while (fifo1count--)
360 		tiadc_readl(adc_dev, REG_FIFO1);
361 
362 	am335x_tsc_se_set_once(adc_dev->mfd_tscadc, step_en);
363 
364 	timeout = jiffies + usecs_to_jiffies
365 				(IDLE_TIMEOUT * adc_dev->channels);
366 	/* Wait for Fifo threshold interrupt */
367 	while (1) {
368 		fifo1count = tiadc_readl(adc_dev, REG_FIFO1CNT);
369 		if (fifo1count)
370 			break;
371 
372 		if (time_after(jiffies, timeout)) {
373 			am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
374 			return -EAGAIN;
375 		}
376 	}
377 	map_val = adc_dev->channel_step[chan->scan_index];
378 
379 	/*
380 	 * We check the complete FIFO. We programmed just one entry but in case
381 	 * something went wrong we left empty handed (-EAGAIN previously) and
382 	 * then the value apeared somehow in the FIFO we would have two entries.
383 	 * Therefore we read every item and keep only the latest version of the
384 	 * requested channel.
385 	 */
386 	for (i = 0; i < fifo1count; i++) {
387 		read = tiadc_readl(adc_dev, REG_FIFO1);
388 		stepid = read & FIFOREAD_CHNLID_MASK;
389 		stepid = stepid >> 0x10;
390 
391 		if (stepid == map_val) {
392 			read = read & FIFOREAD_DATA_MASK;
393 			found = true;
394 			*val = (u16) read;
395 		}
396 	}
397 	am335x_tsc_se_adc_done(adc_dev->mfd_tscadc);
398 
399 	if (found == false)
400 		return -EBUSY;
401 	return IIO_VAL_INT;
402 }
403 
404 static const struct iio_info tiadc_info = {
405 	.read_raw = &tiadc_read_raw,
406 	.driver_module = THIS_MODULE,
407 };
408 
409 static int tiadc_probe(struct platform_device *pdev)
410 {
411 	struct iio_dev		*indio_dev;
412 	struct tiadc_device	*adc_dev;
413 	struct device_node	*node = pdev->dev.of_node;
414 	struct property		*prop;
415 	const __be32		*cur;
416 	int			err;
417 	u32			val;
418 	int			channels = 0;
419 
420 	if (!node) {
421 		dev_err(&pdev->dev, "Could not find valid DT data.\n");
422 		return -EINVAL;
423 	}
424 
425 	indio_dev = devm_iio_device_alloc(&pdev->dev,
426 					  sizeof(struct tiadc_device));
427 	if (indio_dev == NULL) {
428 		dev_err(&pdev->dev, "failed to allocate iio device\n");
429 		return -ENOMEM;
430 	}
431 	adc_dev = iio_priv(indio_dev);
432 
433 	adc_dev->mfd_tscadc = ti_tscadc_dev_get(pdev);
434 
435 	of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) {
436 		adc_dev->channel_line[channels] = val;
437 		channels++;
438 	}
439 	adc_dev->channels = channels;
440 
441 	indio_dev->dev.parent = &pdev->dev;
442 	indio_dev->name = dev_name(&pdev->dev);
443 	indio_dev->modes = INDIO_DIRECT_MODE;
444 	indio_dev->info = &tiadc_info;
445 
446 	tiadc_step_config(indio_dev);
447 	tiadc_writel(adc_dev, REG_FIFO1THR, FIFO1_THRESHOLD);
448 
449 	err = tiadc_channel_init(indio_dev, adc_dev->channels);
450 	if (err < 0)
451 		return err;
452 
453 	err = tiadc_iio_buffered_hardware_setup(indio_dev,
454 		&tiadc_worker_h,
455 		&tiadc_irq_h,
456 		adc_dev->mfd_tscadc->irq,
457 		IRQF_SHARED,
458 		&tiadc_buffer_setup_ops);
459 
460 	if (err)
461 		goto err_free_channels;
462 
463 	err = iio_device_register(indio_dev);
464 	if (err)
465 		goto err_buffer_unregister;
466 
467 	platform_set_drvdata(pdev, indio_dev);
468 
469 	return 0;
470 
471 err_buffer_unregister:
472 	tiadc_iio_buffered_hardware_remove(indio_dev);
473 err_free_channels:
474 	tiadc_channels_remove(indio_dev);
475 	return err;
476 }
477 
478 static int tiadc_remove(struct platform_device *pdev)
479 {
480 	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
481 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
482 	u32 step_en;
483 
484 	iio_device_unregister(indio_dev);
485 	tiadc_iio_buffered_hardware_remove(indio_dev);
486 	tiadc_channels_remove(indio_dev);
487 
488 	step_en = get_adc_step_mask(adc_dev);
489 	am335x_tsc_se_clr(adc_dev->mfd_tscadc, step_en);
490 
491 	return 0;
492 }
493 
494 #ifdef CONFIG_PM
495 static int tiadc_suspend(struct device *dev)
496 {
497 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
498 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
499 	struct ti_tscadc_dev *tscadc_dev;
500 	unsigned int idle;
501 
502 	tscadc_dev = ti_tscadc_dev_get(to_platform_device(dev));
503 	if (!device_may_wakeup(tscadc_dev->dev)) {
504 		idle = tiadc_readl(adc_dev, REG_CTRL);
505 		idle &= ~(CNTRLREG_TSCSSENB);
506 		tiadc_writel(adc_dev, REG_CTRL, (idle |
507 				CNTRLREG_POWERDOWN));
508 	}
509 
510 	return 0;
511 }
512 
513 static int tiadc_resume(struct device *dev)
514 {
515 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
516 	struct tiadc_device *adc_dev = iio_priv(indio_dev);
517 	unsigned int restore;
518 
519 	/* Make sure ADC is powered up */
520 	restore = tiadc_readl(adc_dev, REG_CTRL);
521 	restore &= ~(CNTRLREG_POWERDOWN);
522 	tiadc_writel(adc_dev, REG_CTRL, restore);
523 
524 	tiadc_step_config(indio_dev);
525 	am335x_tsc_se_set_cache(adc_dev->mfd_tscadc,
526 			adc_dev->buffer_en_ch_steps);
527 	return 0;
528 }
529 
530 static const struct dev_pm_ops tiadc_pm_ops = {
531 	.suspend = tiadc_suspend,
532 	.resume = tiadc_resume,
533 };
534 #define TIADC_PM_OPS (&tiadc_pm_ops)
535 #else
536 #define TIADC_PM_OPS NULL
537 #endif
538 
539 static const struct of_device_id ti_adc_dt_ids[] = {
540 	{ .compatible = "ti,am3359-adc", },
541 	{ }
542 };
543 MODULE_DEVICE_TABLE(of, ti_adc_dt_ids);
544 
545 static struct platform_driver tiadc_driver = {
546 	.driver = {
547 		.name   = "TI-am335x-adc",
548 		.owner	= THIS_MODULE,
549 		.pm	= TIADC_PM_OPS,
550 		.of_match_table = ti_adc_dt_ids,
551 	},
552 	.probe	= tiadc_probe,
553 	.remove	= tiadc_remove,
554 };
555 module_platform_driver(tiadc_driver);
556 
557 MODULE_DESCRIPTION("TI ADC controller driver");
558 MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
559 MODULE_LICENSE("GPL");
560